arm gpu ddr rate is limited by cpufreq_frequency_table in board-xxx.c

diff --git a/arch/arm/mach-rk30/board-rk3168-tb.c b/arch/arm/mach-rk30/board-rk3168-tb.c
index 063ac07979d5059ae2604039a54f2c6502826fe6..0ed26c3b35dbaff77edca932ab5a933eb56b470f 100755 (executable)
--- a/arch/arm/mach-rk30/board-rk3168-tb.c
+++ b/arch/arm/mach-rk30/board-rk3168-tb.c
@@ -1978,13 +1978,18 @@ static struct cpufreq_frequency_table dvfs_arm_table[] = {
         {.frequency = CPUFREQ_TABLE_END},
 };
 
-static struct cpufreq_frequency_table dvfs_gpu_table[] = {
-        {.frequency = 100 * 1000,       .index = 900 * 1000},
-        {.frequency = 200 * 1000,       .index = 950 * 1000},
-        {.frequency = 266 * 1000,       .index = 950 * 1000},
-        {.frequency = 300 * 1000,       .index = 950 * 1000},
-        {.frequency = 400 * 1000,       .index = 1000 * 1000},
-        {.frequency = 600 * 1000,       .index = 1100 * 1000},
+static struct cpufreq_frequency_table dvfs_gpu_table[] = {     
+#if defined(CONFIG_ARCH_RK3188)
+        {.frequency = 133 * 1000,       .index = 900 * 1000},//the mininum rate is limited 133M for rk3188
+#elif defined(CONFIG_ARCH_RK3066B)
+       {.frequency = 100 * 1000,       .index = 900 * 1000},//the minimum rate is no limit for rk3168 rk3066B
+#endif
+
+       {.frequency = 200 * 1000,       .index = 950 * 1000},
+       {.frequency = 266 * 1000,       .index = 950 * 1000},
+       {.frequency = 300 * 1000,       .index = 950 * 1000},
+       {.frequency = 400 * 1000,       .index = 1000 * 1000},
+       {.frequency = 600 * 1000,       .index = 1100 * 1000},
         {.frequency = CPUFREQ_TABLE_END},
 };
 

diff --git a/arch/arm/mach-rk30/cpufreq.c b/arch/arm/mach-rk30/cpufreq.c
old mode 100644 (file)
new mode 100755 (executable)
index 047d61f..e421a64
--- a/arch/arm/mach-rk30/cpufreq.c
+++ b/arch/arm/mach-rk30/cpufreq.c
@@ -284,9 +284,7 @@ static int rk30_cpu_init(struct cpufreq_policy *policy)
                clk_enable_dvfs(cpu_clk);
 
 #if !defined(CONFIG_ARCH_RK3066B)
-#if defined(CONFIG_ARCH_RK3188)
-               dvfs_clk_enable_limit(gpu_clk, 133000000, 600000000);
-#else
+#if defined(CONFIG_ARCH_RK30)
                /* Limit gpu frequency between 133M to 400M */
                dvfs_clk_enable_limit(gpu_clk, 133000000, 400000000);
 #endif

diff --git a/arch/arm/mach-rk30/dvfs.c b/arch/arm/mach-rk30/dvfs.c
old mode 100644 (file)
new mode 100755 (executable)
index e614f3f..10ba749
--- a/arch/arm/mach-rk30/dvfs.c
+++ b/arch/arm/mach-rk30/dvfs.c
@@ -170,13 +170,13 @@ int dvfs_target_cpu(struct clk *clk, unsigned long rate_hz)
        }\r
 \r
        /* Check limit rate */\r
-       if (dvfs_clk->freq_limit_en) {\r
+       //if (dvfs_clk->freq_limit_en) {\r
                if (rate_hz < dvfs_clk->min_rate) {\r
                        rate_hz = dvfs_clk->min_rate;\r
                } else if (rate_hz > dvfs_clk->max_rate) {\r
                        rate_hz = dvfs_clk->max_rate;\r
                }\r
-       }\r
+       //}\r
 \r
        /* need round rate */\r
        rate_old = clk_get_rate(clk);\r
@@ -303,13 +303,13 @@ int dvfs_target_core(struct clk *clk, unsigned long rate_hz)
        }\r
 \r
        /* Check limit rate */\r
-       if (dvfs_clk->freq_limit_en) {\r
+       //if (dvfs_clk->freq_limit_en) {\r
                if (rate_hz < dvfs_clk->min_rate) {\r
                        rate_hz = dvfs_clk->min_rate;\r
                } else if (rate_hz > dvfs_clk->max_rate) {\r
                        rate_hz = dvfs_clk->max_rate;\r
                }\r
-       }\r
+       //}\r
 \r
        /* need round rate */\r
        rate_old = clk_get_rate(clk);\r

diff --git a/arch/arm/plat-rk/dvfs.c b/arch/arm/plat-rk/dvfs.c
index 36e8332352e60a6bf8b33e418d610602a695096b..48de782dd988cf4537a1c7a5715aafd70dd916ff 100755 (executable)
--- a/arch/arm/plat-rk/dvfs.c
+++ b/arch/arm/plat-rk/dvfs.c
@@ -254,14 +254,43 @@ struct cpufreq_frequency_table *dvfs_get_freq_volt_table(struct clk *clk)
        return table;\r
 }\r
 \r
+\r
 int dvfs_set_freq_volt_table(struct clk *clk, struct cpufreq_frequency_table *table)\r
 {\r
        struct clk_node *info = clk_get_dvfs_info(clk);\r
-       if (!table || !info)\r
+       int i=0;\r
+\r
+       if (!info)\r
+               return -1;      \r
+       if (!table)\r
+       {               \r
+               info->min_rate=0;       \r
+               info->max_rate=0;       \r
                return -1;\r
+       }\r
 \r
        mutex_lock(&mutex);\r
        info->dvfs_table = table;\r
+       if(table[0].frequency!= CPUFREQ_TABLE_END)\r
+       {\r
+\r
+               info->min_rate=(table[0].frequency/1000)*1000*1000;//to hz\r
+       }\r
+       else\r
+       {\r
+               info->min_rate=0;       \r
+               info->max_rate=0;       \r
+               return -1;\r
+       }\r
+\r
+       for(i=0;table[i].frequency!= CPUFREQ_TABLE_END;i++)\r
+       {\r
+       \r
+       }       \r
+       info->max_rate=(table[i-1].frequency/1000)*1000*1000;\r
+\r
+       DVFS_DBG("%s,clk %s,limit max=%lu,min=%lu\n",__FUNCTION__,info->name,info->max_rate,info->min_rate);\r
+\r
        mutex_unlock(&mutex);\r
        return 0;\r
 }\r