//discrete dcdc device
#ifdef CONFIG_RK30_PWM_REGULATOR
dcdc = regulator_get(NULL, "vdd_core"); // vdd_log
- regulator_set_voltage(dcdc, 1100000, 1100000);
+ regulator_set_voltage(dcdc, 1050000, 1050000);
regulator_enable(dcdc);
printk("%s set vdd_core=%dmV end\n", __func__, regulator_get_voltage(dcdc));
regulator_put(dcdc);
//{.frequency = 252*1000, .index = 980*1000},
//{.frequency = 504*1000, .index = 980*1000},
{.frequency = 816*1000, .index = 1050*1000},
- //{.frequency = 1008*1000,.index = 1150*1000},
- //{.frequency = 1200*1000,.index = 1250*1000},
+ {.frequency = 1008*1000,.index = 1150*1000},
+ {.frequency = 1200*1000,.index = 1250*1000},
//{.frequency = 1416*1000,.index = 1280*1000},
//{.frequency = 1512*1000,.index = 1320*1000},
//{.frequency = 1560*1000,.index = 1350*1000},
#endif\r
\r
const static int pwm_voltage_map[] = {\r
- 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, 1325000, 1350000, 1375000, 1420000\r
+ 850000,875000,900000,925000,950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, 1325000\r
};\r
\r
static struct clk *pwm_clk[2];\r
clkrate = clk_get_rate(pwm_clk[1]);\r
\r
DBG("%s:id=%d,rate=%d,clkrate=%d\n",__func__,id,rate,clkrate);\r
- \r
+\r
if(rate == 0)\r
{\r
// iomux pwm to gpio\r
dcdc->pdata->pwm_voltage = vol;\r
\r
// VDD12 = 1.42 - 0.56*D , ÆäÖÐDΪPWMÕ¼¿Õ±È, \r
- pwm_value = (1420000-vol)/5600; // pwm_value %\r
+ pwm_value = (1325000-vol)/5800; // pwm_value %\r
\r
\r
if (pwm_set_rate(dcdc->pdata,1000*1000,pwm_value)!=0)\r
*selector = i;\r
#endif\r
\r
- DBG("%s: set successful,pwm_value=%d\n",__FUNCTION__,pwm_value);\r
+ DBG("%s:ok,vol=%d,pwm_value=%d\n",__FUNCTION__,vol,pwm_value);\r
\r
return 0;\r
\r