UPSTREAM: PCI: rockchip: Set vendor ID from local core config space

The TRM says the vendor ID in the RC's configure space can be rewritten
and the value must be the same as the value read from the local core
configure space.  But we misread that and didn't notice it before.  Actually
we should only able to rewrite it from the local core configure space.

Fix that issue to make lspci show the correct IP vendor infomation.

Change-Id: Ia33bc0c10970649cc86bd02136f0ee997f18246d
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
(cherry picked from 5800790a925b0aefb621ae3da86668c3a2867750)

diff --git a/drivers/pci/host/pcie-rockchip.c b/drivers/pci/host/pcie-rockchip.c
index f058cd544a23da6ed3f6f57aca85ded29cd0cdb5..c94f51e79ad4dcbc41809408dd4b1b5507ee6319 100644 (file)
--- a/drivers/pci/host/pcie-rockchip.c
+++ b/drivers/pci/host/pcie-rockchip.c
@@ -125,6 +125,7 @@
 #define   PCIE_CORE_INT_CT                     BIT(11)
 #define   PCIE_CORE_INT_UTC                    BIT(18)
 #define   PCIE_CORE_INT_MMVC                   BIT(19)
+#define PCIE_CORE_CONFIG_VENDOR                (PCIE_CORE_CTRL_MGMT_BASE + 0x44)
 #define PCIE_CORE_INT_MASK             (PCIE_CORE_CTRL_MGMT_BASE + 0x210)
 #define PCIE_RC_BAR_CONF               (PCIE_CORE_CTRL_MGMT_BASE + 0x300)
 
@@ -138,7 +139,6 @@
                 PCIE_CORE_INT_MMVC)
 
 #define PCIE_RC_CONFIG_BASE            0xa00000
-#define PCIE_RC_CONFIG_VENDOR          (PCIE_RC_CONFIG_BASE + 0x00)
 #define PCIE_RC_CONFIG_RID_CCR         (PCIE_RC_CONFIG_BASE + 0x08)
 #define   PCIE_RC_CONFIG_SCC_SHIFT             16
 #define PCIE_RC_CONFIG_DCR             (PCIE_RC_CONFIG_BASE + 0xc4)
@@ -637,7 +637,7 @@ static int rockchip_pcie_init_port(struct rockchip_pcie *rockchip)
        dev_dbg(dev, "current link width is x%d\n", status);
 
        rockchip_pcie_write(rockchip, ROCKCHIP_VENDOR_ID,
-                           PCIE_RC_CONFIG_VENDOR);
+                           PCIE_CORE_CONFIG_VENDOR);
        rockchip_pcie_write(rockchip,
                            PCI_CLASS_BRIDGE_PCI << PCIE_RC_CONFIG_SCC_SHIFT,
                            PCIE_RC_CONFIG_RID_CCR);