imx/mach-mx2: use constants namespaced by the corresponding SOC (easy part)
authorUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Wed, 9 Dec 2009 10:32:11 +0000 (11:32 +0100)
committerUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Tue, 5 Jan 2010 09:10:07 +0000 (10:10 +0100)
This just leaves devices.c, generic.c and serial.c to clean up.  As
these files are used on more than one SOC they need some more work.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Rabin Vincent <rabin@rab.in>
Cc: Javier Martin <javier.martin@vista-silicon.com>
Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
Cc: Jean Delvare <khali@linux-fr.org>
Cc: Eric Benard <eric@eukrea.com>
Cc: Ivo Clarysse <ivo.clarysse@gmail.com>
Cc: Vladimir Barinov <vbarinov@embeddedalley.com>
Cc: Daniel Schaeffer <daniel.schaeffer@timesys.com>
Cc: Simon POLETTE <spolette@adnlysd018.(none)>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Alan Carvalho de Assis <acassis@gmail.com>
Cc: Luotao Fu <l.fu@pengutronix.de>
12 files changed:
arch/arm/mach-mx2/clock_imx21.c
arch/arm/mach-mx2/clock_imx27.c
arch/arm/mach-mx2/cpu_imx27.c
arch/arm/mach-mx2/eukrea_cpuimx27.c
arch/arm/mach-mx2/mx21ads.c
arch/arm/mach-mx2/mx27ads.c
arch/arm/mach-mx2/mx27lite.c
arch/arm/mach-mx2/mx27pdk.c
arch/arm/mach-mx2/mxt_td60.c
arch/arm/mach-mx2/pca100.c
arch/arm/mach-mx2/pcm038.c
arch/arm/mach-mx2/pcm970-baseboard.c

index 1922e531ba46ff496e736034c71fa457af060027..6ab3c729a45625a45847d7468a1c28d10f961917 100644 (file)
@@ -28,7 +28,7 @@
 #include <asm/clkdev.h>
 #include <asm/div64.h>
 
-#define IO_ADDR_CCM(off)       (IO_ADDRESS(CCM_BASE_ADDR) + (off))
+#define IO_ADDR_CCM(off)       (IO_ADDRESS(MX21_CCM_BASE_ADDR) + (off))
 
 /* Register offsets */
 #define CCM_CSCR               IO_ADDR_CCM(0x0)
@@ -1235,6 +1235,7 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
        clk_enable(&uart_clk[0]);
 #endif
 
-       mxc_timer_init(&gpt_clk[0], IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
+       mxc_timer_init(&gpt_clk[0], IO_ADDRESS(MX21_GPT1_BASE_ADDR),
+                       MX21_INT_GPT1);
        return 0;
 }
index a53320860986bbfaaf071edbfc2c193fc7fd10ff..6db98566a720865697db770edf711c5e2b22f1e8 100644 (file)
@@ -29,7 +29,7 @@
 #include <mach/common.h>
 #include <mach/hardware.h>
 
-#define IO_ADDR_CCM(off)       (IO_ADDRESS(CCM_BASE_ADDR) + (off))
+#define IO_ADDR_CCM(off)       (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off))
 
 /* Register offsets */
 #define CCM_CSCR               IO_ADDR_CCM(0x0)
@@ -757,7 +757,8 @@ int __init mx27_clocks_init(unsigned long fref)
        clk_enable(&uart1_clk);
 #endif
 
-       mxc_timer_init(&gpt1_clk, IO_ADDRESS(GPT1_BASE_ADDR), MXC_INT_GPT1);
+       mxc_timer_init(&gpt1_clk, IO_ADDRESS(MX27_GPT1_BASE_ADDR),
+                       MX27_INT_GPT1);
 
        return 0;
 }
index d9e3bf9644c9e46aefd629f751c9de15b883dc04..8c50c5e7c03392f5d667e116c54340daa08868fd 100644 (file)
@@ -39,7 +39,7 @@ static void query_silicon_parameter(void)
         * the silicon revision very early we read it here to
         * avoid any further hooks
        */
-       val = __raw_readl(IO_ADDRESS(SYSCTRL_BASE_ADDR) + SYS_CHIP_ID);
+       val = __raw_readl(IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR) + SYS_CHIP_ID);
 
        cpu_silicon_rev = (int)(val >> 28);
        cpu_partnumber = (int)((val >> 12) & 0xFFFF);
index 7b187606682c8724505be2cad58a38d5d77242ce..8e4f3d08e32cac008fa358cf3f184a4d3d07bcbd 100644 (file)
@@ -142,28 +142,28 @@ static struct i2c_board_info eukrea_cpuimx27_i2c_devices[] = {
 #if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
 static struct plat_serial8250_port serial_platform_data[] = {
        {
-               .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x200000),
+               .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x200000),
                .irq = IRQ_GPIOB(23),
                .uartclk = 14745600,
                .regshift = 1,
                .iotype = UPIO_MEM,
                .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
        }, {
-               .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x400000),
+               .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x400000),
                .irq = IRQ_GPIOB(22),
                .uartclk = 14745600,
                .regshift = 1,
                .iotype = UPIO_MEM,
                .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
        }, {
-               .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x800000),
+               .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x800000),
                .irq = IRQ_GPIOB(27),
                .uartclk = 14745600,
                .regshift = 1,
                .iotype = UPIO_MEM,
                .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
        }, {
-               .mapbase = (unsigned long)(CS3_BASE_ADDR + 0x1000000),
+               .mapbase = (unsigned long)(MX27_CS3_BASE_ADDR + 0x1000000),
                .irq = IRQ_GPIOB(30),
                .uartclk = 14745600,
                .regshift = 1,
@@ -224,8 +224,8 @@ static struct sys_timer eukrea_cpuimx27_timer = {
 };
 
 MACHINE_START(CPUIMX27, "EUKREA CPUIMX27")
-       .phys_io        = AIPI_BASE_ADDR,
-       .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+       .phys_io        = MX27_AIPI_BASE_ADDR,
+       .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
        .boot_params    = PHYS_OFFSET + 0x100,
        .map_io         = mx27_map_io,
        .init_irq       = mx27_init_irq,
index cf5f77cbc2f1c6d9685e7baf33150690fb3ff53b..eb4a6e855595bea498861d139bee09af62c7e5be 100644 (file)
@@ -118,8 +118,8 @@ static struct physmap_flash_data mx21ads_flash_data = {
 };
 
 static struct resource mx21ads_flash_resource = {
-       .start = CS0_BASE_ADDR,
-       .end = CS0_BASE_ADDR + 0x02000000 - 1,
+       .start = MX21_CS0_BASE_ADDR,
+       .end = MX21_CS0_BASE_ADDR + 0x02000000 - 1,
        .flags = IORESOURCE_MEM,
 };
 
@@ -242,7 +242,7 @@ static struct map_desc mx21ads_io_desc[] __initdata = {
         */
        {
                .virtual = MX21ADS_MMIO_BASE_ADDR,
-               .pfn = __phys_to_pfn(CS1_BASE_ADDR),
+               .pfn = __phys_to_pfn(MX21_CS1_BASE_ADDR),
                .length = MX21ADS_MMIO_SIZE,
                .type = MT_DEVICE,
        },
@@ -284,8 +284,8 @@ static struct sys_timer mx21ads_timer = {
 
 MACHINE_START(MX21ADS, "Freescale i.MX21ADS")
        /* maintainer: Freescale Semiconductor, Inc. */
-       .phys_io        = AIPI_BASE_ADDR,
-       .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+       .phys_io        = MX21_AIPI_BASE_ADDR,
+       .io_pg_offst    = ((MX21_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
        .boot_params    = PHYS_OFFSET + 0x100,
        .map_io         = mx21ads_map_io,
        .init_irq       = mx21_init_irq,
index 83e412b713e679881cdfddb988d6af66474191b8..385fc1c9ad3894a1b5767779ab68db4f8cad41aa 100644 (file)
@@ -320,7 +320,7 @@ static struct sys_timer mx27ads_timer = {
 static struct map_desc mx27ads_io_desc[] __initdata = {
        {
                .virtual = PBC_BASE_ADDRESS,
-               .pfn = __phys_to_pfn(CS4_BASE_ADDR),
+               .pfn = __phys_to_pfn(MX27_CS4_BASE_ADDR),
                .length = SZ_1M,
                .type = MT_DEVICE,
        },
@@ -334,8 +334,8 @@ static void __init mx27ads_map_io(void)
 
 MACHINE_START(MX27ADS, "Freescale i.MX27ADS")
        /* maintainer: Freescale Semiconductor, Inc. */
-       .phys_io        = AIPI_BASE_ADDR,
-       .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+       .phys_io        = MX27_AIPI_BASE_ADDR,
+       .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
        .boot_params    = PHYS_OFFSET + 0x100,
        .map_io         = mx27ads_map_io,
        .init_irq       = mx27_init_irq,
index 82ea227ea0cfca3f0092bbea36de6ccf27aa3880..ca6ab1265f3eed13c15489f1089070ca94dc2523 100644 (file)
@@ -85,8 +85,8 @@ static struct sys_timer mx27lite_timer = {
 };
 
 MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE")
-       .phys_io        = AIPI_BASE_ADDR,
-       .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+       .phys_io        = MX27_AIPI_BASE_ADDR,
+       .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
        .boot_params    = PHYS_OFFSET + 0x100,
        .map_io         = mx27_map_io,
        .init_irq       = mx27_init_irq,
index 6761d1b79e438fd666c419e5e482b799227b0b1b..595fea46b6f7a63afcdae6ae006908f4675a2379 100644 (file)
@@ -85,8 +85,8 @@ static struct sys_timer mx27pdk_timer = {
 
 MACHINE_START(MX27_3DS, "Freescale MX27PDK")
        /* maintainer: Freescale Semiconductor, Inc. */
-       .phys_io        = AIPI_BASE_ADDR,
-       .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+       .phys_io        = MX27_AIPI_BASE_ADDR,
+       .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
        .boot_params    = PHYS_OFFSET + 0x100,
        .map_io         = mx27_map_io,
        .init_irq       = mx27_init_irq,
index 8bcc1a5b88296d7460ee43b9af04ec5ca51bf9e3..9ed4e492fc73e036c33fdd3a4945e64eab0fcf18 100644 (file)
@@ -284,8 +284,8 @@ static struct sys_timer mxt_td60_timer = {
 
 MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60")
        /* maintainer: Maxtrack Industrial */
-       .phys_io        = AIPI_BASE_ADDR,
-       .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+       .phys_io        = MX27_AIPI_BASE_ADDR,
+       .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
        .boot_params    = PHYS_OFFSET + 0x100,
        .map_io         = mx27_map_io,
        .init_irq       = mx27_init_irq,
index aea3d340d2e16a5cceea105b0cc83c77113369bd..55dbf5a64e00628d57ea893c601273a1b313f660 100644 (file)
@@ -233,8 +233,8 @@ static struct sys_timer pca100_timer = {
 };
 
 MACHINE_START(PCA100, "phyCARD-i.MX27")
-       .phys_io        = AIPI_BASE_ADDR,
-       .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+       .phys_io        = MX27_AIPI_BASE_ADDR,
+       .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
        .boot_params    = PHYS_OFFSET + 0x100,
        .map_io         = mx27_map_io,
        .init_irq       = mx27_init_irq,
index 906d59b0a7aa4912275c0947beeecab7c27af1aa..a2e2ea16c1360cfc06f707473e2eaf4ba4151ecf 100644 (file)
@@ -108,8 +108,8 @@ static struct platdata_mtd_ram pcm038_sram_data = {
 };
 
 static struct resource pcm038_sram_resource = {
-       .start = CS1_BASE_ADDR,
-       .end   = CS1_BASE_ADDR + 512 * 1024 - 1,
+       .start = MX27_CS1_BASE_ADDR,
+       .end   = MX27_CS1_BASE_ADDR + 512 * 1024 - 1,
        .flags = IORESOURCE_MEM,
 };
 
@@ -328,8 +328,8 @@ static struct sys_timer pcm038_timer = {
 };
 
 MACHINE_START(PCM038, "phyCORE-i.MX27")
-       .phys_io        = AIPI_BASE_ADDR,
-       .io_pg_offst    = ((AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
+       .phys_io        = MX27_AIPI_BASE_ADDR,
+       .io_pg_offst    = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
        .boot_params    = PHYS_OFFSET + 0x100,
        .map_io         = mx27_map_io,
        .init_irq       = mx27_init_irq,
index 3cb7f457e5d08fda5cbeaa0b1cad45a0680a7e2c..60d54465ada1fa19da94814cf08e960e8b7af7c4 100644 (file)
@@ -190,8 +190,8 @@ static struct imx_fb_platform_data pcm038_fb_data = {
 
 static struct resource pcm970_sja1000_resources[] = {
        {
-               .start   = CS4_BASE_ADDR,
-               .end     = CS4_BASE_ADDR + 0x100 - 1,
+               .start   = MX27_CS4_BASE_ADDR,
+               .end     = MX27_CS4_BASE_ADDR + 0x100 - 1,
                .flags   = IORESOURCE_MEM,
        }, {
                .start   = IRQ_GPIOE(19),