rk312x: fix i2c base address error
authorwdc <wdc@rock-chips.com>
Mon, 4 Aug 2014 06:28:33 +0000 (14:28 +0800)
committerwdc <wdc@rock-chips.com>
Mon, 4 Aug 2014 06:28:33 +0000 (14:28 +0800)
arch/arm/boot/dts/rk312x.dtsi

index 8908a437f381a5f88504d972312fff7cae506fd7..5c6cbc1ca09161355a25dad36fa211cbe89a3451 100755 (executable)
                                <&clk_gates1 0>;/*pclk_pmu_pre*/
        };
 
-       i2c0: i2c@20070000 {
+       i2c0: i2c@20072000 {
                compatible = "rockchip,rk30-i2c";
-               reg = <0x20070000 0x1000>;
+               reg = <0x20072000 0x1000>;
                interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
        };
 
-       i2c1: i2c@20054000 {
+       i2c1: i2c@20056000 {
                compatible = "rockchip,rk30-i2c";
-               reg = <0x20054000 0x1000>;
+               reg = <0x20056000 0x1000>;
                interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
        };
 
-       i2c2: i2c@20058000 {
+       i2c2: i2c@2005a000 {
                compatible = "rockchip,rk30-i2c";
-               reg = <0x20058000 0x1000>;
+               reg = <0x2005a000 0x1000>;
                interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;
                status = "disabled";
        };
 
-       i2c3: i2c@2005c000 {
+       i2c3: i2c@2005e000 {
                compatible = "rockchip,rk30-i2c";
-               reg = <0x2005C000 0x1000>;
+               reg = <0x2005e000 0x1000>;
                interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
                #address-cells = <1>;
                #size-cells = <0>;