#ifdef CONFIG_VIVANTE
+#define GPU_HIGH_CLOCK 552
+#define GPU_LOW_CLOCK 300
static struct resource resources_gpu[] = {
[0] = {
.name = "gpu_irq",
.flags = IORESOURCE_IRQ,
},
[1] = {
- .name = "gpu_base",
+ .name = "gpu_base",
.start = RK29_GPU_PHYS,
.end = RK29_GPU_PHYS + RK29_GPU_SIZE,
.flags = IORESOURCE_MEM,
},
[2] = {
- .name = "gpu_mem",
+ .name = "gpu_mem",
.start = PMEM_GPU_BASE,
.end = PMEM_GPU_BASE + PMEM_GPU_SIZE,
.flags = IORESOURCE_MEM,
},
+ [3] = {
+ .name = "gpu_clk",
+ .start = GPU_LOW_CLOCK,
+ .end = GPU_HIGH_CLOCK,
+ .flags = IORESOURCE_IO,
+ },
};
static struct platform_device rk29_device_gpu = {
.name = "galcore",
.resource = resources_gpu,
};
#endif
+
#ifdef CONFIG_KEYS_RK29
extern struct rk29_keys_platform_data rk29_keys_pdata;
static struct platform_device rk29_device_keys = {
#ifdef CONFIG_VIVANTE
+#define GPU_HIGH_CLOCK 552
+#define GPU_LOW_CLOCK 300
static struct resource resources_gpu[] = {
[0] = {
.name = "gpu_irq",
.flags = IORESOURCE_IRQ,
},
[1] = {
- .name = "gpu_base",
+ .name = "gpu_base",
.start = RK29_GPU_PHYS,
.end = RK29_GPU_PHYS + RK29_GPU_SIZE,
.flags = IORESOURCE_MEM,
},
[2] = {
- .name = "gpu_mem",
+ .name = "gpu_mem",
.start = PMEM_GPU_BASE,
.end = PMEM_GPU_BASE + PMEM_GPU_SIZE,
.flags = IORESOURCE_MEM,
},
+ [3] = {
+ .name = "gpu_clk",
+ .start = GPU_LOW_CLOCK,
+ .end = GPU_HIGH_CLOCK,
+ .flags = IORESOURCE_IO,
+ },
};
static struct platform_device rk29_device_gpu = {
.name = "galcore",
.resource = resources_gpu,
};
#endif
+
#ifdef CONFIG_KEYS_RK29
extern struct rk29_keys_platform_data rk29_keys_pdata;
static struct platform_device rk29_device_keys = {
gceCHIPPOWERSTATE lastState = gcvPOWER_IDLE;
int lasthighfreq = 0;
extern int needhighfreq;
+extern int lowfreq;
+extern int highfreq;
struct clk *clk_gpu = NULL;
inline void get_idle_change(gceCHIPPOWERSTATE State)
{
if(gcvPOWER_ON!=lastState && gcvPOWER_ON==State) //gcvPOWER_IDLE->gcvPOWER_ON
{
if(lasthighfreq != needhighfreq) {
- int gpufreq = needhighfreq ? 552 : 360;
+ int gpufreq = needhighfreq ? highfreq : lowfreq;
+ if(gpufreq<24) gpufreq = 24;
+ if(gpufreq>600) gpufreq = 600;
+
clk_gpu = clk_get(NULL, "gpu");
- clk_set_parent(clk_gpu, clk_get(NULL, "general_pll"));
- clk_set_rate(clk_get(NULL, "codec_pll"), gpufreq*1000000);
clk_set_rate(clk_gpu, gpufreq*1000000);
- clk_set_parent(clk_gpu, clk_get(NULL, "codec_pll"));
+
lasthighfreq = needhighfreq;
printk("gpu: change freq to %d \n", gpufreq);
#include <linux/timer.h>
struct timer_list gpu_timer;
int needhighfreq = 0;
+int lowfreq = 300;
+int highfreq = 552;
void mod_gpu_timer(void)
{
mod_timer(&gpu_timer, jiffies + 3*HZ);
{
int ret = -ENODEV;
struct resource *res;
- res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,"gpu_irq");
+ res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "gpu_irq");
if (!res) {
printk(KERN_ERR "%s: No irq line supplied.\n",__FUNCTION__);
goto gpu_probe_fail;
}
irqLine = res->start;
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM,"gpu_base");
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gpu_base");
if (!res) {
printk(KERN_ERR "%s: No register base supplied.\n",__FUNCTION__);
goto gpu_probe_fail;
// dkm: ²»ÄÜ+1
registerMemSize = res->end - res->start;
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM,"gpu_mem");
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gpu_mem");
if (!res) {
printk(KERN_ERR "%s: No memory base supplied.\n",__FUNCTION__);
goto gpu_probe_fail;
// dkm: ²»ÄÜ+1
contiguousSize = res->end - res->start;
+ res = platform_get_resource_byname(pdev, IORESOURCE_IO, "gpu_clk");
+ if (!res) {
+ printk(KERN_ERR "%s: No gpu clk supplied, use default!\n", __FUNCTION__);
+ } else {
+ coreClock = res->end * 1000000;
+// dkm: gcdENABLE_AUTO_FREQ
+#if (2==gcdENABLE_AUTO_FREQ)
+ lowfreq = res->start;
+ highfreq = res->end;
+#endif
+ }
+
// dkm: gcdENABLE_AUTO_FREQ
#if (1==gcdENABLE_AUTO_FREQ)
init_timer(&gpu_timer);