Fix crashes when scheduling a CopyToReg node -- getMachineOpcode asserts on

those.  Radar 8231572.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@109367 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
index b5e4ad9cdee0d788f4257c222a067a8cf78df08c..25e5b0ee4c0b7bcdc4246f03e7b4a079ef8be71e 100644 (file)
--- a/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
+++ b/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
@@ -1313,7 +1313,7 @@ namespace {
         }
       }
 
-      if (SU->NumSuccs) {
+      if (SU->NumSuccs && N->getOpcode() != ISD::CopyToReg) {
         unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs();
         for (unsigned i = 0; i != NumDefs; ++i) {
           EVT VT = N->getValueType(i);
@@ -1394,7 +1394,7 @@ namespace {
         }
       }
 
-      if (SU->NumSuccs) {
+      if (SU->NumSuccs && N->getOpcode() != ISD::CopyToReg) {
         unsigned NumDefs = TII->get(N->getMachineOpcode()).getNumDefs();
         for (unsigned i = NumDefs, e = N->getNumValues(); i != e; ++i) {
           EVT VT = N->getValueType(i);