usleep_range(1000, 1200);
reset_control_deassert(rockchip->otg_rst);
+ pm_runtime_get_sync(rockchip->dev);
pm_runtime_get_sync(dwc->dev);
spin_lock_irqsave(&dwc->lock, flags);
usleep_range(1000, 1200);
reset_control_deassert(rockchip->otg_rst);
+ /*
+ * In usb3 phy init, it will access usb3 module, so we need
+ * to resume rockchip dev before phy init to make sure usb3
+ * pd is enabled.
+ */
+ pm_runtime_get_sync(rockchip->dev);
+
/*
* Don't abort on errors. If powering on a phy fails,
* we still need to init dwc controller and add the
phy_power_off(dwc->usb3_generic_phy);
}
+ pm_runtime_put_sync(rockchip->dev);
pm_runtime_put_sync_suspend(dwc->dev);
rockchip->connected = false;