rk29: clock: fix typo
author黄涛 <huangtao@rock-chips.com>
Sat, 4 Dec 2010 06:22:12 +0000 (14:22 +0800)
committer黄涛 <huangtao@rock-chips.com>
Sat, 4 Dec 2010 06:34:46 +0000 (14:34 +0800)
arch/arm/mach-rk29/clock.c
arch/arm/mach-rk29/include/mach/cru.h

index f959ccb0bb71eb7ff47164d3426458a5732c812f..bd4735e1ec08870320e58c154a97256eb54bb479 100755 (executable)
@@ -1539,7 +1539,7 @@ GATE_CLK(ipp_ahb, hclk_cpu, IPP_AHB);
 GATE_CLK(ebook_ahb, hclk_cpu, EBOOK_AHB);
 GATE_CLK(display_matrix_axi, aclk_cpu, DISPLAY_MATRIX_AXI);
 GATE_CLK(display_matrix_ahb, hclk_cpu, DISPLAY_MATRIX_AHB);
-GATE_CLK(ddr_vedu_axi, aclk_cpu, DDR_VEDU_AXI);
+GATE_CLK(ddr_vepu_axi, aclk_cpu, DDR_VEPU_AXI);
 GATE_CLK(ddr_vdpu_axi, aclk_cpu, DDR_VDPU_AXI);
 GATE_CLK(ddr_gpu_axi, aclk_cpu, DDR_GPU_AXI);
 GATE_CLK(gpu_ahb, hclk_cpu, GPU_AHB);
@@ -1721,7 +1721,7 @@ static struct clk_lookup clks[] = {
        CLK1(ebook_ahb),
        CLK1(display_matrix_axi),
        CLK1(display_matrix_ahb),
-       CLK1(ddr_vedu_axi),
+       CLK1(ddr_vepu_axi),
        CLK1(ddr_vdpu_axi),
        CLK1(ddr_gpu_axi),
        CLK1(gpu_ahb),
index 0ffd0a0c65365928610c5a622dc1fe9dd7c2dfc0..3ece2b9794434c81bc35c65c22a4cb1398bf28f7 100644 (file)
@@ -123,7 +123,7 @@ enum cru_clk_gate
        CLK_GATE_DISPLAY_MATRIX_AXI,
        CLK_GATE_DISPLAY_MATRIX_AHB,
        CLK_GAET_VEPU_AXI,
-       CLK_GATE_DDR_VEDU_AXI,
+       CLK_GATE_DDR_VEPU_AXI,
        CLK_GATE_VDPU_AXI,
        CLK_GATE_DDR_VDPU_AXI,
        CLK_GATE_GPU,