else
{
gpio_free(RK2818_PIN_PA4);
- rk2818_mux_api_set(CXGPIO_HSADC_SEL_NAME, 1);
+ //rk2818_mux_api_set(CXGPIO_HSADC_SEL_NAME, 1);
+ rk2818_mux_api_mode_resume(CXGPIO_HSADC_SEL_NAME);
gpio_free(RK2818_PIN_PE7);
gpio_free(RK2818_PIN_PE6);
- rk2818_mux_api_set(GPIOE_U1IR_I2C1_NAME, 2);
+ //rk2818_mux_api_set(GPIOE_U1IR_I2C1_NAME, 2);
+ rk2818_mux_api_mode_resume(GPIOE_U1IR_I2C1_NAME);
}
return ;
pin_err:
else
{
gpio_free(RK2818_PIN_PA4);
- rk2818_mux_api_set(CXGPIO_HSADC_SEL_NAME, 1);
+ //rk2818_mux_api_set(CXGPIO_HSADC_SEL_NAME, 1);
+ rk2818_mux_api_mode_resume(CXGPIO_HSADC_SEL_NAME);
gpio_free(RK2818_PIN_PE7);
gpio_free(RK2818_PIN_PE6);
- rk2818_mux_api_set(GPIOE_U1IR_I2C1_NAME, 2);
+ //rk2818_mux_api_set(GPIOE_U1IR_I2C1_NAME, 2);
+ rk2818_mux_api_mode_resume(GPIOE_U1IR_I2C1_NAME);
}
return ;
pin_err:
{
if(command == 3)
{
- printk("spi_xpt2046_cs_control cs \n");
gpio_direction_output(RK2818_PIN_PF5, GPIO_LOW);
}
if(command == 0)
{
- printk("spi_xpt2046_cs_control decs \n");
gpio_direction_output(RK2818_PIN_PF5, GPIO_HIGH);
}
}
else
{
gpio_free(RK2818_PIN_PH6);
- rk2818_mux_api_set(GPIOH6_IQ_SEL_NAME, 1);
+ //rk2818_mux_api_set(GPIOH6_IQ_SEL_NAME, 1);
+ rk2818_mux_api_mode_resume(GPIOH6_IQ_SEL_NAME);
gpio_free(RK2818_PIN_PE4);
gpio_free(RK2818_PIN_PE5);
- rk2818_mux_api_set(GPIOE_I2C0_SEL_NAME, 0);
+ //rk2818_mux_api_set(GPIOE_I2C0_SEL_NAME, 0);
+ rk2818_mux_api_mode_resume(GPIOE_I2C0_SEL_NAME);
}
return ;
pin_err:
.interleave = interl, \
.mux_reg = RK2818_IOMUX_##reg##_CON, \
.mode = mux_mode, \
+ .premode = mux_mode, \
.flags = bflags, \
},
char *name;
const unsigned int offset;
unsigned int mode;
+ unsigned int premode;
const unsigned int mux_reg;
const unsigned int interleave;
unsigned int flags;
extern int rk2818_iomux_init(void);
extern void rk2818_mux_api_set(char *name, unsigned int mode);
-extern unsigned int rk2818_mux_api_get(char *name);
+extern void rk2818_mux_api_mode_resume(char *name);
#endif
int err = 0;
pNANDC pRK28NC;
u_char maf_id,dev_id,ext_id3,ext_id4;
- u32 iomux_mode0,iomux_mode1,iomux_mode2,iomux_mode3,iomux_mode4;
struct nand_chip *chip;
#ifdef CONFIG_MTD_PARTITIONS
this->options |= NAND_BUSWIDTH_16;
this->ecc.layout = &nand_hw_eccoob_16;
}
- //±£³ÖIO MUXÔʼֵ
- iomux_mode0=rk2818_mux_api_get(GPIOA5_FLASHCS1_SEL_NAME);
- iomux_mode1=rk2818_mux_api_get(GPIOA6_FLASHCS2_SEL_NAME);
- iomux_mode2=rk2818_mux_api_get(GPIOA7_FLASHCS3_SEL_NAME);
- iomux_mode3=rk2818_mux_api_get(GPIOE_SPI1_FLASH_SEL1_NAME);
- iomux_mode4=rk2818_mux_api_get(GPIOE_SPI1_FLASH_SEL_NAME);
// iomux flash cs1~cs7
rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, IOMUXB_FLASH_CS1);
rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, IOMUXB_FLASH_CS2);
switch(chip->numchips)
{
case 1:
- rk2818_mux_api_set(GPIOA5_FLASHCS1_SEL_NAME, iomux_mode0);
+ rk2818_mux_api_mode_resume(GPIOA5_FLASHCS1_SEL_NAME);
case 2:
- rk2818_mux_api_set(GPIOA6_FLASHCS2_SEL_NAME, iomux_mode1);
+ rk2818_mux_api_mode_resume(GPIOA6_FLASHCS2_SEL_NAME);
case 3:
- rk2818_mux_api_set(GPIOA7_FLASHCS3_SEL_NAME, iomux_mode2);
+ rk2818_mux_api_mode_resume(GPIOA7_FLASHCS3_SEL_NAME);
case 4:
- rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL1_NAME, iomux_mode3);
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL1_NAME);
case 5:
case 6:
- rk2818_mux_api_set(GPIOE_SPI1_FLASH_SEL_NAME, iomux_mode4);
+ rk2818_mux_api_mode_resume(GPIOE_SPI1_FLASH_SEL_NAME);
case 7:
case 8:
break;