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drm/rockchip: mipi: dsi: Decrease the value of Ths-prepare
author
xubilv
<xbl@rock-chips.com>
Fri, 14 Oct 2016 06:26:11 +0000
(14:26 +0800)
committer
xubilv
<xbl@rock-chips.com>
Fri, 14 Oct 2016 06:26:11 +0000
(14:26 +0800)
Change-Id: Ia3912004f3799465102c36e5faefa6238e52af83
Signed-off-by: xubilv <xbl@rock-chips.com>
drivers/gpu/drm/rockchip/dw-mipi-dsi.c
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diff --git
a/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
b/drivers/gpu/drm/rockchip/dw-mipi-dsi.c
index e289f0b177f850c3249a42884753fc42041ad08e..f261dd97e130d0ee0a8ad285b4356b0e491b459d 100644
(file)
--- a/
drivers/gpu/drm/rockchip/dw-mipi-dsi.c
+++ b/
drivers/gpu/drm/rockchip/dw-mipi-dsi.c
@@
-459,7
+459,7
@@
static int dw_mipi_dsi_phy_init(struct dw_mipi_dsi *dsi)
BANDGAP_SEL(BANDGAP_96_10));
dw_mipi_dsi_phy_write(dsi, 0x70, TLP_PROGRAM_EN | 0xf);
- dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x
55
);
+ dw_mipi_dsi_phy_write(dsi, 0x71, THS_PRE_PROGRAM_EN | 0x
2d
);
dw_mipi_dsi_phy_write(dsi, 0x72, THS_ZERO_PROGRAM_EN | 0xa);
dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK |