#include "llvm/Target/TargetMachine.h"
#include "../../Target/SparcV9/MachineCodeForInstruction.h"
#include "../../Target/SparcV9/SparcV9RegInfo.h"
+#include "../../Target/SparcV9/SparcV9InstrInfo.h"
#include "Support/STLExtras.h"
#include <iostream>
unsigned i = 0;
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;
++I, ++i)
- if (!mii.isDummyPhiInstr(I->getOpcode())) {
+ if (I->getOpcode() != V9::PHI) {
SchedGraphNode* node = new SchedGraphNode(getNumNodes(), &MBB, i, target);
noteGraphNodeForInstr(I, node);
//Start with the kernel and for each phi insert a copy for the phi def and for each arg
for(MachineBasicBlock::iterator I = kernelBB->begin(), E = kernelBB->end(); I != E; ++I) {
//Get op code and check if its a phi
- MachineOpCode OC = I->getOpcode();
- if(TMI->isDummyPhiInstr(OC)) {
+ if(I->getOpcode() == V9::PHI) {
Instruction *tmp = 0;
for(unsigned i = 0; i < I->getNumOperands(); ++i) {
//Get Operand
for(std::vector<MachineBasicBlock*>::iterator MB = epilogues.begin(), ME = epilogues.end(); MB != ME; ++MB) {
for(MachineBasicBlock::iterator I = (*MB)->begin(), E = (*MB)->end(); I != E; ++I) {
//Get op code and check if its a phi
- MachineOpCode OC = I->getOpcode();
- if(TMI->isDummyPhiInstr(OC)) {
+ if(I->getOpcode() == V9::PHI) {
Instruction *tmp = 0;
for(unsigned i = 0; i < I->getNumOperands(); ++i) {
//Get Operand
#include "llvm/Target/TargetMachine.h"
#include "../../Target/SparcV9/MachineCodeForInstruction.h"
#include "../../Target/SparcV9/SparcV9RegInfo.h"
+#include "../../Target/SparcV9/SparcV9InstrInfo.h"
#include "Support/STLExtras.h"
#include <iostream>
unsigned i = 0;
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;
++I, ++i)
- if (!mii.isDummyPhiInstr(I->getOpcode())) {
+ if (I->getOpcode() != V9::PHI) {
SchedGraphNode* node = new SchedGraphNode(getNumNodes(), &MBB, i, target);
noteGraphNodeForInstr(I, node);
//Start with the kernel and for each phi insert a copy for the phi def and for each arg
for(MachineBasicBlock::iterator I = kernelBB->begin(), E = kernelBB->end(); I != E; ++I) {
//Get op code and check if its a phi
- MachineOpCode OC = I->getOpcode();
- if(TMI->isDummyPhiInstr(OC)) {
+ if(I->getOpcode() == V9::PHI) {
Instruction *tmp = 0;
for(unsigned i = 0; i < I->getNumOperands(); ++i) {
//Get Operand
for(std::vector<MachineBasicBlock*>::iterator MB = epilogues.begin(), ME = epilogues.end(); MB != ME; ++MB) {
for(MachineBasicBlock::iterator I = (*MB)->begin(), E = (*MB)->end(); I != E; ++I) {
//Get op code and check if its a phi
- MachineOpCode OC = I->getOpcode();
- if(TMI->isDummyPhiInstr(OC)) {
+ if(I->getOpcode() == V9::PHI) {
Instruction *tmp = 0;
for(unsigned i = 0; i < I->getNumOperands(); ++i) {
//Get Operand
// their assigned registers or insert spill code, as appropriate.
// Also, fix operands of call/return instructions.
for (MachineBasicBlock::iterator MII = MBB.begin(); MII != MBB.end(); ++MII)
- if (! TM.getInstrInfo()->isDummyPhiInstr(MII->getOpcode()))
+ if (MII->getOpcode() != V9::PHI)
updateInstruction(MII, MBB);
// Now, move code out of delay slots of branches and returns if needed.
MachineInstr *MInst = MII;
// do not process Phis
- if (TM.getInstrInfo()->isDummyPhiInstr(MInst->getOpcode()))
+ if (MInst->getOpcode() == V9::PHI)
continue;
// if there are any added instructions...
void SparcV9AsmPrinter::emitMachineInst(const MachineInstr *MI) {
unsigned Opcode = MI->getOpcode();
- if (TM.getInstrInfo()->isDummyPhiInstr(Opcode))
- return; // IGNORE PHI NODES
+ if (Opcode == V9::PHI)
+ return; // Ignore Machine-PHI nodes.
O << "\t" << TM.getInstrInfo()->getName(Opcode) << "\t";