.Case("fwait", "wait")
.Case("movzx", "movzb") // FIXME: Not correct.
.Case("fildq", "fildll")
+ .Case("fcompi", "fcomip")
+ .Case("fucompi", "fucomip")
.Default(Name);
// FIXME: Hack to recognize cmp<comparison code>{ss,sd,ps,pd}.
NameLoc, NameLoc));
}
+ // The assembler accepts this instruction with no operand as a synonym for an
+ // instruction taking %st(1),%st(0). e.g. "fcompi" -> "fcompi %st(1),st(0)".
+ if (Name == "fcompi" && Operands.size() == 1) {
+ Operands.push_back(X86Operand::CreateReg(MatchRegisterName("st(1)"),
+ NameLoc, NameLoc));
+ Operands.push_back(X86Operand::CreateReg(MatchRegisterName("st(0)"),
+ NameLoc, NameLoc));
+ }
+
// The assembler accepts these instructions with two few operands as a synonym
// for taking %st(1),%st(0) or X, %st(0).
- if ((Name == "fcomi" || Name == "fucomi") && Operands.size() < 3) {
+ if ((Name == "fcomi" || Name == "fucomi" || Name == "fucompi" ||
+ Name == "fcompi" ) &&
+ Operands.size() < 3) {
if (Operands.size() == 1)
Operands.push_back(X86Operand::CreateReg(MatchRegisterName("st(1)"),
NameLoc, NameLoc));
// CHECK: sidt 4(%eax)
// CHECK: encoding: [0x0f,0x01,0x48,0x04]
sidtl 4(%eax)
+
+// CHECK: fcomip %st(2), %st(0)
+// CHECK: encoding: [0xdf,0xf2]
+ fcompi %st(2),%st
+
+// CHECK: fcomip %st(2), %st(0)
+// CHECK: encoding: [0xdf,0xf2]
+ fcompi %st(2)
+
+// CHECK: fcomip %st(1), %st(0)
+// CHECK: encoding: [0xdf,0xf1]
+ fcompi
+
+// CHECK: fucomip %st(2), %st(0)
+// CHECK: encoding: [0xdf,0xea]
+ fucompi %st(2),%st
+
+// CHECK: fucomip %st(2), %st(0)
+// CHECK: encoding: [0xdf,0xea]
+ fucompi %st(2)
+
+// CHECK: fucomip %st(1), %st(0)
+// CHECK: encoding: [0xdf,0xe9]
+ fucompi