-modified machine operand class - took regNum out of union to set regNum after
authorRuchira Sasanka <sasanka@students.uiuc.edu>
Sat, 15 Sep 2001 20:16:41 +0000 (20:16 +0000)
committerRuchira Sasanka <sasanka@students.uiuc.edu>
Sat, 15 Sep 2001 20:16:41 +0000 (20:16 +0000)
retister allocation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@594 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/MachineInstr.h

index 8e0a86e4a081e7a8d0fc474dfc77c353b06c989c..cb807292292787e33b02f9c63d0168dbb5177302 100644 (file)
@@ -79,13 +79,12 @@ private:
                                // ConstantVal for a non-address immediate.
                                // Virtual register for an SSA operand,
                                // including hidden operands required for
-                               // the generated machine code.
-    
-    unsigned int regNum;       // register number for an explicit register
-  
+                               // the generated machine code.     
     int64_t immedVal;          // constant value for an explicit constant
   };
 
+  unsigned int regNum;         // register number for an explicit register
+                                // will be set for a value after reg allocation
   bool isDef;                   // is this a defition for the value
                                 // made public for faster access
   
@@ -141,6 +140,13 @@ private:
 
 public:
 
+  // replaces the Value with its corresponding physical register afeter
+  // register allocation is complete
+  void setRegForValue(unsigned reg) {
+    assert(opType == MO_VirtualRegister || opType == MO_CCRegister);
+    regNum = reg;
+  }
+
  
 };