spi:add spi dts for rk312x

diff --git a/arch/arm/boot/dts/rk3128-box.dts b/arch/arm/boot/dts/rk3128-box.dts
index 3b62dbacffbe8f5a85dbf6deed6d4e94a6935030..3876d8c328209416f8312e33b85112da97d9d67d 100755 (executable)
--- a/arch/arm/boot/dts/rk3128-box.dts
+++ b/arch/arm/boot/dts/rk3128-box.dts
@@ -175,6 +175,35 @@
        status = "disabled";
 };
 
+&spi0 {
+       status = "disabled";
+       max-freq = <48000000>;  
+       /*
+       spi_test@00 {
+               compatible = "rockchip,spi_test_bus0_cs0";
+               reg = <0>;
+               spi-max-frequency = <24000000>;
+               //spi-cpha;
+               //spi-cpol;
+               poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;
+
+       };
+       
+       spi_test@01 {
+               compatible = "rockchip,spi_test_bus0_cs1";
+               reg = <1>;
+               spi-max-frequency = <24000000>;
+               spi-cpha;
+               spi-cpol;
+               poll_mode = <0>;
+               type = <0>;
+               enable_dma = <0>;               
+       };
+       */
+};
+
 &gmac {
        //pmu_regulator = "act_ldo5";
        //pmu_enable_level = <1>; //1->HIGH, 0->LOW

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index 3d2d4c825917a5bea62cf400bc8f2525bbcdd7cb..d0229748a9aa542c5aebfd9785a9b3bebc3294bd 100755 (executable)
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -22,7 +22,7 @@
                i2c2 = &i2c2;
                i2c3 = &i2c3;
                lcdc = &lcdc;
-       //      spi0 = &spi0;
+               spi0 = &spi0;
        };
 
        cpus {
@@ -575,6 +575,26 @@
                fifo-depth = <0x100>;
                bus-width = <4>;
        };
+       
+       spi0: spi@20074000 {
+               compatible = "rockchip,rockchip-spi";
+               reg = <0x20074000 0x1000>;
+               interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+               #address-cells = <1>;
+               #size-cells = <0>;
+               pinctrl-names = "default";
+               pinctrl-0 = <&spi0_txd_mux0 &spi0_rxd_mux0 &spi0_clk_mux0 &spi0_cs0_mux0 &spi0_cs1_mux0>;
+               //pinctrl-0 = <&spi0_txd_mux1 &spi0_rxd_mux1 &spi0_clk_mux1 &spi0_cs0_mux1 &spi0_cs1_mux1>;
+               //pinctrl-0 = <&spi0_txd_mux2 &spi0_rxd_mux2 &spi0_clk_mux2 &spi0_cs0_mux2>;
+               rockchip,spi-src-clk = <0>;
+               num-cs = <2>;
+               clocks =<&clk_spi0>, <&clk_gates7 12>;
+               clock-names = "spi","pclk_spi0";
+               //dmas = <&pdma 8>, <&pdma 9>;
+               //#dma-cells = <2>;
+               //dma-names = "tx", "rx";
+               status = "disabled";
+       };
 
        adc: adc@2006c000 {
                compatible = "rockchip,saradc";