Merge remote-tracking branch 'remotes/tegra/android-tegra-2.6.36-honeycomb-mr1' into...

author 黄涛 <huangtao@rock-chips.com>

Sun, 31 Jul 2011 16:04:45 +0000 (00:04 +0800)

committer 黄涛 <huangtao@rock-chips.com>

Sun, 31 Jul 2011 16:04:45 +0000 (00:04 +0800)
author 黄涛 <huangtao@rock-chips.com>
Sun, 31 Jul 2011 16:04:45 +0000 (00:04 +0800)
committer 黄涛 <huangtao@rock-chips.com>
Sun, 31 Jul 2011 16:04:45 +0000 (00:04 +0800)
diff --cc .gitignore

index 072174fd1833cb716ed5790724170b857cf5e0ad,8faa6c02b39ec3896bd4e989c82ce7f6dbdaf04a..48dce78b1338142f3d2e101c12d06fbfa4006e83
--- 1/.gitignore
--- 2/.gitignore
+++ b/.gitignore
@@@ -27,9 -28,9 +28,10 @@@ modules.builti
   *.gz
   *.bz2
   *.lzma
+ *.lzo
   *.patch
   *.gcno
+ +Untitled Project.*
   
   #
   # Top-level generic files
@@@ -46,16 -53,9 +54,10 @@@
   #
   # Generated include files
   #
- include/asm
- include/asm-*/asm-offsets.h
   include/config
- include/linux/autoconf.h
- include/linux/compile.h
   include/linux/version.h
- include/linux/utsrelease.h
- include/linux/bounds.h
   include/generated
+ +include/asm-arm/mach-types.h
   
   # stgit generated dirs
   patches-*
diff --cc Makefile

index 731f64dc8626aa82e8013792c145cd6870fa8d54,4519fc71d19ea1ca7949512a33d02e32bbec3091..389b1844df1e9e3345e4dfc135ad346b64753e77
--- 1/Makefile
--- 2/Makefile
+++ b/Makefile
@@@ -180,15 -188,8 +188,15 @@@ SUBARCH := $(shell uname -m | sed -e s/
   # Default value for CROSS_COMPILE is not to prefix executables
   # Note: Some architectures assign CROSS_COMPILE in their arch/*/Makefile
   export KBUILD_BUILDHOST := $(SUBARCH)
- -ARCH          ?= $(SUBARCH)
- -CROSS_COMPILE ?= $(CONFIG_CROSS_COMPILE:"%"=%)
+ +#ARCH         ?= $(SUBARCH)
- #CROSS_COMPILE        ?=
++#CROSS_COMPILE        ?= $(CONFIG_CROSS_COMPILE:"%"=%)
+ +ARCH          ?= arm
+ +ifneq ($(wildcard ../toolchain/arm-eabi-4.4.0),)
+ +CROSS_COMPILE ?= ../toolchain/arm-eabi-4.4.0/bin/arm-eabi-
+ +endif
+ +ifneq ($(wildcard ../prebuilt/linux-x86/toolchain/arm-eabi-4.4.0),)
+ +CROSS_COMPILE ?= ../prebuilt/linux-x86/toolchain/arm-eabi-4.4.0/bin/arm-eabi-
+ +endif
   
   # Architecture as present in compile.h
   UTS_MACHINE   := $(ARCH)
diff --cc arch/arm/Kconfig

index b01836a24c0ffa058a1477b7bd381b3278781fd0,cd2c427f0e2b809e05328a7c1a6bbe53fa350e52..0749858bb362eb3239d5ddf21fd97c933ea9a1b9
--- 1/arch/arm/Kconfig
--- 2/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@@ -693,39 -828,37 +831,55 @@@ config ARCH_OMA
         help
           Support for TI's OMAP platform (OMAP1 and OMAP2).
   
- config ARCH_BCMRING
-       bool "Broadcom BCMRING"
-       depends on MMU
-       select CPU_V6
-       select ARM_AMBA
-       select COMMON_CLKDEV
-       select GENERIC_TIME
-       select GENERIC_CLOCKEVENTS
-       select ARCH_WANT_OPTIONAL_GPIOLIB
-       help
-         Support for Broadcom's BCMRing platform.
-         
+ +config ARCH_RK29
+ +      bool "Rockchip Soc Rk29"
+ +      select CPU_V7
+ +      select HAVE_CLK
+ +      select COMMON_CLKDEV
+ +      select HAVE_SCHED_CLOCK
+ +      select ARCH_HAS_CPUFREQ
+ +      select GENERIC_TIME
+ +      select GENERIC_CLOCKEVENTS
+ +      select ARCH_REQUIRE_GPIOLIB
+ +      select ARM_GIC
+ +      select PL330
+ +      select HIGHMEM
+ +      select ZONE_DMA
++      select ARM_L1_CACHE_SHIFT_6
+ +      help
+ +        Support for Rockchip RK29 soc.
+ +
+ config PLAT_SPEAR
+       bool "ST SPEAr"
+       select ARM_AMBA
+       select ARCH_REQUIRE_GPIOLIB
+       select COMMON_CLKDEV
+       select GENERIC_CLOCKEVENTS
+       select HAVE_CLK
+       help
+         Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
+ 
   endchoice
   
+ #
+ # This is sorted alphabetically by mach-* pathname.  However, plat-*
+ # Kconfigs may be included either alphabetically (according to the
+ # plat- suffix) or along side the corresponding mach-* source.
+ #
+ source "arch/arm/mach-aaec2000/Kconfig"
+ 
+ source "arch/arm/mach-at91/Kconfig"
+ 
+ source "arch/arm/mach-bcmring/Kconfig"
+ 
   source "arch/arm/mach-clps711x/Kconfig"
   
+ source "arch/arm/mach-cns3xxx/Kconfig"
+ 
+ source "arch/arm/mach-davinci/Kconfig"
+ 
+ source "arch/arm/mach-dove/Kconfig"
+ 
   source "arch/arm/mach-ep93xx/Kconfig"
   
   source "arch/arm/mach-footbridge/Kconfig"
@@@ -765,12 -914,20 +935,22 @@@ source "arch/arm/mach-omap2/Kconfig
   
   source "arch/arm/mach-orion5x/Kconfig"
   
- source "arch/arm/mach-kirkwood/Kconfig"
+ source "arch/arm/mach-pxa/Kconfig"
+ source "arch/arm/plat-pxa/Kconfig"
+ 
+ source "arch/arm/mach-mmp/Kconfig"
+ 
+ source "arch/arm/mach-realview/Kconfig"
   
++source "arch/arm/mach-rk29/Kconfig"
++
+ source "arch/arm/mach-sa1100/Kconfig"
+ 
+ source "arch/arm/plat-samsung/Kconfig"
   source "arch/arm/plat-s3c24xx/Kconfig"
- source "arch/arm/plat-s3c64xx/Kconfig"
- source "arch/arm/plat-s3c/Kconfig"
- source "arch/arm/plat-s5pc1xx/Kconfig"
+ source "arch/arm/plat-s5p/Kconfig"
+ 
+ source "arch/arm/plat-spear/Kconfig"
   
   if ARCH_S3C2410
   source "arch/arm/mach-s3c2400/Kconfig"
diff --cc arch/arm/Makefile

index e15c936b7cc83f3a720a3f1a00d32a829a524913,59c1ce858fc8b18d4ec613e6dd2bfe62ed06047e..157a82829ea32d1a96b30002e89e4eaeea664ee1
--- 1/arch/arm/Makefile
--- 2/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@@ -108,8 -115,10 +115,10 @@@ CHECKFLAGS       += -D__arm_
   
   #Default value
   head-y                := arch/arm/kernel/head$(MMUEXT).o arch/arm/kernel/init_task.o
- -textofs-y     := 0x00008000
+ +textofs-y     := 0x00408000
   textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000
+ # We don't want the htc bootloader to corrupt kernel during resume
+ textofs-$(CONFIG_PM_H1940)      := 0x00108000
   # SA1111 DMA bug: we don't want the kernel to live in precious DMA-able memory
   ifeq ($(CONFIG_ARCH_SA1100),y)
   textofs-$(CONFIG_SA1111) := 0x00208000
@@@ -156,21 -169,32 +169,33 @@@ machine-$(CONFIG_ARCH_ORION5X)          := orio
   machine-$(CONFIG_ARCH_PNX4008)                := pnx4008
   machine-$(CONFIG_ARCH_PXA)            := pxa
   machine-$(CONFIG_ARCH_REALVIEW)               := realview
++machine-$(CONFIG_ARCH_RK29)                   := rk29
   machine-$(CONFIG_ARCH_RPC)            := rpc
- machine-$(CONFIG_ARCH_S3C2410)                := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443
+ machine-$(CONFIG_ARCH_S3C2410)                := s3c2410 s3c2400 s3c2412 s3c2416 s3c2440 s3c2443
   machine-$(CONFIG_ARCH_S3C24A0)                := s3c24a0
- machine-$(CONFIG_ARCH_S3C64XX)                := s3c6400 s3c6410
- machine-$(CONFIG_ARCH_S5PC1XX)                := s5pc100
+ machine-$(CONFIG_ARCH_S3C64XX)                := s3c64xx
+ machine-$(CONFIG_ARCH_S5P6440)                := s5p6440
+ machine-$(CONFIG_ARCH_S5P6442)                := s5p6442
+ machine-$(CONFIG_ARCH_S5PC100)                := s5pc100
+ machine-$(CONFIG_ARCH_S5PV210)                := s5pv210
+ machine-$(CONFIG_ARCH_S5PV310)                := s5pv310
   machine-$(CONFIG_ARCH_SA1100)         := sa1100
   machine-$(CONFIG_ARCH_SHARK)          := shark
+ machine-$(CONFIG_ARCH_SHMOBILE)       := shmobile
   machine-$(CONFIG_ARCH_STMP378X)               := stmp378x
   machine-$(CONFIG_ARCH_STMP37XX)               := stmp37xx
+ machine-$(CONFIG_ARCH_TEGRA)          := tegra
   machine-$(CONFIG_ARCH_U300)           := u300
+ machine-$(CONFIG_ARCH_U8500)          := ux500
   machine-$(CONFIG_ARCH_VERSATILE)      := versatile
+ machine-$(CONFIG_ARCH_VEXPRESS)               := vexpress
   machine-$(CONFIG_ARCH_W90X900)                := w90x900
+ machine-$(CONFIG_ARCH_NUC93X)         := nuc93x
   machine-$(CONFIG_FOOTBRIDGE)          := footbridge
- machine-$(CONFIG_ARCH_MXC91231)               := mxc91231
- machine-$(CONFIG_ARCH_RK29)                   := rk29
+ machine-$(CONFIG_MACH_SPEAR300)               := spear3xx
+ machine-$(CONFIG_MACH_SPEAR310)               := spear3xx
+ machine-$(CONFIG_MACH_SPEAR320)               := spear3xx
+ machine-$(CONFIG_MACH_SPEAR600)               := spear6xx
   
   # Platform directory name.  This list is sorted alphanumerically
   # by CONFIG_* macro name.
diff --cc arch/arm/boot/compressed/head.S
Simple merge
diff --cc arch/arm/common/gic.c

index f352d793a944c18a9da0c56a18d4ae259cf9bf2b,48a70afca2839114d9cfaafc7565dc12a61ca9bb..c086fb5cbe39c524bb68cec359e717681f91d0b2

mode 100755,100644..100755
--- 1/arch/arm/common/gic.c
--- 2/arch/arm/common/gic.c
+++ b/arch/arm/common/gic.c
@@@ -197,18 -237,8 +250,12 @@@ static unsigned int _gic_dist_init(unsi
         cpumask |= cpumask << 8;
         cpumask |= cpumask << 16;
   
-       gic_data[gic_nr].dist_base = base;
-       gic_data[gic_nr].irq_offset = (irq_start - 1) & ~31;
- 
         writel(0, base + GIC_DIST_CTRL);
   
+ +#ifdef CONFIG_ARCH_RK29
+ +      /* rk29 read GIC_DIST_CTR is 2, why? */
+ +      max_irq = NR_AIC_IRQS;
+ +#else
         /*
          * Find out how many interrupts are supported.
          */
diff --cc arch/arm/common/pl330.c
Simple merge
diff --cc arch/arm/include/asm/dma.h

index fcaa8e2b6b9839e84edc25f40c8f8ea35a478f5d,ca51143f97f179132ffa2117443172f4da612c57..81921e8d2bc3f7b4617d5511c9c014d69d02627f
--- 1/arch/arm/include/asm/dma.h
--- 2/arch/arm/include/asm/dma.h
+++ b/arch/arm/include/asm/dma.h
@@@ -134,15 -133,17 +134,20 @@@ extern void set_dma_speed(unsigned int 
    * Otherwise, it returns the number of _bytes_ left to transfer.
    */
   extern int  get_dma_residue(unsigned int chan);
- -
- -#ifndef NO_DMA
- -#define NO_DMA        255
   #endif
+ +/* Set dam irq callback that perform when dma transfer has completed
+ + */
+ +extern void set_dma_handler (unsigned int chan, void (*irq_handler) (int, void *), void *data, unsigned int irq_mode);
   
- 
- -#endif /* CONFIG_ISA_DMA_API */
+ +/*
+ + * get dma transfer position
+ + */
+ +extern void get_dma_position(unsigned int chan, dma_addr_t *src_pos, dma_addr_t *dst_pos);
   
+ #ifdef CONFIG_PCI
+ extern int isa_dma_bridge_buggy;
+ #else
+ #define isa_dma_bridge_buggy    (0)
+ #endif
+ 
   #endif /* __ASM_ARM_DMA_H */
diff --cc arch/arm/kernel/Makefile

index 90d0ca7362879358847c2865e8020508a1dc0425,980b78e31328156925f361cf5f6a2deac14c1500..45a79ea2bf5f45cf2438bb55409912016e1bdb55
--- 1/arch/arm/kernel/Makefile
--- 2/arch/arm/kernel/Makefile
+++ b/arch/arm/kernel/Makefile
@@@ -13,11 -13,16 +13,16 @@@ CFLAGS_REMOVE_return_address.o = -p
   
   # Object file lists.
   
- obj-y         := compat.o elf.o entry-armv.o entry-common.o irq.o \
+ obj-y         := elf.o entry-armv.o entry-common.o irq.o \
                    process.o ptrace.o return_address.o setup.o signal.o \
- -                 sys_arm.o stacktrace.o time.o traps.o
+ +                 sys_arm.o stacktrace.o time.o traps.o dma.o
   
- #obj-$(CONFIG_ISA_DMA_API)    += dma.o
+ obj-$(CONFIG_DEPRECATED_PARAM_STRUCT) += compat.o
+ 
+ obj-$(CONFIG_LEDS)            += leds.o
+ obj-$(CONFIG_OC_ETM)          += etm.o
+ 
+ obj-$(CONFIG_ISA_DMA_API)     += dma.o
   obj-$(CONFIG_ARCH_ACORN)      += ecard.o 
   obj-$(CONFIG_FIQ)             += fiq.o
   obj-$(CONFIG_MODULES)         += armksyms.o module.o
diff --cc arch/arm/kernel/dma.c
Simple merge
diff --cc arch/arm/kernel/entry-common.S
Simple merge
diff --cc arch/arm/kernel/time.c

index fb8f5e4ec7357421fbe0cc5878c2f767afaec1a0,38c261f9951c8ddf5be050e61743dfe449f887bb..3328137cd2c35f4f509ee3fbc1263e05ae9938b3
--- 1/arch/arm/kernel/time.c
--- 2/arch/arm/kernel/time.c
+++ b/arch/arm/kernel/time.c
@@@ -393,13 -160,6 +161,9 @@@ device_initcall(timer_init_sysfs)
   
   void __init time_init(void)
   {
- #ifndef CONFIG_GENERIC_TIME
-       if (system_timer->offset == NULL)
-               system_timer->offset = dummy_gettimeoffset;
- #endif
         system_timer->init();
+ +#ifdef CONFIG_HAVE_SCHED_CLOCK
+ +      sched_clock_postinit();
+ +#endif
   }
   
diff --cc arch/arm/kernel/vmlinux.lds.S

index 5d972f1c97708f259d50213b1faf4168b0b57235,b16c07914b55bb0215592a7727e0974b62108dd6..6ab5093711c6dab6dae1c44bc220302bfb72dd2f
--- 1/arch/arm/kernel/vmlinux.lds.S
--- 2/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@@ -255,78 -228,15 +228,71 @@@ SECTION
                 __tcm_end = .;
         }
   #endif
+ +#ifdef CONFIG_ARCH_RK29
+ +        /*
+ +       * We align everything to a page boundary so we can
+ +       * free it after init has commenced and SRAM contents have
+ +       * been copied to its destination.
+ +       */
+ +      .sram_start : {
+ +              . = ALIGN(PAGE_SIZE);
+ +              __sram_start = .;
+ +              __sram_code_start = .;
+ +      }
+ +
+ +      /*
+ +       * Link these to the ITCM RAM
+ +       * Put VMA to the TCM address and LMA to the common RAM
+ +       * and we'll upload the contents from RAM to TCM and free
+ +       * the used RAM after that.
+ +       */
+ +      .text_sram_code SRAM_CODE_OFFSET : AT(__sram_code_start)
+ +      {
+ +              __ssram_code_text = .;
+ +              *(.sram.text)
+ +              *(.sram.rodata)
+ +              . = ALIGN(4);
+ +              __esram_code_text = .;
+ +      }
+ +
+ +      /*
+ +       * Reset the dot pointer, this is needed to create the
+ +       * relative __dtcm_start below (to be used as extern in code).
+ +       */
+ +      . = ADDR(.sram_start) + SIZEOF(.sram_start) + SIZEOF(.text_sram_code);
+ +
+ +      .sram_data_start : {
+ +              __sram_data_start = .;
+ +      }
+ +
+ +      /* TODO: add remainder of ITCM as well, that can be used for data! */
+ +      .data_sram SRAM_DATA_OFFSET : AT(__sram_data_start)
+ +      {
+ +              . = ALIGN(4);
+ +              __ssram_data = .;
+ +              *(.sram.data)
+ +              . = ALIGN(4);
+ +              __esram_data = .;
+ +      }
+ +
+ +      /* Reset the dot pointer or the linker gets confused */
+ +      . = ADDR(.sram_data_start) + SIZEOF(.data_sram);
+ +
+ +      /* End marker for freeing TCM copy in linked object */
+ +      .sram_end : AT(ADDR(.sram_data_start) + SIZEOF(.data_sram)){
+ +              . = ALIGN(PAGE_SIZE);
+ +              __sram_end = .;
+ +      }
+ +#endif
   
-       .bss : {
-               __bss_start = .;        /* BSS                          */
-               *(.bss)
-               *(COMMON)
-               __bss_stop = .;
-               _end = .;
-       }
-                                       /* Stabs debugging sections.    */
-       .stab 0 : { *(.stab) }
-       .stabstr 0 : { *(.stabstr) }
-       .stab.excl 0 : { *(.stab.excl) }
-       .stab.exclstr 0 : { *(.stab.exclstr) }
-       .stab.index 0 : { *(.stab.index) }
-       .stab.indexstr 0 : { *(.stab.indexstr) }
+       BSS_SECTION(0, 0, 0)
+       _end = .;
+ 
+       STABS_DEBUG
         .comment 0 : { *(.comment) }
+ 
+       /* Default discards */
+       DISCARDS
   }
   
   /*
diff --cc arch/arm/mach-rk29/devices.c

index 364079e73c17c6d31f4b2ce10c6d91ba1434c47c,0000000000000000000000000000000000000000..6c0cdd64392abbe1806ed3004cf7bde1fa4e5f2d

mode 100644,000000..100644
--- 1/arch/arm/mach-rk29/devices.c
--- /dev/null
+++ b/arch/arm/mach-rk29/devices.c
@@@ -1,833 -1,0 +1,852 @@@
+ +/* arch/arm/mach-rk29/devices.c
+ + *
+ + * Copyright (C) 2010 ROCKCHIP, Inc.
+ + *
+ + * This software is licensed under the terms of the GNU General Public
+ + * License version 2, as published by the Free Software Foundation, and
+ + * may be copied, distributed, and modified under those terms.
+ + *
+ + * This program is distributed in the hope that it will be useful,
+ + * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ + * GNU General Public License for more details.
+ + *
+ + */
+ + 
+ +#include <linux/fs.h>
+ +#include <linux/kernel.h>
+ +#include <linux/platform_device.h>
+ +#include <linux/usb/android_composite.h>
+ +#include <linux/delay.h>
+ +#include <linux/dma-mapping.h>
+ +#include <mach/irqs.h>
+ +#include <mach/rk29_iomap.h>
+ +#include <mach/rk29-dma-pl330.h> 
+ +#include <mach/rk29_camera.h>                          /* ddl@rock-chips.com : camera support */
+ +#include <mach/board.h>
+ +#include "devices.h"
+ +#ifdef CONFIG_ADC_RK29
+ +static struct resource rk29_adc_resource[] = {
+ +      {
+ +              .start = IRQ_SARADC,
+ +              .end   = IRQ_SARADC,
+ +              .flags = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start = RK29_ADC_PHYS,
+ +              .end   = RK29_ADC_PHYS + RK29_ADC_SIZE - 1,
+ +              .flags = IORESOURCE_MEM,
+ +      },
+ +
+ +};
+ +
+ +struct platform_device rk29_device_adc = {
+ +      .name             = "rk29-adc",
+ +      .id               = -1,
+ +      .num_resources    = ARRAY_SIZE(rk29_adc_resource),
+ +      .resource         = rk29_adc_resource,
+ +};
+ +
+ +#endif
+ +
+ +#ifdef CONFIG_RK29_VMAC
+ +static u64 eth_dmamask = DMA_BIT_MASK(32);
+ +static struct resource rk29_vmac_resource[] = {
+ +      [0] = {
+ +              .start = RK29_MAC_PHYS,    
+ +              .end   = RK29_MAC_PHYS + RK29_MAC_SIZE - 1,
+ +              .flags = IORESOURCE_MEM,
+ +      },
+ +      [1] = {
+ +              .start = IRQ_MAC,
+ +              .end   = IRQ_MAC,
+ +              .flags = IORESOURCE_IRQ,
+ +      }
+ +
+ +};
+ +
+ +struct platform_device rk29_device_vmac = {
+ +      .name           = "rk29 vmac",
+ +      .id             = 0,
+ +      .dev = {
+ +              .dma_mask               = &eth_dmamask,
+ +              .coherent_dma_mask      = DMA_BIT_MASK(32),
+ +              .platform_data = &rk29_vmac_pdata,
+ +      },
+ +      .num_resources  = ARRAY_SIZE(rk29_vmac_resource),
+ +      .resource       = rk29_vmac_resource,
+ +};
+ +#endif
+ +
+ +#ifdef CONFIG_I2C_RK29
+ +#ifdef CONFIG_RK29_I2C0_CONTROLLER
+ +static struct resource resources_i2c0[] = {
+ +      {
+ +              .start  = IRQ_I2C0,
+ +              .end    = IRQ_I2C0,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_I2C0_PHYS,
+ +              .end    = RK29_I2C0_PHYS + SZ_4K - 1,
+ +              .flags  = IORESOURCE_MEM,
+ +      },
+ +};
+ +#endif
+ +#ifdef CONFIG_RK29_I2C1_CONTROLLER
+ +static struct resource resources_i2c1[] = {
+ +      {
+ +              .start  = IRQ_I2C1,
+ +              .end    = IRQ_I2C1,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_I2C1_PHYS,
+ +              .end    = RK29_I2C1_PHYS + SZ_4K - 1,
+ +              .flags  = IORESOURCE_MEM,
+ +      },
+ +};
+ +#endif
+ +#ifdef CONFIG_RK29_I2C2_CONTROLLER
+ +static struct resource resources_i2c2[] = {
+ +      {
+ +              .start  = IRQ_I2C2,
+ +              .end    = IRQ_I2C2,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_I2C2_PHYS,
+ +              .end    = RK29_I2C2_PHYS + SZ_4K - 1,
+ +              .flags  = IORESOURCE_MEM,
+ +      },
+ +};
+ +#endif
+ +#ifdef CONFIG_RK29_I2C3_CONTROLLER
+ +static struct resource resources_i2c3[] = {
+ +      {
+ +              .start  = IRQ_I2C3,
+ +              .end    = IRQ_I2C3,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_I2C3_PHYS,
+ +              .end    = RK29_I2C3_PHYS + SZ_4K - 1,
+ +              .flags  = IORESOURCE_MEM,
+ +      },
+ +};
+ +#endif
+ +struct platform_device rk29_device_i2c0 = {
+ +#ifdef CONFIG_RK29_I2C0_CONTROLLER
+ +      .name   = "rk29_i2c",
+ +      .id     = 0,
+ +      .num_resources  = ARRAY_SIZE(resources_i2c0),
+ +      .resource       = resources_i2c0,
+ +      .dev                    = {
+ +              .platform_data = &default_i2c0_data,
+ +      },
+ +#else
+ +      .name   = "i2c-gpio",
+ +      .id = 0,
+ +      .dev                    = {
+ +              .platform_data = &default_i2c0_data,
+ +      },
+ +#endif
+ +};
+ +struct platform_device rk29_device_i2c1 = {
+ +#ifdef CONFIG_RK29_I2C1_CONTROLLER
+ +      .name   = "rk29_i2c",
+ +      .id     = 1,
+ +      .num_resources  = ARRAY_SIZE(resources_i2c1),
+ +      .resource       = resources_i2c1,
+ +      .dev                    = {
+ +              .platform_data = &default_i2c1_data,
+ +      },
+ +#else
+ +      .name   = "i2c-gpio",
+ +      .id = 1,
+ +      .dev                    = {
+ +              .platform_data = &default_i2c1_data,
+ +      },
+ +#endif
+ +};
+ +struct platform_device rk29_device_i2c2 = {
+ +#ifdef CONFIG_RK29_I2C2_CONTROLLER
+ +      .name   = "rk29_i2c",
+ +      .id     = 2,
+ +      .num_resources  = ARRAY_SIZE(resources_i2c2),
+ +      .resource       = resources_i2c2,
+ +      .dev                    = {
+ +              .platform_data = &default_i2c2_data,
+ +      },
+ +#else
+ +      .name   = "i2c-gpio",
+ +      .id = 2,
+ +      .dev                    = {
+ +              .platform_data = &default_i2c2_data,
+ +      },
+ +#endif
+ +};
+ +struct platform_device rk29_device_i2c3 = {
+ +#ifdef CONFIG_RK29_I2C3_CONTROLLER
+ +      .name   = "rk29_i2c",
+ +      .id     = 3,
+ +      .num_resources  = ARRAY_SIZE(resources_i2c3),
+ +      .resource       = resources_i2c3,
+ +      .dev                    = {
+ +              .platform_data = &default_i2c3_data,
+ +      },
+ +#else
+ +      .name   = "i2c-gpio",
+ +      .id = 3,
+ +      .dev                    = {
+ +              .platform_data = &default_i2c3_data,
+ +      },
+ +#endif
+ +};
+ +#endif
+ +
+ +/***********************************************************
+ +*       backlight
+ +***************************************************************/
+ +#ifdef CONFIG_BACKLIGHT_RK29_BL
+ +struct platform_device rk29_device_backlight = {
+ +              .name   = "rk29_backlight",
+ +              .id     = -1,
+ +        .dev    = {
+ +           .platform_data  = &rk29_bl_info,
+ +        }
+ +};
+ +#endif
+ +#ifdef CONFIG_SDMMC0_RK29 
+ +#ifndef CONFIG_EMMC_RK29 
+ +static struct resource resources_sdmmc0[] = {
+ +      {
+ +              .start  = IRQ_SDMMC,
+ +              .end    = IRQ_SDMMC,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_SDMMC0_PHYS,   
+ +              .end    = RK29_SDMMC0_PHYS + RK29_SDMMC0_SIZE -1,
+ +              .flags  = IORESOURCE_MEM,
+ +      }
+ +};
+ +#else
+ +static struct resource resources_sdmmc0[] = {
+ +      {
+ +              .start  = IRQ_EMMC,
+ +              .end    = IRQ_EMMC,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_EMMC_PHYS,   
+ +              .end    = RK29_EMMC_PHYS + RK29_EMMC_SIZE -1,
+ +              .flags  = IORESOURCE_MEM,
+ +      }
+ +};
+ +#endif
+ +#endif
+ +#ifdef CONFIG_SDMMC1_RK29
+ +static struct resource resources_sdmmc1[] = {
+ +      {
+ +              .start  = IRQ_SDIO,
+ +              .end    = IRQ_SDIO,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_SDMMC1_PHYS,
+ +              .end    = RK29_SDMMC1_PHYS + RK29_SDMMC1_SIZE -1,
+ +              .flags  = IORESOURCE_MEM,
+ +      }
+ +}; 
+ +#endif
+ +/* sdmmc */
+ +#ifdef CONFIG_SDMMC0_RK29
+ +struct platform_device rk29_device_sdmmc0 = {
+ +      .name                   = "rk29_sdmmc",
+ +      .id                             = 0,
+ +      .num_resources  = ARRAY_SIZE(resources_sdmmc0),
+ +      .resource               = resources_sdmmc0,
+ +      .dev                    = {
+ +              .platform_data = &default_sdmmc0_data,
+ +      },
+ +};
+ +#endif
+ +#ifdef CONFIG_SDMMC1_RK29
+ +struct platform_device rk29_device_sdmmc1 = {
+ +      .name                   = "rk29_sdmmc",
+ +      .id                             = 1,
+ +      .num_resources  = ARRAY_SIZE(resources_sdmmc1),
+ +      .resource               = resources_sdmmc1,
+ +      .dev                    = {
+ +              .platform_data = &default_sdmmc1_data,
+ +      },
+ +};
+ +#endif
+ +
+ +/*
+ + * rk29 wdt device  ADDED BY HHB@ROCK-CHIPS.COM
+ + */
+ +
+ +#ifdef CONFIG_RK29_WATCHDOG
+ +
+ +static struct resource resources_wdt[] = {
+ +      {
+ +              .start  = IRQ_WDT,
+ +              .end    = IRQ_WDT,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_WDT_PHYS,
+ +              .end    = RK29_WDT_PHYS + RK29_WDT_SIZE - 1,
+ +              .flags  = IORESOURCE_MEM,
+ +      },
+ +};
+ +
+ +struct platform_device rk29_device_wdt = {
+ +      .name   = "rk29-wdt",
+ +      .id     = 0,
+ +      .num_resources  = ARRAY_SIZE(resources_wdt),
+ +      .resource       = resources_wdt,
+ +};
+ +
+ +#endif
+ +
+ +
+ +/*
+ + * rk29 4 uarts device
+ + */
+ +#ifdef CONFIG_UART0_RK29
+ +static struct resource resources_uart0[] = {
+ +      {
+ +              .start  = IRQ_UART0,
+ +              .end    = IRQ_UART0,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_UART0_PHYS,
+ +              .end    = RK29_UART0_PHYS + RK29_UART0_SIZE - 1,
+ +              .flags  = IORESOURCE_MEM,
+ +      },
+ +};
+ +#endif
+ +#ifdef CONFIG_UART1_RK29
+ +static struct resource resources_uart1[] = {
+ +      {
+ +              .start  = IRQ_UART1,
+ +              .end    = IRQ_UART1,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_UART1_PHYS,
+ +              .end    = RK29_UART1_PHYS + RK29_UART1_SIZE - 1,
+ +              .flags  = IORESOURCE_MEM,
+ +      },
+ +};
+ +#endif
+ +#ifdef CONFIG_UART2_RK29
+ +static struct resource resources_uart2[] = {
+ +      {
+ +              .start  = IRQ_UART2,
+ +              .end    = IRQ_UART2,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_UART2_PHYS,
+ +              .end    = RK29_UART2_PHYS + RK29_UART2_SIZE - 1,
+ +              .flags  = IORESOURCE_MEM,
+ +      },
+ +};
+ +#endif
+ +#ifdef CONFIG_UART3_RK29
+ +static struct resource resources_uart3[] = {
+ +      {
+ +              .start  = IRQ_UART3,
+ +              .end    = IRQ_UART3,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_UART3_PHYS,
+ +              .end    = RK29_UART3_PHYS + RK29_UART3_SIZE - 1,
+ +              .flags  = IORESOURCE_MEM,
+ +      },
+ +};
+ +#endif
+ +#ifdef CONFIG_UART0_RK29
+ +struct platform_device rk29_device_uart0 = {
+ +      .name   = "rk29_serial",
+ +      .id     = 0,
+ +      .num_resources  = ARRAY_SIZE(resources_uart0),
+ +      .resource       = resources_uart0,
+ +};
+ +#endif
+ +#ifdef CONFIG_UART1_RK29
+ +struct platform_device rk29_device_uart1 = {
+ +      .name   = "rk29_serial",
+ +      .id     = 1,
+ +      .num_resources  = ARRAY_SIZE(resources_uart1),
+ +      .resource       = resources_uart1,
+ +};
+ +#endif
+ +#ifdef CONFIG_UART2_RK29
+ +struct platform_device rk29_device_uart2 = {
+ +      .name   = "rk29_serial",
+ +      .id     = 2,
+ +      .num_resources  = ARRAY_SIZE(resources_uart2),
+ +      .resource       = resources_uart2,
+ +};
+ +#endif
+ +#ifdef CONFIG_UART3_RK29
+ +struct platform_device rk29_device_uart3 = {
+ +      .name   = "rk29_serial",
+ +      .id     = 3,
+ +      .num_resources  = ARRAY_SIZE(resources_uart3),
+ +      .resource       = resources_uart3,
+ +};
+ +#endif
+ +
+ +/*
+ + * rk29xx spi master device
+ + */
+ +static struct resource rk29_spi0_resources[] = {
+ +      {
+ +              .start  = IRQ_SPI0,
+ +              .end    = IRQ_SPI0,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_SPI0_PHYS,
+ +              .end    = RK29_SPI0_PHYS + RK29_SPI0_SIZE - 1,
+ +              .flags  = IORESOURCE_MEM,
+ +      },
+ +      {
+ +              .start  = DMACH_SPI0_TX,
+ +              .end    = DMACH_SPI0_TX,
+ +              .flags  = IORESOURCE_DMA,
+ +      },
+ +      {
+ +              .start  = DMACH_SPI0_RX,
+ +              .end    = DMACH_SPI0_RX,
+ +              .flags  = IORESOURCE_DMA,
+ +      },
+ +};
+ +
+ +struct platform_device rk29xx_device_spi0m = {
+ +      .name   = "rk29xx_spim",
+ +      .id     = 0,
+ +      .num_resources  = ARRAY_SIZE(rk29_spi0_resources),
+ +      .resource       = rk29_spi0_resources,
+ +      .dev                    = {
+ +              .platform_data  = &rk29xx_spi0_platdata,
+ +      },
+ +};
+ +
+ +static struct resource rk29_spi1_resources[] = {
+ +      {
+ +              .start  = IRQ_SPI1,
+ +              .end    = IRQ_SPI1,
+ +              .flags  = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start  = RK29_SPI1_PHYS,
+ +              .end    = RK29_SPI1_PHYS + RK29_SPI1_SIZE - 1,
+ +              .flags  = IORESOURCE_MEM,
+ +      },
+ +      {
+ +              .start  = DMACH_SPI1_TX,
+ +              .end    = DMACH_SPI1_TX,
+ +              .flags  = IORESOURCE_DMA,
+ +      },
+ +      {
+ +              .start  = DMACH_SPI1_RX,
+ +              .end    = DMACH_SPI1_RX,
+ +              .flags  = IORESOURCE_DMA,
+ +      },
+ +};
+ +
+ +struct platform_device rk29xx_device_spi1m = {
+ +      .name   = "rk29xx_spim",
+ +      .id     = 1,
+ +      .num_resources  = ARRAY_SIZE(rk29_spi1_resources),
+ +      .resource       = rk29_spi1_resources,
+ +      .dev                    = {
+ +              .platform_data  = &rk29xx_spi1_platdata,
+ +      },
+ +};
+ +
+ +#if defined(CONFIG_MTD_NAND_RK29XX)  
+ +static struct resource rk29xxnand_resources[] = {
+ +      {
+ +              .start  = RK29_NANDC_PHYS,
+ +              .end    =       RK29_NANDC_PHYS+RK29_NANDC_SIZE -1,
+ +              .flags  = IORESOURCE_MEM,
+ +      }
+ +};
+ +
+ +struct platform_device rk29xx_device_nand = {
+ +      .name   = "rk29xxnand", 
+ +      .id             =  -1, 
+ +      .resource       = rk29xxnand_resources,
+ +      .num_resources= ARRAY_SIZE(rk29xxnand_resources),
+ +      .dev    = {
+ +              .platform_data= &rk29_nand_data,
+ +      },
+ +      
+ +};
+ +#endif
+ +
+ +
+ +#if defined(CONFIG_MTD_NAND_RK29)  
+ +static struct resource nand_resources[] = {
+ +      {
+ +              .start  = RK29_NANDC_PHYS,
+ +              .end    =       RK29_NANDC_PHYS+RK29_NANDC_SIZE -1,
+ +              .flags  = IORESOURCE_MEM,
+ +      }
+ +};
+ +
+ +struct platform_device rk29_device_nand = {
+ +      .name   = "rk29-nand",
+ +      .id             =  -1, 
+ +      .resource       = nand_resources,
+ +      .num_resources= ARRAY_SIZE(nand_resources),
+ +      .dev    = {
+ +              .platform_data= &rk29_nand_data,
+ +      },
+ +      
+ +};
+ +#endif
+ +
+ +#if defined(CONFIG_SND_RK29_SOC_I2S)
+ +static struct resource rk29_iis_2ch_resource[] = {
+ +        [0] = {
+ +                .start = RK29_I2S_2CH_PHYS,
+ +                .end   = RK29_I2S_2CH_PHYS + RK29_I2S_2CH_SIZE -1,
+ +                .flags = IORESOURCE_MEM,
+ +        },
+ +        [1] = {
+ +                .start = DMACH_I2S_2CH_TX,
+ +                .end   = DMACH_I2S_2CH_TX,
+ +                .flags = IORESOURCE_DMA,
+ +        },
+ +        [2] = {
+ +                .start = DMACH_I2S_2CH_RX,
+ +                .end   = DMACH_I2S_2CH_RX,
+ +                .flags = IORESOURCE_DMA,
+ +        },
+ +        [3] = {
+ +                .start = IRQ_I2S_2CH,
+ +                .end   = IRQ_I2S_2CH,
+ +                .flags = IORESOURCE_IRQ,        
+ +        },
+ +};
+ +
+ +struct platform_device rk29_device_iis_2ch = {
+ +        .name           = "rk29_i2s",
+ +        .id             = 1,
+ +        .num_resources  = ARRAY_SIZE(rk29_iis_2ch_resource),
+ +        .resource       = rk29_iis_2ch_resource,
+ +};
+ +
+ +static struct resource rk29_iis_8ch_resource[] = {
+ +        [0] = {
+ +                .start = RK29_I2S_8CH_PHYS,
+ +                .end   = RK29_I2S_8CH_PHYS + RK29_I2S_8CH_SIZE - 1,
+ +                .flags = IORESOURCE_MEM,
+ +        },
+ +        [1] = {
+ +                .start = DMACH_I2S_8CH_TX,
+ +                .end   = DMACH_I2S_8CH_TX,
+ +                .flags = IORESOURCE_DMA,
+ +        },
+ +        [2] = {
+ +                .start = DMACH_I2S_8CH_RX,
+ +                .end   = DMACH_I2S_8CH_RX,
+ +                .flags = IORESOURCE_DMA,
+ +        },
+ +        [3] = {
+ +                .start = IRQ_I2S_8CH,
+ +                .end   = IRQ_I2S_8CH,
+ +                .flags = IORESOURCE_IRQ,        
+ +        },
+ +};
+ +
+ +struct platform_device rk29_device_iis_8ch = {
+ +        .name           = "rk29_i2s",
+ +        .id             = 0,
+ +        .num_resources  = ARRAY_SIZE(rk29_iis_8ch_resource),
+ +        .resource       = rk29_iis_8ch_resource,
+ +};
+ +#endif
+ +#ifdef CONFIG_RK29_IPP
+ +/* rk29 ipp resource */
+ +static struct resource rk29_ipp_resource[] = {
+ +      [0] = {
+ +              .start = RK29_IPP_PHYS,
+ +              .end   = RK29_IPP_PHYS + RK29_IPP_SIZE - 1,
+ +              .flags = IORESOURCE_MEM,
+ +      },
+ +      [1] = {
+ +              .start = IRQ_IPP,
+ +              .end   = IRQ_IPP,
+ +              .flags = IORESOURCE_IRQ,
+ +      },
+ +};
+ +
+ +/*platform_device*/
+ +//extern struct rk29ipp_info rk29_ipp_info;
+ +struct platform_device rk29_device_ipp = {
+ +      .name             = "rk29-ipp",
+ +      .id               = -1,
+ +      .num_resources    = ARRAY_SIZE(rk29_ipp_resource),
+ +      .resource         = rk29_ipp_resource,
+ +};
+ +#endif
+ +
+ +#ifdef CONFIG_USB20_OTG
+ +/*DWC_OTG*/
+ +static struct resource usb20_otg_resource[] = {
+ +      {
+ +              .start = IRQ_USB_OTG0,
+ +              .end   = IRQ_USB_OTG0,
+ +              .flags = IORESOURCE_IRQ,
+ +      },
+ +      {
+ +              .start = RK29_USBOTG0_PHYS,
+ +              .end   = RK29_USBOTG0_PHYS + RK29_USBOTG0_SIZE - 1,
+ +              .flags = IORESOURCE_MEM,
+ +      },
+ +
+ +};
+ +
+ +struct platform_device rk29_device_usb20_otg = {
+ +      .name             = "usb20_otg",
+ +      .id               = -1,
+ +      .num_resources    = ARRAY_SIZE(usb20_otg_resource),
+ +      .resource         = usb20_otg_resource,
+ +};
+ +#endif
+ +#ifdef CONFIG_USB_ANDROID
+ +
+ +static char *usb_functions_rockchip[] = {
+ +      "usb_mass_storage",
+ +};
+ +
+ +static char *usb_functions_rockchip_adb[] = {
+ +      "usb_mass_storage",
+ +      "adb",
+ +};
+ +
+ +static char *usb_functions_rndis_rockchip[] = {
+ +      "rndis",
+ +      "usb_mass_storage",
+ +};
+ +
+ +static char *usb_functions_rndis_rockchip_adb[] = {
+ +      "rndis",
+ +      "usb_mass_storage",
+ +      "adb",
+ +};
+ +
+ +#ifdef CONFIG_USB_ANDROID_DIAG
+ +static char *usb_functions_adb_diag[] = {
+ +      "usb_mass_storage",
+ +      "adb",
+ +      "diag",
+ +};
+ +#endif
+ +
+ +static char *usb_functions_all[] = {
+ +#ifdef CONFIG_USB_ANDROID_RNDIS
+ +      "rndis",
+ +#endif
+ +      "usb_mass_storage",
+ +#ifdef CONFIG_USB_ANDROID_ADB
+ +      "adb",
+ +#endif
+ +#ifdef CONFIG_USB_ANDROID_ACM
+ +      "acm",
+ +#endif
+ +#ifdef CONFIG_USB_ANDROID_DIAG
+ +      "diag",
+ +#endif
+ +};
+ +
+ +static struct android_usb_product usb_products[] = {
+ +      {
+ +              .product_id     = 0x2910,//0x0c02,//0x4e11,
+ +              .num_functions  = ARRAY_SIZE(usb_functions_rockchip),
+ +              .functions      = usb_functions_rockchip,
+ +      },
+ +      {
+ +              .product_id     = 0x0c02,//0x0c02,//0x4e12,
+ +              .num_functions  = ARRAY_SIZE(usb_functions_rockchip_adb),
+ +              .functions      = usb_functions_rockchip_adb,
+ +      },
+ +      {
+ +              .product_id     = 0x4e13,
+ +              .num_functions  = ARRAY_SIZE(usb_functions_rndis_rockchip),
+ +              .functions      = usb_functions_rndis_rockchip,
+ +      },
+ +      {
+ +              .product_id     = 0x4e14,
+ +              .num_functions  = ARRAY_SIZE(usb_functions_rndis_rockchip_adb),
+ +              .functions      = usb_functions_rndis_rockchip_adb,
+ +      },
+ +#ifdef CONFIG_USB_ANDROID_DIAG
+ +      {
+ +              .product_id     = 0x4e17,
+ +              .num_functions  = ARRAY_SIZE(usb_functions_adb_diag),
+ +              .functions      = usb_functions_adb_diag,
+ +      },
+ +#endif
+ +};
+ +/*
+ + * if anyone want to use adb driver of HTC G1,
+ + * please change vendor_id to 0x0bb4 and product_id to 0x0c02.
+ + */
+ +static struct android_usb_platform_data android_usb_pdata = {
+ +      .vendor_id      = 0x0bb4,//0x2207,//0x0bb4,//0x18d1,
+ +      .product_id     = 0x4e11,//0x2910,//0x4e11,
+ +      .version        = 0x0100,
+ +      .product_name           = "rk2918 sdk",
+ +      .manufacturer_name      = "RockChip",
+ +      .num_products = ARRAY_SIZE(usb_products),
+ +      .products = usb_products,
+ +      .num_functions = ARRAY_SIZE(usb_functions_all),
+ +      .functions = usb_functions_all,
+ +};
+ +
+ +//static 
+ +struct platform_device android_usb_device = {
+ +      .name   = "android_usb",
+ +      .id             = -1,
+ +      .dev            = {
+ +              .platform_data = &android_usb_pdata,
+ +      },
+ +};
+ +
+ +/********************usb*********************/
+ +struct usb_mass_storage_platform_data mass_storage_pdata = {
+ +      .nluns          = 2,
+ +      .vendor         = "RockChip",
+ +      .product        = "rk29 sdk",
+ +      .release        = 0x0100,
+ +};
+ +
+ +//static 
+ +struct platform_device usb_mass_storage_device = {
+ +      .name   = "usb_mass_storage",
+ +      .id     = -1,
+ +      .dev    = {
+ +              .platform_data = &mass_storage_pdata,
+ +      },
+ +};
+ +#endif
+ +
+ +
+ +static struct usb_ether_platform_data rndis_pdata = {
+ +      /* ethaddr is filled by board_serialno_setup */
+ +      .ethaddr    = {0xf0, 0xde, 0xf1, 0x42, 0xe8, 0x10},
+ +      .vendorID       = 0x22b8,// moto xt701 //0x2207,
+ +      .vendorDescr    = "RockChip",
+ +};
+ +
+ +struct platform_device rk29_device_rndis = {
+ +      .name   = "rndis",
+ +      .id     = -1,
+ +      .dev    = {
+ +              .platform_data = &rndis_pdata,
+ +      },
+ +};
+ +
+ +#ifdef CONFIG_USB11_HOST
+ +static struct resource usb11_host_resource[] = {
+ +    {
+ +        .start = IRQ_USB_HOST,
+ +        .end   = IRQ_USB_HOST,
+ +        .flags = IORESOURCE_IRQ,
+ +    },
+ +    {
+ +        .start = RK29_USBHOST_PHYS,
+ +        .end   = RK29_USBHOST_PHYS + RK29_USBHOST_SIZE - 1,
+ +        .flags = IORESOURCE_MEM,
+ +    },
+ +
+ +};
+ +
+ +struct platform_device rk29_device_usb11_host = {
+ +    .name             = "usb11_host",
+ +    .id               = -1,
+ +    .num_resources    = ARRAY_SIZE(usb11_host_resource),
+ +    .resource         = usb11_host_resource,
+ +};
+ +#endif
+ +#ifdef CONFIG_USB20_HOST
+ +static struct resource usb20_host_resource[] = {
+ +    {
+ +        .start = IRQ_USB_OTG1,
+ +        .end   = IRQ_USB_OTG1,
+ +        .flags = IORESOURCE_IRQ,
+ +    },
+ +    {
+ +        .start = RK29_USBOTG1_PHYS,
+ +        .end   = RK29_USBOTG1_PHYS + RK29_USBOTG1_SIZE - 1,
+ +        .flags = IORESOURCE_MEM,
+ +    },
+ +
+ +};
+ +
+ +struct platform_device rk29_device_usb20_host = {
+ +    .name             = "usb20_host",
+ +    .id               = -1,
+ +    .num_resources    = ARRAY_SIZE(usb20_host_resource),
+ +    .resource         = usb20_host_resource,
+ +};
+ +#endif
+ +
++static struct resource rk29_pmu_resource = {
++      .start          = IRQ_A8IRQ3,
++      .end            = IRQ_A8IRQ3,
++      .flags          = IORESOURCE_IRQ,
++};
++
++struct platform_device rk29_device_pmu = {
++      .name           = "arm-pmu",
++      .id             = ARM_PMU_DEVICE_CPU,
++      .num_resources  = 1,
++      .resource       = &rk29_pmu_resource,
++};
++
+ +static int boot_mode;
+ +static int __init boot_mode_init(char *s)
+ +{
+ +      if (!strcmp(s, "normal"))
+ +              boot_mode = BOOT_MODE_NORMAL;
+ +      else if (!strcmp(s, "factory2"))
+ +              boot_mode = BOOT_MODE_FACTORY2;
+ +      else if (!strcmp(s, "recovery"))
+ +              boot_mode = BOOT_MODE_RECOVERY;
+ +      else if (!strcmp(s, "charge"))
+ +              boot_mode = BOOT_MODE_CHARGE;
+ +      else if (!strcmp(s, "power_test"))
+ +              boot_mode = BOOT_MODE_POWER_TEST;
+ +      else if (!strcmp(s, "offmode_charging"))
+ +              boot_mode = BOOT_MODE_OFFMODE_CHARGING;
+ +
+ +      return 1;
+ +}
+ +__setup("androidboot.mode=", boot_mode_init);
+ +
+ +int board_boot_mode(void)
+ +{
+ +      return boot_mode;
+ +}
+ +EXPORT_SYMBOL(board_boot_mode);
+ +
++static int __init rk29_init_devices(void)
++{
++      platform_device_register(&rk29_pmu_device);
++        return 0;
++}
++arch_initcall(rk29_init_devices);
diff --cc arch/arm/mach-rk29/devices.h

index 9c95ab39f6eab6459feb9aa5a663e1f02ab9cff3,0000000000000000000000000000000000000000..b6d2d16d5927d09622b5d3a958f428615f46d7ab

mode 100644,000000..100644
--- 1/arch/arm/mach-rk29/devices.h
--- /dev/null
+++ b/arch/arm/mach-rk29/devices.h
@@@ -1,81 -1,0 +1,82 @@@
+ +/* /arch/arm/mach-rk29/devices.h
+ + *
+ + * Copyright (C) 2010 ROCKCHIP, Inc.
+ + *
+ + * This software is licensed under the terms of the GNU General Public
+ + * License version 2, as published by the Free Software Foundation, and
+ + * may be copied, distributed, and modified under those terms.
+ + *
+ + * This program is distributed in the hope that it will be useful,
+ + * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ + * GNU General Public License for more details.
+ + *
+ + */
+ +
+ +#ifndef __ARCH_ARM_MACH_RK29_DEVICES_H
+ +#define __ARCH_ARM_MACH_RK29_DEVICES_H
+ +
+ +extern struct rk29_nand_platform_data rk29_nand_data;
+ +#ifdef CONFIG_RK29_I2C0_CONTROLLER
+ +extern struct rk29_i2c_platform_data default_i2c0_data;
+ +#else
+ +extern struct i2c_gpio_platform_data default_i2c0_data;
+ +#endif
+ +#ifdef CONFIG_RK29_I2C1_CONTROLLER
+ +extern struct rk29_i2c_platform_data default_i2c1_data;
+ +#else
+ +extern struct i2c_gpio_platform_data default_i2c1_data;
+ +#endif
+ +#ifdef CONFIG_RK29_I2C2_CONTROLLER
+ +extern struct rk29_i2c_platform_data default_i2c2_data;
+ +#else
+ +extern struct i2c_gpio_platform_data default_i2c2_data;
+ +#endif
+ +#ifdef CONFIG_RK29_I2C3_CONTROLLER
+ +extern struct rk29_i2c_platform_data default_i2c3_data;
+ +#else
+ +extern struct i2c_gpio_platform_data default_i2c3_data;
+ +#endif
+ +
+ +extern struct platform_device rk29_device_i2c0;
+ +extern struct platform_device rk29_device_i2c1;
+ +extern struct platform_device rk29_device_i2c2;
+ +extern struct platform_device rk29_device_i2c3;
+ +
+ +extern struct platform_device rk29_device_iis_2ch;
+ +extern struct platform_device rk29_device_iis_8ch;
+ +
+ +extern struct platform_device rk29_device_uart0;
+ +extern struct platform_device rk29_device_uart1;
+ +extern struct platform_device rk29_device_uart2;
+ +extern struct platform_device rk29_device_uart3;
+ +extern struct platform_device rk29xx_device_spi0m;
+ +extern struct platform_device rk29xx_device_spi1m;
+ +extern struct rk29xx_spi_platform_data rk29xx_spi0_platdata;
+ +extern struct rk29xx_spi_platform_data rk29xx_spi1_platdata;
+ +extern struct platform_device rk29_device_fb;
+ +extern struct platform_device rk29_device_dma_cpy;
+ +extern struct platform_device rk29_device_nand;
+ +extern struct platform_device rk29xx_device_nand;
+ +extern struct rk29_sdmmc_platform_data default_sdmmc0_data;
+ +extern struct rk29_sdmmc_platform_data default_sdmmc1_data;
+ +extern struct platform_device rk29_device_sdmmc0;
+ +extern struct platform_device rk29_device_sdmmc1;
+ +extern struct platform_device rk29_device_adc;
+ +extern struct platform_device rk29_device_vmac;
+ +extern struct rk29_bl_info    rk29_bl_info;
+ +extern struct platform_device rk29_device_backlight;
+ +extern struct platform_device rk29_device_usb20_otg;
+ +extern struct platform_device rk29_device_usb20_host;
+ +extern struct platform_device rk29_device_usb11_host;
+ +extern struct platform_device android_usb_device;
+ +extern struct usb_mass_storage_platform_data mass_storage_pdata;
+ +extern struct platform_device usb_mass_storage_device;
+ +extern struct platform_device rk29_device_rndis;
+ +extern struct platform_device rk29_device_vmac;
+ +extern struct rk29_vmac_platform_data rk29_vmac_pdata;
+ +extern struct platform_device rk29_device_ipp;
+ +extern struct platform_device rk29_device_wdt;
++extern struct platform_device rk29_device_pmu;
+ +
+ +#endif
diff --cc arch/arm/mm/mmu.c

index 36f521e710c0bfcabffc8b4e10f67ef706e0aa65,3825b4f0f8715fd12c8e9bc44ca60b82cca4e399..d45f849dbcdae2f4b0376053a0caf19cf68ee9fe
--- 1/arch/arm/mm/mmu.c
--- 2/arch/arm/mm/mmu.c
+++ b/arch/arm/mm/mmu.c
@@@ -664,11 -717,7 +717,11 @@@ void __init iotable_init(struct map_des
                 create_mapping(io_desc + i);
   }
   
- static unsigned long __initdata vmalloc_reserve = SZ_256M;
+ +#if defined(CONFIG_RK29_MEM_SIZE_M) && CONFIG_RK29_MEM_SIZE_M >= 1024
- static unsigned long __initdata vmalloc_reserve = SZ_128M;
++static void * __initdata vmalloc_min = (void *)(VMALLOC_END - SZ_256M);
+ +#else
+ static void * __initdata vmalloc_min = (void *)(VMALLOC_END - SZ_128M);
+ +#endif
   
   /*
    * vmalloc=size forces the vmalloc area to be exactly 'size'
diff --cc arch/arm/mm/proc-v7.S

index 9b26be949ef2512a58b70ef4bddb776eff2eab6e,8cdf3bf2671984e5068d4d989c332805b3e73508..18d04feda60e88a1a0278e5c617c14cba6fe9fa4
--- 1/arch/arm/mm/proc-v7.S
--- 2/arch/arm/mm/proc-v7.S
+++ b/arch/arm/mm/proc-v7.S
@@@ -265,19 -302,12 +302,23 @@@ __v7_setup
          *   NS1 = PRRR[19] = 1         - normal shareable property
          *   NOS = PRRR[24+n] = 1       - not outer shareable
          */
-       ldr     r5, =0xff0a81a8                 @ PRRR
-       ldr     r6, =0x40e040e0                 @ NMRR
+ +#ifdef CONFIG_ARCH_RK29
+ +      /* Setup L2 cache */
+ +      mrc     p15, 1, r5, c9, c0, 2
+ +      bic     r5, r5, #1 << 29                @ L2 data RAM read multiplexer select: 0 = two cycles
+ +      bic     r5, r5, #7 << 6
+ +      bic     r5, r5, #15
+ +      orr     r5, r5, #2 << 6                 @ Tag RAM latency: b010 = 3 cycles
+ +      orr     r5, r5, #3                      @ Data RAM latency: b0011 = 4 cycles
+ +      mcr     p15, 1, r5, c9, c0, 2
+ +#endif
+ +
+       ldr     r5, =0xff0a89a8                 @ PRRR
+ #ifdef CONFIG_SMP
+       ldr     r6, =0xc0e0c4e0                 @ NMRR
+ #else
+       ldr     r6, =0x40e044e0
+ #endif
         mcr     p15, 0, r5, c10, c2, 0          @ write PRRR
         mcr     p15, 0, r6, c10, c2, 1          @ write NMRR
   #endif
diff --cc arch/arm/tools/mach-types

index 26ec582519b1b7ec3106cfd2e9691dad1a219bb4,55590a4d87c932984404d1df13ca4c296c9d7117..28ccae2cb6d4178e457f7c67d2b5291f235ef950
--- 1/arch/arm/tools/mach-types
--- 2/arch/arm/tools/mach-types
+++ b/arch/arm/tools/mach-types
@@@ -2534,5 -2536,511 +2535,512 @@@ davinci_dm6467tevm  MACH_DAVINCI_DM6467T
   c3ax03                        MACH_C3AX03             C3AX03                  2549
   mxt_td60              MACH_MXT_TD60           MXT_TD60                2550
   esyx                  MACH_ESYX               ESYX                    2551
+ dove_db2              MACH_DOVE_DB2           DOVE_DB2                2552
   bulldog                       MACH_BULLDOG            BULLDOG                 2553
- -ec4350sdb             MACH_EC4350SDB          EC4350SDB               2929
+ derell_me2000         MACH_DERELL_ME2000      DERELL_ME2000           2554
+ bcmring_base          MACH_BCMRING_BASE       BCMRING_BASE            2555
+ bcmring_evm           MACH_BCMRING_EVM        BCMRING_EVM             2556
+ bcmring_evm_jazz      MACH_BCMRING_EVM_JAZZ   BCMRING_EVM_JAZZ        2557
+ bcmring_sp            MACH_BCMRING_SP         BCMRING_SP              2558
+ bcmring_sv            MACH_BCMRING_SV         BCMRING_SV              2559
+ bcmring_sv_jazz               MACH_BCMRING_SV_JAZZ    BCMRING_SV_JAZZ         2560
+ bcmring_tablet                MACH_BCMRING_TABLET     BCMRING_TABLET          2561
+ bcmring_vp            MACH_BCMRING_VP         BCMRING_VP              2562
+ bcmring_evm_seikor    MACH_BCMRING_EVM_SEIKOR BCMRING_EVM_SEIKOR      2563
+ bcmring_sp_wqvga      MACH_BCMRING_SP_WQVGA   BCMRING_SP_WQVGA        2564
+ bcmring_custom                MACH_BCMRING_CUSTOM     BCMRING_CUSTOM          2565
+ acer_s200             MACH_ACER_S200          ACER_S200               2566
+ bt270                 MACH_BT270              BT270                   2567
+ iseo                  MACH_ISEO               ISEO                    2568
+ cezanne                       MACH_CEZANNE            CEZANNE                 2569
+ lucca                 MACH_LUCCA              LUCCA                   2570
+ supersmart            MACH_SUPERSMART         SUPERSMART              2571
+ arm11_board           MACH_CS_MISANO          CS_MISANO               2572
+ magnolia2             MACH_MAGNOLIA2          MAGNOLIA2               2573
+ emxx                  MACH_EMXX               EMXX                    2574
+ outlaw                        MACH_OUTLAW             OUTLAW                  2575
+ riot_bei2             MACH_RIOT_BEI2          RIOT_BEI2               2576
+ riot_vox              MACH_RIOT_VOX           RIOT_VOX                2577
+ riot_x37              MACH_RIOT_X37           RIOT_X37                2578
+ mega25mx              MACH_MEGA25MX           MEGA25MX                2579
+ benzina2              MACH_BENZINA2           BENZINA2                2580
+ ignite                        MACH_IGNITE             IGNITE                  2581
+ foggia                        MACH_FOGGIA             FOGGIA                  2582
+ arezzo                        MACH_AREZZO             AREZZO                  2583
+ leica_skywalker               MACH_LEICA_SKYWALKER    LEICA_SKYWALKER         2584
+ jacinto2_jamr         MACH_JACINTO2_JAMR      JACINTO2_JAMR           2585
+ gts_nova              MACH_GTS_NOVA           GTS_NOVA                2586
+ p3600                 MACH_P3600              P3600                   2587
+ dlt2                  MACH_DLT2               DLT2                    2588
+ df3120                        MACH_DF3120             DF3120                  2589
+ ecucore_9g20          MACH_ECUCORE_9G20       ECUCORE_9G20            2590
+ nautel_lpc3240                MACH_NAUTEL_LPC3240     NAUTEL_LPC3240          2591
+ glacier                       MACH_GLACIER            GLACIER                 2592
+ phrazer_bulldog               MACH_PHRAZER_BULLDOG    PHRAZER_BULLDOG         2593
+ omap3_bulldog         MACH_OMAP3_BULLDOG      OMAP3_BULLDOG           2594
+ pca101                        MACH_PCA101             PCA101                  2595
+ buzzc                 MACH_BUZZC              BUZZC                   2596
+ sasie2                        MACH_SASIE2             SASIE2                  2597
+ davinci_cio           MACH_DAVINCI_CIO        DAVINCI_CIO             2598
+ smartmeter_dl         MACH_SMARTMETER_DL      SMARTMETER_DL           2599
+ wzl6410                       MACH_WZL6410            WZL6410                 2600
+ wzl6410m              MACH_WZL6410M           WZL6410M                2601
+ wzl6410f              MACH_WZL6410F           WZL6410F                2602
+ wzl6410i              MACH_WZL6410I           WZL6410I                2603
+ spacecom1             MACH_SPACECOM1          SPACECOM1               2604
+ pingu920              MACH_PINGU920           PINGU920                2605
+ bravoc                        MACH_BRAVOC             BRAVOC                  2606
+ cybo2440              MACH_CYBO2440           CYBO2440                2607
+ vdssw                 MACH_VDSSW              VDSSW                   2608
+ romulus                       MACH_ROMULUS            ROMULUS                 2609
+ omap_magic            MACH_OMAP_MAGIC         OMAP_MAGIC              2610
+ eltd100                       MACH_ELTD100            ELTD100                 2611
+ capc7117              MACH_CAPC7117           CAPC7117                2612
+ swan                  MACH_SWAN               SWAN                    2613
+ veu                   MACH_VEU                VEU                     2614
+ rm2                   MACH_RM2                RM2                     2615
+ tt2100                        MACH_TT2100             TT2100                  2616
+ venice                        MACH_VENICE             VENICE                  2617
+ pc7323                        MACH_PC7323             PC7323                  2618
+ masp                  MACH_MASP               MASP                    2619
+ fujitsu_tvstbsoc0     MACH_FUJITSU_TVSTBSOC   FUJITSU_TVSTBSOC        2620
+ fujitsu_tvstbsoc1     MACH_FUJITSU_TVSTBSOC1  FUJITSU_TVSTBSOC1       2621
+ lexikon                       MACH_LEXIKON            LEXIKON                 2622
+ mini2440v2            MACH_MINI2440V2         MINI2440V2              2623
+ icontrol              MACH_ICONTROL           ICONTROL                2624
+ gplugd                        MACH_SHEEVAD            SHEEVAD                 2625
+ qsd8x50a_st1_1                MACH_QSD8X50A_ST1_1     QSD8X50A_ST1_1          2626
+ qsd8x50a_st1_5                MACH_QSD8X50A_ST1_5     QSD8X50A_ST1_5          2627
+ bee                   MACH_BEE                BEE                     2628
+ mx23evk                       MACH_MX23EVK            MX23EVK                 2629
+ ap4evb                        MACH_AP4EVB             AP4EVB                  2630
+ stockholm             MACH_STOCKHOLM          STOCKHOLM               2631
+ lpc_h3131             MACH_LPC_H3131          LPC_H3131               2632
+ stingray              MACH_STINGRAY           STINGRAY                2633
+ kraken                        MACH_KRAKEN             KRAKEN                  2634
+ gw2388                        MACH_GW2388             GW2388                  2635
+ jadecpu                       MACH_JADECPU            JADECPU                 2636
+ carlisle              MACH_CARLISLE           CARLISLE                2637
+ lux_sf9                       MACH_LUX_SF9            LUX_SF9                 2638
+ nemid_tb              MACH_NEMID_TB           NEMID_TB                2639
+ terrier                       MACH_TERRIER            TERRIER                 2640
+ turbot                        MACH_TURBOT             TURBOT                  2641
+ sanddab                       MACH_SANDDAB            SANDDAB                 2642
+ mx35_cicada           MACH_MX35_CICADA        MX35_CICADA             2643
+ ghi2703d              MACH_GHI2703D           GHI2703D                2644
+ lux_sfx9              MACH_LUX_SFX9           LUX_SFX9                2645
+ lux_sf9g              MACH_LUX_SF9G           LUX_SF9G                2646
+ lux_edk9              MACH_LUX_EDK9           LUX_EDK9                2647
+ hw90240                       MACH_HW90240            HW90240                 2648
+ dm365_leopard         MACH_DM365_LEOPARD      DM365_LEOPARD           2649
+ mityomapl138          MACH_MITYOMAPL138       MITYOMAPL138            2650
+ scat110                       MACH_SCAT110            SCAT110                 2651
+ acer_a1                       MACH_ACER_A1            ACER_A1                 2652
+ cmcontrol             MACH_CMCONTROL          CMCONTROL               2653
+ pelco_lamar           MACH_PELCO_LAMAR        PELCO_LAMAR             2654
+ rfp43                 MACH_RFP43              RFP43                   2655
+ sk86r0301             MACH_SK86R0301          SK86R0301               2656
+ ctpxa                 MACH_CTPXA              CTPXA                   2657
+ epb_arm9_a            MACH_EPB_ARM9_A         EPB_ARM9_A              2658
+ guruplug              MACH_GURUPLUG           GURUPLUG                2659
+ spear310              MACH_SPEAR310           SPEAR310                2660
+ spear320              MACH_SPEAR320           SPEAR320                2661
+ robotx                        MACH_ROBOTX             ROBOTX                  2662
+ lsxhl                 MACH_LSXHL              LSXHL                   2663
+ smartlite             MACH_SMARTLITE          SMARTLITE               2664
+ cws2                  MACH_CWS2               CWS2                    2665
+ m619                  MACH_M619               M619                    2666
+ smartview             MACH_SMARTVIEW          SMARTVIEW               2667
+ lsa_salsa             MACH_LSA_SALSA          LSA_SALSA               2668
+ kizbox                        MACH_KIZBOX             KIZBOX                  2669
+ htccharmer            MACH_HTCCHARMER         HTCCHARMER              2670
+ guf_neso_lt           MACH_GUF_NESO_LT        GUF_NESO_LT             2671
+ pm9g45                        MACH_PM9G45             PM9G45                  2672
+ htcpanther            MACH_HTCPANTHER         HTCPANTHER              2673
+ htcpanther_cdma               MACH_HTCPANTHER_CDMA    HTCPANTHER_CDMA         2674
+ reb01                 MACH_REB01              REB01                   2675
+ aquila                        MACH_AQUILA             AQUILA                  2676
+ spark_sls_hw2         MACH_SPARK_SLS_HW2      SPARK_SLS_HW2           2677
+ sheeva_esata          MACH_ESATA_SHEEVAPLUG   ESATA_SHEEVAPLUG        2678
+ msm7x30_surf          MACH_MSM7X30_SURF       MSM7X30_SURF            2679
+ micro2440             MACH_MICRO2440          MICRO2440               2680
+ am2440                        MACH_AM2440             AM2440                  2681
+ tq2440                        MACH_TQ2440             TQ2440                  2682
+ lpc2478oem            MACH_LPC2478OEM         LPC2478OEM              2683
+ ak880x                        MACH_AK880X             AK880X                  2684
+ cobra3530             MACH_COBRA3530          COBRA3530               2685
+ pmppb                 MACH_PMPPB              PMPPB                   2686
+ u6715                 MACH_U6715              U6715                   2687
+ axar1500_sender               MACH_AXAR1500_SENDER    AXAR1500_SENDER         2688
+ g30_dvb                       MACH_G30_DVB            G30_DVB                 2689
+ vc088x                        MACH_VC088X             VC088X                  2690
+ mioa702                       MACH_MIOA702            MIOA702                 2691
+ hpmin                 MACH_HPMIN              HPMIN                   2692
+ ak880xak              MACH_AK880XAK           AK880XAK                2693
+ arm926tomap850                MACH_ARM926TOMAP850     ARM926TOMAP850          2694
+ lkevm                 MACH_LKEVM              LKEVM                   2695
+ mw6410                        MACH_MW6410             MW6410                  2696
+ terastation_wxl               MACH_TERASTATION_WXL    TERASTATION_WXL         2697
+ cpu8000e              MACH_CPU8000E           CPU8000E                2698
+ catania                       MACH_CATANIA            CATANIA                 2699
+ tokyo                 MACH_TOKYO              TOKYO                   2700
+ msm7201a_surf         MACH_MSM7201A_SURF      MSM7201A_SURF           2701
+ msm7201a_ffa          MACH_MSM7201A_FFA       MSM7201A_FFA            2702
+ msm7x25_surf          MACH_MSM7X25_SURF       MSM7X25_SURF            2703
+ msm7x25_ffa           MACH_MSM7X25_FFA        MSM7X25_FFA             2704
+ msm7x27_surf          MACH_MSM7X27_SURF       MSM7X27_SURF            2705
+ msm7x27_ffa           MACH_MSM7X27_FFA        MSM7X27_FFA             2706
+ msm7x30_ffa           MACH_MSM7X30_FFA        MSM7X30_FFA             2707
+ qsd8x50_surf          MACH_QSD8X50_SURF       QSD8X50_SURF            2708
+ qsd8x50_comet         MACH_QSD8X50_COMET      QSD8X50_COMET           2709
+ qsd8x50_ffa           MACH_QSD8X50_FFA        QSD8X50_FFA             2710
+ qsd8x50a_surf         MACH_QSD8X50A_SURF      QSD8X50A_SURF           2711
+ qsd8x50a_ffa          MACH_QSD8X50A_FFA       QSD8X50A_FFA            2712
+ adx_xgcp10            MACH_ADX_XGCP10         ADX_XGCP10              2713
+ mcgwumts2a            MACH_MCGWUMTS2A         MCGWUMTS2A              2714
+ mobikt                        MACH_MOBIKT             MOBIKT                  2715
+ mx53_evk              MACH_MX53_EVK           MX53_EVK                2716
+ igep0030              MACH_IGEP0030           IGEP0030                2717
+ axell_h40_h50_ctrl    MACH_AXELL_H40_H50_CTRL AXELL_H40_H50_CTRL      2718
+ dtcommod              MACH_DTCOMMOD           DTCOMMOD                2719
+ gould                 MACH_GOULD              GOULD                   2720
+ siberia                       MACH_SIBERIA            SIBERIA                 2721
+ sbc3530                       MACH_SBC3530            SBC3530                 2722
+ qarm                  MACH_QARM               QARM                    2723
+ mips                  MACH_MIPS               MIPS                    2724
+ mx27grb                       MACH_MX27GRB            MX27GRB                 2725
+ sbc8100                       MACH_SBC8100            SBC8100                 2726
+ saarb                 MACH_SAARB              SAARB                   2727
+ omap3mini             MACH_OMAP3MINI          OMAP3MINI               2728
+ cnmbook7se            MACH_CNMBOOK7SE         CNMBOOK7SE              2729
+ catan                 MACH_CATAN              CATAN                   2730
+ harmony                       MACH_HARMONY            HARMONY                 2731
+ tonga                 MACH_TONGA              TONGA                   2732
+ cybook_orizon         MACH_CYBOOK_ORIZON      CYBOOK_ORIZON           2733
+ htcrhodiumcdma                MACH_HTCRHODIUMCDMA     HTCRHODIUMCDMA          2734
+ epc_g45                       MACH_EPC_G45            EPC_G45                 2735
+ epc_lpc3250           MACH_EPC_LPC3250        EPC_LPC3250             2736
+ mxc91341evb           MACH_MXC91341EVB        MXC91341EVB             2737
+ rtw1000                       MACH_RTW1000            RTW1000                 2738
+ bobcat                        MACH_BOBCAT             BOBCAT                  2739
+ trizeps6              MACH_TRIZEPS6           TRIZEPS6                2740
+ msm7x30_fluid         MACH_MSM7X30_FLUID      MSM7X30_FLUID           2741
+ nedap9263             MACH_NEDAP9263          NEDAP9263               2742
+ netgear_ms2110                MACH_NETGEAR_MS2110     NETGEAR_MS2110          2743
+ bmx                   MACH_BMX                BMX                     2744
+ netstream             MACH_NETSTREAM          NETSTREAM               2745
+ vpnext_rcu            MACH_VPNEXT_RCU         VPNEXT_RCU              2746
+ vpnext_mpu            MACH_VPNEXT_MPU         VPNEXT_MPU              2747
+ bcmring_tablet_v1     MACH_BCMRING_TABLET_V1  BCMRING_TABLET_V1       2748
+ sgarm10                       MACH_SGARM10            SGARM10                 2749
+ cm_t3517              MACH_CM_T3517           CM_T3517                2750
+ omap3_cps             MACH_OMAP3_CPS          OMAP3_CPS               2751
+ axar1500_receiver     MACH_AXAR1500_RECEIVER  AXAR1500_RECEIVER       2752
+ wbd222                        MACH_WBD222             WBD222                  2753
+ mt65xx                        MACH_MT65XX             MT65XX                  2754
+ msm8x60_surf          MACH_MSM8X60_SURF       MSM8X60_SURF            2755
+ msm8x60_sim           MACH_MSM8X60_SIM        MSM8X60_SIM             2756
+ vmc300                        MACH_VMC300             VMC300                  2757
+ tcc8000_sdk           MACH_TCC8000_SDK        TCC8000_SDK             2758
+ nanos                 MACH_NANOS              NANOS                   2759
+ stamp9g10             MACH_STAMP9G10          STAMP9G10               2760
+ stamp9g45             MACH_STAMP9G45          STAMP9G45               2761
+ h6053                 MACH_H6053              H6053                   2762
+ smint01                       MACH_SMINT01            SMINT01                 2763
+ prtlvt2                       MACH_PRTLVT2            PRTLVT2                 2764
+ ap420                 MACH_AP420              AP420                   2765
+ htcshift              MACH_HTCSHIFT           HTCSHIFT                2766
+ davinci_dm365_fc      MACH_DAVINCI_DM365_FC   DAVINCI_DM365_FC        2767
+ msm8x55_surf          MACH_MSM8X55_SURF       MSM8X55_SURF            2768
+ msm8x55_ffa           MACH_MSM8X55_FFA        MSM8X55_FFA             2769
+ esl_vamana            MACH_ESL_VAMANA         ESL_VAMANA              2770
+ sbc35                 MACH_SBC35              SBC35                   2771
+ mpx6446                       MACH_MPX6446            MPX6446                 2772
+ oreo_controller               MACH_OREO_CONTROLLER    OREO_CONTROLLER         2773
+ kopin_models          MACH_KOPIN_MODELS       KOPIN_MODELS            2774
+ ttc_vision2           MACH_TTC_VISION2        TTC_VISION2             2775
+ cns3420vb             MACH_CNS3420VB          CNS3420VB               2776
+ lpc2                  MACH_LPC2               LPC2                    2777
+ olympus                       MACH_OLYMPUS            OLYMPUS                 2778
+ vortex                        MACH_VORTEX             VORTEX                  2779
+ s5pc200                       MACH_S5PC200            S5PC200                 2780
+ ecucore_9263          MACH_ECUCORE_9263       ECUCORE_9263            2781
+ smdkc200              MACH_SMDKC200           SMDKC200                2782
+ emsiso_sx27           MACH_EMSISO_SX27        EMSISO_SX27             2783
+ apx_som9g45_ek                MACH_APX_SOM9G45_EK     APX_SOM9G45_EK          2784
+ songshan              MACH_SONGSHAN           SONGSHAN                2785
+ tianshan              MACH_TIANSHAN           TIANSHAN                2786
+ vpx500                        MACH_VPX500             VPX500                  2787
+ am3517sam             MACH_AM3517SAM          AM3517SAM               2788
+ skat91_sim508         MACH_SKAT91_SIM508      SKAT91_SIM508           2789
+ skat91_s3e            MACH_SKAT91_S3E         SKAT91_S3E              2790
+ omap4_panda           MACH_OMAP4_PANDA        OMAP4_PANDA             2791
+ df7220                        MACH_DF7220             DF7220                  2792
+ nemini                        MACH_NEMINI             NEMINI                  2793
+ t8200                 MACH_T8200              T8200                   2794
+ apf51                 MACH_APF51              APF51                   2795
+ dr_rc_unit            MACH_DR_RC_UNIT         DR_RC_UNIT              2796
+ bordeaux              MACH_BORDEAUX           BORDEAUX                2797
+ catania_b             MACH_CATANIA_B          CATANIA_B               2798
+ mx51_ocean            MACH_MX51_OCEAN         MX51_OCEAN              2799
+ ti8168evm             MACH_TI8168EVM          TI8168EVM               2800
+ neocoreomap           MACH_NEOCOREOMAP        NEOCOREOMAP             2801
+ withings_wbp          MACH_WITHINGS_WBP       WITHINGS_WBP            2802
+ dbps                  MACH_DBPS               DBPS                    2803
+ sbc9261                       MACH_SBC9261            SBC9261                 2804
+ pcbfp0001             MACH_PCBFP0001          PCBFP0001               2805
+ speedy                        MACH_SPEEDY             SPEEDY                  2806
+ chrysaor              MACH_CHRYSAOR           CHRYSAOR                2807
+ tango                 MACH_TANGO              TANGO                   2808
+ synology_dsx11                MACH_SYNOLOGY_DSX11     SYNOLOGY_DSX11          2809
+ hanlin_v3ext          MACH_HANLIN_V3EXT       HANLIN_V3EXT            2810
+ hanlin_v5             MACH_HANLIN_V5          HANLIN_V5               2811
+ hanlin_v3plus         MACH_HANLIN_V3PLUS      HANLIN_V3PLUS           2812
+ iriver_story          MACH_IRIVER_STORY       IRIVER_STORY            2813
+ irex_iliad            MACH_IREX_ILIAD         IREX_ILIAD              2814
+ irex_dr1000           MACH_IREX_DR1000        IREX_DR1000             2815
+ teton_bga             MACH_TETON_BGA          TETON_BGA               2816
+ snapper9g45           MACH_SNAPPER9G45        SNAPPER9G45             2817
+ tam3517                       MACH_TAM3517            TAM3517                 2818
+ pdc100                        MACH_PDC100             PDC100                  2819
+ eukrea_cpuimx25sd     MACH_EUKREA_CPUIMX25    EUKREA_CPUIMX25         2820
+ eukrea_cpuimx35sd     MACH_EUKREA_CPUIMX35    EUKREA_CPUIMX35         2821
+ eukrea_cpuimx51sd     MACH_EUKREA_CPUIMX51SD  EUKREA_CPUIMX51SD       2822
+ eukrea_cpuimx51               MACH_EUKREA_CPUIMX51    EUKREA_CPUIMX51         2823
+ p565                  MACH_P565               P565                    2824
+ acer_a4                       MACH_ACER_A4            ACER_A4                 2825
+ davinci_dm368_bip     MACH_DAVINCI_DM368_BIP  DAVINCI_DM368_BIP       2826
+ eshare                        MACH_ESHARE             ESHARE                  2827
+ hw_omapl138_europa    MACH_HW_OMAPL138_EUROPA HW_OMAPL138_EUROPA      2828
+ wlbargn                       MACH_WLBARGN            WLBARGN                 2829
+ bm170                 MACH_BM170              BM170                   2830
+ netspace_mini_v2      MACH_NETSPACE_MINI_V2   NETSPACE_MINI_V2        2831
+ netspace_plug_v2      MACH_NETSPACE_PLUG_V2   NETSPACE_PLUG_V2        2832
+ siemens_l1            MACH_SIEMENS_L1         SIEMENS_L1              2833
+ elv_lcu1              MACH_ELV_LCU1           ELV_LCU1                2834
+ mcu1                  MACH_MCU1               MCU1                    2835
+ omap3_tao3530         MACH_OMAP3_TAO3530      OMAP3_TAO3530           2836
+ omap3_pcutouch                MACH_OMAP3_PCUTOUCH     OMAP3_PCUTOUCH          2837
+ smdkc210              MACH_SMDKC210           SMDKC210                2838
+ omap3_braillo         MACH_OMAP3_BRAILLO      OMAP3_BRAILLO           2839
+ spyplug                       MACH_SPYPLUG            SPYPLUG                 2840
+ ginger                        MACH_GINGER             GINGER                  2841
+ tny_t3530             MACH_TNY_T3530          TNY_T3530               2842
+ pca102                        MACH_PCA102             PCA102                  2843
+ spade                 MACH_SPADE              SPADE                   2844
+ mxc25_topaz           MACH_MXC25_TOPAZ        MXC25_TOPAZ             2845
+ t5325                 MACH_T5325              T5325                   2846
+ gw2361                        MACH_GW2361             GW2361                  2847
+ elog                  MACH_ELOG               ELOG                    2848
+ income                        MACH_INCOME             INCOME                  2849
+ bcm589x                       MACH_BCM589X            BCM589X                 2850
+ etna                  MACH_ETNA               ETNA                    2851
+ hawks                 MACH_HAWKS              HAWKS                   2852
+ meson                 MACH_MESON              MESON                   2853
+ xsbase255             MACH_XSBASE255          XSBASE255               2854
+ pvm2030                       MACH_PVM2030            PVM2030                 2855
+ mioa502                       MACH_MIOA502            MIOA502                 2856
+ vvbox_sdorig2         MACH_VVBOX_SDORIG2      VVBOX_SDORIG2           2857
+ vvbox_sdlite2         MACH_VVBOX_SDLITE2      VVBOX_SDLITE2           2858
+ vvbox_sdpro4          MACH_VVBOX_SDPRO4       VVBOX_SDPRO4            2859
+ htc_spv_m700          MACH_HTC_SPV_M700       HTC_SPV_M700            2860
+ mx257sx                       MACH_MX257SX            MX257SX                 2861
+ goni                  MACH_GONI               GONI                    2862
+ msm8x55_svlte_ffa     MACH_MSM8X55_SVLTE_FFA  MSM8X55_SVLTE_FFA       2863
+ msm8x55_svlte_surf    MACH_MSM8X55_SVLTE_SURF MSM8X55_SVLTE_SURF      2864
+ quickstep             MACH_QUICKSTEP          QUICKSTEP               2865
+ dmw96                 MACH_DMW96              DMW96                   2866
+ hammerhead            MACH_HAMMERHEAD         HAMMERHEAD              2867
+ trident                       MACH_TRIDENT            TRIDENT                 2868
+ lightning             MACH_LIGHTNING          LIGHTNING               2869
+ iconnect              MACH_ICONNECT           ICONNECT                2870
+ autobot                       MACH_AUTOBOT            AUTOBOT                 2871
+ coconut                       MACH_COCONUT            COCONUT                 2872
+ durian                        MACH_DURIAN             DURIAN                  2873
+ cayenne                       MACH_CAYENNE            CAYENNE                 2874
+ fuji                  MACH_FUJI               FUJI                    2875
+ synology_6282         MACH_SYNOLOGY_6282      SYNOLOGY_6282           2876
+ em1sy                 MACH_EM1SY              EM1SY                   2877
+ m502                  MACH_M502               M502                    2878
+ matrix518             MACH_MATRIX518          MATRIX518               2879
+ tiny_gurnard          MACH_TINY_GURNARD       TINY_GURNARD            2880
+ spear1310             MACH_SPEAR1310          SPEAR1310               2881
+ bv07                  MACH_BV07               BV07                    2882
+ mxt_td61              MACH_MXT_TD61           MXT_TD61                2883
+ openrd_ultimate               MACH_OPENRD_ULTIMATE    OPENRD_ULTIMATE         2884
+ devixp                        MACH_DEVIXP             DEVIXP                  2885
+ miccpt                        MACH_MICCPT             MICCPT                  2886
+ mic256                        MACH_MIC256             MIC256                  2887
+ as1167                        MACH_AS1167             AS1167                  2888
+ omap3_ibiza           MACH_OMAP3_IBIZA        OMAP3_IBIZA             2889
+ u5500                 MACH_U5500              U5500                   2890
+ davinci_picto         MACH_DAVINCI_PICTO      DAVINCI_PICTO           2891
+ mecha                 MACH_MECHA              MECHA                   2892
+ bubba3                        MACH_BUBBA3             BUBBA3                  2893
+ pupitre                       MACH_PUPITRE            PUPITRE                 2894
+ tegra_harmony         MACH_TEGRA_HARMONY      TEGRA_HARMONY           2895
+ tegra_vogue           MACH_TEGRA_VOGUE        TEGRA_VOGUE             2896
+ tegra_e1165           MACH_TEGRA_E1165        TEGRA_E1165             2897
+ simplenet             MACH_SIMPLENET          SIMPLENET               2898
+ ec4350tbm             MACH_EC4350TBM          EC4350TBM               2899
+ pec_tc                        MACH_PEC_TC             PEC_TC                  2900
+ pec_hc2                       MACH_PEC_HC2            PEC_HC2                 2901
+ esl_mobilis_a         MACH_ESL_MOBILIS_A      ESL_MOBILIS_A           2902
+ esl_mobilis_b         MACH_ESL_MOBILIS_B      ESL_MOBILIS_B           2903
+ esl_wave_a            MACH_ESL_WAVE_A         ESL_WAVE_A              2904
+ esl_wave_b            MACH_ESL_WAVE_B         ESL_WAVE_B              2905
+ unisense_mmm          MACH_UNISENSE_MMM       UNISENSE_MMM            2906
+ blueshark             MACH_BLUESHARK          BLUESHARK               2907
+ e10                   MACH_E10                E10                     2908
+ app3k_robin           MACH_APP3K_ROBIN        APP3K_ROBIN             2909
+ pov15hd                       MACH_POV15HD            POV15HD                 2910
+ stella                        MACH_STELLA             STELLA                  2911
+ linkstation_lschl     MACH_LINKSTATION_LSCHL  LINKSTATION_LSCHL       2913
+ netwalker             MACH_NETWALKER          NETWALKER               2914
+ acsx106                       MACH_ACSX106            ACSX106                 2915
+ atlas5_c1             MACH_ATLAS5_C1          ATLAS5_C1               2916
+ nsb3ast                       MACH_NSB3AST            NSB3AST                 2917
+ gnet_slc              MACH_GNET_SLC           GNET_SLC                2918
+ af4000                        MACH_AF4000             AF4000                  2919
+ ark9431                       MACH_ARK9431            ARK9431                 2920
+ fs_s5pc100            MACH_FS_S5PC100         FS_S5PC100              2921
+ omap3505nova8         MACH_OMAP3505NOVA8      OMAP3505NOVA8           2922
+ omap3621_edp1         MACH_OMAP3621_EDP1      OMAP3621_EDP1           2923
+ oratisaes             MACH_ORATISAES          ORATISAES               2924
+ smdkv310              MACH_SMDKV310           SMDKV310                2925
+ siemens_l0            MACH_SIEMENS_L0         SIEMENS_L0              2926
+ ventana                       MACH_VENTANA            VENTANA                 2927
+ wm8505_7in_netbook    MACH_WM8505_7IN_NETBOOK WM8505_7IN_NETBOOK      2928
+ +rk29                  MACH_RK29               RK29                    2929
++#ec4350sdb            MACH_EC4350SDB          EC4350SDB               2929
+ mimas                 MACH_MIMAS              MIMAS                   2930
+ titan                 MACH_TITAN              TITAN                   2931
+ craneboard            MACH_CRANEBOARD         CRANEBOARD              2932
+ es2440                        MACH_ES2440             ES2440                  2933
+ najay_a9263           MACH_NAJAY_A9263        NAJAY_A9263             2934
+ htctornado            MACH_HTCTORNADO         HTCTORNADO              2935
+ dimm_mx257            MACH_DIMM_MX257         DIMM_MX257              2936
+ jigen301              MACH_JIGEN              JIGEN                   2937
+ smdk6450              MACH_SMDK6450           SMDK6450                2938
+ meno_qng              MACH_MENO_QNG           MENO_QNG                2939
+ ns2416                        MACH_NS2416             NS2416                  2940
+ rpc353                        MACH_RPC353             RPC353                  2941
+ tq6410                        MACH_TQ6410             TQ6410                  2942
+ sky6410                       MACH_SKY6410            SKY6410                 2943
+ dynasty                       MACH_DYNASTY            DYNASTY                 2944
+ vivo                  MACH_VIVO               VIVO                    2945
+ bury_bl7582           MACH_BURY_BL7582        BURY_BL7582             2946
+ bury_bps5270          MACH_BURY_BPS5270       BURY_BPS5270            2947
+ basi                  MACH_BASI               BASI                    2948
+ tn200                 MACH_TN200              TN200                   2949
+ c2mmi                 MACH_C2MMI              C2MMI                   2950
+ meson_6236m           MACH_MESON_6236M        MESON_6236M             2951
+ meson_8626m           MACH_MESON_8626M        MESON_8626M             2952
+ tube                  MACH_TUBE               TUBE                    2953
+ messina                       MACH_MESSINA            MESSINA                 2954
+ mx50_arm2             MACH_MX50_ARM2          MX50_ARM2               2955
+ cetus9263             MACH_CETUS9263          CETUS9263               2956
+ brownstone            MACH_BROWNSTONE         BROWNSTONE              2957
+ vmx25                 MACH_VMX25              VMX25                   2958
+ vmx51                 MACH_VMX51              VMX51                   2959
+ abacus                        MACH_ABACUS             ABACUS                  2960
+ cm4745                        MACH_CM4745             CM4745                  2961
+ oratislink            MACH_ORATISLINK         ORATISLINK              2962
+ davinci_dm365_dvr     MACH_DAVINCI_DM365_DVR  DAVINCI_DM365_DVR       2963
+ netviz                        MACH_NETVIZ             NETVIZ                  2964
+ flexibity             MACH_FLEXIBITY          FLEXIBITY               2965
+ wlan_computer         MACH_WLAN_COMPUTER      WLAN_COMPUTER           2966
+ lpc24xx                       MACH_LPC24XX            LPC24XX                 2967
+ spica                 MACH_SPICA              SPICA                   2968
+ gpsdisplay            MACH_GPSDISPLAY         GPSDISPLAY              2969
+ bipnet                        MACH_BIPNET             BIPNET                  2970
+ overo_ctu_inertial    MACH_OVERO_CTU_INERTIAL OVERO_CTU_INERTIAL      2971
+ davinci_dm355_mmm     MACH_DAVINCI_DM355_MMM  DAVINCI_DM355_MMM       2972
+ pc9260_v2             MACH_PC9260_V2          PC9260_V2               2973
+ ptx7545                       MACH_PTX7545            PTX7545                 2974
+ tm_efdc                       MACH_TM_EFDC            TM_EFDC                 2975
+ omap3_waldo1          MACH_OMAP3_WALDO1       OMAP3_WALDO1            2977
+ flyer                 MACH_FLYER              FLYER                   2978
+ tornado3240           MACH_TORNADO3240        TORNADO3240             2979
+ soli_01                       MACH_SOLI_01            SOLI_01                 2980
+ omapl138_europalc     MACH_OMAPL138_EUROPALC  OMAPL138_EUROPALC       2981
+ helios_v1             MACH_HELIOS_V1          HELIOS_V1               2982
+ netspace_lite_v2      MACH_NETSPACE_LITE_V2   NETSPACE_LITE_V2        2983
+ ssc                   MACH_SSC                SSC                     2984
+ premierwave_en                MACH_PREMIERWAVE_EN     PREMIERWAVE_EN          2985
+ wasabi                        MACH_WASABI             WASABI                  2986
+ vivow                 MACH_VIVOW              VIVOW                   2987
+ mx50_rdp              MACH_MX50_RDP           MX50_RDP                2988
+ universal             MACH_UNIVERSAL          UNIVERSAL               2989
+ real6410              MACH_REAL6410           REAL6410                2990
+ spx_sakura            MACH_SPX_SAKURA         SPX_SAKURA              2991
+ ij3k_2440             MACH_IJ3K_2440          IJ3K_2440               2992
+ omap3_bc10            MACH_OMAP3_BC10         OMAP3_BC10              2993
+ thebe                 MACH_THEBE              THEBE                   2994
+ rv082                 MACH_RV082              RV082                   2995
+ armlguest             MACH_ARMLGUEST          ARMLGUEST               2996
+ tjinc1000             MACH_TJINC1000          TJINC1000               2997
+ dockstar              MACH_DOCKSTAR           DOCKSTAR                2998
+ ax8008                        MACH_AX8008             AX8008                  2999
+ gnet_sgce             MACH_GNET_SGCE          GNET_SGCE               3000
+ pxwnas_500_1000               MACH_PXWNAS_500_1000    PXWNAS_500_1000         3001
+ ea20                  MACH_EA20               EA20                    3002
+ awm2                  MACH_AWM2               AWM2                    3003
+ ti8148evm             MACH_TI8148EVM          TI8148EVM               3004
+ tegra_seaboard                MACH_TEGRA_SEABOARD     TEGRA_SEABOARD          3005
+ linkstation_chlv2     MACH_LINKSTATION_CHLV2  LINKSTATION_CHLV2       3006
+ tera_pro2_rack                MACH_TERA_PRO2_RACK     TERA_PRO2_RACK          3007
+ rubys                 MACH_RUBYS              RUBYS                   3008
+ aquarius              MACH_AQUARIUS           AQUARIUS                3009
+ mx53_ard              MACH_MX53_ARD           MX53_ARD                3010
+ mx53_smd              MACH_MX53_SMD           MX53_SMD                3011
+ lswxl                 MACH_LSWXL              LSWXL                   3012
+ dove_avng_v3          MACH_DOVE_AVNG_V3       DOVE_AVNG_V3            3013
+ sdi_ess_9263          MACH_SDI_ESS_9263       SDI_ESS_9263            3014
+ jocpu550              MACH_JOCPU550           JOCPU550                3015
+ msm8x60_rumi3         MACH_MSM8X60_RUMI3      MSM8X60_RUMI3           3016
+ msm8x60_ffa           MACH_MSM8X60_FFA        MSM8X60_FFA             3017
+ yanomami              MACH_YANOMAMI           YANOMAMI                3018
+ gta04                 MACH_GTA04              GTA04                   3019
+ cm_a510                       MACH_CM_A510            CM_A510                 3020
+ omap3_rfs200          MACH_OMAP3_RFS200       OMAP3_RFS200            3021
+ kx33xx                        MACH_KX33XX             KX33XX                  3022
+ ptx7510                       MACH_PTX7510            PTX7510                 3023
+ top9000                       MACH_TOP9000            TOP9000                 3024
+ teenote                       MACH_TEENOTE            TEENOTE                 3025
+ ts3                   MACH_TS3                TS3                     3026
+ a0                    MACH_A0                 A0                      3027
+ fsm9xxx_surf          MACH_FSM9XXX_SURF       FSM9XXX_SURF            3028
+ fsm9xxx_ffa           MACH_FSM9XXX_FFA        FSM9XXX_FFA             3029
+ frrhwcdma60w          MACH_FRRHWCDMA60W       FRRHWCDMA60W            3030
+ remus                 MACH_REMUS              REMUS                   3031
+ at91cap7xdk           MACH_AT91CAP7XDK        AT91CAP7XDK             3032
+ at91cap7stk           MACH_AT91CAP7STK        AT91CAP7STK             3033
+ kt_sbc_sam9_1         MACH_KT_SBC_SAM9_1      KT_SBC_SAM9_1           3034
+ oratisrouter          MACH_ORATISROUTER       ORATISROUTER            3035
+ armada_xp_db          MACH_ARMADA_XP_DB       ARMADA_XP_DB            3036
+ spdm                  MACH_SPDM               SPDM                    3037
+ gtib                  MACH_GTIB               GTIB                    3038
+ dgm3240                       MACH_DGM3240            DGM3240                 3039
+ atlas_i_lpe           MACH_ATLAS_I_LPE        ATLAS_I_LPE             3040
+ htcmega                       MACH_HTCMEGA            HTCMEGA                 3041
+ tricorder             MACH_TRICORDER          TRICORDER               3042
+ tx28                  MACH_TX28               TX28                    3043
+ bstbrd                        MACH_BSTBRD             BSTBRD                  3044
+ pwb3090                       MACH_PWB3090            PWB3090                 3045
+ idea6410              MACH_IDEA6410           IDEA6410                3046
+ qbc9263                       MACH_QBC9263            QBC9263                 3047
+ borabora              MACH_BORABORA           BORABORA                3048
+ valdez                        MACH_VALDEZ             VALDEZ                  3049
+ ls9g20                        MACH_LS9G20             LS9G20                  3050
+ mios_v1                       MACH_MIOS_V1            MIOS_V1                 3051
+ s5pc110_crespo                MACH_S5PC110_CRESPO     S5PC110_CRESPO          3052
+ controltek9g20                MACH_CONTROLTEK9G20     CONTROLTEK9G20          3053
+ tin307                        MACH_TIN307             TIN307                  3054
+ tin510                        MACH_TIN510             TIN510                  3055
+ bluecheese            MACH_BLUECHEESE         BLUECHEESE              3057
+ tem3x30                       MACH_TEM3X30            TEM3X30                 3058
+ harvest_desoto                MACH_HARVEST_DESOTO     HARVEST_DESOTO          3059
+ msm8x60_qrdc          MACH_MSM8X60_QRDC       MSM8X60_QRDC            3060
+ spear900              MACH_SPEAR900           SPEAR900                3061
+ pcontrol_g20          MACH_PCONTROL_G20       PCONTROL_G20            3062
diff --cc drivers/Kconfig

index 9166a14ecb605ea1bdfb83aa7a720c0edd7392fa,6781b709cac595cce3ba901ab373060aaa8b17a2..148cee62c0b578d94ab9795db0ddbcd12d912da5

mode 100755,100644..100755
--- 1/drivers/Kconfig
--- 2/drivers/Kconfig
+++ b/drivers/Kconfig
diff --cc drivers/Makefile

index 7fb105f5849faa6bbcca7d3588487ffffee21fb8,d7f34f1a6cab06e04dedf1a753a7e445e8ff39e4..da0c8ed4d7a4a94117f8dc33383def98e0e0084d

mode 100755,100644..100755
--- 1/drivers/Makefile
--- 2/drivers/Makefile
+++ b/drivers/Makefile
diff --cc drivers/base/bus.c
Simple merge
diff --cc drivers/bluetooth/Kconfig

index fd35fb05d8c7f3b6c06934ecf885bacb6e87de31,02deef424926a793e6bcc76594ae80e1b1a0d095..301c10ad6529817284ef2144152fac981246caff

mode 100755,100644..100755
--- 1/drivers/bluetooth/Kconfig
--- 2/drivers/bluetooth/Kconfig
+++ b/drivers/bluetooth/Kconfig
@@@ -195,27 -207,16 +207,37 @@@ config BT_MRVL_SDI
           Say Y here to compile support for Marvell BT-over-SDIO driver
           into the kernel or say M to compile it as module.
   
+ +config BT_HCIBCM4325
+ +      tristate "HCI BCM4325 UART driver"
+ +      depends on  BT_HCIUART
+ +      help
+ +        Bluetooth HCI BCM4325 UART driver.
+ +        This driver provides the firmware loading mechanism for the Broadcom
+ +        Blutonium based devices.
+ +
+ +        Say Y here to compile support for HCI BCM4325 devices into the
+ +        kernel or say M to compile it as module (bcm4325).
+ +
+ +if BT_HCIBCM4325
+ +choice
+ +        prompt "BD_ADDR read from"
+ +config IDBLOCK
+ +        bool "NAND ID block"
+ +config WIFI_MAC
+ +        bool "WIFI MAC+1"
+ +endchoice
+ +endif
+ +
+ config BT_ATH3K
+       tristate "Atheros firmware download driver"
+       depends on BT_HCIBTUSB
+       select FW_LOADER
+       help
+         Bluetooth firmware download driver.
+         This driver loads the firmware into the Atheros Bluetooth
+         chipset.
   
- endmenu
+         Say Y here to compile support for "Atheros firmware download driver"
+         into the kernel or say M to compile it as module (ath3k).
   
+ endmenu
diff --cc drivers/bluetooth/Makefile

index 7f5c365da9169546eee6cbbfe5812dc0f6b50b80,71bdf13287c471d78678d0d02a8d385ac2e63772..a4e134ea5d68b90f73c3c9c1aa7f72e0a287aaf4

mode 100755,100644..100755
--- 1/drivers/bluetooth/Makefile
--- 2/drivers/bluetooth/Makefile
+++ b/drivers/bluetooth/Makefile
diff --cc drivers/bluetooth/hci_h4.c

index 50c943d2cce3464c68208889bcb0ff7649a57d63,7b8ad93e2c367401e98eef5a38b2f51a3096ddac..e12d2a3994dac3c84b81c57c3234bc70add61d96

mode 100755,100644..100755
--- 1/drivers/bluetooth/hci_h4.c
--- 2/drivers/bluetooth/hci_h4.c
+++ b/drivers/bluetooth/hci_h4.c
diff --cc drivers/bluetooth/hci_ldisc.c

index 51ff3ef58ec75610b70afeb0cc4428d461fa69b5,17361bad46dd9e367a027c4506ceea7504d76af5..24fe2f37de8e1e5c160c64088984f1424a33f277

mode 100755,100644..100755
--- 1/drivers/bluetooth/hci_ldisc.c
--- 2/drivers/bluetooth/hci_ldisc.c
+++ b/drivers/bluetooth/hci_ldisc.c
diff --cc drivers/char/Makefile

index 09d0bc05edacd999f0202a65808e5b9bef9ceee0,720d6e8142cd4bffc968fc791e3bdf35fa75aabb..b8ddad9ddf4d145f801995696d9ab562a507acb1
--- 1/drivers/char/Makefile
--- 2/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@@ -18,8 -19,6 +19,7 @@@ obj-$(CONFIG_CONSOLE_TRANSLATIONS) += c
   obj-$(CONFIG_HW_CONSOLE)      += vt.o defkeymap.o
   obj-$(CONFIG_AUDIT)           += tty_audit.o
   obj-$(CONFIG_MAGIC_SYSRQ)     += sysrq.o
- obj-$(CONFIG_ESPSERIAL)               += esp.o
+ +obj-$(CONFIG_MAGIC_SYSRQ)     += rk_sysrq.o
   obj-$(CONFIG_MVME147_SCC)     += generic_serial.o vme_scc.o
   obj-$(CONFIG_MVME162_SCC)     += generic_serial.o vme_scc.o
   obj-$(CONFIG_BVME6000_SCC)    += generic_serial.o vme_scc.o
diff --cc drivers/cpufreq/cpufreq_ondemand.c
Simple merge
diff --cc drivers/gpio/Kconfig

index 196c7a0bea9328c6eaa8ec47388ba7f25861d522,510aa2054544e57b1722a4eed03e432d0c103d57..eb3867938982034e6729a88d244a6b7b37be644f

mode 100755,100644..100755
--- 1/drivers/gpio/Kconfig
--- 2/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@@ -244,42 -351,14 +365,53 @@@ config GPIO_UCB140
           To compile this driver as a module, choose M here: the
           module will be called ucb1400_gpio.
   
- 
+ +config GPIO_PCA9554
+ +      bool "GPIO EXPANDER PCA9554"
+ +      depends on I2C
+ +      help
+ +        Say yes here to access the PCA9554 GPIO EXPANDER
+ +
+ +config IOEXTEND_TCA6424
+ +      bool "ROCKCHIP TCA6424 CONTROL"
+ +      depends on I2C
+ +      help
+ +        Say yes here to access the TCA6424 GPIO EXPANDER
+ +
+ +config EXPANDED_GPIO_NUM  
+ +      int "setting the amount of expanded gpios"
+ +      help
+ +        for tca6424, set 24
+ +      
+ +config EXPANDED_GPIO_IRQ_NUM
+ +      int "setting the amount of expanded gpio irqs"
+ +      help
+ +        for tca6424, set 24   
++
+ +config EXPAND_GPIO_SOFT_INTERRUPT
+ +      bool "soft interrupt for expand gpio use"
+ +      help
+ +        if you want expand gpio support interrupt,choose it
+ +
+ +config SPI_FPGA_GPIO_NUM  
+ +      default 96
+ +      int "setting the amount of fpga gpios"
+ +      help
+ +        for fpga, set 96,no used ,set 0
+ +      
+ +config SPI_FPGA_GPIO_IRQ_NUM
+ +      default 16
+ +      int "setting the amount of fpga gpio irqs"
+ +      help
+ +        for fpga, set 16,no used ,set 0       
++
+ comment "MODULbus GPIO expanders:"
+ 
+ config GPIO_JANZ_TTL
+       tristate "Janz VMOD-TTL Digital IO Module"
+       depends on MFD_JANZ_CMODIO
+       help
+         This enables support for the Janz VMOD-TTL Digital IO module.
+         This driver provides support for driving the pins in output
+         mode only. Input mode is not supported.
+ 
   endif
diff --cc drivers/gpio/Makefile

index 48f149c9360467a4b70eb0c4b9e9d5c6256d253d,fc6019d9372019a0577daeafcb4dd9ea7cbfb35b..1cf28b3de4032e5a00699935f81a5d996f1610e9

mode 100755,100644..100755
--- 1/drivers/gpio/Makefile
--- 2/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@@ -13,15 -20,20 +20,24 @@@ obj-$(CONFIG_GPIO_MCP23S08)        += mcp23s08
   obj-$(CONFIG_GPIO_PCA953X)    += pca953x.o
   obj-$(CONFIG_GPIO_PCF857X)    += pcf857x.o
   obj-$(CONFIG_GPIO_PL061)      += pl061.o
+ obj-$(CONFIG_GPIO_STMPE)      += stmpe-gpio.o
+ obj-$(CONFIG_GPIO_TC35892)    += tc35892-gpio.o
+ obj-$(CONFIG_GPIO_TIMBERDALE) += timbgpio.o
   obj-$(CONFIG_GPIO_TWL4030)    += twl4030-gpio.o
+ +obj-$(CONFIG_GPIO_TPS65910)   += tps65910-gpio.o
   obj-$(CONFIG_GPIO_UCB1400)    += ucb1400_gpio.o
   obj-$(CONFIG_GPIO_XILINX)     += xilinx_gpio.o
+ obj-$(CONFIG_GPIO_CS5535)     += cs5535-gpio.o
   obj-$(CONFIG_GPIO_BT8XX)      += bt8xxgpio.o
+ obj-$(CONFIG_GPIO_IT8761E)    += it8761e_gpio.o
   obj-$(CONFIG_GPIO_VR41XX)     += vr41xx_giu.o
   obj-$(CONFIG_GPIO_WM831X)     += wm831x-gpio.o
- obj-$(CONFIG_IOEXTEND_TCA6424) += tca6424.o
+ +obj-$(CONFIG_GPIO_PCA9554)    += pca9554.o
- #add by qjb
- obj-$(CONFIG_GPIO_WM8994)     += wm8994-gpio.o
++obj-$(CONFIG_IOEXTEND_TCA6424)        += tca6424.o
+ +obj-$(CONFIG_EXPAND_GPIO_SOFT_INTERRUPT) += expand_gpio_soft_interrupt.o
+ obj-$(CONFIG_GPIO_WM8350)     += wm8350-gpiolib.o
+ obj-$(CONFIG_GPIO_WM8994)     += wm8994-gpio.o
+ obj-$(CONFIG_GPIO_SCH)                += sch_gpio.o
+ obj-$(CONFIG_GPIO_RDC321X)    += rdc321x-gpio.o
+ obj-$(CONFIG_GPIO_JANZ_TTL)   += janz-ttl.o
+ obj-$(CONFIG_GPIO_SX150X)     += sx150x.o
diff --cc drivers/gpio/gpiolib.c

index 57f3042cf9d214b84642648ccd5c8427cf2147c1,21da9c19a0cba82e1a8aba6aa52056953efb4f82..9fda464d7db0a24a47f7e31bc95175a31f19d7b2
--- 1/drivers/gpio/gpiolib.c
--- 2/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@@ -1250,70 -1465,49 +1467,110 @@@ fail
   }
   EXPORT_SYMBOL_GPL(gpio_direction_output);
   
-     if(chip->pull_updown)
-     {
-            status = chip->pull_updown(chip, gpio,value);
-           if (status == 0)
-                   clear_bit(FLAG_IS_OUT, &desc->flags);
-     }
+ +/* 
+ +gpio pull up or pull down
+ +value = 0, normal
+ +value = 1, pull up
+ +value = 2, pull down
+ +*/
+ +int gpio_pull_updown(unsigned gpio, unsigned value)
+ +{
+ +      unsigned long           flags;
+ +      struct gpio_chip        *chip;
+ +      struct gpio_desc        *desc = &gpio_desc[gpio];
+ +      int                     status = -EINVAL;
+ +
+ +      spin_lock_irqsave(&gpio_lock, flags);
+ +      
+ +      if (value >3)
+ +              goto fail;
+ +      if (!gpio_is_valid(gpio))
+ +              goto fail;
+ +      chip = desc->chip;
+ +      if (!chip || !chip->get || !chip->pull_updown)
+ +              goto fail;
+ +      gpio -= chip->base;
+ +      if (gpio >= chip->ngpio)
+ +              goto fail;
+ +      status = gpio_ensure_requested(desc, gpio);
+ +      if (status < 0)
+ +              goto fail;
+ +
+ +      /* now we know the gpio is valid and chip won't vanish */
+ +
+ +      spin_unlock_irqrestore(&gpio_lock, flags);
+ +
+ +      might_sleep_if(extra_checks && chip->can_sleep);
+ +
+ +      if (status) {
+ +              status = chip->request(chip, gpio);
+ +              if (status < 0) {
+ +                      pr_debug("GPIO-%d: chip request fail, %d\n",
+ +                              chip->base + gpio, status);
+ +                      /* and it's not available to anyone else ...
+ +                       * gpio_request() is the fully clean solution.
+ +                       */
+ +                      goto lose;
+ +              }
+ +      }
++      status = chip->pull_updown(chip, gpio,value);
++      if (status == 0)
++              clear_bit(FLAG_IS_OUT, &desc->flags);
+ +      
+ +lose:
+ +      return status;
+ +fail:
+ +      spin_unlock_irqrestore(&gpio_lock, flags);
+ +      if (status)
+ +              pr_debug("%s: gpio-%d status %d\n",
+ +                      __func__, gpio, status);
+ +      return status;
+ +}
+ +EXPORT_SYMBOL_GPL(gpio_pull_updown);
+ +
+ /**
+  * gpio_set_debounce - sets @debounce time for a @gpio
+  * @gpio: the gpio to set debounce time
+  * @debounce: debounce time is microseconds
+  */
+ int gpio_set_debounce(unsigned gpio, unsigned debounce)
+ {
+       unsigned long           flags;
+       struct gpio_chip        *chip;
+       struct gpio_desc        *desc = &gpio_desc[gpio];
+       int                     status = -EINVAL;
+ 
+       spin_lock_irqsave(&gpio_lock, flags);
+ 
+       if (!gpio_is_valid(gpio))
+               goto fail;
+       chip = desc->chip;
+       if (!chip || !chip->set || !chip->set_debounce)
+               goto fail;
+       gpio -= chip->base;
+       if (gpio >= chip->ngpio)
+               goto fail;
+       status = gpio_ensure_requested(desc, gpio);
+       if (status < 0)
+               goto fail;
+ 
+       /* now we know the gpio is valid and chip won't vanish */
+ 
+       spin_unlock_irqrestore(&gpio_lock, flags);
+ 
+       might_sleep_if(chip->can_sleep);
+ 
+       return chip->set_debounce(chip, gpio, debounce);
+ 
+ fail:
+       spin_unlock_irqrestore(&gpio_lock, flags);
+       if (status)
+               pr_debug("%s: gpio-%d status %d\n",
+                       __func__, gpio, status);
+ 
+       return status;
+ }
+ EXPORT_SYMBOL_GPL(gpio_set_debounce);
   
   /* I/O calls are only valid after configuration completed; the relevant
    * "is this a valid GPIO" error checks should already have been done.
@@@ -1349,11 -1543,9 +1606,11 @@@
   int __gpio_get_value(unsigned gpio)
   {
         struct gpio_chip        *chip;
- -
+ +      
+ +      if (!gpio_is_valid(gpio))
+ +               return -1;
         chip = gpio_to_chip(gpio);
-       WARN_ON(extra_checks && chip->can_sleep);
+       WARN_ON(chip->can_sleep);
         return chip->get ? chip->get(chip, gpio - chip->base) : 0;
   }
   EXPORT_SYMBOL_GPL(__gpio_get_value);
@@@ -1371,12 -1563,8 +1628,12 @@@ void __gpio_set_value(unsigned gpio, in
   {
         struct gpio_chip        *chip;
   
+ +      if(value !=0 && value !=1)
+ +              return;
+ +      if (!gpio_is_valid(gpio))
+ +               return;
         chip = gpio_to_chip(gpio);
-       WARN_ON(extra_checks && chip->can_sleep);
+       WARN_ON(chip->can_sleep);
         chip->set(chip, gpio - chip->base, value);
   }
   EXPORT_SYMBOL_GPL(__gpio_set_value);
diff --cc drivers/gpio/wm831x-gpio.c

index fdfca9e7cfe6564c833e6715bd0c6f731cbc24ff,309644cf4d9b178cd8d91a2d57e348497f7c76c0..382ae877f3700c17453655fc2d5753c15bb9f9e9

mode 100755,100644..100755
--- 1/drivers/gpio/wm831x-gpio.c
--- 2/drivers/gpio/wm831x-gpio.c
+++ b/drivers/gpio/wm831x-gpio.c
@@@ -70,23 -54,18 +70,22 @@@ static int wm831x_gpio_get(struct gpio_
         struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
         struct wm831x *wm831x = wm831x_gpio->wm831x;
         int ret;
- -
+ +      int gpn_pol;
+ +      
+ +      ret = wm831x_reg_read(wm831x, WM831X_GPIO1_CONTROL + offset);
+ +      if (ret < 0)
+ +              return ret;
+ +      gpn_pol = (ret & WM831X_GPN_POL_MASK) >> WM831X_GPN_POL_SHIFT;
+ +      
         ret = wm831x_reg_read(wm831x, WM831X_GPIO_LEVEL);
+ +      //printk("wm831x_gpio_get=%x,%d,%d\n",ret,offset,gpn_pol);
         if (ret < 0)
                 return ret;
- -
- -      if (ret & 1 << offset)
- -              return 1;
- -      else
- -              return 0;
+ +      
+ +      return !((ret>>offset)^gpn_pol);
   }
   
- static int wm831x_gpio_direction_out(struct gpio_chip *chip,
-                                    unsigned offset, int value)
+ static void wm831x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
   {
         struct wm831x_gpio *wm831x_gpio = to_wm831x_gpio(chip);
         struct wm831x *wm831x = wm831x_gpio->wm831x;
diff --cc drivers/hid/usbhid/hid-core.c

index 3423b43cf370d9450f084667d19d2f7c8a462d04,599041a7f670a9f105e00da3272d79642aefb78c..abfa9110d5e2afa4a9167da23bde177c8da35379

mode 100755,100644..100755
--- 1/drivers/hid/usbhid/hid-core.c
--- 2/drivers/hid/usbhid/hid-core.c
+++ b/drivers/hid/usbhid/hid-core.c
@@@ -1294,11 -1356,9 +1356,12 @@@ static int hid_suspend(struct usb_inter
   
         hid_cancel_delayed_stuff(usbhid);
         hid_cease_io(usbhid);
+ +    usb_control_msg(udev, usb_sndctrlpipe(udev, 0),
+ +            USB_REQ_SET_FEATURE, USB_TYPE_STANDARD | USB_RECIP_DEVICE, USB_DEVICE_REMOTE_WAKEUP,
+ +            0, NULL, 0, USB_CTRL_SET_TIMEOUT);
   
-       if (udev->auto_pm && test_bit(HID_KEYS_PRESSED, &usbhid->iofl)) {
+       if ((message.event & PM_EVENT_AUTO) &&
+                       test_bit(HID_KEYS_PRESSED, &usbhid->iofl)) {
                 /* lost race against keypresses */
                 status = hid_start_in(hid);
                 if (status < 0)
diff --cc drivers/i2c/algos/i2c-algo-bit.c

index e7cae5d355a5bbd5579bfbaf08b3e7382e1269c4,a39e6cff86e7ad8d64b5b786e7b5452f9290a458..1c83580af6169b933a399082788f492725ef0500

mode 100755,100644..100755
--- 1/drivers/i2c/algos/i2c-algo-bit.c
--- 2/drivers/i2c/algos/i2c-algo-bit.c
+++ b/drivers/i2c/algos/i2c-algo-bit.c
@@@ -522,8 -521,13 +521,14 @@@ static int bit_xfer(struct i2c_adapter 
         int i, ret;
         unsigned short nak_ok;
   
+       if (adap->pre_xfer) {
+               ret = adap->pre_xfer(i2c_adap);
+               if (ret < 0)
+                       return ret;
+       }
+ 
         bit_dbg(3, &i2c_adap->dev, "emitting start condition\n");
+ +      adap->udelay = 500 * 1000/msgs[0].scl_rate + 1;
         i2c_start(adap);
         for (i = 0; i < num; i++) {
                 pmsg = &msgs[i];
diff --cc drivers/i2c/busses/Kconfig

index 9a1686e939cc09f58e6f0fc276a301ea9da50641,7466333c4ee50893a22c4cd5e926efee585bf065..612c2088327b95086535edec79429cbe1d8eec3e
--- 1/drivers/i2c/busses/Kconfig
--- 2/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@@ -267,84 -269,549 +269,590 @@@ config I2C_HYDR
   config I2C_POWERMAC
         tristate "Powermac I2C interface"
         depends on PPC_PMAC
- -      help
- -        Enable the use of two GPIO pins of a SCx200 processor as an I2C bus.
- -
- -        If you don't know what to do here, say N.
- -
- -        This support is also available as a module.  If so, the module
- -        will be called scx200_i2c.
- -
- -        This driver is deprecated and will be dropped soon. Use i2c-gpio
- -        (or scx200_acb) instead.
- -
- -config SCx200_I2C_SCL
- -      int "GPIO pin used for SCL"
- -      depends on SCx200_I2C
- -      default "12"
- -      help
- -        Enter the GPIO pin number used for the SCL signal.  This value can
- -        also be specified with a module parameter.
+       default y
+       help
+         This exposes the various PowerMac i2c interfaces to the linux i2c
+         layer and to userland. It is used by various drivers on the PowerMac
+         platform, and should generally be enabled.
+ 
+         This support is also available as a module.  If so, the module
+         will be called i2c-powermac.
+ 
+ comment "I2C system bus drivers (mostly embedded / system-on-chip)"
+ 
+ config I2C_AT91
+       tristate "Atmel AT91 I2C Two-Wire interface (TWI)"
+       depends on ARCH_AT91 && EXPERIMENTAL && BROKEN
+       help
+         This supports the use of the I2C interface on Atmel AT91
+         processors.
+ 
+         This driver is BROKEN because the controller which it uses
+         will easily trigger RX overrun and TX underrun errors.  Using
+         low I2C clock rates may partially work around those issues
+         on some systems.  Another serious problem is that there is no
+         documented way to issue repeated START conditions, as needed
+         to support combined I2C messages.  Use the i2c-gpio driver
+         unless your system can cope with those limitations.
+ 
+ config I2C_AU1550
+       tristate "Au1550/Au1200 SMBus interface"
+       depends on SOC_AU1550 || SOC_AU1200
+       help
+         If you say yes to this option, support will be included for the
+         Au1550 and Au1200 SMBus interface.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-au1550.
+ 
+ config I2C_BLACKFIN_TWI
+       tristate "Blackfin TWI I2C support"
+       depends on BLACKFIN
+       depends on !BF561 && !BF531 && !BF532 && !BF533
+       help
+         This is the I2C bus driver for Blackfin on-chip TWI interface.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-bfin-twi.
+ 
+ config I2C_BLACKFIN_TWI_CLK_KHZ
+       int "Blackfin TWI I2C clock (kHz)"
+       depends on I2C_BLACKFIN_TWI
+       range 21 400
+       default 50
+       help
+         The unit of the TWI clock is kHz.
+ 
+ config I2C_CPM
+       tristate "Freescale CPM1 or CPM2 (MPC8xx/826x)"
+       depends on (CPM1 || CPM2) && OF_I2C
+       help
+         This supports the use of the I2C interface on Freescale
+         processors with CPM1 or CPM2.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-cpm.
+ 
+ config I2C_DAVINCI
+       tristate "DaVinci I2C driver"
+       depends on ARCH_DAVINCI
+       help
+         Support for TI DaVinci I2C controller driver.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-davinci.
+ 
+         Please note that this driver might be needed to bring up other
+         devices such as DaVinci NIC.
+         For details please see http://www.ti.com/davinci
+ 
+ config I2C_DESIGNWARE
+       tristate "Synopsys DesignWare"
+       depends on HAVE_CLK
+       help
+         If you say yes to this option, support will be included for the
+         Synopsys DesignWare I2C adapter. Only master mode is supported.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-designware.
+ 
+ config I2C_GPIO
+       tristate "GPIO-based bitbanging I2C"
+       depends on GENERIC_GPIO
+       select I2C_ALGOBIT
+       help
+         This is a very simple bitbanging I2C driver utilizing the
+         arch-neutral GPIO API to control the SCL and SDA lines.
+ 
+ config I2C_HIGHLANDER
+       tristate "Highlander FPGA SMBus interface"
+       depends on SH_HIGHLANDER
+       help
+         If you say yes to this option, support will be included for
+         the SMBus interface located in the FPGA on various Highlander
+         boards, particularly the R0P7780LC0011RL and R0P7785LC0011RL
+         FPGAs. This is wholly unrelated to the SoC I2C.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-highlander.
+ 
+ config I2C_IBM_IIC
+       tristate "IBM PPC 4xx on-chip I2C interface"
+       depends on 4xx
+       help
+         Say Y here if you want to use IIC peripheral found on
+         embedded IBM PPC 4xx based systems.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-ibm_iic.
+ 
+ config I2C_IMX
+       tristate "IMX I2C interface"
+       depends on ARCH_MXC
+       help
+         Say Y here if you want to use the IIC bus controller on
+         the Freescale i.MX/MXC processors.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-imx.
+ 
+ config I2C_IOP3XX
+       tristate "Intel IOPx3xx and IXP4xx on-chip I2C interface"
+       depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IXP4XX || ARCH_IOP13XX
+       help
+         Say Y here if you want to use the IIC bus controller on
+         the Intel IOPx3xx I/O Processors or IXP4xx Network Processors.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-iop3xx.
+ 
+ config I2C_IXP2000
+       tristate "IXP2000 GPIO-Based I2C Interface (DEPRECATED)"
+       depends on ARCH_IXP2000
+       select I2C_ALGOBIT
+       help
+         Say Y here if you have an Intel IXP2000 (2400, 2800, 2850) based
+         system and are using GPIO lines for an I2C bus.
+ 
+         This support is also available as a module. If so, the module
+         will be called i2c-ixp2000.
+ 
+         This driver is deprecated and will be dropped soon. Use i2c-gpio
+         instead.
+ 
+ config I2C_MPC
+       tristate "MPC107/824x/85xx/512x/52xx/83xx/86xx"
+       depends on PPC32
+       help
+         If you say yes to this option, support will be included for the
+         built-in I2C interface on the MPC107, Tsi107, MPC512x, MPC52xx,
+         MPC8240, MPC8245, MPC83xx, MPC85xx and MPC8641 family processors.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-mpc.
+ 
+ config I2C_MV64XXX
+       tristate "Marvell mv64xxx I2C Controller"
+       depends on (MV64X60 || PLAT_ORION) && EXPERIMENTAL
+       help
+         If you say yes to this option, support will be included for the
+         built-in I2C interface on the Marvell 64xxx line of host bridges.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-mv64xxx.
+ 
+ config I2C_NOMADIK
+       tristate "ST-Ericsson Nomadik/Ux500 I2C Controller"
+       depends on PLAT_NOMADIK
+       help
+         If you say yes to this option, support will be included for the
+         I2C interface from ST-Ericsson's Nomadik and Ux500 architectures.
+ 
+ config I2C_NUC900
+       tristate "NUC900 I2C Driver"
+       depends on ARCH_W90X900
+       help
+         Say Y here to include support for I2C controller in the
+         Winbond/Nuvoton NUC900 based System-on-Chip devices.
+ 
+ config I2C_OCORES
+       tristate "OpenCores I2C Controller"
+       depends on EXPERIMENTAL
+       help
+         If you say yes to this option, support will be included for the
+         OpenCores I2C controller. For details see
+         http://www.opencores.org/projects.cgi/web/i2c/overview
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-ocores.
+ 
+ config I2C_OMAP
+       tristate "OMAP I2C adapter"
+       depends on ARCH_OMAP
+       default y if MACH_OMAP_H3 || MACH_OMAP_OSK
+       help
+         If you say yes to this option, support will be included for the
+         I2C interface on the Texas Instruments OMAP1/2 family of processors.
+         Like OMAP1510/1610/1710/5912 and OMAP242x.
+         For details see http://www.ti.com/omap.
+ 
+ config I2C_PASEMI
+       tristate "PA Semi SMBus interface"
+       depends on PPC_PASEMI && PCI
+       help
+         Supports the PA Semi PWRficient on-chip SMBus interfaces.
+ 
+ config I2C_PCA_PLATFORM
+       tristate "PCA9564/PCA9665 as platform device"
+       select I2C_ALGOPCA
+       default n
+       help
+         This driver supports a memory mapped Philips PCA9564/PCA9665
+         parallel bus to I2C bus controller.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-pca-platform.
+ 
+ config I2C_PMCMSP
+       tristate "PMC MSP I2C TWI Controller"
+       depends on PMC_MSP
+       help
+         This driver supports the PMC TWI controller on MSP devices.
+ 
+         This driver can also be built as module. If so, the module
+         will be called i2c-pmcmsp.
+ 
+ config I2C_PNX
+       tristate "I2C bus support for Philips PNX and NXP LPC targets"
+       depends on ARCH_PNX4008 || ARCH_LPC32XX
+       help
+         This driver supports the Philips IP3204 I2C IP block master and/or
+         slave controller
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-pnx.
+ 
+ config I2C_PXA
+       tristate "Intel PXA2XX I2C adapter"
+       depends on ARCH_PXA || ARCH_MMP
+       help
+         If you have devices in the PXA I2C bus, say yes to this option.
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-pxa.
+ 
+ config I2C_PXA_SLAVE
+       bool "Intel PXA2XX I2C Slave comms support"
+       depends on I2C_PXA
+       help
+         Support I2C slave mode communications on the PXA I2C bus.  This
+         is necessary for systems where the PXA may be a target on the
+         I2C bus.
+ 
+ config HAVE_S3C2410_I2C
+       bool
+       help
+         This will include I2C support for Samsung SoCs. If you want to
+         include I2C support for any machine, kindly select this in the
+         respective Kconfig file.
+ 
+ config I2C_S3C2410
+       tristate "S3C2410 I2C Driver"
+       depends on HAVE_S3C2410_I2C
+       help
+         Say Y here to include support for I2C controller in the
+         Samsung SoCs.
+ 
+ config I2C_S6000
+       tristate "S6000 I2C support"
+       depends on XTENSA_VARIANT_S6000
+       help
+         This driver supports the on chip I2C device on the
+         S6000 xtensa processor family.
+ 
+         To compile this driver as a module, choose M here. The module
+         will be called i2c-s6000.
+ 
+ config I2C_SH7760
+       tristate "Renesas SH7760 I2C Controller"
+       depends on CPU_SUBTYPE_SH7760
+       help
+         This driver supports the 2 I2C interfaces on the Renesas SH7760.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-sh7760.
+ 
+ config I2C_SH_MOBILE
+       tristate "SuperH Mobile I2C Controller"
+       depends on SUPERH || ARCH_SHMOBILE
+       help
+         If you say yes to this option, support will be included for the
+         built-in I2C interface on the Renesas SH-Mobile processor.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-sh_mobile.
+ 
+ config I2C_SIMTEC
+       tristate "Simtec Generic I2C interface"
+       select I2C_ALGOBIT
+       help
+         If you say yes to this option, support will be included for
+         the Simtec Generic I2C interface. This driver is for the
+         simple I2C bus used on newer Simtec products for general
+         I2C, such as DDC on the Simtec BBD2016A.
+ 
+         This driver can also be built as a module. If so, the module
+         will be called i2c-simtec.
+ 
+ config I2C_STU300
+       tristate "ST Microelectronics DDC I2C interface"
+       depends on MACH_U300
+       default y if MACH_U300
+       help
+         If you say yes to this option, support will be included for the
+         I2C interface from ST Microelectronics simply called "DDC I2C"
+         supporting both I2C and DDC, used in e.g. the U300 series
+         mobile platforms.
+ 
+         This driver can also be built as a module. If so, the module
+         will be called i2c-stu300.
+ 
+ config I2C_TEGRA
+       tristate "NVIDIA Tegra internal I2C controller"
+       depends on ARCH_TEGRA
+       help
+         If you say yes to this option, support will be included for the
+         I2C controller embedded in NVIDIA Tegra SOCs
+ 
+ config I2C_VERSATILE
+       tristate "ARM Versatile/Realview I2C bus support"
+       depends on ARCH_VERSATILE || ARCH_REALVIEW || ARCH_VEXPRESS
+       select I2C_ALGOBIT
+       help
+         Say yes if you want to support the I2C serial bus on ARMs Versatile
+         range of platforms.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-versatile.
+ 
+ config I2C_OCTEON
+       tristate "Cavium OCTEON I2C bus support"
+       depends on CPU_CAVIUM_OCTEON
+       help
+         Say yes if you want to support the I2C serial bus on Cavium
+         OCTEON SOC.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-octeon.
+ 
+ config I2C_XILINX
+       tristate "Xilinx I2C Controller"
+       depends on EXPERIMENTAL && HAS_IOMEM
+       help
+         If you say yes to this option, support will be included for the
+         Xilinx I2C controller.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called xilinx_i2c.
+ 
+ comment "External I2C/SMBus adapter drivers"
+ 
+ config I2C_PARPORT
+       tristate "Parallel port adapter"
+       depends on PARPORT
+       select I2C_ALGOBIT
+       select I2C_SMBUS
+       help
+         This supports parallel port I2C adapters such as the ones made by
+         Philips or Velleman, Analog Devices evaluation boards, and more.
+         Basically any adapter using the parallel port as an I2C bus with
+         no extra chipset is supported by this driver, or could be.
+ 
+         This driver is a replacement for (and was inspired by) an older
+         driver named i2c-philips-par.  The new driver supports more devices,
+         and makes it easier to add support for new devices.
+ 
+         An adapter type parameter is now mandatory.  Please read the file
+         Documentation/i2c/busses/i2c-parport for details.
+ 
+         Another driver exists, named i2c-parport-light, which doesn't depend
+         on the parport driver.  This is meant for embedded systems. Don't say
+         Y here if you intend to say Y or M there.
+ 
+         This support is also available as a module.  If so, the module
+         will be called i2c-parport.
+ 
+ config I2C_PARPORT_LIGHT
+       tristate "Parallel port adapter (light)"
+       select I2C_ALGOBIT
+       select I2C_SMBUS
+       help
+         This supports parallel port I2C adapters such as the ones made by
+         Philips or Velleman, Analog Devices evaluation boards, and more.
+         Basically any adapter using the parallel port as an I2C bus with
+         no extra chipset is supported by this driver, or could be.
+ 
+         This driver is a light version of i2c-parport.  It doesn't depend
+         on the parport driver, and uses direct I/O access instead.  This
+         might be preferred on embedded systems where wasting memory for
+         the clean but heavy parport handling is not an option.  The
+         drawback is a reduced portability and the impossibility to
+         daisy-chain other parallel port devices.
+ 
+         Don't say Y here if you said Y or M to i2c-parport.  Saying M to
+         both is possible but both modules should not be loaded at the same
+         time.
+ 
+         This support is also available as a module.  If so, the module
+         will be called i2c-parport-light.
+ 
+ config I2C_TAOS_EVM
+       tristate "TAOS evaluation module"
+       depends on EXPERIMENTAL
+       select SERIO
+       select SERIO_SERPORT
+       default n
+       help
+         This supports TAOS evaluation modules on serial port. In order to
+         use this driver, you will need the inputattach tool, which is part
+         of the input-utils package.
+ 
+         If unsure, say N.
+ 
+         This support is also available as a module.  If so, the module
+         will be called i2c-taos-evm.
+ 
+ config I2C_TINY_USB
+       tristate "Tiny-USB adapter"
+       depends on USB
+       help
+         If you say yes to this option, support will be included for the
+         i2c-tiny-usb, a simple do-it-yourself USB to I2C interface. See
+         http://www.harbaum.org/till/i2c_tiny_usb for hardware details.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-tiny-usb.
+ 
+ comment "Other I2C/SMBus bus drivers"
+ 
+ config I2C_ACORN
+       tristate "Acorn IOC/IOMD I2C bus support"
+       depends on ARCH_ACORN
+       default y
+       select I2C_ALGOBIT
+       help
+         Say yes if you want to support the I2C bus on Acorn platforms.
+ 
+         If you don't know, say Y.
+ 
+ config I2C_ELEKTOR
+       tristate "Elektor ISA card"
+       depends on ISA && BROKEN_ON_SMP
+       select I2C_ALGOPCF
+       help
+         This supports the PCF8584 ISA bus I2C adapter.  Say Y if you own
+         such an adapter.
+ 
+         This support is also available as a module.  If so, the module
+         will be called i2c-elektor.
+ 
+ config I2C_PCA_ISA
+       tristate "PCA9564/PCA9665 on an ISA bus"
+       depends on ISA
+       select I2C_ALGOPCA
+       default n
+       help
+         This driver supports ISA boards using the Philips PCA9564/PCA9665
+         parallel bus to I2C bus controller.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called i2c-pca-isa.
+ 
+         This device is almost undetectable and using this driver on a
+         system which doesn't have this device will result in long
+         delays when I2C/SMBus chip drivers are loaded (e.g. at boot
+         time).  If unsure, say N.
+ 
+ config I2C_SIBYTE
+       tristate "SiByte SMBus interface"
+       depends on SIBYTE_SB1xxx_SOC
+       help
+         Supports the SiByte SOC on-chip I2C interfaces (2 channels).
+ 
+ config I2C_STUB
+       tristate "I2C/SMBus Test Stub"
+       depends on EXPERIMENTAL && m
+       default 'n'
+       help
+         This module may be useful to developers of SMBus client drivers,
+         especially for certain kinds of sensor chips.
+ 
+         If you do build this module, be sure to read the notes and warnings
+         in <file:Documentation/i2c/i2c-stub>.
+ 
+         If you don't know what to do here, definitely say N.
+ 
+ config SCx200_I2C
+       tristate "NatSemi SCx200 I2C using GPIO pins (DEPRECATED)"
+       depends on SCx200_GPIO
+       select I2C_ALGOBIT
   
- -config SCx200_I2C_SDA
- -      int "GPIO pin used for SDA"
- -      depends on SCx200_I2C
- -      default "13"
- -      help
- -        Enter the GPIO pin number used for the SSA signal.  This value can
- -        also be specified with a module parameter.
- -
- -config SCx200_ACB
- -      tristate "Geode ACCESS.bus support"
- -      depends on X86_32 && PCI
+ +config I2C_RK29
+ +      tristate "RK29 i2c interface (I2C)"
+ +      depends on ARCH_RK29
+ +      default y
         help
- -        Enable the use of the ACCESS.bus controllers on the Geode SCx200 and
- -        SC1100 processors and the CS5535 and CS5536 Geode companion devices.
- -
- -        If you don't know what to do here, say N.
- -
- -        This support is also available as a module.  If so, the module
- -        will be called scx200_acb.
- -
+ +              This supports the use of the I2C interface(i2c0 ~ i2c3) on rk29 processors.
+ +
+ +if I2C_RK29
+ +      comment "Now, there are four I2C interfaces selected by developer."
+ +      
+ +      config I2C0_RK29
+ +              bool "RK29 I2C0 interface support"
+ +              default y
+ +              depends on ARCH_RK29
+ +              help
+ +                      This supports the use of the I2C0 interface on rk29 processors.
+ +              if I2C0_RK29
+ +                      choice
+ +                              prompt "I2C transfer mode select"
+ +                              config RK29_I2C0_CONTROLLER
+ +                                      bool "With i2c controller"
+ +                              config RK29_I2C0_GPIO
+ +                                      bool "Simulation with GPIO"
+ +                      endchoice
+ +              endif
+ +      config I2C1_RK29
+ +              bool "RK29 I2C1 interface support"
+ +              default y
+ +              depends on ARCH_RK29
+ +              help
+ +                      This supports the use of the I2C1 interface on rk29 processors.
+ +              if I2C1_RK29
+ +                      choice
+ +                              prompt "I2C transfer mode select"
+ +                              config RK29_I2C1_CONTROLLER
+ +                                      bool "With i2c controller"
+ +                              config RK29_I2C1_GPIO
+ +                                      bool "Simulation with GPIO"
+ +                      endchoice
+ +              endif
+ +
+ +      config I2C2_RK29
+ +              bool "RK29 I2C2 interface support"
+ +              default y
+ +              depends on ARCH_RK29
+ +              help
+ +                      This supports the use of the I2C2 interface on rk29 processors.
+ +              if I2C2_RK29
+ +                      choice
+ +                              prompt "I2C transfer mode select"
+ +                              config RK29_I2C2_CONTROLLER
+ +                                      bool "With i2c controller"
+ +                              config RK29_I2C2_GPIO
+ +                                      bool "Simulation with GPIO"
+ +                      endchoice
+ +              endif
+ +
+ +      config I2C3_RK29
+ +              bool "RK29 I2C3 interface support"
+ +              default y
+ +              depends on ARCH_RK29 && !UART3_CTS_RTS_RK29
+ +              help
+ +                      This supports the use of the I2C3 interface on rk29 processors.
+ +              if I2C3_RK29
+ +                      choice
+ +                              prompt "I2C transfer mode select"
+ +                              config RK29_I2C3_CONTROLLER
+ +                                      bool "With i2c controller"
+ +                              config RK29_I2C3_GPIO
+ +                                      bool "Simulation with GPIO"
+ +                      endchoice
+ +              endif
+ +endif
+ +config I2C_DEV_RK29
+ +      tristate "RK29 I2C device interface support"
+ +              default n
+ +              depends on I2C_RK29
+ +              help
+ +                      Nothing
   endmenu
diff --cc drivers/i2c/busses/Makefile

index d69a5881bd43e744c7baa5a588d1a40dd6e2520d,94348a59801b8f34b7bf2ceaf4b8ffb075b80ad4..53db8e58aaa60d3d684b45641701222aa6c1e3fc
--- 1/drivers/i2c/busses/Makefile
--- 2/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@@ -1,10 -1,82 +1,85 @@@
   #
   # Makefile for the i2c bus drivers.
   #
+ +obj-$(CONFIG_I2C_RK29)                += i2c-rk29.o
+ +obj-$(CONFIG_I2C_DEV_RK29)    += i2c-dev-rk29.o
+ +obj-y                         += i2c-gpio.o
   
+ # ACPI drivers
+ obj-$(CONFIG_I2C_SCMI)                += i2c-scmi.o
+ 
+ # PC SMBus host controller drivers
+ obj-$(CONFIG_I2C_ALI1535)     += i2c-ali1535.o
+ obj-$(CONFIG_I2C_ALI1563)     += i2c-ali1563.o
+ obj-$(CONFIG_I2C_ALI15X3)     += i2c-ali15x3.o
+ obj-$(CONFIG_I2C_AMD756)      += i2c-amd756.o
+ obj-$(CONFIG_I2C_AMD756_S4882)        += i2c-amd756-s4882.o
+ obj-$(CONFIG_I2C_AMD8111)     += i2c-amd8111.o
+ obj-$(CONFIG_I2C_I801)                += i2c-i801.o
+ obj-$(CONFIG_I2C_ISCH)                += i2c-isch.o
+ obj-$(CONFIG_I2C_NFORCE2)     += i2c-nforce2.o
+ obj-$(CONFIG_I2C_NFORCE2_S4985)       += i2c-nforce2-s4985.o
+ obj-$(CONFIG_I2C_PIIX4)               += i2c-piix4.o
+ obj-$(CONFIG_I2C_SIS5595)     += i2c-sis5595.o
+ obj-$(CONFIG_I2C_SIS630)      += i2c-sis630.o
+ obj-$(CONFIG_I2C_SIS96X)      += i2c-sis96x.o
+ obj-$(CONFIG_I2C_VIA)         += i2c-via.o
+ obj-$(CONFIG_I2C_VIAPRO)      += i2c-viapro.o
+ 
+ # Mac SMBus host controller drivers
+ obj-$(CONFIG_I2C_HYDRA)               += i2c-hydra.o
+ obj-$(CONFIG_I2C_POWERMAC)    += i2c-powermac.o
+ 
+ # Embedded system I2C/SMBus host controller drivers
+ obj-$(CONFIG_I2C_AT91)                += i2c-at91.o
+ obj-$(CONFIG_I2C_AU1550)      += i2c-au1550.o
+ obj-$(CONFIG_I2C_BLACKFIN_TWI)        += i2c-bfin-twi.o
+ obj-$(CONFIG_I2C_CPM)         += i2c-cpm.o
+ obj-$(CONFIG_I2C_DAVINCI)     += i2c-davinci.o
+ obj-$(CONFIG_I2C_DESIGNWARE)  += i2c-designware.o
+ obj-$(CONFIG_I2C_GPIO)                += i2c-gpio.o
+ obj-$(CONFIG_I2C_HIGHLANDER)  += i2c-highlander.o
+ obj-$(CONFIG_I2C_IBM_IIC)     += i2c-ibm_iic.o
+ obj-$(CONFIG_I2C_IMX)         += i2c-imx.o
+ obj-$(CONFIG_I2C_IOP3XX)      += i2c-iop3xx.o
+ obj-$(CONFIG_I2C_IXP2000)     += i2c-ixp2000.o
+ obj-$(CONFIG_I2C_MPC)         += i2c-mpc.o
+ obj-$(CONFIG_I2C_MV64XXX)     += i2c-mv64xxx.o
+ obj-$(CONFIG_I2C_NOMADIK)     += i2c-nomadik.o
+ obj-$(CONFIG_I2C_NUC900)      += i2c-nuc900.o
+ obj-$(CONFIG_I2C_OCORES)      += i2c-ocores.o
+ obj-$(CONFIG_I2C_OMAP)                += i2c-omap.o
+ obj-$(CONFIG_I2C_PASEMI)      += i2c-pasemi.o
+ obj-$(CONFIG_I2C_PCA_PLATFORM)        += i2c-pca-platform.o
+ obj-$(CONFIG_I2C_PMCMSP)      += i2c-pmcmsp.o
+ obj-$(CONFIG_I2C_PNX)         += i2c-pnx.o
+ obj-$(CONFIG_I2C_PXA)         += i2c-pxa.o
+ obj-$(CONFIG_I2C_S3C2410)     += i2c-s3c2410.o
+ obj-$(CONFIG_I2C_S6000)               += i2c-s6000.o
+ obj-$(CONFIG_I2C_SH7760)      += i2c-sh7760.o
+ obj-$(CONFIG_I2C_SH_MOBILE)   += i2c-sh_mobile.o
+ obj-$(CONFIG_I2C_SIMTEC)      += i2c-simtec.o
+ obj-$(CONFIG_I2C_STU300)      += i2c-stu300.o
+ obj-$(CONFIG_I2C_TEGRA)               += i2c-tegra.o
+ obj-$(CONFIG_I2C_VERSATILE)   += i2c-versatile.o
+ obj-$(CONFIG_I2C_OCTEON)      += i2c-octeon.o
+ obj-$(CONFIG_I2C_XILINX)      += i2c-xiic.o
+ 
+ # External I2C/SMBus adapter drivers
+ obj-$(CONFIG_I2C_PARPORT)     += i2c-parport.o
+ obj-$(CONFIG_I2C_PARPORT_LIGHT)       += i2c-parport-light.o
+ obj-$(CONFIG_I2C_TAOS_EVM)    += i2c-taos-evm.o
+ obj-$(CONFIG_I2C_TINY_USB)    += i2c-tiny-usb.o
+ 
+ # Other I2C/SMBus bus drivers
+ obj-$(CONFIG_I2C_ACORN)               += i2c-acorn.o
+ obj-$(CONFIG_I2C_ELEKTOR)     += i2c-elektor.o
+ obj-$(CONFIG_I2C_PCA_ISA)     += i2c-pca-isa.o
+ obj-$(CONFIG_I2C_SIBYTE)      += i2c-sibyte.o
+ obj-$(CONFIG_I2C_STUB)                += i2c-stub.o
+ obj-$(CONFIG_SCx200_ACB)      += scx200_acb.o
+ obj-$(CONFIG_SCx200_I2C)      += scx200_i2c.o
+ 
   ifeq ($(CONFIG_I2C_DEBUG_BUS),y)
   EXTRA_CFLAGS += -DDEBUG
   endif
diff --cc drivers/i2c/busses/i2c-gpio.c

index e8fa62a50e8fd8cadc5ef3aa55f2c9693e7fb109,d9aa9a649e3587a015821611a7544387a95eb905..b09ca976b15145e371dab710f5e6000e3d011f02

mode 100755,100644..100755
--- 1/drivers/i2c/busses/i2c-gpio.c
--- 2/drivers/i2c/busses/i2c-gpio.c
+++ b/drivers/i2c/busses/i2c-gpio.c
diff --cc drivers/i2c/i2c-boardinfo.c

index a3517e957dc5deec1249119288cd98e11a3e39a1,7e6a63b571650b1f100c4707309f31de1af415bb..6a42cad3635e00344ffb4ff40adaa6c1ec30fc1f

mode 100755,100644..100755
--- 1/drivers/i2c/i2c-boardinfo.c
--- 2/drivers/i2c/i2c-boardinfo.c
+++ b/drivers/i2c/i2c-boardinfo.c
diff --cc drivers/i2c/i2c-core.c

index 20f87133d59f9d7d6cfdb9f493f0417dacd91242,bea4c5021d26cb5b4c92e9b58cabeda2b882023c..483bb2e8cf5a4881d3e0ea2abc2432d4e1ec4065

mode 100755,100644..100755
--- 1/drivers/i2c/i2c-core.c
--- 2/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@@ -44,11 -48,8 +48,10 @@@
      and detach_adapter calls are serialized */
   static DEFINE_MUTEX(core_lock);
   static DEFINE_IDR(i2c_adapter_idr);
- static LIST_HEAD(userspace_devices);
   
   static struct device_type i2c_client_type;
+ +static int i2c_check_addr(struct i2c_adapter *adapter, int addr);
+ +static int i2c_check_addr_ex(struct i2c_adapter *adapter, int addr);
   static int i2c_detect(struct i2c_adapter *adapter, struct i2c_driver *driver);
   
   /* ------------------------------------------------------------------------- */
@@@ -300,38 -543,28 +550,49 @@@ i2c_new_device(struct i2c_adapter *adap
   
         strlcpy(client->name, info->type, sizeof(client->name));
   
+       /* Check for address validity */
+       status = i2c_check_client_addr_validity(client);
+       if (status) {
+               dev_err(&adap->dev, "Invalid %d-bit I2C address 0x%02hx\n",
+                       client->flags & I2C_CLIENT_TEN ? 10 : 7, client->addr);
+               goto out_err_silent;
+       }
+ 
         /* Check for address business */
-       status = i2c_check_addr(adap, client->addr);
+ +    #if 0
+       status = i2c_check_addr_busy(adap, client->addr);
         if (status)
                 goto out_err;
-     /* ddl@rock-chips.com : Devices which have some i2c addr can work in same i2c bus, 
-       if devices havn't work at the same time.*/
-     status = i2c_check_addr_ex(adap, client->addr);
-     if (status != 0)
-         dev_err(&adap->dev, "%d i2c clients have been registered at 0x%02x",
-                  status, client->addr);   
+ +    #else
++      /* ddl@rock-chips.com : Devices which have some i2c addr can work in same i2c bus, 
++         if devices havn't work at the same time.*/
++      status = i2c_check_addr_ex(adap, client->addr);
++      if (status != 0)
++              dev_err(&adap->dev, "%d i2c clients have been registered at 0x%02x",
++                      status, client->addr);   
+ +    #endif
   
         client->dev.parent = &client->adapter->dev;
         client->dev.bus = &i2c_bus_type;
         client->dev.type = &i2c_client_type;
+ #ifdef CONFIG_OF
+       client->dev.of_node = info->of_node;
+ #endif
   
- -      dev_set_name(&client->dev, "%d-%04x", i2c_adapter_id(adap),
- -                   client->addr);
+ +    /* ddl@rock-chips.com : Devices which have some i2c addr can work in same i2c bus, 
+ +      if devices havn't work at the same time.*/
+ +    #if 0
+ +    dev_set_name(&client->dev, "%d-%04x", i2c_adapter_id(adap),
+ +                   client->addr);
+ +    #else
+ +    if (status == 0)
+ +      dev_set_name(&client->dev, "%d-%04x", i2c_adapter_id(adap),
+ +                   client->addr);
+ +    else 
+ +        dev_set_name(&client->dev, "%d-%04x-%01x", i2c_adapter_id(adap),
+ +                   client->addr,status);
+ +    #endif
+ +    
         status = device_register(&client->dev);
         if (status)
                 goto out_err;
@@@ -954,48 -1161,6 +1189,34 @@@ EXPORT_SYMBOL(i2c_del_driver)
   
   /* ------------------------------------------------------------------------- */
   
- static int __i2c_check_addr(struct device *dev, void *addrp)
- {
-       struct i2c_client       *client = i2c_verify_client(dev);
-       int                     addr = *(int *)addrp;
- 
-       if (client && client->addr == addr)
-               return -EBUSY;
-       return 0;
- }
- 
- static int i2c_check_addr(struct i2c_adapter *adapter, int addr)
- {
-       return device_for_each_child(&adapter->dev, &addr, __i2c_check_addr);
- }
+ +/* ddl@rock-chips.com : Devices which have some i2c addr can work in same i2c bus, 
+ +      if devices havn't work at the same time.*/
+ +struct i2c_addr_cnt
+ +{
+ +    int addr;
+ +    int cnt;
+ +};
+ +static int __i2c_check_addr_ex(struct device *dev, void *addrp)
+ +{
+ +      struct i2c_client       *client = i2c_verify_client(dev);
+ +      struct i2c_addr_cnt *addrinfo = (struct i2c_addr_cnt *)addrp;
+ +    int addr = addrinfo->addr;
+ +
+ +      if (client && client->addr == addr) {
+ +              addrinfo->cnt++;
+ +      }
+ +      return 0;
+ +}
+ +static int i2c_check_addr_ex(struct i2c_adapter *adapter, int addr)
+ +{
+ +    struct i2c_addr_cnt addrinfo;
+ +
+ +    addrinfo.addr = addr;
+ +    addrinfo.cnt = 0;
+ +    device_for_each_child(&adapter->dev, &addrinfo, __i2c_check_addr_ex);
+ +    return addrinfo.cnt;
+ +}
+ +
   /**
    * i2c_use_client - increments the reference count of the i2c client structure
    * @client: the client being referenced
@@@ -1148,13 -1309,9 +1369,12 @@@ int i2c_transfer(struct i2c_adapter *ad
                                 (msgs[ret].flags & I2C_M_RECV_LEN) ? "+" : "");
                 }
   #endif
- -
+ +#if defined (CONFIG_I2C_RK2818) || defined(CONFIG_I2C_RK29)
+ +              if (!(i2c_suspended(adap)) && (in_atomic() || irqs_disabled())) {
+ +#else
                 if (in_atomic() || irqs_disabled()) {
- 
-                       ret = mutex_trylock(&adap->bus_lock);
+ +#endif
+                       ret = i2c_trylock_adapter(adap);
                         if (!ret)
                                 /* I2C activity is ongoing. */
                                 return -EAGAIN;
@@@ -1174,10 -1328,7 +1394,10 @@@
                         if (time_after(jiffies, orig_jiffies + adap->timeout))
                                 break;
                 }
-               mutex_unlock(&adap->bus_lock);
+ +#ifdef CONFIG_I2C_DEV_RK29
+ +      i2c_dev_dump_stop(adap, msgs, num ,ret);
+ +#endif
+               i2c_unlock_adapter(adap);
   
                 return ret;
         } else {
@@@ -2012,9 -1897,9 +2174,9 @@@ static s32 i2c_smbus_xfer_emulated(stru
           simpler. */
         unsigned char msgbuf0[I2C_SMBUS_BLOCK_MAX+3];
         unsigned char msgbuf1[I2C_SMBUS_BLOCK_MAX+2];
-       int num = read_write == I2C_SMBUS_READ?2:1;
-       struct i2c_msg msg[2] = { { addr, flags, 1, msgbuf0 ,100000, 0, 0},
-                                 { addr, flags | I2C_M_RD, 0, msgbuf1  ,100000, 0, 0}
+       int num = read_write == I2C_SMBUS_READ ? 2 : 1;
- -      struct i2c_msg msg[2] = { { addr, flags, 1, msgbuf0 },
- -                                { addr, flags | I2C_M_RD, 0, msgbuf1 }
++      struct i2c_msg msg[2] = { { addr, flags, 1, msgbuf0, 100000, 0, 0 },
++                                { addr, flags | I2C_M_RD, 0, msgbuf1, 100000, 0, 0 }
                                 };
         int i;
         u8 partial_pec = 0;
diff --cc drivers/input/Kconfig

index 9811126c3aeeb5ea7e4e51de6a156dec56047d3e,dd62135e70454b5a856ae5ad91c580989cf839a5..8f4a8096b8a3cba78f6bd19378e840b15d3826e4

mode 100755,100644..100755
--- 1/drivers/input/Kconfig
--- 2/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
diff --cc drivers/input/Makefile

index b089f14e3789e4cd8bc0e291dc89a3ebca1f5006,3c7125758b7f6d69c6c40bf2023cb4cda5255c7d..3915ff2c87aee1509354bf48d8c244fb50a81ffe

mode 100755,100644..100755
--- 1/drivers/input/Makefile
--- 2/drivers/input/Makefile
+++ b/drivers/input/Makefile
@@@ -21,11 -22,8 +22,12 @@@ obj-$(CONFIG_INPUT_JOYSTICK)        += joystic
   obj-$(CONFIG_INPUT_TABLET)    += tablet/
   obj-$(CONFIG_INPUT_TOUCHSCREEN)       += touchscreen/
   obj-$(CONFIG_INPUT_MISC)      += misc/
+ +obj-$(CONFIG_G_SENSOR_DEVICE) += gsensor/
+ +obj-$(CONFIG_INPUT_JOGBALL)   += jogball/
+ +obj-$(CONFIG_LIGHT_SENSOR_DEVICE) += lightsensor/
   
   obj-$(CONFIG_INPUT_APMPOWER)  += apm-power.o
+ obj-$(CONFIG_INPUT_KEYRESET)  += keyreset.o
   
   obj-$(CONFIG_XEN_KBDDEV_FRONTEND)     += xen-kbdfront.o
+ +obj-y += magnetometer/
diff --cc drivers/input/keyboard/Kconfig

index 85a3493615aa46555e22c32fb2bcc5bbdaada585,9cc488d2149019626101d3c5f76d0b2bdab0fe57..e3fe4589abffed8f075a84a6b33c333632e112f0

mode 100755,100644..100755
--- 1/drivers/input/keyboard/Kconfig
--- 2/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@@ -11,19 -11,7 +11,20 @@@ menuconfig INPUT_KEYBOAR
           If unsure, say Y.
   
   if INPUT_KEYBOARD
-               rk29 keyboard drivers(gpio and adc)
+ 
+ +config KEYS_RK29
+ +      tristate "rk29 keyboard"
+ +      depends on ARCH_RK29
+ +      default y
+ +      help
-          "Synaptics So340010 Touch Key (I2C) driver"
++        rk29 keyboard drivers(gpio and adc)
+ +
+ +config SYNAPTICS_SO340010
+ +      tristate "Synaptics So340010 TouchPad KEY"
+ +      depends on I2C
+ +      help
++        Synaptics So340010 Touch Key (I2C) driver
+ +
   config KEYBOARD_AAED2000
         tristate "AAED-2000 keyboard"
         depends on MACH_AAED2000
@@@ -191,22 -178,23 +191,38 @@@ config KEYBOARD_GPI
   
           To compile this driver as a module, choose M here: the
           module will be called gpio_keys.
-         
+ 
+ +config KEYBOARD_WM831X_GPIO
+ +      tristate "WM831X_GPIO Buttons"
+ +      depends on GENERIC_GPIO
+ +      help
+ +        This driver implements support for buttons connected
+ +        to GPIO pins of various CPUs (and some other chips).
+ +
+ +        Say Y here if your device has buttons connected
+ +        directly to such GPIO pins.  Your board-specific
+ +        setup logic must also provide a platform device,
+ +        with configuration data saying which GPIOs are used.
+ +
+ +        To compile this driver as a module, choose M here: the
+ +        module will be called wm831x_gpio_keys.
-         
++
+ config KEYBOARD_TCA6416
+       tristate "TCA6416 Keypad Support"
+       depends on I2C
+       help
+         This driver implements basic keypad functionality
+         for keys connected through TCA6416 IO expander
+ 
+         Say Y here if your device has keys connected to
+         TCA6416 IO expander. Your board-specific setup logic
+         must also provide pin-mask details(of which TCA6416 pins
+         are used for keypad).
+ 
+         If enabled the complete TCA6416 device will be managed through
+         this driver.
+ 
+ 
   config KEYBOARD_MATRIX
         tristate "GPIO driven matrix keypad support"
         depends on GENERIC_GPIO
diff --cc drivers/input/keyboard/Makefile

index 0354fb555e09dd146cb2ad0753a39fb57d4ed0da,504b591be0cdff5d193da2b15180a969075db724..985553c87e86e0ad3b7350da3d2282f1dab3845a

mode 100755,100644..100755
--- 1/drivers/input/keyboard/Makefile
--- 2/drivers/input/keyboard/Makefile
+++ b/drivers/input/keyboard/Makefile
@@@ -4,19 -4,20 +4,22 @@@
   
   # Each configuration option enables a list of files.
   
+ +obj-$(CONFIG_KEYS_RK29)                               += rk29_keys.o
   obj-$(CONFIG_KEYBOARD_AAED2000)               += aaed2000_kbd.o
+ obj-$(CONFIG_KEYBOARD_ADP5520)                += adp5520-keys.o
   obj-$(CONFIG_KEYBOARD_ADP5588)                += adp5588-keys.o
   obj-$(CONFIG_KEYBOARD_AMIGA)          += amikbd.o
   obj-$(CONFIG_KEYBOARD_ATARI)          += atakbd.o
   obj-$(CONFIG_KEYBOARD_ATKBD)          += atkbd.o
   obj-$(CONFIG_KEYBOARD_BFIN)           += bf54x-keys.o
- obj-$(CONFIG_KEYBOARD_CORGI)          += corgikbd.o
+ obj-$(CONFIG_KEYBOARD_DAVINCI)                += davinci_keyscan.o
   obj-$(CONFIG_KEYBOARD_EP93XX)         += ep93xx_keypad.o
   obj-$(CONFIG_KEYBOARD_GPIO)           += gpio_keys.o
- obj-$(CONFIG_KEYBOARD_WM831X_GPIO)            += wm831x_gpio_keys.o
++obj-$(CONFIG_KEYBOARD_WM831X_GPIO)    += wm831x_gpio_keys.o
+ obj-$(CONFIG_KEYBOARD_TCA6416)                += tca6416-keypad.o
   obj-$(CONFIG_KEYBOARD_HIL)            += hil_kbd.o
   obj-$(CONFIG_KEYBOARD_HIL_OLD)                += hilkbd.o
+ obj-$(CONFIG_KEYBOARD_IMX)            += imx_keypad.o
   obj-$(CONFIG_KEYBOARD_HP6XX)          += jornada680_kbd.o
   obj-$(CONFIG_KEYBOARD_HP7XX)          += jornada720_kbd.o
   obj-$(CONFIG_KEYBOARD_LKKBD)          += lkkbd.o
diff --cc drivers/input/keyboard/matrix_keypad.c

index 368b77092419e17cdd06a9e43aa855413c9d72b1,b02e4268e18fd743b1cb0639399655bb5236a362..f6508aa80d41341f44c5b12c854df9f00777e1fd

mode 100755,100644..100755
--- 1/drivers/input/keyboard/matrix_keypad.c
--- 2/drivers/input/keyboard/matrix_keypad.c
+++ b/drivers/input/keyboard/matrix_keypad.c
@@@ -315,9 -336,24 +363,24 @@@ static int __devinit init_matrix_gpio(s
                                 "matrix-keypad", keypad);
                 if (err) {
                         dev_err(&pdev->dev,
-                               "Unable to acquire interrupt for GPIO line %i\n",
-                               pdata->row_gpios[i]);
-                       goto err_free_irqs;
+                               "Unable to acquire clustered interrupt\n");
+                       goto err_free_rows;
+               }
+       } else {
+               for (i = 0; i < pdata->num_row_gpios; i++) {
+                       err = request_irq(gpio_to_irq(pdata->row_gpios[i]),
+                                       matrix_keypad_interrupt,
- -                                      IRQF_DISABLED |
++                                      /* IRQF_DISABLED | */
+                                       IRQF_TRIGGER_RISING |
+                                       IRQF_TRIGGER_FALLING,
+                                       "matrix-keypad", keypad);
+                       if (err) {
+                               dev_err(&pdev->dev,
+                                       "Unable to acquire interrupt "
+                                       "for GPIO line %i\n",
+                                       pdata->row_gpios[i]);
+                               goto err_free_irqs;
+                       }
                 }
         }
   
diff --cc drivers/input/misc/Kconfig

index f4462669cf91cdbea1f035f9da4ac983f5531d69,263471a905f79358b84389d922770c5566053f29..478be5fc7f6733bf4f9a6c1d62a386c312d1a379

mode 100755,100644..100755
--- 1/drivers/input/misc/Kconfig
--- 2/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@@ -12,12 -12,46 +12,52 @@@ menuconfig INPUT_MIS
   
   if INPUT_MISC
   
+ +config INPUT_LPSENSOR_ISL29028
+ +      tristate "isl29028 l/p sensor input support"
+ +
+ +config INPUT_LPSENSOR_CM3602
+ +      tristate "l/p sensor input support"
+ +
+ config INPUT_88PM860X_ONKEY
+       tristate "88PM860x ONKEY support"
+       depends on MFD_88PM860X
+       help
+         Support the ONKEY of Marvell 88PM860x PMICs as an input device
+         reporting power button status.
+ 
+         To compile this driver as a module, choose M here: the module
+         will be called 88pm860x_onkey.
+ 
+ config INPUT_AD714X
+       tristate "Analog Devices AD714x Capacitance Touch Sensor"
+       help
+         Say Y here if you want to support an AD7142/3/7/8/7A touch sensor.
+ 
+         You should select a bus connection too.
+ 
+         To compile this driver as a module, choose M here: the
+         module will be called ad714x.
+ 
+ config INPUT_AD714X_I2C
+       tristate "support I2C bus connection"
+       depends on INPUT_AD714X && I2C
+       default y
+       help
+         Say Y here if you have AD7142/AD7147 hooked to an I2C bus.
+ 
+         To compile this driver as a module, choose M here: the
+         module will be called ad714x-i2c.
+ 
+ config INPUT_AD714X_SPI
+       tristate "support SPI bus connection"
+       depends on INPUT_AD714X && SPI
+       default y
+       help
+         Say Y here if you have AD7142/AD7147 hooked to a SPI bus.
+ 
+         To compile this driver as a module, choose M here: the
+         module will be called ad714x-spi.
+ 
   config INPUT_PCSPKR
         tristate "PC Speaker support"
         depends on PCSPKR_PLATFORM
@@@ -199,6 -255,6 +261,16 @@@ config INPUT_CM10
           To compile this driver as a module, choose M here: the module will be
           called cm109.
   
++config INPUT_TPS65910_PWRBUTTON
++      tristate "TPS65910 Power button Driver"
++      depends on TPS65910_CORE
++      help
++        Say Y here if you want to enable power key reporting via the
++        TPS65910 family of chips.
++
++        To compile this driver as a module, choose M here. The module will
++        be called tps65910_pwrbutton.
++
   config INPUT_TWL4030_PWRBUTTON
         tristate "TWL4030 Power button Driver"
         depends on TWL4030_CORE
diff --cc drivers/input/misc/Makefile

index a5de431562fc07f604c04bf1bc373655ae26b0ed,7ac4ca759999130cae976394843576ec528b61ad..c3d85920d310bd545763aad1f828ed853748b4b3

mode 100755,100644..100755
--- 1/drivers/input/misc/Makefile
--- 2/drivers/input/misc/Makefile
+++ b/drivers/input/misc/Makefile
@@@ -4,8 -4,13 +4,15 @@@
   
   # Each configuration option enables a list of files.
   
- obj-$(CONFIG_INPUT_LPSENSOR_CM3602)           += capella_cm3602.o
++obj-$(CONFIG_INPUT_LPSENSOR_CM3602)   += capella_cm3602.o
+ +obj-$(CONFIG_INPUT_LPSENSOR_ISL29028) += isl29028.o
+ obj-$(CONFIG_INPUT_88PM860X_ONKEY)    += 88pm860x_onkey.o
+ obj-$(CONFIG_INPUT_AD714X)            += ad714x.o
+ obj-$(CONFIG_INPUT_AD714X_I2C)                += ad714x-i2c.o
+ obj-$(CONFIG_INPUT_AD714X_SPI)                += ad714x-spi.o
+ obj-$(CONFIG_INPUT_ADXL34X)           += adxl34x.o
+ obj-$(CONFIG_INPUT_ADXL34X_I2C)               += adxl34x-i2c.o
+ obj-$(CONFIG_INPUT_ADXL34X_SPI)               += adxl34x-spi.o
   obj-$(CONFIG_INPUT_APANEL)            += apanel.o
   obj-$(CONFIG_INPUT_ATI_REMOTE)                += ati_remote.o
   obj-$(CONFIG_INPUT_ATI_REMOTE2)               += ati_remote2.o
@@@ -26,8 -36,8 +38,9 @@@ obj-$(CONFIG_INPUT_RB532_BUTTON)      += rb5
   obj-$(CONFIG_INPUT_GPIO_ROTARY_ENCODER)       += rotary_encoder.o
   obj-$(CONFIG_INPUT_SGI_BTNS)          += sgi_btns.o
   obj-$(CONFIG_INPUT_SPARCSPKR)         += sparcspkr.o
- obj-$(CONFIG_INPUT_TWL4030_PWRBUTTON) += twl4030-pwrbutton.o
+ +obj-$(CONFIG_INPUT_TPS65910_PWRBUTTON)        += tps65910-pwrbutton.o
+ obj-$(CONFIG_INPUT_TWL4030_PWRBUTTON) += twl4030-pwrbutton.o
+ obj-$(CONFIG_INPUT_TWL4030_VIBRA)     += twl4030-vibra.o
   obj-$(CONFIG_INPUT_UINPUT)            += uinput.o
   obj-$(CONFIG_INPUT_WINBOND_CIR)               += winbond-cir.o
   obj-$(CONFIG_INPUT_WISTRON_BTNS)      += wistron_btns.o
diff --cc drivers/input/misc/wm831x-on.c

index 4b8782d662f25af2ad6c8f7405639e958e87cf15,c3d7ba5f5b47037c3b8c46b62ca7d6ad931e62db..54e0da091cef7a0a97ff4c809a118e3fb9185d28

mode 100755,100644..100755
--- 1/drivers/input/misc/wm831x-on.c
--- 2/drivers/input/misc/wm831x-on.c
+++ b/drivers/input/misc/wm831x-on.c
@@@ -251,10 -97,7 +251,10 @@@ static int __devinit wm831x_on_probe(st
         wm831x_on->dev->name = "wm831x_on";
         wm831x_on->dev->phys = "wm831x_on/input0";
         wm831x_on->dev->dev.parent = &pdev->dev;
-       
+ +      g_wm831x_on = wm831x_on;
+ +
+ +      wm831x_on_pm_init();
+ 
         ret = request_threaded_irq(irq, NULL, wm831x_on_irq,
                                    IRQF_TRIGGER_RISING, "wm831x_on",
                                    wm831x_on);
diff --cc drivers/input/touchscreen/Kconfig

index 783779fb3c1243e0ee3e6c964a608e09c267008b,a390cbad3049427a907dc2553893574ce34116ea..31b1aac914a6fa8ad753cee39b3e7b7fce601835

mode 100755,100644..100755
--- 1/drivers/input/touchscreen/Kconfig
--- 2/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@@ -11,60 -11,20 +11,72 @@@ menuconfig INPUT_TOUCHSCREE
   
   if INPUT_TOUCHSCREEN
   
+ +config TOUCHSCREEN_XPT2046_SPI
+ +      tristate "XPT2046 based touchscreens:SPI Interface"
+ +      depends on SPIM_RK29
+ +      
+ +      config TOUCHSCREEN_XPT2046_NORMAL_SPI
+ +      tristate "normal mode"
+ +      depends on TOUCHSCREEN_XPT2046_SPI
+ +      
+ +              config TOUCHSCREEN_480X800
+ +              tristate "480X800 resolution"
+ +              depends on TOUCHSCREEN_XPT2046_NORMAL_SPI
+ +              
+ +              config TOUCHSCREEN_800X480
+ +              tristate "800X480 resolution"
+ +              depends on TOUCHSCREEN_XPT2046_NORMAL_SPI
+ +              
+ +              config TOUCHSCREEN_320X480
+ +              tristate "320X480 resolution"
+ +              depends on TOUCHSCREEN_XPT2046_NORMAL_SPI
+ +      
+ +      config TOUCHSCREEN_XPT2046_TSLIB_SPI
+ +      tristate "tslib mode"
+ +      depends on TOUCHSCREEN_XPT2046_SPI
+ +              
+ +              config TOUCHSCREEN_480X800
+ +              tristate "480X800 resolution"
+ +              depends on TOUCHSCREEN_XPT2046_TSLIB_SPI
+ +              
+ +              config TOUCHSCREEN_800X480
+ +              tristate "800X480 resolution"
+ +              depends on TOUCHSCREEN_XPT2046_TSLIB_SPI
+ +              
+ +              config TOUCHSCREEN_320X480
+ +              tristate "320X480 resolution"
+ +              depends on TOUCHSCREEN_XPT2046_TSLIB_SPI
+ +              
+ +      config TOUCHSCREEN_XPT2046_CBN_SPI
+ +      tristate "calibration mode"
+ +      depends on TOUCHSCREEN_XPT2046_SPI
+ +      
+ +              config TOUCHSCREEN_480X800
+ +              tristate "480X800 resolution"
+ +              depends on TOUCHSCREEN_XPT2046_CBN_SPI
+ +              
+ +              config TOUCHSCREEN_800X480
+ +              tristate "800X480 resolution"
+ +              depends on TOUCHSCREEN_XPT2046_CBN_SPI
+ +              
+ +              config TOUCHSCREEN_320X480
+ +              tristate "320X480 resolution"
+ +              depends on TOUCHSCREEN_XPT2046_CBN_SPI
+ +
+ config TOUCHSCREEN_88PM860X
+       tristate "Marvell 88PM860x touchscreen"
+       depends on MFD_88PM860X
+       help
+         Say Y here if you have a 88PM860x PMIC and want to enable
+         support for the built-in touchscreen.
+ 
+         If unsure, say N.
+ 
+         To compile this driver as a module, choose M here: the
+         module will be called 88pm860x-ts.
+ 
   config TOUCHSCREEN_ADS7846
-       tristate "ADS7846/TSC2046 and ADS7843 based touchscreens"
+       tristate "ADS7846/TSC2046/AD7873 and AD(S)7843 based touchscreens"
         depends on SPI_MASTER
         depends on HWMON = n || HWMON
         help
@@@ -93,39 -54,14 +106,36 @@@ config TOUCHSCREEN_AD787
   
           To compile this driver as a module, choose M here: the
           module will be called ad7877.
+ +        
+ +config TOUCHSCREEN_ILI2102_IIC
+ +      tristate "ili2102 based touchscreens: IIC Interface"
+ +      help
+ +        Say Y here if you have a touchscreen interface using the
+ +        hx8520 controller, and your board-specific initialization
+ +        code includes that in its table of IIC devices.
+ +
+ +        If unsure, say N (but it's safe to say "Y").
+ +
+ +config RK28_I2C_TS_NTP070
+ +      tristate "NTP070 based touchscreens: NTP070 Interface"
+ +      depends on I2C_RK2818
+ +      
+ +config TOUCHSCREEN_IT7250
+ +      tristate "IT7250 based touchscreens: IT7250 Interface"
+ +      help
+ +        Say Y here if you have a touchscreen interface using the
+ +        xpt2046 controller, and your board-specific initialization
+ +        code includes that in its table of SPI devices.
+ +
+ +        If unsure, say N (but it's safe to say "Y").
   
- config TOUCHSCREEN_AD7879_I2C
-       tristate "AD7879 based touchscreens: AD7879-1 I2C Interface"
-       depends on I2C
-       select TOUCHSCREEN_AD7879
+ config TOUCHSCREEN_AD7879
+       tristate "Analog Devices AD7879-1/AD7889-1 touchscreen interface"
         help
-         Say Y here if you have a touchscreen interface using the
-         AD7879-1/AD7889-1 controller, and your board-specific
-         initialization code includes that in its table of I2C devices.
+         Say Y here if you want to support a touchscreen interface using
+         the AD7879-1/AD7889-1 controller.
   
-         If unsure, say N (but it's safe to say "Y").
+         You should select a bus connection too.
   
           To compile this driver as a module, choose M here: the
           module will be called ad7879.
@@@ -605,138 -635,35 +709,175 @@@ config TOUCHSCREEN_PCA
           To compile this driver as a module, choose M here: the
           module will be called pcap_ts.
   
- 
+ +config HANNSTAR_P1003
+ +      tristate "Hannstar P1003 touchscreen"
+ +      depends on I2C2_RK29
+ +      help
+ +        RK29 hannstar touch
+ +
+ +      config HANNSTAR_MAX_X
+ +              int "hannstar touch x max"
+ +              depends on HANNSTAR_P1003
+ +              default 1087
+ +              help 
+ +                RK29 hannstar touch max X size
+ +
+ +      config HANNSTAR_MAX_Y
+ +                int "hannstar touch Y max"
+ +                depends on HANNSTAR_P1003
+ +              default 800
+ +                help
+ +                  RK29 hannstar touch max Y size
+ +
+ +      config HANNSTAR_DEBUG
+ +                      bool "hannstar debug"
+ +                      depends on HANNSTAR_P1003
+ +              default n
+ +              help
+ +                RK29 hannstar touch debug
++
+ +config ATMEL_MXT224
+ +        tristate "Atmel mXT224 touchscreen"
+ +        depends on I2C2_RK29
+ +        help
+ +          RK29 Atmel_mXT224 touch
+ +
+ +        config MXT224_MAX_X
+ +                int "atmel_mxt224 touch X max"
+ +                depends on ATMEL_MXT224
+ +                default 4095
+ +                help
+ +                  RK29 atmel_mxt224 touch max X size
+ +
+ +        config MXT224_MAX_Y
+ +                int "atmel_mxt224 touch Y max"
+ +                depends on ATMEL_MXT224
+ +                default 4095
+ +                help
+ +                  RK29 atmel_mxt224 touch max Y size
+ +
+ +config SINTEK_3FA16
+ +       tristate "Sintek 3FA16  touchscreen"
+ +        depends on I2C2_RK29
+ +        help
+ +          RK29 Sintek touch
+ +
+ +        config HANNSTAR_MAX_X
+ +                int "Sintek touch x max"
+ +                depends on SINTEK_3FA16
+ +                default 1024
+ +                help
+ +                  RK29 hannstar touch max X size
+ +
+ +        config HANNSTAR_MAX_Y
+ +                int "Sintek touch Y max"
+ +                depends on SINTEK_3FA16
+ +                default 600
+ +                help
+ +                  RK29 hannstar touch max Y size
+ +
+ +        config HANNSTAR_DEBUG
+ +                bool "Sintek debug"
+ +                depends on SINTEK_3FA16
+ +                default n
+ +                help
+ +                  RK29 hannstar touch debug
++
+ +config EETI_EGALAX
+ +        tristate "EETI_EGALAX touchscreen panel support"
+ +        depends on I2C
+ +        help
+ +          Say Y here to enable support for I2C connected EETI touch panels.
+ +
+ +          To compile this driver as a module, choose M here: the
+ +          module will be called eeti_egalax_ts.
+ +      
+ +        config EETI_EGALAX_MAX_X
+ +                int "EETI_EGALAX_MAX_X"
+ +                depends on EETI_EGALAX
+ +                default 2047
+ +                help
+ +                  RK29 EETI_EGALAX touch max X size
+ +
+ +        config EETI_EGALAX_MAX_Y
+ +                int "EETI_EGALAX_MAX_Y"
+ +                depends on EETI_EGALAX
+ +                default 2047
+ +                help
+ +                  RK29 EETI_EGALAX touch max Y size
+ +
+ +        config EETI_EGALAX_DEBUG
+ +                bool "EETI_EGALAX debug"
+ +                depends on EETI_EGALAX
+ +                default n
+ +                help
+ +                  RK29 EETI_EGALAX touch debug
+ +
+ +config TOUCHSCREEN_IT7260
+ +      tristate "IT7260 based touchscreens: IT7260 Interface"
+ +      depends on I2C2_RK29
+ +      help
+ +        Say Y here if you have a touchscreen interface using the
+ +        it7260 controller, and your board-specific initialization
+ +        code includes that in its table of I2C devices.
+ +
+ +        If unsure, say N (but it's safe to say "Y").
+ +
+ +config TOUCHSCREEN_GT801_IIC
+ +      tristate "GT801_IIC based touchscreens"
+ +      depends on I2C2_RK29
++
+ +config TOUCHSCREEN_GT818_IIC
+ +      tristate "GT818_IIC based touchscreens"
+ +      depends on I2C2_RK29
++
+ +config D70_L3188A
+ +      tristate "D70-L3188A based touchscreens"
+ +      depends on I2C2_RK29
++
+ +config TOUCHSCREEN_GT819
+ +      tristate "GT819 based touchscreens"
+ +      depends on I2C2_RK29
++
+ +config TOUCHSCREEN_FT5406
+ +      tristate "FT5406 based touchscreens: FT5406 Interface"
+ +      depends on I2C2_RK29
+ +      help
+ +        say Y here if you have a touchscreen interface using the FT5406
+ +        controller,and your board-specific initialization code includes that 
+ +        in its table of I2C devices.
+ +        
+ +        If unsure, say N(but it's safe to say "Y").
++
+ config TOUCHSCREEN_TPS6507X
+       tristate "TPS6507x based touchscreens"
+       depends on I2C
+       help
+         Say Y here if you have a TPS6507x based touchscreen
+         controller.
+ 
+         If unsure, say N.
+ 
+         To compile this driver as a module, choose M here: the
+         module will be called tps6507x_ts.
+ 
+ config TOUCHSCREEN_STMPE
+       tristate "STMicroelectronics STMPE touchscreens"
+       depends on MFD_STMPE
+       help
+         Say Y here if you want support for STMicroelectronics
+         STMPE touchscreen controllers.
+ 
+         To compile this driver as a module, choose M here: the
+         module will be called stmpe-ts.
+ 
+ config TOUCHSCREEN_QUANTUM_OBP
+       tristate "Quantum OBP based touchscreens"
+       depends on I2C
+       help
+         Say Y here if you have a Quantum touchscreen that uses
+         the Object Based Protocol based firmware.
+ 
+         If unsure, say N.
+ 
   endif
diff --cc drivers/input/touchscreen/Makefile

index baec709554278c86b7bdce8756eed72397400a18,ed2c714805e3f903efa4623f3793cf016d0390e3..ac2ae262e84962fe695848054d74760ad171b3dc

mode 100755,100644..100755
--- 1/drivers/input/touchscreen/Makefile
--- 2/drivers/input/touchscreen/Makefile
+++ b/drivers/input/touchscreen/Makefile
@@@ -41,20 -54,4 +54,21 @@@ obj-$(CONFIG_TOUCHSCREEN_WM97XX_ATMEL)      
   obj-$(CONFIG_TOUCHSCREEN_WM97XX_MAINSTONE)    += mainstone-wm97xx.o
   obj-$(CONFIG_TOUCHSCREEN_WM97XX_ZYLONITE)     += zylonite-wm97xx.o
   obj-$(CONFIG_TOUCHSCREEN_W90X900)     += w90p910_ts.o
- obj-$(CONFIG_TOUCHSCREEN_XPT2046_NORMAL_SPI)          += xpt2046_ts.o
- obj-$(CONFIG_TOUCHSCREEN_XPT2046_TSLIB_SPI)           += xpt2046_tslib_ts.o ts_lib/
- obj-$(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)             += xpt2046_cbn_ts.o calibration_ts.o largenum_ts.o calib_iface_ts.o
- obj-$(CONFIG_TOUCHSCREEN_IT7250) += ctp_it7250.o
+ +obj-$(CONFIG_TOUCHSCREEN_PCAP)                += pcap_ts.o
- obj-$(CONFIG_TOUCHSCREEN_IT7260)              += it7260_ts.o
- obj-$(CONFIG_SINTEK_3FA16)    +=  sintek_3FA16.o
++obj-$(CONFIG_TOUCHSCREEN_XPT2046_NORMAL_SPI)  += xpt2046_ts.o
++obj-$(CONFIG_TOUCHSCREEN_XPT2046_TSLIB_SPI)   += xpt2046_tslib_ts.o ts_lib/
++obj-$(CONFIG_TOUCHSCREEN_XPT2046_CBN_SPI)     += xpt2046_cbn_ts.o calibration_ts.o largenum_ts.o calib_iface_ts.o
++obj-$(CONFIG_TOUCHSCREEN_IT7250)      += ctp_it7250.o
+ +obj-$(CONFIG_RK28_I2C_TS_NTP070)      += ntp070.o
+ +obj-$(CONFIG_HANNSTAR_P1003)          += hannstar_p1003.o
- obj-$(CONFIG_ATMEL_MXT224)               += atmel_maxtouch.o
- obj-$(CONFIG_TOUCHSCREEN_GT801_IIC)      += gt801_ts.o
- obj-$(CONFIG_TOUCHSCREEN_GT818_IIC)      += gt818_ts.o
- obj-$(CONFIG_TOUCHSCREEN_ILI2102_IIC)      += ili2102_ts.o
- obj-$(CONFIG_D70_L3188A)      += goodix_touch.o
- obj-$(CONFIG_TOUCHSCREEN_FT5406) += ft5406_ts.o  
- obj-$(CONFIG_TOUCHSCREEN_GT819) += gt819.o
++obj-$(CONFIG_TOUCHSCREEN_IT7260)      += it7260_ts.o
++obj-$(CONFIG_SINTEK_3FA16)            += sintek_3FA16.o
+ +obj-$(CONFIG_EETI_EGALAX)             += eeti_egalax_i2c.o
++obj-$(CONFIG_ATMEL_MXT224)            += atmel_maxtouch.o
++obj-$(CONFIG_TOUCHSCREEN_GT801_IIC)   += gt801_ts.o
++obj-$(CONFIG_TOUCHSCREEN_GT818_IIC)   += gt818_ts.o
++obj-$(CONFIG_TOUCHSCREEN_ILI2102_IIC) += ili2102_ts.o
++obj-$(CONFIG_D70_L3188A)              += goodix_touch.o
++obj-$(CONFIG_TOUCHSCREEN_FT5406)      += ft5406_ts.o  
++obj-$(CONFIG_TOUCHSCREEN_GT819)               += gt819.o
+ obj-$(CONFIG_TOUCHSCREEN_TPS6507X)    += tps6507x-ts.o
diff --cc drivers/leds/Kconfig

index 02535a0eadd0567ca06536c5d880b66e53764947,859f705e3e0d9c5a68c610caa7ad103a6da48ed4..36877b7c86333fee55f37330ebd266aee28e64a3

mode 100755,100644..100755
--- 1/drivers/leds/Kconfig
--- 2/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@@ -146,17 -189,9 +189,17 @@@ config LEDS_GPIO_O
           of_platform devices.  For instance, LEDs which are listed in a "dts"
           file.
   
+ +config LEDS_NEWTON_PWM
+ +      bool "LED Support for newton pwm"
+ +      depends on LEDS_CLASS&&ARCH_RK29
+ +      default n
+ +      help
+ +        Let the leds-gpio driver drive LEDs which have been defined as
+ +        platform devices.  If you don't know what this means, say yes.
+ +        
   config LEDS_LP3944
         tristate "LED Support for N.S. LP3944 (Fun Light) I2C chip"
-       depends on LEDS_CLASS && I2C
+       depends on I2C
         help
           This option enables support for LEDs connected to the National
           Semiconductor LP3944 Lighting Management Unit (LMU) also known as
@@@ -244,14 -285,55 +293,62 @@@ config LEDS_BD280
           This option enables support for BD2802GU RGB LED driver chips
           accessed via the I2C bus.
   
- comment "LED Triggers"
+ +config LEDS_ATT1272
+ +      tristate "LED driver for ATT1272 LED"
+ +      depends on LEDS_CLASS && I2C
+ +      help
+ +        This option enables support for ATT1272 LED driver chips
+ +        accessed via the I2C bus.
+ +
+ config LEDS_INTEL_SS4200
+       tristate "LED driver for Intel NAS SS4200 series"
+       depends on PCI && DMI
+       help
+         This option enables support for the Intel SS4200 series of
+         Network Attached Storage servers.  You may control the hard
+         drive or power LEDs on the front panel.  Using this driver
+         can stop the front LED from blinking after startup.
+ 
+ config LEDS_LT3593
+       tristate "LED driver for LT3593 controllers"
+       depends on GENERIC_GPIO
+       help
+         This option enables support for LEDs driven by a Linear Technology
+         LT3593 controller. This controller uses a special one-wire pulse
+         coding protocol to set the brightness.
+ 
+ config LEDS_ADP5520
+       tristate "LED Support for ADP5520/ADP5501 PMIC"
+       depends on PMIC_ADP5520
+       help
+         This option enables support for on-chip LED drivers found
+         on Analog Devices ADP5520/ADP5501 PMICs.
+ 
+         To compile this driver as a module, choose M here: the module will
+         be called leds-adp5520.
+ 
+ config LEDS_DELL_NETBOOKS
+       tristate "External LED on Dell Business Netbooks"
+       depends on X86 && ACPI_WMI
+       help
+         This adds support for the Latitude 2100 and similar
+         notebooks that have an external LED.
+ 
+ config LEDS_MC13783
+       tristate "LED Support for MC13783 PMIC"
+       depends on MFD_MC13783
+       help
+         This option enable support for on-chip LED drivers found
+         on Freescale Semiconductor MC13783 PMIC.
+ 
+ config LEDS_NS2
+       tristate "LED support for Network Space v2 GPIO LEDs"
+       depends on MACH_NETSPACE_V2 || MACH_INETSPACE_V2 || MACH_NETSPACE_MAX_V2
+       default y
+       help
+         This option enable support for the dual-GPIO LED found on the
+         Network Space v2 board (and parents). This include Internet Space v2,
+         Network Space (Max) v2 and d2 Network v2 boards.
   
   config LEDS_TRIGGERS
         bool "LED Trigger support"
diff --cc drivers/leds/Makefile

index 6adf8eb2b67d64228a64e031e76e0ddb15354ee3,a1462ffce4eab0d9afd6eee2cf85b66fbaf4948e..f630b9151af1ac91c3a9a07227551f9d29f52c12

mode 100755,100644..100755
--- 1/drivers/leds/Makefile
--- 2/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@@ -29,8 -31,17 +31,19 @@@ obj-$(CONFIG_LEDS_DA903X)           += leds-da90
   obj-$(CONFIG_LEDS_WM831X_STATUS)      += leds-wm831x-status.o
   obj-$(CONFIG_LEDS_WM8350)             += leds-wm8350.o
   obj-$(CONFIG_LEDS_PWM)                        += leds-pwm.o
- obj-$(CONFIG_LEDS_ATT1272)                    += leds-att1272.o
- obj-$(CONFIG_LEDS_NEWTON_PWM)                 += leds-newton-pwm.o
++obj-$(CONFIG_LEDS_ATT1272)            += leds-att1272.o
++obj-$(CONFIG_LEDS_NEWTON_PWM)         += leds-newton-pwm.o
+ obj-$(CONFIG_LEDS_REGULATOR)          += leds-regulator.o
+ obj-$(CONFIG_LEDS_INTEL_SS4200)               += leds-ss4200.o
+ obj-$(CONFIG_LEDS_LT3593)             += leds-lt3593.o
+ obj-$(CONFIG_LEDS_ADP5520)            += leds-adp5520.o
+ obj-$(CONFIG_LEDS_DELL_NETBOOKS)      += dell-led.o
+ obj-$(CONFIG_LEDS_MC13783)            += leds-mc13783.o
+ obj-$(CONFIG_LEDS_NS2)                        += leds-ns2.o
+ obj-$(CONFIG_LEDS_AUO_PANEL)          += leds-auo-panel-backlight.o
+ obj-$(CONFIG_LEDS_CPCAP)              += leds-ld-cpcap.o
+ obj-$(CONFIG_LEDS_LP8550)             += leds-lp8550.o
+ obj-$(CONFIG_LEDS_LM3559)             += led-lm3559.o
   
   # LED SPI Drivers
   obj-$(CONFIG_LEDS_DAC124S085)         += leds-dac124s085.o
diff --cc drivers/media/video/Kconfig

index b63c26c508d4281d2c26371149bd96ccd18e2e1c,e3b374110897cb9bebae361c9fb5fce4496a91e0..c99dd2019b0ae0a1d95e24cb92552c2868664ad1

mode 100755,100644..100755
--- 1/drivers/media/video/Kconfig
--- 2/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@@ -830,44 -793,24 +794,48 @@@ config SOC_CAMERA_MT9M00
           and colour models.
   
   config SOC_CAMERA_MT9M111
-       tristate "mt9m111 and mt9m112 support"
+       tristate "mt9m111, mt9m112 and mt9m131 support"
         depends on SOC_CAMERA && I2C
         help
-         This driver supports MT9M111 and MT9M112 cameras from Micron
+         This driver supports MT9M111, MT9M112 and MT9M131 cameras from
+         Micron/Aptina
   
+ +config SOC_CAMERA_MT9M112
+ +      tristate "mt9m112 support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
+ +        This driver supports MT9M112 cameras from Micron
+ +
   config SOC_CAMERA_MT9T031
         tristate "mt9t031 support"
         depends on SOC_CAMERA && I2C
         help
           This driver supports MT9T031 cameras from Micron.
-         
+ 
+ +config SOC_CAMERA_MT9T111
+ +      tristate "mt9t111 support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
+ +        This driver supports MT9T111 cameras from Micron.
+ +
- config SOC_CAMERA_MT9P111
-       tristate "mt9p111 support"
-       depends on SOC_CAMERA && I2C
-       help
-         This driver supports MT9P111 cameras from Micron
+ +config SOC_CAMERA_MT9D112
+ +      tristate "mt9d112 support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-         This driver supports MT9D112 cameras from Micron        
++        This driver supports MT9D112 cameras from Micron
++
+ +config SOC_CAMERA_MT9D113
+ +      tristate "mt9d113 support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-         This driver supports MT9D113 cameras from Micron                
++        This driver supports MT9D113 cameras from Micron
++
+ config SOC_CAMERA_MT9T112
+       tristate "mt9t112 support"
+       depends on SOC_CAMERA && I2C
+       help
+         This driver supports MT9T112 cameras from Aptina.
+ 
   config SOC_CAMERA_MT9V022
         tristate "mt9v022 support"
         depends on SOC_CAMERA && I2C
@@@ -892,139 -841,13 +866,157 @@@ config SOC_CAMERA_OV772
         depends on SOC_CAMERA && I2C
         help
           This is a ov772x camera driver
-         This is a ov2659 camera driver          
+ 
+ +config SOC_CAMERA_OV7675
+ +      tristate "ov7675 camera support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
+ +        This is a ov7675 camera driver
++
+ +config SOC_CAMERA_OV2655
+ +      tristate "ov2655 camera support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
+ +        This is a ov2655 camera driver
++
+ +config SOC_CAMERA_OV2659
+ +      tristate "ov2659 camera support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-         This is a ov2640 camera driver          
++        This is a ov2659 camera driver
++
+ +config SOC_CAMERA_OV9650
+ +      tristate "ov9650 camera support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
+ +        This is a ov9650 camera driver
++
+ +config SOC_CAMERA_OV2640
+ +      tristate "ov2640 camera support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-         This is a ov3640 camera driver        
++        This is a ov2640 camera driver
++
+ +config SOC_CAMERA_OV3640
+ +      tristate "ov3640 camera support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-               
++        This is a ov3640 camera driver
+ +choice
+ +      prompt "OV3640 Module Focus select"
+ +      depends on SOC_CAMERA_OV3640
+ +      default OV3640_AUTOFOCUS
+ +      ---help---
- endchoice       
-         
++
+ +config OV3640_AUTOFOCUS
+ +      bool "OV3640 auto focus"
+ +
+ +config OV3640_FIXEDFOCUS
+ +      bool "OV3640 fixed focus"
-         This is a ov5642 camera driver        
++endchoice
++
+ +config SOC_CAMERA_OV5642
+ +      tristate "ov5642 camera support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-               
++        This is a ov5642 camera driver
+ +choice
+ +      prompt "OV5642 Module Focus select"
+ +      depends on SOC_CAMERA_OV5642
+ +      default OV5642_AUTOFOCUS
+ +      ---help---
-         This is a ov5640 camera driver        
++
+ +config OV5642_AUTOFOCUS
+ +      bool "OV5642 auto focus"
+ +
+ +config OV5642_FIXEDFOCUS
+ +      bool "OV5642 fixed focus"
+ +endchoice
+ +
+ +config SOC_CAMERA_OV5640
+ +      tristate "ov5640 camera support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-               
++        This is a ov5640 camera driver
+ +choice
+ +      prompt "OV5640 Module Focus select"
+ +      depends on SOC_CAMERA_OV5640
+ +      default OV5640_AUTOFOCUS
+ +      ---help---
-         
++
+ +config OV5640_AUTOFOCUS
+ +      bool "OV5640 auto focus"
+ +
+ +config OV5640_FIXEDFOCUS
+ +      bool "OV5640 fixed focus"
+ +endchoice
+ +
+ +config SOC_CAMERA_S5K6AA
+ +      tristate "Samsung S5K6AA MIPI CSI-2 (importek mu736asa)"
+ +      depends on SOC_CAMERA && I2C
+ +      help
+ +        This is a samsung S5K6AA mobile camera driver
-         This is a GT2005 camera driver          
++
+ +config SOC_CAMERA_GT2005
+ +      tristate "GT2005 support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-         This is a GC0309 camera driver          
++        This is a GT2005 camera driver
++
+ +config SOC_CAMERA_GC0308
+ +      tristate "GC0308 support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
+ +        This is a GC0308 camera driver
++
+ +config SOC_CAMERA_GC0309
+ +      tristate "GC0309 support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-         This is a GC2015 camera driver         
++        This is a GC0309 camera driver
++
+ +config SOC_CAMERA_GC2015
+ +      tristate "GC2015 support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-         This is a HI253 camera driver  
++        This is a GC2015 camera driver
++
+ +config SOC_CAMERA_HI253
+ +      tristate "HI253 support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-         This is a SIV120B camera driver         
++        This is a HI253 camera driver
++
+ +config SOC_CAMERA_HI704
+ +      tristate "HI704 support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
+ +        This is a HI704 camera driver
++
+ +config SOC_CAMERA_SIV120B
+ +      tristate "siv120b support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-         This is a SID130B camera driver               
++        This is a SIV120B camera driver
+ +
+ +config SOC_CAMERA_SID130B
+ +      tristate "sid130b support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
-         This is a NT99250 camera driver                   
-            
++        This is a SID130B camera driver
+ +
+ +config SOC_CAMERA_NT99250
+ +      tristate "NT99250 support"
+ +      depends on SOC_CAMERA && I2C
+ +      help
++        This is a NT99250 camera driver
++
+ config SOC_CAMERA_OV9640
+       tristate "ov9640 camera support"
+       depends on SOC_CAMERA && I2C
+       help
+         This is a ov9640 camera driver
+ 
   config MX1_VIDEO
         bool
   
@@@ -1069,37 -898,19 +1067,56 @@@ config VIDEO_OMAP
         ---help---
           This is a v4l2 driver for the TI OMAP2 camera capture interface
   
-         This is a v4l2 driver for the RK29XX Camera Sensor Interface            
+ +config VIDEO_RK29
+ +      tristate "RK29XX Camera Sensor Interface driver"
+ +      depends on VIDEO_DEV && ARCH_RK29 && SOC_CAMERA && HAS_DMA
+ +      select VIDEOBUF_DMA_CONTIG
+ +      ---help---
++        This is a v4l2 driver for the RK29XX Camera Sensor Interface
++
+ +choice
+ +      prompt "RK29XX Camera Sensor Interface Work Mode"
+ +      depends on VIDEO_RK29
+ +      default VIDEO_RK29_WORK_ONEFRAME
+ +      ---help---
+ +              RK29 Camera Sensor Interface(VIP) can work in 2 modes, ie:OneFrame,PingPong.
++
+ +config VIDEO_RK29_WORK_ONEFRAME
+ +      bool "VIP OneFrame Mode"
+ +
+ +config VIDEO_RK29_WORK_PINGPONG
+ +      bool "VIP PingPong Mode"
++
+ +endchoice
++
+ +choice
+ +      prompt "RK29XX camera sensor interface work with IPP "
+ +      depends on VIDEO_RK29 && RK29_IPP
+ +      default VIDEO_RK29_WORK_IPP
+ +      ---help---
+ +              RK29 Camera Sensor Interface(VIP) can work with IPP or not IPP
++
+ +config VIDEO_RK29_WORK_IPP
+ +      bool "VIP work with IPP"
+ +
+ +config VIDEO_RK29_WORK_NOT_IPP
+ +      bool "VIP don't work with IPP"
++
+ +endchoice
+ +
+ config VIDEO_MX2_HOSTSUPPORT
+         bool
+ 
+ config VIDEO_MX2
+       tristate "i.MX27/i.MX25 Camera Sensor Interface driver"
+       depends on VIDEO_DEV && SOC_CAMERA && (MACH_MX27 || ARCH_MX25)
+       select VIDEOBUF_DMA_CONTIG
+       select VIDEO_MX2_HOSTSUPPORT
+       ---help---
+         This is a v4l2 driver for the i.MX27 and the i.MX25 Camera Sensor
+         Interface
+ 
+ 
   #
   # USB Multimedia device configuration
   #
diff --cc drivers/media/video/Makefile

index 9d3c5674e53563befee3b6c39660c971676b07c1,399ff510d79c25caaa22dc2f51b64487cf3ade5e..dfd541790dace9aa810296dd2bfb26b1efb2f74e

mode 100755,100644..100755
--- 1/drivers/media/video/Makefile
--- 2/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@@ -74,33 -76,14 +76,36 @@@ obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.
   
   obj-$(CONFIG_SOC_CAMERA_MT9M001)      += mt9m001.o
   obj-$(CONFIG_SOC_CAMERA_MT9M111)      += mt9m111.o
+ +obj-$(CONFIG_SOC_CAMERA_MT9M112)      += mt9m112.o
   obj-$(CONFIG_SOC_CAMERA_MT9T031)      += mt9t031.o
+ +obj-$(CONFIG_SOC_CAMERA_MT9T111)      += mt9t111.o
+ obj-$(CONFIG_SOC_CAMERA_MT9T112)      += mt9t112.o
   obj-$(CONFIG_SOC_CAMERA_MT9V022)      += mt9v022.o
+ +obj-$(CONFIG_SOC_CAMERA_MT9P111)      += mt9p111.o
+ +obj-$(CONFIG_SOC_CAMERA_MT9D112)      += mt9d112.o
+ +obj-$(CONFIG_SOC_CAMERA_MT9D113)      += mt9d113.o
   obj-$(CONFIG_SOC_CAMERA_OV772X)               += ov772x.o
+ obj-$(CONFIG_SOC_CAMERA_OV9640)               += ov9640.o
+ obj-$(CONFIG_SOC_CAMERA_RJ54N1)               += rj54n1cb0c.o
   obj-$(CONFIG_SOC_CAMERA_TW9910)               += tw9910.o
- -
+ +obj-$(CONFIG_SOC_CAMERA_OV7675)               += ov7675.o
+ +obj-$(CONFIG_SOC_CAMERA_OV2655)               += ov2655.o
+ +obj-$(CONFIG_SOC_CAMERA_OV2659)               += ov2659.o
+ +obj-$(CONFIG_SOC_CAMERA_OV9650)               += ov9650.o
+ +obj-$(CONFIG_SOC_CAMERA_OV2640)               += ov2640.o
+ +obj-$(CONFIG_SOC_CAMERA_OV3640)               += ov3640.o
+ +obj-$(CONFIG_SOC_CAMERA_OV5640)               += ov5640.o
+ +obj-$(CONFIG_SOC_CAMERA_OV5642)               += ov5642.o
+ +obj-$(CONFIG_SOC_CAMERA_S5K6AA)               += s5k6aa.o
+ +obj-$(CONFIG_SOC_CAMERA_GT2005)               += gt2005.o
+ +obj-$(CONFIG_SOC_CAMERA_GC0308)               += gc0308.o
+ +obj-$(CONFIG_SOC_CAMERA_GC0309)               += gc0309.o
+ +obj-$(CONFIG_SOC_CAMERA_GC2015)               += gc2015.o
+ +obj-$(CONFIG_SOC_CAMERA_SIV120B)      += siv120b.o
+ +obj-$(CONFIG_SOC_CAMERA_SID130B)      += sid130B.o
+ +obj-$(CONFIG_SOC_CAMERA_HI253)        += hi253.o
+ +obj-$(CONFIG_SOC_CAMERA_HI704)        += hi704.o
+ +obj-$(CONFIG_SOC_CAMERA_NT99250)      += nt99250.o
   # And now the v4l2 drivers:
   
   obj-$(CONFIG_VIDEO_BT848) += bt8xx/
@@@ -173,11 -158,12 +180,15 @@@ obj-$(CONFIG_SOC_CAMERA)                += soc_camera
   obj-$(CONFIG_SOC_CAMERA_PLATFORM)     += soc_camera_platform.o
   # soc-camera host drivers have to be linked after camera drivers
   obj-$(CONFIG_VIDEO_MX1)                       += mx1_camera.o
+ obj-$(CONFIG_VIDEO_MX2)                       += mx2_camera.o
   obj-$(CONFIG_VIDEO_MX3)                       += mx3_camera.o
   obj-$(CONFIG_VIDEO_PXA27x)            += pxa_camera.o
++obj-$(CONFIG_VIDEO_RK29_WORK_ONEFRAME)        += rk29_camera_oneframe.o
++obj-$(CONFIG_VIDEO_RK29_WORK_PINGPONG)        += rk29_camera_pingpong.o
++obj-$(CONFIG_VIDEO_RK29XX_VOUT)               += rk29xx/
+ obj-$(CONFIG_VIDEO_SH_MOBILE_CSI2)    += sh_mobile_csi2.o
   obj-$(CONFIG_VIDEO_SH_MOBILE_CEU)     += sh_mobile_ceu_camera.o
- obj-$(CONFIG_VIDEO_RK29_WORK_ONEFRAME)                        += rk29_camera_oneframe.o
- obj-$(CONFIG_VIDEO_RK29_WORK_PINGPONG)                        += rk29_camera_pingpong.o
+ obj-$(CONFIG_VIDEO_SAMSUNG_S5P_FIMC)  += s5p-fimc/
   
   obj-$(CONFIG_ARCH_DAVINCI)            += davinci/
   
diff --cc drivers/media/video/soc_camera.c

index db07d81cfe550363aceb6136beb466e28ee3c871,a499cacec1f37897c08de6d7bf21b1210723aca0..f6d652f40999739d72ecc97e95a4e954587924d4
--- 1/drivers/media/video/soc_camera.c
--- 2/drivers/media/video/soc_camera.c
+++ b/drivers/media/video/soc_camera.c
@@@ -369,36 -368,42 +368,46 @@@ static int soc_camera_open(struct file 
                                 .width          = icd->user_width,
                                 .height         = icd->user_height,
                                 .field          = icd->field,
-                               .pixelformat    = icd->current_fmt->fourcc,
-                               .colorspace     = icd->current_fmt->colorspace,
+                               .colorspace     = icd->colorspace,
+                               .pixelformat    =
+                                       icd->current_fmt->host_fmt->fourcc,
                         },
                 };
- -
- -              if (icl->power) {
- -                      ret = icl->power(icd->pdev, 1);
- -                      if (ret < 0)
- -                              goto epower;
- -              }
- -
- -              /* The camera could have been already on, try to reset */
- -              if (icl->reset)
- -                      icl->reset(icd->pdev);
+ +        /* ddl@rock-chips.com : accelerate device open  */
+ +        if ((file->f_flags & O_ACCMODE) == O_RDWR) {
+ +              if (icl->power) {
+ +                      ret = icl->power(icd->pdev, 1);
+ +                      if (ret < 0)
+ +                              goto epower;
+ +              }
+ +
+ +              /* The camera could have been already on, try to reset */
+ +              if (icl->reset)
+ +                      icl->reset(icd->pdev);
+ +       }
   
                 ret = ici->ops->add(icd);
                 if (ret < 0) {
                         dev_err(&icd->dev, "Couldn't activate the camera: %d\n", ret);
                         goto eiciadd;
                 }
-                
-               /* Try to configure with default parameters */
+ 
+               pm_runtime_enable(&icd->vdev->dev);
+               ret = pm_runtime_resume(&icd->vdev->dev);
+               if (ret < 0 && ret != -ENOSYS)
+                       goto eresume;
+ 
+ +        if ((file->f_flags & O_ACCMODE) == O_RDWR) {
-               ret = soc_camera_set_fmt(icf, &f);
-               if (ret < 0)
-                       goto esfmt;
+               /*
+                * Try to configure with default parameters. Notice: this is the
+                * very first open, so, we cannot race against other calls,
+                * apart from someone else calling open() simultaneously, but
+                * .video_lock is protecting us against it.
+                */
+               ret = soc_camera_set_fmt(icf, &f);
+               if (ret < 0)
+                       goto esfmt;
+ +        }
-         
         }
   
         file->private_data = icf;
@@@ -439,11 -446,13 +450,15 @@@ static int soc_camera_close(struct fil
         if (!icd->use_count) {
                 struct soc_camera_link *icl = to_soc_camera_link(icd);
   
+               pm_runtime_suspend(&icd->vdev->dev);
+               pm_runtime_disable(&icd->vdev->dev);
+ 
                 ici->ops->remove(icd);
-               if (icl->power)
-                       icl->power(icd->pdev, 0);
+ 
+ +        if ((file->f_flags & O_ACCMODE) == O_RDWR) {
+               if (icl->power)
+                       icl->power(icd->pdev, 0);
+ +        }
         }
   
         mutex_unlock(&icd->video_lock);
@@@ -647,10 -638,13 +666,13 @@@ static int soc_camera_streamoff(struct 
   
         if (i != V4L2_BUF_TYPE_VIDEO_CAPTURE)
                 return -EINVAL;
- -
+ +    
         mutex_lock(&icd->video_lock);
-       /* This calls buf_release from host driver's videobuf_queue_ops for all
-        * remaining buffers. When the last buffer is freed, stop capture */
+ 
+       /*
+        * This calls buf_release from host driver's videobuf_queue_ops for all
+        * remaining buffers. When the last buffer is freed, stop capture
+        */
         videobuf_streamoff(&icf->vb_vidq);
   
         v4l2_subdev_call(sd, video, s_stream, 0);
diff --cc drivers/media/video/uvc/uvc_queue.c

index 6a83fd4eeee3b147893be3c8af00824b64c63102,e9928a415086ef88af00406e6d81bd0e9735806c..eb28da71e48b5a29e4aafc3c070afa6ab9b8f8e1
--- 1/drivers/media/video/uvc/uvc_queue.c
--- 2/drivers/media/video/uvc/uvc_queue.c
+++ b/drivers/media/video/uvc/uvc_queue.c
@@@ -84,7 -85,7 +85,8 @@@ void uvc_queue_init(struct uvc_video_qu
         spin_lock_init(&queue->irqlock);
         INIT_LIST_HEAD(&queue->mainqueue);
         INIT_LIST_HEAD(&queue->irqqueue);
-     init_waitqueue_head(&queue->wait);  /* ddl@rock-chips.com : This design copied from video-buf */
++      init_waitqueue_head(&queue->wait);  /* ddl@rock-chips.com : This design copied from video-buf */
+       queue->flags = drop_corrupted ? UVC_QUEUE_DROP_CORRUPTED : 0;
         queue->type = type;
   }
   
@@@ -298,18 -298,15 +301,22 @@@ static int uvc_queue_waiton(struct uvc_
   {
         if (nonblocking) {
                 return (buf->state != UVC_BUF_STATE_QUEUED &&
-                       buf->state != UVC_BUF_STATE_ACTIVE)
+                       buf->state != UVC_BUF_STATE_ACTIVE &&
+                       buf->state != UVC_BUF_STATE_READY)
                         ? 0 : -EAGAIN;
         }
- -
+ +#if 0
         return wait_event_interruptible(buf->wait,
                 buf->state != UVC_BUF_STATE_QUEUED &&
-               buf->state != UVC_BUF_STATE_ACTIVE);
+               buf->state != UVC_BUF_STATE_ACTIVE &&
+               buf->state != UVC_BUF_STATE_READY);
+ +#else
-     /* ddl@rock-chips.com: wait_event_interruptible -> wait_event_interruptible_timeout */
-     return wait_event_interruptible_timeout(buf->wait,
-               (buf->state != UVC_BUF_STATE_QUEUED && buf->state != UVC_BUF_STATE_ACTIVE),msecs_to_jiffies(800));
- #endif
++      /* ddl@rock-chips.com: wait_event_interruptible -> wait_event_interruptible_timeout */
++      return wait_event_interruptible_timeout(buf->wait,
++              buf->state != UVC_BUF_STATE_QUEUED &&
++              buf->state != UVC_BUF_STATE_ACTIVE &&
++              buf->state != UVC_BUF_STATE_READYi,
++              msecs_to_jiffies(800);
   }
   
   /*
diff --cc drivers/media/video/uvc/uvc_v4l2.c
Simple merge
diff --cc drivers/media/video/uvc/uvc_video.c

index 222eb7afc60110bc5789fe49f1281cc6aa1e265f,e27cf0d3b6d90d08e156f99c2bbe9d2b3703ec76..36ac655381cdb1170085a433ec76f02d060e8eb5

mode 100755,100644..100755
--- 1/drivers/media/video/uvc/uvc_video.c
--- 2/drivers/media/video/uvc/uvc_video.c
+++ b/drivers/media/video/uvc/uvc_video.c
diff --cc drivers/media/video/uvc/uvcvideo.h

index 7ad0de87c0ed54251442455899a01d5f97c27ba0,892e0e51916c31853d9e8fa681ecce27e75edc53..bab1fa6e75b5b7733af4279f546e239f6565d841

mode 100755,100644..100755
--- 1/drivers/media/video/uvc/uvcvideo.h
--- 2/drivers/media/video/uvc/uvcvideo.h
+++ b/drivers/media/video/uvc/uvcvideo.h
diff --cc drivers/media/video/v4l2-ioctl.c
Simple merge
diff --cc drivers/media/video/videobuf-core.c
Simple merge
diff --cc drivers/media/video/videobuf-dma-contig.c
Simple merge
diff --cc drivers/mfd/Kconfig

index 0e7a073d4472508ac42aad9dc5d44a9f50b13f4d,d2924a2cf3cdca63b2431cefd6cb8241f1fe9fbc..71ea410390bf936112fc115d49033b9e265f1983

mode 100755,100644..100755
--- 1/drivers/mfd/Kconfig
--- 2/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@@ -121,18 -180,55 +180,67 @@@ config TWL4030_POWE
           and load scripts controling which resources are switched off/on
           or reset when a sleep, wakeup or warm reset event occurs.
   
+ +config TPS65910_CORE
+ +      bool "Texas Instruments TPS65910 Support"
+ +      depends on I2C=y && GENERIC_HARDIRQS
+ +      help
+ +        Say yes here if you have TPS65910 family chip on your board.
+ +        This core driver provides register access and registers devices
+ +          for the various functions so that function-specific drivers can
+ +          bind to them.
+ +
+ +        These multi-function chips are found on many AM35xx boards,
+ +          providing power management, RTC, GPIO features.
+ +
+ config TWL4030_CODEC
+       bool
+       depends on TWL4030_CORE
+       select MFD_CORE
+       default n
+ 
+ config TWL6030_PWM
+       tristate "TWL6030 PWM (Pulse Width Modulator) Support"
+       depends on TWL4030_CORE
+       select HAVE_PWM
+       default n
+       help
+         Say yes here if you want support for TWL6030 PWM.
+         This is used to control charging LED brightness.
+ 
+ config MFD_STMPE
+       bool "Support STMicroelectronics STMPE"
+       depends on I2C=y && GENERIC_HARDIRQS
+       select MFD_CORE
+       help
+         Support for the STMPE family of I/O Expanders from
+         STMicroelectronics.
+ 
+         Currently supported devices are:
+ 
+               STMPE811: GPIO, Touchscreen
+               STMPE1601: GPIO, Keypad
+               STMPE2401: GPIO, Keypad
+               STMPE2403: GPIO, Keypad
+ 
+         This driver provides common support for accessing the device,
+         additional drivers must be enabled in order to use the functionality
+         of the device.  Currently available sub drivers are:
+ 
+               GPIO: stmpe-gpio
+               Keypad: stmpe-keypad
+               Touchscreen: stmpe-ts
+ 
+ config MFD_TC35892
+       bool "Support Toshiba TC35892"
+       depends on I2C=y && GENERIC_HARDIRQS
+       select MFD_CORE
+       help
+         Support for the Toshiba TC35892 I/O Expander.
+ 
+         This driver provides common support for accessing the device,
+         additional drivers must be enabled in order to use the
+         functionality of the device.
+ 
   config MFD_TMIO
         bool
         default n
@@@ -195,44 -314,18 +326,45 @@@ config MFD_WM840
           the functionality of the device.
   
   config MFD_WM831X
- -      bool "Support Wolfson Microelectronics WM831x/2x PMICs"
+ +      bool
+ +      depends on GENERIC_HARDIRQS
+ +
+ +config MFD_WM831X_I2C
+ +      bool "Support Wolfson Microelectronics WM831x/2x PMICs with I2C"
         select MFD_CORE
+ +      select MFD_WM831X
         depends on I2C=y && GENERIC_HARDIRQS
         help
- -        Support for the Wolfson Microelecronics WM831x and WM832x PMICs.
- -        This driver provides common support for accessing the device,
- -        additional drivers must be enabled in order to use the
- -        functionality of the device.
+ +        Support for the Wolfson Microelecronics WM831x and WM832x PMICs
+ +        when controlled using I2C.  This driver provides common support
+ +        for accessing the device, additional drivers must be enabled in
+ +        order to use the functionality of the device.
   
+ +config MFD_WM831X_SPI
+ +      bool "Support Wolfson Microelectronics WM831x/2x PMICs with SPI"
+ +      select MFD_CORE
+ +      select MFD_WM831X
+ +      depends on SPI_MASTER && GENERIC_HARDIRQS
+ +      help
+ +        Support for the Wolfson Microelecronics WM831x and WM832x PMICs
+ +        when controlled using SPI.  This driver provides common support
+ +        for accessing the device, additional drivers must be enabled in
+ +        order to use the functionality of the device.
+ +
+ +config MFD_WM831X_SPI_A22
+ +      bool "Support Wolfson Microelectronics WM831x/2x PMICs with SPI for A22"
+ +      #select MFD_CORE
+ +      #select MFD_WM831X
+ +      depends on SPI_MASTER && GENERIC_HARDIRQS
+ +      help
+ +        Support for the Wolfson Microelecronics WM831x and WM832x PMICs
+ +        when controlled using SPI.  This driver provides common support
+ +        for accessing the device, additional drivers must be enabled in
+ +        order to use the functionality of the device.
+ +        
   config MFD_WM8350
-       tristate
+       bool
+       depends on GENERIC_HARDIRQS
   
   config MFD_WM8350_CONFIG_MODE_0
         bool
diff --cc drivers/mfd/Makefile

index a3768e455e9dc0fe1ee0aebb62c90f657b6e3726,a28fc814aea6832796205ba52147e3a602eee29e..866cb2898e5702f731627ed47a15dc22f302ba18

mode 100755,100644..100755
--- 1/drivers/mfd/Makefile
--- 2/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@@ -17,21 -24,21 +24,26 @@@ obj-$(CONFIG_MFD_TC6393XB) += tc6393xb.
   obj-$(CONFIG_MFD_WM8400)      += wm8400-core.o
   wm831x-objs                   := wm831x-core.o wm831x-irq.o wm831x-otp.o
   obj-$(CONFIG_MFD_WM831X)      += wm831x.o
+ +obj-$(CONFIG_MFD_WM831X_I2C)  += wm831x-i2c.o
+ +obj-$(CONFIG_MFD_WM831X_SPI)  += wm831x-spi.o
+ +obj-$(CONFIG_MFD_WM831X_SPI_A22)      += wm831x-spi-a22.o
   wm8350-objs                   := wm8350-core.o wm8350-regmap.o wm8350-gpio.o
+ wm8350-objs                   += wm8350-irq.o
   obj-$(CONFIG_MFD_WM8350)      += wm8350.o
   obj-$(CONFIG_MFD_WM8350_I2C)  += wm8350-i2c.o
+ obj-$(CONFIG_MFD_WM8994)      += wm8994-core.o wm8994-irq.o
   
   obj-$(CONFIG_TPS65010)                += tps65010.o
+ obj-$(CONFIG_TPS6507X)                += tps6507x.o
   obj-$(CONFIG_MENELAUS)                += menelaus.o
   
- obj-$(CONFIG_TWL4030_CORE)    += twl4030-core.o twl4030-irq.o
+ obj-$(CONFIG_TWL4030_CORE)    += twl-core.o twl4030-irq.o twl6030-irq.o
   obj-$(CONFIG_TWL4030_POWER)    += twl4030-power.o
+ obj-$(CONFIG_TWL4030_CODEC)   += twl4030-codec.o
+ obj-$(CONFIG_TWL6030_PWM)     += twl6030-pwm.o
   
+ +obj-$(CONFIG_TPS65910_CORE)     += tps65910-core.o
+ +
   obj-$(CONFIG_MFD_MC13783)     += mc13783-core.o
   
   obj-$(CONFIG_MFD_CORE)                += mfd-core.o
diff --cc drivers/misc/Kconfig

index 2a3ffe570adb7dae2ff0f3ebdc5fa8ed76ade665,9c4ef5015d6e7e7e231015888ca549f711314f79..cfcd9a3b73495ba9637d9edd201d5c8fd838674d

mode 100755,100644..100755
--- 1/drivers/misc/Kconfig
--- 2/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@@ -246,30 -401,106 +401,124 @@@ config EP93XX_PW
           To compile this driver as a module, choose M here: the module will
           be called ep93xx_pwm.
   
-       default n
+ +config STE
+ +      bool "STE modem control driver"
-       default n       
+ +      
+ +config MTK23D
+ +      bool "MTK6223D modem control driver"
-       default n       
+ +
+ +config FM580X
+ +      bool "FM rda580x driver"
-       default n
+ +      
+ +config MU509
+ +      bool "MU509 modem control driver"
+ +      
+ +config RK29_NEWTON
+ +      bool "RK29_NEWTON misc driver"
++
+ config DS1682
+       tristate "Dallas DS1682 Total Elapsed Time Recorder with Alarm"
+       depends on I2C && EXPERIMENTAL
+       help
+         If you say yes here you get support for Dallas Semiconductor
+         DS1682 Total Elapsed Time Recorder.
+ 
+         This driver can also be built as a module.  If so, the module
+         will be called ds1682.
+ 
+ config TI_DAC7512
+       tristate "Texas Instruments DAC7512"
+       depends on SPI && SYSFS
+       help
+         If you say yes here you get support for the Texas Instruments
+         DAC7512 16-bit digital-to-analog converter.
+ 
+         This driver can also be built as a module. If so, the module
+         will be calles ti_dac7512.
+ 
+ config UID_STAT
+       bool "UID based statistics tracking exported to /proc/uid_stat"
         default n
   
+ config VMWARE_BALLOON
+       tristate "VMware Balloon Driver"
+       depends on X86
+       help
+         This is VMware physical memory management driver which acts
+         like a "balloon" that can be inflated to reclaim physical pages
+         by reserving them in the guest and invalidating them in the
+         monitor, freeing up the underlying machine pages so they can
+         be allocated to other guests. The balloon can also be deflated
+         to allow the guest to use more physical memory.
+ 
+         If unsure, say N.
+ 
+         To compile this driver as a module, choose M here: the
+         module will be called vmw_balloon.
+ 
+ config ARM_CHARLCD
+       bool "ARM Ltd. Character LCD Driver"
+       depends on PLAT_VERSATILE
+       help
+         This is a driver for the character LCD found on the ARM Ltd.
+         Versatile and RealView Platform Baseboards. It doesn't do
+         very much more than display the text "ARM Linux" on the first
+         line and the Linux version on the second line, but that's
+         still useful.
+ 
+ config BMP085
+       tristate "BMP085 digital pressure sensor"
+       depends on I2C && SYSFS
+       help
+         If you say yes here you get support for the Bosch Sensortec
+         BMP086 digital pressure sensor.
+ 
+         To compile this driver as a module, choose M here: the
+         module will be called bmp085.
+ 
+ config WL127X_RFKILL
+       tristate "Bluetooth power control driver for TI wl127x"
+       depends on RFKILL
+       default n
+       ---help---
+        Creates an rfkill entry in sysfs for power control of Bluetooth
+        TI wl127x chips.
+ 
+ config APANIC
+       bool "Android kernel panic diagnostics driver"
+       default n
+       ---help---
+        Driver which handles kernel panics and attempts to write
+        critical debugging data to flash.
+ 
+ config APANIC_PLABEL
+       string "Android panic dump flash partition label"
+       depends on APANIC
+       default "kpanic"
+       ---help---
+        If your platform uses a different flash partition label for storing
+        crashdumps, enter it here.
+ 
+ config GPS_GPIO_BRCM4750
+       bool "Enable gpio controller for GPS brcm 4750"
+       default y
+       ---help---
+       Adds GPIO controller driver for GPS Broadcom 4750 chipset
+ 
+ config TEGRA_CRYPTO_DEV
+       bool "Device node to access tegra aes hardware"
+       ---help---
+       Dev node /dev/tegra-crypto in order to get access to tegra aes
+       hardware from user space
+ 
   source "drivers/misc/c2port/Kconfig"
   source "drivers/misc/eeprom/Kconfig"
   source "drivers/misc/cb710/Kconfig"
+ +source "drivers/misc/rk29_modem/Kconfig"
+ +source "drivers/misc/gps/Kconfig"
+ +source "drivers/misc/mpu3050/Kconfig"
+ source "drivers/misc/ts27010mux/Kconfig"
+ source "drivers/misc/iwmc3200top/Kconfig"
+ source "drivers/misc/radio_ctrl/Kconfig"
+ 
   endif # MISC_DEVICES
diff --cc drivers/misc/Makefile

index 364d024cc1b8588e38de044f75316058d0544662,c7c058e406cfa5242b204e1af99b390626cef689..1aadc107b1e85d45c837d9e04c3f1ae85ab87083

mode 100755,100644..100755
--- 1/drivers/misc/Makefile
--- 2/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@@ -17,17 -23,31 +23,39 @@@ obj-$(CONFIG_KERNEL_DEBUGGER_CORE) += k
   obj-$(CONFIG_KGDB_TESTS)      += kgdbts.o
   obj-$(CONFIG_SGI_XP)          += sgi-xp/
   obj-$(CONFIG_SGI_GRU)         += sgi-gru/
+ obj-$(CONFIG_CS5535_MFGPT)    += cs5535-mfgpt.o
   obj-$(CONFIG_HP_ILO)          += hpilo.o
   obj-$(CONFIG_ISL29003)                += isl29003.o
+ obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o
   obj-$(CONFIG_EP93XX_PWM)      += ep93xx_pwm.o
+ obj-$(CONFIG_DS1682)          += ds1682.o
+ obj-$(CONFIG_TI_DAC7512)      += ti_dac7512.o
+ obj-$(CONFIG_UID_STAT)                += uid_stat.o
   obj-$(CONFIG_C2PORT)          += c2port/
+ obj-$(CONFIG_IWMC3200TOP)      += iwmc3200top/
+ obj-$(CONFIG_HMC6352)         += hmc6352.o
   obj-y                         += eeprom/
   obj-y                         += cb710/
+ +obj-$(CONFIG_MTK23D)          += mtk23d.o
+ +obj-$(CONFIG_FM580X)          += fm580x.o
+ +obj-$(CONFIG_MU509)           += mu509.o
+ +obj-$(CONFIG_STE)             += ste.o
+ +obj-$(CONFIG_RK29_SUPPORT_MODEM)        += rk29_modem/
+ +obj-$(CONFIG_GPS_GNS7560)                     +=      gps/
+ +obj-y += mpu3050/
+ +obj-$(CONFIG_RK29_NEWTON)                     +=      newton.o
+ obj-$(CONFIG_VMWARE_BALLOON)  += vmw_balloon.o
+ obj-$(CONFIG_ARM_CHARLCD)     += arm-charlcd.o
+ obj-$(CONFIG_WL127X_RFKILL)   += wl127x-rfkill.o
+ obj-$(CONFIG_APANIC)          += apanic.o
+ obj-$(CONFIG_SENSORS_AK8975)  += akm8975.o
+ obj-$(CONFIG_SENSORS_KXTF9)   += kxtf9.o
+ obj-$(CONFIG_SENSORS_CAP_PROX)        += cap_prox.o
+ obj-$(CONFIG_SENSORS_MAX9635) += max9635.o
+ obj-$(CONFIG_SENSORS_NCT1008) += nct1008.o
+ obj-$(CONFIG_SENSORS_L3G4200D)        += l3g4200d.o
+ obj-$(CONFIG_GPS_GPIO_BRCM4750)       += gps-gpio-brcm4750.o
+ obj-y                         += radio_ctrl/
+ obj-$(CONFIG_SENSORS_MOTO_BMP085) += moto_bmp085.o
+ obj-$(CONFIG_TEGRA_CRYPTO_DEV)        += tegra-cryptodev.o
+ obj-$(CONFIG_TS27010MUX)      += ts27010mux/
diff --cc drivers/misc/l3g4200d.c

index 0000000000000000000000000000000000000000,71c7574227cb072bf3b8a5ac3af010c6bf5f5738..66c7258711b1095f06185c474d9a23f1ded5fdc7

mode 000000,100755..100755
--- /dev/null
--- 2/drivers/misc/l3g4200d.c
+++ b/drivers/misc/l3g4200d.c
@@@ -1,0 -1,734 +1,734 @@@
- -#include <linux/l3g4200d.h>
+ /*
+  * Copyright (C) 2011 Motorola Mobility, Inc.
+  *
+  * This program is free software; you can redistribute it and/or modify
+  * it under the terms of the GNU General Public License version 2 as
+  * published by the Free Software Foundation.
+  *
+  * This program is distributed in the hope that it will be useful,
+  * but WITHOUT ANY WARRANTY; without even the implied warranty of
+  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+  * GNU General Public License for more details.
+  *
+  * You should have received a copy of the GNU General Public License
+  * along with this program; if not, write to the Free Software
+  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
+  * 02111-1307, USA
+  */
+ 
+ #include <linux/err.h>
+ #include <linux/errno.h>
+ #include <linux/delay.h>
+ #include <linux/fs.h>
+ #include <linux/i2c.h>
+ #include <linux/irq.h>
+ #include <linux/input.h>
+ #include <linux/interrupt.h>
+ #include <linux/input-polldev.h>
+ #include <linux/miscdevice.h>
+ #include <linux/regulator/consumer.h>
+ #include <linux/slab.h>
+ #include <linux/uaccess.h>
+ #include <linux/gpio.h>
+ 
++#include <linux/l3g4200d-moto.h>
+ 
+ /** Register map */
+ #define L3G4200D_WHO_AM_I             0x0f
+ #define L3G4200D_CTRL_REG1            0x20
+ #define L3G4200D_CTRL_REG2            0x21
+ #define L3G4200D_CTRL_REG3            0x22
+ #define L3G4200D_CTRL_REG4            0x23
+ #define L3G4200D_CTRL_REG5            0x24
+ 
+ #define L3G4200D_REF_DATA_CAP         0x25
+ #define L3G4200D_OUT_TEMP             0x26
+ #define L3G4200D_STATUS_REG           0x27
+ 
+ #define L3G4200D_OUT_X_L              0x28
+ #define L3G4200D_OUT_X_H              0x29
+ #define L3G4200D_OUT_Y_L              0x2a
+ #define L3G4200D_OUT_Y_H              0x2b
+ #define L3G4200D_OUT_Z_L              0x2c
+ #define L3G4200D_OUT_Z_H              0x2d
+ 
+ #define L3G4200D_FIFO_CTRL            0x2e
+ #define L3G4200D_FIFO_SRC             0x2e
+ 
+ #define L3G4200D_INTERRUPT_CFG                0x30
+ #define L3G4200D_INTERRUPT_SRC                0x31
+ #define L3G4200D_INTERRUPT_THRESH_X_H 0x32
+ #define L3G4200D_INTERRUPT_THRESH_X_L 0x33
+ #define L3G4200D_INTERRUPT_THRESH_Y_H 0x34
+ #define L3G4200D_INTERRUPT_THRESH_Y_L 0x35
+ #define L3G4200D_INTERRUPT_THRESH_Z_H 0x36
+ #define L3G4200D_INTERRUPT_THRESH_Z_L 0x37
+ #define L3G4200D_INTERRUPT_DURATION   0x38
+ 
+ #define PM_MASK                         0x08
+ #define ENABLE_ALL_AXES                       0x07
+ #define ODR_MASK      0xF0
+ #define ODR100_BW25   0x10
+ #define ODR200_BW70   0x70
+ #define ODR400_BW110  0xB0
+ #define ODR800_BW110  0xF0
+ 
+ #define I2C_RETRY_DELAY                       5
+ #define I2C_RETRIES                   5
+ #define AUTO_INCREMENT                        0x80
+ #define L3G4200D_PU_DELAY               320
+ 
+ 
+ struct l3g4200d_data {
+       struct i2c_client *client;
+       struct l3g4200d_platform_data *pdata;
+       struct input_dev *input_dev;
+ 
+       int hw_initialized;
+       atomic_t enabled;
+       struct regulator *regulator;
+       struct delayed_work enable_work;
+ };
+ 
+ struct gyro_val {
+       s16 x;
+       s16 y;
+       s16 z;
+ };
+ 
+ static const struct {
+       u8 odr_mask;
+       u32 delay_us;
+ } gyro_odr_table[] = {
+       {  ODR800_BW110, 1250  },
+       {  ODR400_BW110, 2500  },
+       {  ODR200_BW70,  5000  },
+       {  ODR100_BW25,  10000 },
+ };
+ 
+ static uint32_t l3g4200d_debug;
+ module_param_named(gyro_debug, l3g4200d_debug, uint, 0664);
+ 
+ /*
+  * Because misc devices can not carry a pointer from driver register to
+  * open, we keep this global.  This limits the driver to a single instance.
+  */
+ struct l3g4200d_data *l3g4200d_misc_data;
+ 
+ static int l3g4200d_i2c_read(struct l3g4200d_data *gyro, u8 * buf, int len)
+ {
+       int err;
+       int tries = 0;
+       struct i2c_msg msgs[] = {
+               {
+                       .addr = gyro->client->addr,
+                       .flags = gyro->client->flags & I2C_M_TEN,
+                       .len = 1,
+                       .buf = buf,
+               },
+               {
+                       .addr = gyro->client->addr,
+                       .flags = (gyro->client->flags & I2C_M_TEN) | I2C_M_RD,
+                       .len = len,
+                       .buf = buf,
+               },
+       };
+ 
+       do {
+               err = i2c_transfer(gyro->client->adapter, msgs, 2);
+               if (err != 2)
+                       msleep_interruptible(I2C_RETRY_DELAY);
+       } while ((err != 2) && (++tries < I2C_RETRIES));
+ 
+       if (err != 2) {
+               dev_err(&gyro->client->dev, "read transfer error\n");
+               err = -EIO;
+       } else {
+               err = 0;
+       }
+ 
+       return err;
+ }
+ 
+ static int l3g4200d_i2c_write(struct l3g4200d_data *gyro, u8 * buf, int len)
+ {
+       int err;
+       int tries = 0;
+       struct i2c_msg msgs[] = {
+               {
+                       .addr = gyro->client->addr,
+                       .flags = gyro->client->flags & I2C_M_TEN,
+                       .len = len + 1,
+                       .buf = buf,
+               },
+       };
+ 
+       do {
+               err = i2c_transfer(gyro->client->adapter, msgs, 1);
+               if (err != 1)
+                       msleep_interruptible(I2C_RETRY_DELAY);
+       } while ((err != 1) && (++tries < I2C_RETRIES));
+ 
+       if (err != 1) {
+               dev_err(&gyro->client->dev, "write transfer error\n");
+               err = -EIO;
+       } else {
+               err = 0;
+       }
+ 
+       return err;
+ }
+ static int l3g4200d_hw_init(struct l3g4200d_data *gyro)
+ {
+       int err = -1;
+       u8 buf[8];
+ 
+       buf[0] = (AUTO_INCREMENT | L3G4200D_CTRL_REG1);
+       buf[1] = gyro->pdata->ctrl_reg1 & ~PM_MASK;
+       buf[2] = gyro->pdata->ctrl_reg2;
+       buf[3] = gyro->pdata->ctrl_reg3;
+       buf[4] = gyro->pdata->ctrl_reg4;
+       buf[5] = gyro->pdata->ctrl_reg5;
+       buf[6] = gyro->pdata->reference;
+       err = l3g4200d_i2c_write(gyro, buf, 6);
+       if (err < 0)
+               return err;
+ 
+       buf[0] = (L3G4200D_FIFO_CTRL);
+       buf[1] = gyro->pdata->fifo_ctrl_reg;
+       err = l3g4200d_i2c_write(gyro, buf, 1);
+       if (err < 0)
+               return err;
+ 
+       buf[0] = (L3G4200D_INTERRUPT_CFG);
+       buf[1] = gyro->pdata->int1_cfg;
+       err = l3g4200d_i2c_write(gyro, buf, 1);
+       if (err < 0)
+               return err;
+ 
+       buf[0] = (AUTO_INCREMENT | L3G4200D_INTERRUPT_THRESH_X_H);
+       buf[1] = gyro->pdata->int1_tsh_xh;
+       buf[2] = gyro->pdata->int1_tsh_xl;
+       buf[3] = gyro->pdata->int1_tsh_yh;
+       buf[4] = gyro->pdata->int1_tsh_yl;
+       buf[5] = gyro->pdata->int1_tsh_zh;
+       buf[6] = gyro->pdata->int1_tsh_zl;
+       buf[7] = gyro->pdata->int1_duration;
+       err = l3g4200d_i2c_write(gyro, buf, 7);
+       if (err < 0)
+               return err;
+ 
+       gyro->hw_initialized = true;
+ 
+       return 0;
+ }
+ 
+ static void l3g4200d_device_power_off(struct l3g4200d_data *gyro)
+ {
+       int err;
+       u8 buf[2] = {L3G4200D_CTRL_REG1, 0};
+ 
+       err = l3g4200d_i2c_read(gyro, buf, 1);
+       if (err < 0) {
+               dev_err(&gyro->client->dev, "read register control_1 failed\n");
+               buf[0] = gyro->pdata->ctrl_reg1;
+       }
+       buf[1] = buf[0] & ~PM_MASK;
+       buf[0] = L3G4200D_CTRL_REG1;
+ 
+       err = l3g4200d_i2c_write(gyro, buf, 1);
+       if (err < 0)
+               dev_err(&gyro->client->dev, "soft power off failed\n");
+ }
+ 
+ static int l3g4200d_device_power_on(struct l3g4200d_data *gyro)
+ {
+       int err;
+       u8 buf[2] = {L3G4200D_CTRL_REG1, 0};
+ 
+       if (!gyro->hw_initialized) {
+               err = l3g4200d_hw_init(gyro);
+               if (err < 0) {
+                       l3g4200d_device_power_off(gyro);
+                       return err;
+               }
+       }
+ 
+       err = l3g4200d_i2c_read(gyro, buf, 1);
+       if (err < 0) {
+               dev_err(&gyro->client->dev, "read register control_1 failed\n");
+               buf[0] = gyro->pdata->ctrl_reg1;
+       }
+ 
+       buf[1] = buf[0] | PM_MASK;
+       buf[0] = L3G4200D_CTRL_REG1;
+       err = l3g4200d_i2c_write(gyro, buf, 1);
+       if (err < 0)
+               dev_err(&gyro->client->dev, "soft power on failed\n");
+ 
+       return 0;
+ }
+ 
+ static void l3g4200d_device_suspend(struct l3g4200d_data *gyro, int suspend)
+ {
+       int err;
+       u8 buf[2] = {L3G4200D_CTRL_REG1, 0};
+ 
+       err = l3g4200d_i2c_read(gyro, buf, 1);
+       if (err < 0) {
+               dev_err(&gyro->client->dev, "read register control_1 failed\n");
+               return;
+       }
+ 
+       if (suspend)
+               buf[1] = buf[0] & ~ENABLE_ALL_AXES;
+       else
+               buf[1] = buf[0] | ENABLE_ALL_AXES;
+ 
+       buf[0] = L3G4200D_CTRL_REG1;
+ 
+       err = l3g4200d_i2c_write(gyro, buf, 1);
+       if (err < 0)
+               dev_err(&gyro->client->dev, "suspend %d failed\n", suspend);
+ }
+ 
+ static int l3g4200d_get_gyro_data(struct l3g4200d_data *gyro,
+                                        struct gyro_val *data)
+ {
+       int err = -1;
+       /* Data bytes from hardware xL, xH, yL, yH, zL, zH */
+       u8 gyro_data[6];
+ 
+       gyro_data[0] = (AUTO_INCREMENT | L3G4200D_OUT_X_L);
+       err = l3g4200d_i2c_read(gyro, gyro_data, 6);
+       if (err < 0)
+               return err;
+ 
+       data->x = (gyro_data[1] << 8) | gyro_data[0];
+       data->y = (gyro_data[3] << 8) | gyro_data[2];
+       data->z = (gyro_data[5] << 8) | gyro_data[4];
+ 
+       return 0;
+ }
+ 
+ static void l3g4200d_report_values(struct l3g4200d_data *gyro,
+                                        struct gyro_val *data)
+ {
+       input_report_rel(gyro->input_dev, REL_RX, data->x);
+       input_report_rel(gyro->input_dev, REL_RY, data->y);
+       input_report_rel(gyro->input_dev, REL_RZ, data->z);
+       input_sync(gyro->input_dev);
+ 
+       if (l3g4200d_debug)
+               pr_info("l3g4200d: x: %3d, y: %3d, z: %3d\n",
+                        data->x, data->y, data->z);
+ }
+ 
+ static irqreturn_t gyro_irq_thread(int irq, void *dev)
+ {
+       struct l3g4200d_data *gyro = dev;
+       struct gyro_val data;
+       int err;
+ 
+       err = l3g4200d_get_gyro_data(gyro, &data);
+       if (err < 0)
+               dev_err(&gyro->client->dev, "get_acceleration_data failed\n");
+       else
+               l3g4200d_report_values(gyro, &data);
+ 
+       return IRQ_HANDLED;
+ }
+ 
+ static int l3g4200d_flush_gyro_data(struct l3g4200d_data *gyro)
+ {
+       struct gyro_val data;
+       int i;
+ 
+       for (i = 0; i < 5; i++) {
+               if (gpio_get_value(gyro->pdata->gpio_drdy))
+                       l3g4200d_get_gyro_data(gyro, &data);
+               else
+                       return 0;
+       }
+       return -EIO;
+ }
+ 
+ static void l3g4200d_enable_work_func(struct work_struct *work)
+ {
+       struct delayed_work *dwork = to_delayed_work(work);
+       struct l3g4200d_data *gyro =
+               container_of(dwork, struct l3g4200d_data, enable_work);
+ 
+       l3g4200d_flush_gyro_data(gyro);
+       enable_irq(gyro->client->irq);
+ }
+ 
+ static int l3g4200d_enable(struct l3g4200d_data *gyro)
+ {
+       int err;
+ 
+       if (!atomic_cmpxchg(&gyro->enabled, 0, 1)) {
+               if (gyro->regulator) {
+                       err = regulator_enable(gyro->regulator);
+                       if (err < 0)
+                               goto err0;
+               }
+ 
+               err = l3g4200d_device_power_on(gyro);
+               if (err < 0) {
+                       regulator_disable(gyro->regulator);
+                       gyro->hw_initialized = false;
+                       goto err0;
+               }
+ 
+               /* do not report noise at IC power-up
+                * flush data before enabling irq */
+               schedule_delayed_work(&gyro->enable_work,
+                       msecs_to_jiffies(L3G4200D_PU_DELAY));
+       }
+       return 0;
+ err0:
+       atomic_set(&gyro->enabled, 0);
+       return err;
+ }
+ 
+ static int l3g4200d_disable(struct l3g4200d_data *gyro)
+ {
+       if (atomic_cmpxchg(&gyro->enabled, 1, 0)) {
+               if (!cancel_delayed_work_sync(&gyro->enable_work))
+                       disable_irq(gyro->client->irq);
+               l3g4200d_device_power_off(gyro);
+               if (gyro->regulator) {
+                       regulator_disable(gyro->regulator);
+                       gyro->hw_initialized = false;
+               }
+       }
+       return 0;
+ }
+ 
+ static int l3g4200d_misc_open(struct inode *inode, struct file *file)
+ {
+       int err;
+       err = nonseekable_open(inode, file);
+       if (err < 0)
+               return err;
+ 
+       file->private_data = l3g4200d_misc_data;
+ 
+       return 0;
+ }
+ 
+ static int l3g4200d_set_delay(struct l3g4200d_data *gyro, u32 delay_ms)
+ {
+       int odr_value = ODR100_BW25;
+       int err = -1;
+       int i;
+       u32 delay_us;
+       u8 buf[2] = {L3G4200D_CTRL_REG1, 0};
+ 
+       /* do not report noise during ODR update */
+       disable_irq(gyro->client->irq);
+ 
+       delay_us = delay_ms * USEC_PER_MSEC;
+       for (i = 0; i < ARRAY_SIZE(gyro_odr_table); i++)
+               if (delay_us <= gyro_odr_table[i].delay_us) {
+                       odr_value = gyro_odr_table[i].odr_mask;
+                       delay_us = gyro_odr_table[i].delay_us;
+                       break;
+               }
+ 
+       if (delay_us >= gyro_odr_table[3].delay_us) {
+               odr_value = gyro_odr_table[3].odr_mask;
+               delay_us = gyro_odr_table[3].delay_us;
+       }
+ 
+       if (odr_value != (gyro->pdata->ctrl_reg1 & ODR_MASK)) {
+               buf[1] = (gyro->pdata->ctrl_reg1 & ~ODR_MASK);
+               buf[1] |= odr_value;
+               gyro->pdata->ctrl_reg1 = buf[1];
+               err = l3g4200d_i2c_write(gyro, buf, 1);
+               if (err < 0)
+                       goto error;
+       }
+ 
+       gyro->pdata->poll_interval = delay_us / USEC_PER_MSEC;
+       /* noisy data upto 6/ODR */
+       msleep((delay_us * 6) / USEC_PER_MSEC);
+ 
+       l3g4200d_flush_gyro_data(gyro);
+       enable_irq(gyro->client->irq);
+ 
+       return 0;
+ 
+ error:
+       dev_err(&gyro->client->dev, "update odr failed 0x%x,0x%x: %d\n",
+               buf[0], buf[1], err);
+ 
+       return err;
+ }
+ 
+ static long l3g4200d_misc_ioctl(struct file *file,
+                               unsigned int cmd, unsigned long arg)
+ {
+       void __user *argp = (void __user *)arg;
+       int interval;
+       int err = -1;
+       struct l3g4200d_data *gyro = file->private_data;
+ 
+       switch (cmd) {
+       case L3G4200D_IOCTL_GET_DELAY:
+               interval = gyro->pdata->poll_interval;
+               if (copy_to_user(argp, &interval, sizeof(interval)))
+                       return -EFAULT;
+               break;
+ 
+       case L3G4200D_IOCTL_SET_DELAY:
+               if (copy_from_user(&interval, argp, sizeof(interval)))
+                       return -EFAULT;
+               err = l3g4200d_set_delay(gyro, interval);
+               if (err < 0)
+                       return err;
+               break;
+ 
+       case L3G4200D_IOCTL_SET_ENABLE:
+               if (copy_from_user(&interval, argp, sizeof(interval)))
+                       return -EFAULT;
+               if (interval > 1)
+                       return -EINVAL;
+ 
+               if (interval)
+                       l3g4200d_enable(gyro);
+               else
+                       l3g4200d_disable(gyro);
+ 
+               break;
+ 
+       case L3G4200D_IOCTL_GET_ENABLE:
+               interval = atomic_read(&gyro->enabled);
+               if (copy_to_user(argp, &interval, sizeof(interval)))
+                       return -EINVAL;
+ 
+               break;
+ 
+       default:
+               return -EINVAL;
+       }
+ 
+       return 0;
+ }
+ 
+ static const struct file_operations l3g4200d_misc_fops = {
+       .owner = THIS_MODULE,
+       .open = l3g4200d_misc_open,
+       .unlocked_ioctl = l3g4200d_misc_ioctl,
+ };
+ 
+ static struct miscdevice l3g4200d_misc_device = {
+       .minor = MISC_DYNAMIC_MINOR,
+       .name = L3G4200D_NAME,
+       .fops = &l3g4200d_misc_fops,
+ };
+ 
+ static int l3g4200d_input_init(struct l3g4200d_data *gyro)
+ {
+       int err;
+ 
+       err = request_threaded_irq(gyro->client->irq, NULL,
+                        gyro_irq_thread, IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
+                        L3G4200D_NAME, gyro);
+       if (err != 0) {
+               pr_err("%s: irq request failed: %d\n", __func__, err);
+               err = -ENODEV;
+               goto err0;
+       }
+       disable_irq(gyro->client->irq);
+ 
+       gyro->input_dev = input_allocate_device();
+       if (!gyro->input_dev) {
+               err = -ENOMEM;
+               dev_err(&gyro->client->dev, "input device allocate failed\n");
+               goto err1;
+       }
+ 
+       input_set_drvdata(gyro->input_dev, gyro);
+ 
+       input_set_capability(gyro->input_dev, EV_REL, REL_RX);
+       input_set_capability(gyro->input_dev, EV_REL, REL_RY);
+       input_set_capability(gyro->input_dev, EV_REL, REL_RZ);
+ 
+       gyro->input_dev->name = "gyroscope";
+ 
+       err = input_register_device(gyro->input_dev);
+       if (err) {
+               dev_err(&gyro->client->dev,
+                       "unable to register input polled device %s\n",
+                       gyro->input_dev->name);
+               goto err2;
+       }
+ 
+       return 0;
+ 
+ err2:
+       input_free_device(gyro->input_dev);
+ err1:
+       free_irq(gyro->client->irq, gyro);
+ err0:
+       return err;
+ }
+ 
+ static void l3g4200d_input_cleanup(struct l3g4200d_data *gyro)
+ {
+       input_unregister_device(gyro->input_dev);
+       input_free_device(gyro->input_dev);
+ }
+ 
+ static int l3g4200d_probe(struct i2c_client *client,
+                          const struct i2c_device_id *id)
+ {
+       struct l3g4200d_data *gyro;
+       int err = -1;
+ 
+       pr_err("%s:Enter\n", __func__);
+       if (client->dev.platform_data == NULL) {
+               dev_err(&client->dev, "platform data is NULL. exiting.\n");
+               err = -ENODEV;
+               goto err0;
+       }
+ 
+       if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
+               dev_err(&client->dev, "client not i2c capable\n");
+               err = -ENODEV;
+               goto err0;
+       }
+ 
+       gyro = kzalloc(sizeof(*gyro), GFP_KERNEL);
+       if (gyro == NULL) {
+               dev_err(&client->dev,
+                       "failed to allocate memory for module data\n");
+               err = -ENOMEM;
+               goto err0;
+       }
+ 
+       gyro->client = client;
+ 
+       gyro->pdata = kzalloc(sizeof(*gyro->pdata), GFP_KERNEL);
+       if (gyro->pdata == NULL)
+               goto err1;
+ 
+       memcpy(gyro->pdata, client->dev.platform_data, sizeof(*gyro->pdata));
+ 
+       gyro->regulator = regulator_get(&client->dev, "vcc");
+       if (IS_ERR_OR_NULL(gyro->regulator)) {
+               dev_err(&client->dev, "unable to get regulator\n");
+               gyro->regulator = NULL;
+       }
+ 
+       i2c_set_clientdata(client, gyro);
+ 
+       /* As default, do not report information */
+       atomic_set(&gyro->enabled, 0);
+       gyro->hw_initialized = false;
+       INIT_DELAYED_WORK(&gyro->enable_work, l3g4200d_enable_work_func);
+ 
+       err = l3g4200d_input_init(gyro);
+       if (err < 0)
+               goto err3;
+ 
+       l3g4200d_misc_data = gyro;
+ 
+       err = misc_register(&l3g4200d_misc_device);
+       if (err < 0) {
+               dev_err(&client->dev, "l3g4200d_device register failed\n");
+               goto err4;
+       }
+ 
+       pr_info("%s:Gyro probed\n", __func__);
+       return 0;
+ 
+ err4:
+       l3g4200d_input_cleanup(gyro);
+ err3:
+       if (gyro->regulator)
+               regulator_put(gyro->regulator);
+       kfree(gyro->pdata);
+ err1:
+       kfree(gyro);
+ err0:
+       return err;
+ }
+ 
+ static int __devexit l3g4200d_remove(struct i2c_client *client)
+ {
+       struct l3g4200d_data *gyro = i2c_get_clientdata(client);
+ 
+       misc_deregister(&l3g4200d_misc_device);
+       l3g4200d_input_cleanup(gyro);
+       l3g4200d_disable(gyro);
+       if (gyro->regulator)
+               regulator_put(gyro->regulator);
+       free_irq(gyro->client->irq, gyro);
+       kfree(gyro->pdata);
+       kfree(gyro);
+ 
+       return 0;
+ }
+ 
+ static int l3g4200d_resume(struct i2c_client *client)
+ {
+       struct l3g4200d_data *gyro = i2c_get_clientdata(client);
+ 
+       if (atomic_read(&gyro->enabled)) {
+               l3g4200d_device_suspend(gyro, 0);
+               l3g4200d_flush_gyro_data(gyro);
+               enable_irq(gyro->client->irq);
+       }
+       return 0;
+ }
+ 
+ static int l3g4200d_suspend(struct i2c_client *client, pm_message_t mesg)
+ {
+       struct l3g4200d_data *gyro = i2c_get_clientdata(client);
+ 
+       if (atomic_read(&gyro->enabled)) {
+               disable_irq(gyro->client->irq);
+               l3g4200d_device_suspend(gyro, 1);
+       }
+       return 0;
+ }
+ 
+ static const struct i2c_device_id l3g4200d_id[] = {
+       {L3G4200D_NAME, 0},
+       {},
+ };
+ 
+ MODULE_DEVICE_TABLE(i2c, l3g4200d_id);
+ 
+ static struct i2c_driver l3g4200d_driver = {
+       .driver = {
+                  .name = L3G4200D_NAME,
+                  },
+       .probe = l3g4200d_probe,
+       .remove = __devexit_p(l3g4200d_remove),
+       .resume = l3g4200d_resume,
+       .suspend = l3g4200d_suspend,
+       .id_table = l3g4200d_id,
+ };
+ 
+ static int __init l3g4200d_init(void)
+ {
+       pr_info("L3G4200D gyroscope driver\n");
+       return i2c_add_driver(&l3g4200d_driver);
+ }
+ 
+ static void __exit l3g4200d_exit(void)
+ {
+       i2c_del_driver(&l3g4200d_driver);
+       return;
+ }
+ 
+ module_init(l3g4200d_init);
+ module_exit(l3g4200d_exit);
+ 
+ MODULE_DESCRIPTION("l3g4200d gyroscope driver");
+ MODULE_AUTHOR("Motorola Mobility");
+ MODULE_LICENSE("GPL");
diff --cc drivers/mmc/core/bus.c

index bdb165f93046f9cdce780a614ddafcc41f3cab91,7cd9749dc21dafd6bd4e280bd903129952f23a17..7cd9749dc21dafd6bd4e280bd903129952f23a17

mode 100755,100644..100755
--- 1/drivers/mmc/core/bus.c
--- 2/drivers/mmc/core/bus.c
+++ b/drivers/mmc/core/bus.c
diff --cc drivers/mmc/core/sd.c

index 10b2a4d20f5a1a6b270592d6b048514126bda96a,7ab8fdc61c77e8d6c72ada528ad18701c4872484..7ab8fdc61c77e8d6c72ada528ad18701c4872484

mode 100755,100644..100755
--- 1/drivers/mmc/core/sd.c
--- 2/drivers/mmc/core/sd.c
+++ b/drivers/mmc/core/sd.c
diff --cc drivers/mmc/host/Kconfig
Simple merge
diff --cc drivers/mmc/host/Makefile
Simple merge
diff --cc drivers/mtd/Kconfig
Simple merge
diff --cc drivers/mtd/Makefile
Simple merge
diff --cc drivers/mtd/mtd_blkdevs.c

index 4c1ded5a9ce727c14575dadfe618c8753c0bf141,62e68707b07f49a6f07a8f97a7333880f9d7f1db..121075fd84a04dbe57faa340bdbe352602f204aa

mode 100755,100644..100755
--- 1/drivers/mtd/mtd_blkdevs.c
--- 2/drivers/mtd/mtd_blkdevs.c
+++ b/drivers/mtd/mtd_blkdevs.c
@@@ -71,20 -100,20 +115,20 @@@ static int do_blktrans_request(struct m
   
         switch(rq_data_dir(req)) {
         case READ:
- -              for (; nsect > 0; nsect--, block++, buf += tr->blksize)
- -                      if (tr->readsect(dev, block, buf))
+ +              //for (; nsect > 0; nsect--, block++, buf += tr->blksize)
+ +                      if (tr->readsect(dev, block,nsect, buf))
                                 return -EIO;
+               rq_flush_dcache_pages(req);
                 return 0;
- 
         case WRITE:
                 if (!tr->writesect)
                         return -EIO;
   
- -              for (; nsect > 0; nsect--, block++, buf += tr->blksize)
- -                      if (tr->writesect(dev, block, buf))
+               rq_flush_dcache_pages(req);
+ +              //for (; nsect > 0; nsect--, block++, buf += tr->blksize)
+ +                      if (tr->writesect(dev, block,nsect, buf))
                                 return -EIO;
                 return 0;
- 
         default:
                 printk(KERN_NOTICE "Unknown request %u\n", rq_data_dir(req));
                 return -EIO;
@@@ -290,14 -367,35 +382,38 @@@ int add_mtd_blktrans_dev(struct mtd_blk
                 snprintf(gd->disk_name, sizeof(gd->disk_name),
                          "%s%d", tr->name, new->devnum);
   
- -      set_capacity(gd, (new->size * tr->blksize) >> 9);
+ +      /* 2.5 has capacity in units of 512 bytes while still
+ +         having BLOCK_SIZE_BITS set to 10. Just to keep us amused. */
+ +      //set_capacity(gd, (new->size * tr->blksize) >> 9);
+ +      set_capacity(gd, (new->size >> 9) * tr->blksize);   //modify by zyf for cap>=4GB 20110120
   
-       gd->private_data = new;
-       new->blkcore_priv = gd;
-       gd->queue = tr->blkcore_priv->rq;
+       /* Create the request queue */
+       spin_lock_init(&new->queue_lock);
+       new->rq = blk_init_queue(mtd_blktrans_request, &new->queue_lock);
+ 
+       if (!new->rq)
+               goto error3;
+ 
+       new->rq->queuedata = new;
+       blk_queue_logical_block_size(new->rq, tr->blksize);
+ 
+       if (tr->discard)
+               queue_flag_set_unlocked(QUEUE_FLAG_DISCARD,
+                                       new->rq);
+ 
+       gd->queue = new->rq;
+ 
+       __get_mtd_device(new->mtd);
+       __module_get(tr->owner);
+ 
+       /* Create processing thread */
+       /* TODO: workqueue ? */
+       new->thread = kthread_run(mtd_blktrans_thread, new,
+                       "%s%d", tr->name, new->mtd->index);
+       if (IS_ERR(new->thread)) {
+               ret = PTR_ERR(new->thread);
+               goto error4;
+       }
         gd->driverfs_dev = &new->mtd->dev;
   
         if (new->readonly)
diff --cc drivers/mtd/mtdblock.c

index e9051b4f39c103b30c6f3831fe5edbd6424e6593,1e74ad961040ddc72a7855ee6bc13296873316f6..cebcc436f17016063d5040d86dec0a2a03e76155

mode 100755,100644..100755
--- 1/drivers/mtd/mtdblock.c
--- 2/drivers/mtd/mtdblock.c
+++ b/drivers/mtd/mtdblock.c
@@@ -13,6 -28,6 +28,7 @@@
   #include <linux/slab.h>
   #include <linux/types.h>
   #include <linux/vmalloc.h>
++#include <linux/version.h>
   
   #include <linux/mtd/mtd.h>
   #include <linux/mtd/blktrans.h>
@@@ -124,11 -139,11 +140,11 @@@ static int write_cached_data (struct mt
         return 0;
   }
   
- -
- -static int do_cached_write (struct mtdblk_dev *mtdblk, unsigned long pos,
+ +#if 0
+ +static int do_cached_write (struct mtdblk_dev *mtdblk, loff_t pos,
                             int len, const char *buf)
   {
-       struct mtd_info *mtd = mtdblk->mtd;
+       struct mtd_info *mtd = mtdblk->mbd.mtd;
         unsigned int sect_size = mtdblk->cache_size;
         size_t retlen;
         int ret;
@@@ -195,10 -210,10 +211,10 @@@
   }
   
   
- -static int do_cached_read (struct mtdblk_dev *mtdblk, unsigned long pos,
+ +static int do_cached_read (struct mtdblk_dev *mtdblk, loff_t pos,
                            int len, char *buf)
   {
-       struct mtd_info *mtd = mtdblk->mtd;
+       struct mtd_info *mtd = mtdblk->mbd.mtd;
         unsigned int sect_size = mtdblk->cache_size;
         size_t retlen;
         int ret;
@@@ -242,18 -257,18 +258,18 @@@
   }
   
   static int mtdblock_readsect(struct mtd_blktrans_dev *dev,
- -                            unsigned long block, char *buf)
+ +                            loff_t block,unsigned long nsect, char *buf)
   {
-       struct mtdblk_dev *mtdblk = mtdblks[dev->devnum];
+       struct mtdblk_dev *mtdblk = container_of(dev, struct mtdblk_dev, mbd);
- -      return do_cached_read(mtdblk, block<<9, 512, buf);
+ +      return do_cached_read(mtdblk, (loff_t)block<<9, 512*nsect, buf);
   }
   
   static int mtdblock_writesect(struct mtd_blktrans_dev *dev,
- -                            unsigned long block, char *buf)
+ +                            unsigned long block,unsigned long nsect, char *buf)
   {
-       struct mtdblk_dev *mtdblk = mtdblks[dev->devnum];
+       struct mtdblk_dev *mtdblk = container_of(dev, struct mtdblk_dev, mbd);
         if (unlikely(!mtdblk->cache_data && mtdblk->cache_size)) {
-               mtdblk->cache_data = vmalloc(mtdblk->mtd->erasesize);
+               mtdblk->cache_data = vmalloc(mtdblk->mbd.mtd->erasesize);
                 if (!mtdblk->cache_data)
                         return -EINTR;
                 /* -EINTR is not really correct, but it is the best match
@@@ -261,40 -276,12 +277,48 @@@
                  * return -EAGAIN sometimes, but why bother?
                  */
         }
- -      return do_cached_write(mtdblk, block<<9, 512, buf);
+ +      return do_cached_write(mtdblk, (loff_t)block<<9, 512*nsect, buf);
+ +}
+ +#else
+ +static int mtdblock_readsect(struct mtd_blktrans_dev *dev,
+ +                            unsigned long block,unsigned long nsect, char *buf)
+ +{
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35))
++      struct mtdblk_dev *mtdblk = container_of(dev, struct mtdblk_dev, mbd);
++      struct mtd_info *mtd = mtdblk->mbd.mtd;
++#else
+ +      struct mtdblk_dev *mtdblk = mtdblks[dev->devnum];
+ +      struct mtd_info *mtd = mtdblk->mtd;
++#endif
+ +      size_t retlen,len;
+ +      loff_t pos = (loff_t)block*512;
+ +    len = 512*nsect;
+ +
+ +      DEBUG(MTD_DEBUG_LEVEL2, "mtdblock: read on \"%s\" at 0x%llx, size 0x%x\n",mtd->name, pos, len);
+ +      return mtd->read(mtd, pos, len, &retlen, buf);
   }
   
+ +static int mtdblock_writesect(struct mtd_blktrans_dev *dev,
+ +                            unsigned long block,unsigned long nsect, char *buf)
+ +{
++#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 35))
++      struct mtdblk_dev *mtdblk = container_of(dev, struct mtdblk_dev, mbd);
++      struct mtd_info *mtd = mtdblk->mbd.mtd;
++#else
+ +      struct mtdblk_dev *mtdblk = mtdblks[dev->devnum];
+ +      struct mtd_info *mtd = mtdblk->mtd;
++#endif
+ +      size_t retlen,len;
+ +      loff_t pos = (loff_t)block*512;
+ +    len = 512*nsect;
+ +    
+ +      DEBUG(MTD_DEBUG_LEVEL2, "mtdblock: write on \"%s\" at 0x%llx, size 0x%x\n",mtd->name, pos, len);
+ +    return mtd->write(mtd, pos, len, &retlen, buf);
+ +}
+ +#endif
   static int mtdblock_open(struct mtd_blktrans_dev *mbd)
   {
-       struct mtdblk_dev *mtdblk;
-       struct mtd_info *mtd = mbd->mtd;
-       int dev = mbd->devnum;
+       struct mtdblk_dev *mtdblk = container_of(mbd, struct mtdblk_dev, mbd);
   
         DEBUG(MTD_DEBUG_LEVEL1,"mtdblock_open\n");
   
diff --cc drivers/mtd/mtdblock_ro.c
Simple merge
diff --cc drivers/mtd/nand/Kconfig

index 60ca338dae564c391e1f534c0fe2946e93ef3092,b3fc1df9e27867b8b206fae2214ab87141a9661f..f9d35ac42d186ef42449b41a59b95caa3d18eba0
--- 1/drivers/mtd/nand/Kconfig
--- 2/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@@ -352,19 -395,11 +395,17 @@@ config MTD_NAND_ATMEL_ECC_NON
   
           If unsure, say N
   
-         endchoice
- 
   endchoice
   
+ +config MTD_NAND_RK29
+ +        tristate "NAND Flash support for RK29sdk"
+ +        depends on ARCH_RK29
+ +        help
+ +          This enables the NAND flash controller on the RK29 SoC
+ +          
   config MTD_NAND_PXA3xx
         tristate "Support for NAND flash devices on PXA3xx"
-       depends on MTD_NAND && PXA3xx
+       depends on PXA3xx || ARCH_MMP
         help
           This enables the driver for the NAND flash device found on
           PXA3xx processors
diff --cc drivers/mtd/nand/Makefile

index e107371e06ecae85777a0a3afc44dc65ca5409ff,ac83dcdac5d6182048e2279d24659126cd903a72..44fb6b14af43a1bf5b61d279fa080cc5bf14994b
--- 1/drivers/mtd/nand/Makefile
--- 2/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@@ -40,7 -41,11 +41,12 @@@ obj-$(CONFIG_MTD_NAND_SH_FLCTL)             += sh_
   obj-$(CONFIG_MTD_NAND_MXC)            += mxc_nand.o
   obj-$(CONFIG_MTD_NAND_SOCRATES)               += socrates_nand.o
   obj-$(CONFIG_MTD_NAND_TXX9NDFMC)      += txx9ndfmc.o
- obj-$(CONFIG_MTD_NAND_W90P910)                += w90p910_nand.o
+ obj-$(CONFIG_MTD_NAND_NUC900)         += nuc900_nand.o
   obj-$(CONFIG_MTD_NAND_NOMADIK)                += nomadik_nand.o
+ +obj-$(CONFIG_MTD_NAND_RK29)           += rk29_nand.o
+ obj-$(CONFIG_MTD_NAND_BCM_UMI)                += bcm_umi_nand.o nand_bcm_umi.o
+ obj-$(CONFIG_MTD_NAND_MPC5121_NFC)    += mpc5121_nfc.o
+ obj-$(CONFIG_MTD_NAND_RICOH)          += r852.o
+ obj-$(CONFIG_MTD_NAND_JZ4740)         += jz4740_nand.o
+ 
   nand-objs := nand_base.o nand_bbt.o
diff --cc drivers/mtd/nand/nand_base.c
Simple merge
diff --cc drivers/mtd/nand/nand_bbt.c
Simple merge
diff --cc drivers/net/Kconfig

index 62a8b26b285c440c254cdeb70f3414cbfc7bcd89,be5c811ed9d848fced64cb9327b436b2691ae5c8..2c945d17ac5f3a353260624c8546d0bd24bbaaec

mode 100755,100644..100755
--- 1/drivers/net/Kconfig
--- 2/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
diff --cc drivers/net/Makefile
Simple merge
diff --cc drivers/net/dm9000.c

index 52cbc2f95608369767b87af6b79096175d485591,4fd6b2b4554b18e0072048bd2f018b5497072b89..c053e742562d7478ee056c4dbe5e550d1ccc72f1

mode 100755,100644..100755
--- 1/drivers/net/dm9000.c
--- 2/drivers/net/dm9000.c
+++ b/drivers/net/dm9000.c
diff --cc drivers/net/enc28j60.c
Simple merge
diff --cc drivers/net/irda/Kconfig

index a5db500c314698069958f6c75b16ad6a32501c1d,25bb2a015e18e6a470ace112909010c29b5420c1..eedfaa7ad53580142786063e3b15e81743f7f49a

mode 100755,100644..100755
--- 1/drivers/net/irda/Kconfig
--- 2/drivers/net/irda/Kconfig
+++ b/drivers/net/irda/Kconfig
@@@ -387,28 -397,11 +397,34 @@@ config MCS_FI
           To compile it as a module, choose M here: the module will be called
           mcs7780.
   
-     depends on RK_IRDA
-       prompt  "irda module select"
+ +config RK_IRDA
+ +      tristate "rockchip rk29 IrDA"
+ +      depends on IRDA && RK29_SMC
+ +      help
+ +        Say Y or M here if you want to build support for the rk29
+ +        built-in IRDA interface which can support both SIR, MIR and FIR.
+ +
+ +choice
+ +      depends on RK_IRDA
+ +      prompt "irda device driver"
+ +config RK_IRDA_UART
+ +      bool "uses irda as a serial device"
+ +config RK_IRDA_NET
+ +      bool "uses irda as a network device"
+ +endchoice
+ +
+ +choice
++      depends on RK_IRDA
++      prompt "irda module select"
+ +config BU92725GUW
+ +      bool "bu92725guw"
+ +endchoice
+ +
+ config SH_IRDA
+       tristate "SuperH IrDA driver"
+       depends on IRDA && ARCH_SHMOBILE
+       help
+         Say Y here if your want to enable SuperH IrDA devices.
+ 
   endmenu
   
diff --cc drivers/net/irda/Makefile

index 7ee600f246338da5e925a0bf77543b1afd227b83,dfc64537f62f939f537fe012382d562978348c6c..b7e48ca8bfe12daceed5308ef002349f20e94cbb

mode 100755,100644..100755
--- 1/drivers/net/irda/Makefile
--- 2/drivers/net/irda/Makefile
+++ b/drivers/net/irda/Makefile
diff --cc drivers/net/usb/Kconfig

index fe9cb598a8182d5c9c25a47e8ec50406d365d4de,8a210d9a68292241beffec55a61a6b714f6daee5..14b9e1d4fa9de4c2178a1781e705ae32748cb949
--- 1/drivers/net/usb/Kconfig
--- 2/drivers/net/usb/Kconfig
+++ b/drivers/net/usb/Kconfig
@@@ -203,25 -203,15 +203,33 @@@ config USB_NET_DM960
         help
           This option adds support for Davicom DM9601 based USB 1.1
           10/100 Ethernet adapters.
+ +
+ +config USB_NET_DM9620
+ +      tristate "Davicom DM9620 based USB 1.1 10/100 ethernet devices"
+ +      depends on USB_USBNET
+ +      select CRC32
+ +      default y
+ +      help
+ +        This option adds support for Davicom DM9620 based USB 1.1
+ +        10/100 Ethernet adapters.
+ +
+ +config USB_NET_SR9700
+ +      tristate "WilLing Electrnic SR9700 based USB 2.0"
+ +      depends on USB_USBNET
+ +      select CRC32
+ +      default y
+ +      help
+ +        This option adds support for Davicom SR9700 based USB 2.0
+ +        10/100 Ethernet adapters.
   
+ config USB_NET_SMSC75XX
+       tristate "SMSC LAN75XX based USB 2.0 gigabit ethernet devices"
+       depends on USB_USBNET
+       select CRC32
+       help
+         This option adds support for SMSC LAN95XX based USB 2.0
+         Gigabit Ethernet adapters.
+ 
   config USB_NET_SMSC95XX
         tristate "SMSC LAN95XX based USB 2.0 10/100 ethernet devices"
         depends on USB_USBNET
diff --cc drivers/net/usb/Makefile

index 3fc82746ff84f6bc944ec7c499d78485c338003b,f3f702f55de7d1c6c7153ce6bc64f8544705dd6e..b7c3d05c585f0fbeb69479cd7fc8a9cd8ec04dd7
--- 1/drivers/net/usb/Makefile
--- 2/drivers/net/usb/Makefile
+++ b/drivers/net/usb/Makefile
@@@ -11,8 -11,7 +11,9 @@@ obj-$(CONFIG_USB_NET_AX8817X) += asix_n
   obj-$(CONFIG_USB_NET_CDCETHER)        += cdc_ether.o
   obj-$(CONFIG_USB_NET_CDC_EEM) += cdc_eem.o
   obj-$(CONFIG_USB_NET_DM9601)  += dm9601.o
+ +obj-$(CONFIG_USB_NET_DM9620)  += dm9620.o
+ +obj-$(CONFIG_USB_NET_SR9700)  += sr9700.o
+ obj-$(CONFIG_USB_NET_SMSC75XX)        += smsc75xx.o
   obj-$(CONFIG_USB_NET_SMSC95XX)        += smsc95xx.o
   obj-$(CONFIG_USB_NET_GL620A)  += gl620a.o
   obj-$(CONFIG_USB_NET_NET1080) += net1080.o
diff --cc drivers/net/wireless/Kconfig
Simple merge
diff --cc drivers/net/wireless/Makefile

index 54e657e55e006a7b5c3cd12cc13c07ef8f8714d0,06cf827833cf9fec8fe1aa446fe03c1ccdcab9a6..2e01e61c8b4187fa1000b7c76578a4097889a1e4
--- 1/drivers/net/wireless/Makefile
--- 2/drivers/net/wireless/Makefile
+++ b/drivers/net/wireless/Makefile
@@@ -2,7 -2,55 +2,7 @@@
   # Makefile for the Linux Wireless network device drivers.
   #
   
- -obj-$(CONFIG_IPW2100) += ipw2x00/
- -obj-$(CONFIG_IPW2200) += ipw2x00/
- -
- -obj-$(CONFIG_HERMES)          += orinoco/
- -
- -obj-$(CONFIG_AIRO)            += airo.o
- -obj-$(CONFIG_AIRO_CS)         += airo_cs.o airo.o
- -
- -obj-$(CONFIG_ATMEL)             += atmel.o
- -obj-$(CONFIG_PCI_ATMEL)         += atmel_pci.o 
- -obj-$(CONFIG_PCMCIA_ATMEL)      += atmel_cs.o
- -
- -obj-$(CONFIG_AT76C50X_USB)      += at76c50x-usb.o
- -
- -obj-$(CONFIG_PRISM54)         += prism54/
- -
- -obj-$(CONFIG_HOSTAP)          += hostap/
- -obj-$(CONFIG_B43)             += b43/
- -obj-$(CONFIG_B43LEGACY)               += b43legacy/
- -obj-$(CONFIG_ZD1211RW)                += zd1211rw/
- -obj-$(CONFIG_RTL8180)         += rtl818x/
- -obj-$(CONFIG_RTL8187)         += rtl818x/
- -
- -# 16-bit wireless PCMCIA client drivers
- -obj-$(CONFIG_PCMCIA_RAYCS)    += ray_cs.o
- -obj-$(CONFIG_PCMCIA_WL3501)   += wl3501_cs.o
- -
- -obj-$(CONFIG_USB_NET_RNDIS_WLAN)      += rndis_wlan.o
- -
- -obj-$(CONFIG_USB_ZD1201)      += zd1201.o
- -obj-$(CONFIG_LIBERTAS)                += libertas/
- -
- -obj-$(CONFIG_LIBERTAS_THINFIRM)       += libertas_tf/
- -
- -obj-$(CONFIG_ADM8211) += adm8211.o
- -
- -obj-$(CONFIG_MWL8K)   += mwl8k.o
- -
- -obj-$(CONFIG_IWLWIFI) += iwlwifi/
- -obj-$(CONFIG_RT2X00)  += rt2x00/
- -
- -obj-$(CONFIG_P54_COMMON)      += p54/
- -
- -obj-$(CONFIG_ATH_COMMON)      += ath/
- -
- -obj-$(CONFIG_MAC80211_HWSIM)  += mac80211_hwsim.o
- -
- -obj-$(CONFIG_WL12XX)  += wl12xx/
- -
- -obj-$(CONFIG_IWM)     += iwmc3200wifi/
- -
- -obj-$(CONFIG_BCM4329) += bcm4329/
+ +obj-$(CONFIG_BCM4329)   += bcm4329/
- obj-$(CONFIG_MV8686)   += mv8686/
++obj-$(CONFIG_MV8686)    += mv8686/
+ +obj-$(CONFIG_BCM4319)   += bcm4319/
+ +#obj-m        += wlan/
diff --cc drivers/power/Kconfig

index 63116854b6529b037c75ca7a2d2d7a3962bc0f3f,68caa517b41e7fe8491673412f69d0df289ee2a1..8aeff33f3f275b400eccf058d75e32082a6f4de8
--- 1/drivers/power/Kconfig
--- 2/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@@ -130,46 -160,22 +174,65 @@@ config CHARGER_PCF5063
         help
          Say Y to include support for NXP PCF50633 Main Battery Charger.
   
+ +config BATTERY_STC3100
+ +      tristate "STC3100 battery driver"
+ +      depends on I2C && ARCH_RK29
+ +      help
+ +        Say Y here to enable support for batteries with STC3100(I2C) chip.
+ +
+ +config BATTERY_BQ27510
+ +      tristate "BQ27510 battery driver"
+ +      select I2C_DEV_RK29
+ +      depends on I2C && ARCH_RK29
+ +      help
+ +        Say Y here to enable support for batteries with BQ27510(I2C) chip.
++
+ +config BATTERY_BQ27541
+ +      tristate "BQ27541 battery driver"
+ +      select I2C_DEV_RK29
+ +      depends on I2C && ARCH_RK29
+ +      help
+ +        Say Y here to enable support for batteries with BQ27541(I2C) chip.
+ +      
+ +config BATTERY_BQ3060
+ +      tristate "BQ3060 battery driver"
+ +      depends on I2C && ARCH_RK29
+ +      help
+ +        Say Y here to enable support for batteries with BQ3060(I2C) chip.  
+ +
+ +config CHECK_BATT_CAPACITY
+ +      tristate "check the capacity in BQ27510 battery if 1000mah write capacity for BATT_CAPACITY_MAH"
+ +      depends on BATTERY_BQ27510 || BATTERY_BQ3060
+ +      default n
+ +
+ +config BATT_CAPACITY_MAH
+ +      depends on CHECK_BATT_CAPACITY
+ +      int "battery capacity (in mah)"
+ +      default 2200
+ +
+ +config NO_BATTERY_IC
+ +      tristate "no BQ27510 battery ic in board"
+ +      depends on BATTERY_BQ27510 || BATTERY_BQ3060 
+ +      default n
+ +      help
+ +        Say no BQ27510(I2C) chip in board .
+ +
+ config BATTERY_JZ4740
+       tristate "Ingenic JZ4740 battery"
+       depends on MACH_JZ4740
+       depends on MFD_JZ4740_ADC
+       help
+         Say Y to enable support for the battery on Ingenic JZ4740 based
+         boards.
+ 
+         This driver can be build as a module. If so, the module will be
+         called jz4740-battery.
+ 
+ config BATTERY_INTEL_MID
+       tristate "Battery driver for Intel MID platforms"
+       depends on INTEL_SCU_IPC && SPI
+       help
+         Say Y here to enable the battery driver on Intel MID
+         platforms.
+ 
   endif # POWER_SUPPLY
diff --cc drivers/power/Makefile

index 4e8b1a59a99f8b7a31fb99500e6697b3f01fd8d8,d5dee79b117d4165d67e22e4fc2388fe9f18325c..70184898195e7ca24ec55d417afbed2fc1784696
--- 1/drivers/power/Makefile
--- 2/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@@ -16,12 -16,14 +16,15 @@@ obj-$(CONFIG_POWER_SUPPLY) += power_sup
   
   obj-$(CONFIG_PDA_POWER)               += pda_power.o
   obj-$(CONFIG_APM_POWER)               += apm_power.o
+ obj-$(CONFIG_MAX8925_POWER)   += max8925_power.o
   obj-$(CONFIG_WM831X_BACKUP)   += wm831x_backup.o
   obj-$(CONFIG_WM831X_POWER)    += wm831x_power.o
- obj-$(CONFIG_WM8350_POWER)    += wm8350_power.o
+ +obj-$(CONFIG_WM831X_CHARGER_DISPLAY)  += wm831x_charger_display.o
+ obj-$(CONFIG_WM8350_POWER)    += wm8350_power.o
+ obj-$(CONFIG_TEST_POWER)      += test_power.o
   
   obj-$(CONFIG_BATTERY_DS2760)  += ds2760_battery.o
+ obj-$(CONFIG_BATTERY_DS2781)  += ds2781_battery.o
   obj-$(CONFIG_BATTERY_DS2782)  += ds2782_battery.o
   obj-$(CONFIG_BATTERY_PMU)     += pmu_battery.o
   obj-$(CONFIG_BATTERY_OLPC)    += olpc_battery.o
@@@ -30,8 -34,8 +35,12 @@@ obj-$(CONFIG_CHARGER_BQ24617)        += bq2461
   obj-$(CONFIG_BATTERY_BQ27x00) += bq27x00_battery.o
   obj-$(CONFIG_BATTERY_DA9030)  += da9030_battery.o
   obj-$(CONFIG_BATTERY_MAX17040)        += max17040_battery.o
+ obj-$(CONFIG_BATTERY_Z2)      += z2_battery.o
+ obj-$(CONFIG_BATTERY_S3C_ADC) += s3c_adc_battery.o
   obj-$(CONFIG_CHARGER_PCF50633)        += pcf50633-charger.o
- obj-$(CONFIG_BATTERY_BQ3060)   += bq3060_battery.o
+ +obj-$(CONFIG_BATTERY_STC3100) += stc3100_battery.o
+ +obj-$(CONFIG_BATTERY_BQ27510) += bq27510_battery.o
+ +obj-$(CONFIG_BATTERY_BQ27541) += bq27541_battery.o
++obj-$(CONFIG_BATTERY_BQ3060)  += bq3060_battery.o
+ obj-$(CONFIG_BATTERY_JZ4740)  += jz4740-battery.o
+ obj-$(CONFIG_BATTERY_INTEL_MID)       += intel_mid_battery.o
diff --cc drivers/power/wm831x_power.c

index 4b19d339da980d9c16a298968225f45b327cc6ae,fbcc36dae470472fd685228ea261a349e664d145..dfaa66cac7e5834f092e83009debd7279e4064b3

mode 100755,100644..100755
--- 1/drivers/power/wm831x_power.c
--- 2/drivers/power/wm831x_power.c
+++ b/drivers/power/wm831x_power.c
diff --cc drivers/regulator/Kconfig

index b78010ca3c6bf7466f648d7d21a5feff27d7c1a9,d520bc0fd23a44488d62382878c47c97d8599875..eb8fef7fecd62f71f408a192e1a9fb84462d6eec
--- 1/drivers/regulator/Kconfig
--- 2/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@@ -76,21 -115,6 +115,13 @@@ config REGULATOR_TWL403
           This driver supports the voltage regulators provided by
           this family of companion chips.
   
- #add by qjb
- config REGULATOR_WM8994
-       tristate "Wolfson Microelectronics WM8994 CODEC"
-       depends on MFD_WM8994
-       help
-         This driver provides support for the voltage regulators on the
-         WM8994 CODEC.
-                 
+ +config REGULATOR_TPS65910
+ +      bool "TI TPS69510x PMIC"
+ +      depends on TPS65910_CORE
+ +      help
+ +        This driver supports the voltage regulators provided by
+ +        this family of companion chips.
+ +        
   config REGULATOR_WM831X
         tristate "Wolfson Microelcronics WM831x PMIC regulators"
         depends on MFD_WM831X
@@@ -171,19 -202,44 +209,60 @@@ config REGULATOR_TPS6507
           This driver supports TPS6507X voltage regulator chips. TPS6507X provides
           three step-down converters and two general-purpose LDO voltage regulators.
           It supports TI's software based Class-2 SmartReflex implementation.
+ 
+ +config RK2818_REGULATOR_CHARGE
+ +      tristate "rk2818 Charger IC"
+ +      help
+ +        Say Y to enable support for the current regulators charge on the RK2818.
+ +
+ +config RK2818_REGULATOR_LP8725
+ +      tristate "rk2818 pmic lp8725"
+ +      depends on I2C
+ +      help
+ +        Say Y to enable support for the voltage regulators pmic lp8725 on the RK2818.
++
+ +config RK29_PWM_REGULATOR
+ +      tristate "rk2918 pwm voltage regulator"
+ +      help
+ +        Say Y to enable support for the voltage regulators charge on the RK2918.
++
+ config REGULATOR_88PM8607
+       bool "Marvell 88PM8607 Power regulators"
+       depends on MFD_88PM860X=y
+       help
+         This driver supports 88PM8607 voltage regulator chips.
+ 
+ config REGULATOR_ISL6271A
+       tristate "Intersil ISL6271A Power regulator"
+       depends on I2C
+       help
+         This driver supports ISL6271A voltage regulator chip.
+ 
+ config REGULATOR_AD5398
+       tristate "Analog Devices AD5398/AD5821 regulators"
+       depends on I2C
+       help
+         This driver supports AD5398 and AD5821 current regulator chips.
+         If building into module, its name is ad5398.ko.
+ 
+ config REGULATOR_AB8500
+       bool "ST-Ericsson AB8500 Power Regulators"
+       depends on AB8500_CORE
+       help
+         This driver supports the regulators found on the ST-Ericsson mixed
+         signal AB8500 PMIC
+ 
+ config REGULATOR_TPS6586X
+       tristate "TI TPS6586X Power regulators"
+       depends on MFD_TPS6586X
+       help
+         This driver supports TPS6586X voltage regulator chips.
+ 
+ config REGULATOR_CPCAP
+       tristate "CPCAP regulator driver"
+       depends on MFD_CPCAP
+       help
+         Say Y here to support the voltage regulators on CPCAP
+ 
   endif
   
diff --cc drivers/regulator/Makefile

index e8bf0fa9945ec93a3cf0e80b9df7398f74945486,085384e7e27ef042cc2dc613b027b719cc63c298..3e61254569c4baae1733cd8fc26bfd6eea39b882
--- 1/drivers/regulator/Makefile
--- 2/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@@ -18,18 -23,19 +23,24 @@@ obj-$(CONFIG_REGULATOR_WM831X) += wm831
   obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o
   obj-$(CONFIG_REGULATOR_WM8350) += wm8350-regulator.o
   obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o
+ obj-$(CONFIG_REGULATOR_WM8994) += wm8994-regulator.o
+ obj-$(CONFIG_REGULATOR_TPS6586X) += tps6586x-regulator.o
++obj-$(CONFIG_REGULATOR_TPS65910) += tps65910-regulator.o
   obj-$(CONFIG_REGULATOR_DA903X)        += da903x.o
   obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o
   obj-$(CONFIG_REGULATOR_PCAP) += pcap-regulator.o
- obj-$(CONFIG_REGULATOR_MC13783) += mc13783.o
+ obj-$(CONFIG_REGULATOR_MC13783) += mc13783-regulator.o
   obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o
+ +obj-$(CONFIG_RK2818_REGULATOR_LP8725) += rk2818_lp8725.o
+ +obj-$(CONFIG_RK2818_REGULATOR_CHARGE) += charge-regulator.o
+ +obj-$(CONFIG_RK29_PWM_REGULATOR) += rk29-pwm-regulator.o
+ +
+ obj-$(CONFIG_REGULATOR_CPCAP) += cpcap-regulator.o
+ 
   obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o
   obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o
- #add by qjb
- obj-$(CONFIG_REGULATOR_WM8994) += wm8994-regulator.o
+ obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o
+ obj-$(CONFIG_REGULATOR_ISL6271A) += isl6271a-regulator.o
+ obj-$(CONFIG_REGULATOR_AB8500)        += ab8500.o
   
   ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --cc drivers/regulator/core.c

index 366363262e467bb83a72f0741a5374bdf857cd12,cc8b337b9119de5e955aabe1935ad931a895c71a..61855ef1ae5ea22d8dcef3ff391afc522ee786da

mode 100755,100644..100755
--- 1/drivers/regulator/core.c
--- 2/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
diff --cc drivers/regulator/wm8994-regulator.c
Simple merge
diff --cc drivers/rtc/Kconfig

index 8f9960b6c4dacec01b8d67a44ebf5d56843edeeb,9c9228fbab6113306f0679bea47f6e76b4ef8b5e..8ffe3f7010357364a7636725a2a5ca5f0469c5b7

mode 100755,100644..100755
--- 1/drivers/rtc/Kconfig
--- 2/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@@ -277,18 -332,11 +347,18 @@@ config RTC_DRV_TWL403
         depends on RTC_CLASS && TWL4030_CORE
         help
           If you say yes here you get support for the RTC on the
-         TWL4030 family chips, used mostly with OMAP3 platforms.
+         TWL4030/TWL5030/TWL6030 family chips, used mostly with OMAP3 platforms.
   
           This driver can also be built as a module. If so, the module
-         will be called rtc-twl4030.
+         will be called rtc-twl.
   
+ +config RTC_DRV_TPS65910
+ +      boolean "TI TPS65910"
+ +      depends on RTC_CLASS && TPS65910_CORE
+ +      help
+ +        If you say yes here you get support for the RTC on the
+ +        TPS65910 family chips, used mostly with OMAP3/AM35xx platforms.
+ +
   config RTC_DRV_S35390A
         tristate "Seiko Instruments S-35390A"
         select BITREVERSE
diff --cc drivers/rtc/Makefile

index 92af953916ea78d345ee09d0ed81e81ea48a8084,1849ff0b5963ab0ed9ec7bba6c56250de58bdab3..55a71df8aec59a10019d81a7af001e96289504dd

mode 100755,100644..100755
--- 1/drivers/rtc/Makefile
--- 2/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@@ -79,14 -93,12 +94,15 @@@ obj-$(CONFIG_RTC_DRV_STK17TA8)     += rtc-s
   obj-$(CONFIG_RTC_DRV_STMP)    += rtc-stmp3xxx.o
   obj-$(CONFIG_RTC_DRV_SUN4V)   += rtc-sun4v.o
   obj-$(CONFIG_RTC_DRV_TEST)    += rtc-test.o
- obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl4030.o
+ obj-$(CONFIG_RTC_DRV_TPS6586X)        += rtc-tps6586x.o
+ +obj-$(CONFIG_RTC_DRV_TPS65910)        += rtc-tps65910.o
+ obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl.o
   obj-$(CONFIG_RTC_DRV_TX4939)  += rtc-tx4939.o
   obj-$(CONFIG_RTC_DRV_V3020)   += rtc-v3020.o
   obj-$(CONFIG_RTC_DRV_VR41XX)  += rtc-vr41xx.o
   obj-$(CONFIG_RTC_DRV_WM831X)  += rtc-wm831x.o
   obj-$(CONFIG_RTC_DRV_WM8350)  += rtc-wm8350.o
   obj-$(CONFIG_RTC_DRV_X1205)   += rtc-x1205.o
- 
+ +obj-$(CONFIG_RTC_HYM8563)     += rtc-HYM8563.o
+ +obj-$(CONFIG_RTC_M41T66)      += rtc-m41t66.o
+ obj-$(CONFIG_RTC_DRV_CPCAP)   += rtc-cpcap.o
diff --cc drivers/rtc/rtc-wm831x.c

index 4a55af6f8265d8fcbd336b31df35831ec419ff66,82931dc65c0bbc505460f4c3c1710accd3453723..9f87cbc0fb27eb6c51c72ba56790b9ceb4c15724

mode 100755,100644..100755
--- 1/drivers/rtc/rtc-wm831x.c
--- 2/drivers/rtc/rtc-wm831x.c
+++ b/drivers/rtc/rtc-wm831x.c
diff --cc drivers/serial/Kconfig

index 4a85306bfb2851d918cc6de5485dd0f72dc2001d,3053d8d8cd891212dbc642b2bac6f336c892b77c..cac32f31279003b5e19ba75a3ac2372db67c2a86

mode 100755,100644..100755
--- 1/drivers/serial/Kconfig
--- 2/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@@ -1477,66 -1554,69 +1554,131 @@@ config SERIAL_BCM63XX_CONSOL
           If you have enabled the serial port on the bcm63xx CPU
           you can make it the console by answering Y to this option.
   
+ +config SERIAL_RK29
+ +      bool "RockChip rk29 serial port support"
+ +      depends on ARM && ARCH_RK29
+ +      select SERIAL_CORE
+ +
+ +config SERIAL_RK29_STANDARD
+ +      bool "Use RockChip rk29 serial port support standard"
+ +      default y
+ +      depends on SERIAL_RK29
+ +
+ +config UART0_RK29
+ +      bool "RockChip rk29 serial port 0 support"
+ +      depends on SERIAL_RK29
+ +
+ +config UART0_CTS_RTS_RK29
+ +      bool "RockChip rk29 serial port 0 cts rts support"
+ +      depends on UART0_RK29
+ +      
+ +config UART0_DMA_RK29
+ +      bool "RockChip rk29 serial port 0 dma support (EXPERIMENTAL)"
+ +      depends on UART0_RK29 && SERIAL_RK29_STANDARD
+ +
+ +config UART1_RK29
+ +      bool "RockChip rk29 serial port 1 support"
+ +      depends on SERIAL_RK29
+ +      
+ +config UART2_RK29
+ +      bool "RockChip rk29 serial port 2 support"
+ +      depends on SERIAL_RK29
+ +      
+ +config UART2_CTS_RTS_RK29
+ +      bool "RockChip rk29 serial port 2 cts rts support"
+ +      depends on UART2_RK29
+ +
+ +config UART2_DMA_RK29
+ +      bool "RockChip rk29 serial port 2 dma support (EXPERIMENTAL)"
+ +      depends on UART2_RK29 && SERIAL_RK29_STANDARD
+ +      
+ +config UART3_RK29
+ +      bool "RockChip rk29 serial port 3 support"
+ +      depends on SERIAL_RK29
+ +
+ +config UART3_CTS_RTS_RK29
+ +      bool "RockChip rk29 serial port 3 cts rts support"
+ +      depends on UART3_RK29
+ +
+ +config UART3_DMA_RK29
+ +      bool "RockChip rk29 serial port 3 dma support (EXPERIMENTAL)"
+ +      depends on UART3_RK29 && SERIAL_RK29_STANDARD
+ +
+ +config SERIAL_RK29_CONSOLE
+ +      bool "Rockchip rk29 serial console support"
+ +      depends on SERIAL_RK29=y
+ +      select SERIAL_CORE_CONSOLE
+ +
+ +config SERIAL_SC8800
+ +      tristate "SC8800 support"
+ +      depends on SPI
+ +      select SERIAL_CORE
+ +      help
+ +        SC8800 spi-serial support     
+ + 
+ config SERIAL_GRLIB_GAISLER_APBUART
+       tristate "GRLIB APBUART serial support"
+       depends on OF
+       ---help---
+       Add support for the GRLIB APBUART serial port.
+ 
+ config SERIAL_GRLIB_GAISLER_APBUART_CONSOLE
+       bool "Console on GRLIB APBUART serial port"
+       depends on SERIAL_GRLIB_GAISLER_APBUART=y
+       select SERIAL_CORE_CONSOLE
+       help
+       Support for running a console on the GRLIB APBUART
+ 
+ config SERIAL_ALTERA_JTAGUART
+       tristate "Altera JTAG UART support"
+       select SERIAL_CORE
+       help
+         This driver supports the Altera JTAG UART port.
+ 
+ config SERIAL_ALTERA_JTAGUART_CONSOLE
+       bool "Altera JTAG UART console support"
+       depends on SERIAL_ALTERA_JTAGUART=y
+       select SERIAL_CORE_CONSOLE
+       help
+         Enable a Altera JTAG UART port to be the system console.
+ 
+ config SERIAL_ALTERA_JTAGUART_CONSOLE_BYPASS
+       bool "Bypass output when no connection"
+       depends on SERIAL_ALTERA_JTAGUART_CONSOLE
+       select SERIAL_CORE_CONSOLE
+       help
+         Bypass console output and keep going even if there is no
+         JTAG terminal connection with the host.
+ 
+ config SERIAL_ALTERA_UART
+       tristate "Altera UART support"
+       select SERIAL_CORE
+       help
+         This driver supports the Altera softcore UART port.
+ 
+ config SERIAL_ALTERA_UART_MAXPORTS
+       int "Maximum number of Altera UART ports"
+       depends on SERIAL_ALTERA_UART
+       default 4
+       help
+         This setting lets you define the maximum number of the Altera
+         UART ports. The usual default varies from board to board, and
+         this setting is a way of catering for that.
+ 
+ config SERIAL_ALTERA_UART_BAUDRATE
+       int "Default baudrate for Altera UART ports"
+       depends on SERIAL_ALTERA_UART
+       default 115200
+       help
+         This setting lets you define what the default baudrate is for the
+         Altera UART ports. The usual default varies from board to board,
+         and this setting is a way of catering for that.
+ 
+ config SERIAL_ALTERA_UART_CONSOLE
+       bool "Altera UART console support"
+       depends on SERIAL_ALTERA_UART=y
+       select SERIAL_CORE_CONSOLE
+       help
+         Enable a Altera UART port to be the system console.
+ 
   endmenu
diff --cc drivers/serial/Makefile

index 04c88bd3e6ad336a25e1d868d918cce495867859,f0faee6ec05a759e1174bcf7e9b775e926082570..8a29576027f022a2e6ce5c79cab25774eccd88bd

mode 100755,100644..100755
--- 1/drivers/serial/Makefile
--- 2/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@@ -80,10 -83,9 +83,15 @@@ obj-$(CONFIG_SERIAL_OF_PLATFORM_NWPSERI
   obj-$(CONFIG_SERIAL_KS8695) += serial_ks8695.o
   obj-$(CONFIG_KGDB_SERIAL_CONSOLE) += kgdboc.o
   obj-$(CONFIG_SERIAL_QE) += ucc_uart.o
+ +ifeq ($(CONFIG_SERIAL_RK29_STANDARD),y)
+ +obj-$(CONFIG_SERIAL_RK29) += rk_serial.o
+ +else
+ +obj-$(CONFIG_SERIAL_RK29) += rk29_serial.o
+ +endif
+ +obj-$(CONFIG_SERIAL_SC8800) += sc8800.o
   obj-$(CONFIG_SERIAL_TIMBERDALE)       += timbuart.o
+ obj-$(CONFIG_SERIAL_GRLIB_GAISLER_APBUART) += apbuart.o
+ obj-$(CONFIG_SERIAL_ALTERA_JTAGUART) += altera_jtaguart.o
+ obj-$(CONFIG_SERIAL_ALTERA_UART) += altera_uart.o
+ obj-$(CONFIG_SERIAL_MRST_MAX3110)     += mrst_max3110.o
+ obj-$(CONFIG_SERIAL_MFD_HSU)  += mfd.o
diff --cc drivers/spi/Kconfig

index 633c9f52300e631c0da3612eaa95d64e6cecf8b5,9fdb309defbb411d1ea6ed20ba046d3ef7606bd7..61b907b84e1ae051713d66db197a8f84c80c83c3

mode 100755,100644..100755
--- 1/drivers/spi/Kconfig
--- 2/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@@ -248,43 -348,19 +348,56 @@@ config SPI_NUC90
   # Add new SPI master controllers in alphabetical order above this line
   #
   
+ +config SPIM_RK29
+ +      tristate "RK29 SPI master controller core support"
+ +      depends on ARCH_RK29 && SPI_MASTER
+ +      help
+ +        general driver for SPI controller core from RockChips 
+ +
+ +config SPIM0_RK29
+ +      bool "RK29 SPI0 master controller"
+ +      depends on SPIM_RK29
+ +      help
+ +        enable SPI0 master controller for RK29         
+ +
+ +config SPIM1_RK29
+ +      bool "RK29 SPI1 master controller"
+ +      depends on SPIM_RK29
+ +      help
+ +        enable SPI1 master controller for RK29                
+ +
+ +config LCD_USE_SPIM_CONTROL
+ +      bool "Switch gpio to spim with spin lock"
+ +      depends on SPIM_RK29
+ +      help
+ +        switch gpio that used for lcd to spim with spin lock.
+ +
+ +config LCD_USE_SPI0
+ +      bool "If lcd use spi0 to init lcd then select this item"
+ +      depends on SPIM_RK29 && LCD_USE_SPIM_CONTROL
+ +      help
+ +        choose spi bus num to use.
+ +
+ +config LCD_USE_SPI1
+ +      bool "If lcd use spi1 to init lcd then select this item"
+ +      depends on SPIM_RK29 && LCD_USE_SPIM_CONTROL
+ +      default y if LCD_USE_SPIM_CONTROL
+ +      help
+ +        choose spi bus num to use.
+ +
+ config SPI_DESIGNWARE
+       tristate "DesignWare SPI controller core support"
+       depends on SPI_MASTER
+       help
+         general driver for SPI controller core from DesignWare
+ 
+ config SPI_DW_PCI
+       tristate "PCI interface driver for DW SPI core"
+       depends on SPI_DESIGNWARE && PCI
+ 
+ config SPI_DW_MMIO
+       tristate "Memory-mapped io interface driver for DW SPI core"
+       depends on SPI_DESIGNWARE && HAVE_CLK
   
   #
   # There are lots of SPI device types, with sensors and memory
diff --cc drivers/spi/Makefile

index 510da55c41e09882700c632aaa011d14b611ccc1,b6573d8ea82308ce5c3c3ce442d0ce36482e2540..e3e70d8ef44cd5267e27ce677b225a796ecc8ecc

mode 100755,100644..100755
--- 1/drivers/spi/Makefile
--- 2/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@@ -16,7 -16,12 +16,13 @@@ obj-$(CONFIG_SPI_BFIN)                      += spi_bfin5xx
   obj-$(CONFIG_SPI_BITBANG)             += spi_bitbang.o
   obj-$(CONFIG_SPI_AU1550)              += au1550_spi.o
   obj-$(CONFIG_SPI_BUTTERFLY)           += spi_butterfly.o
+ +obj-$(CONFIG_SPIM_RK29)                       += rk29_spim.o
+ obj-$(CONFIG_SPI_COLDFIRE_QSPI)               += coldfire_qspi.o
+ obj-$(CONFIG_SPI_DAVINCI)             += davinci_spi.o
+ obj-$(CONFIG_SPI_DESIGNWARE)          += dw_spi.o
+ obj-$(CONFIG_SPI_DW_PCI)              += dw_spi_pci.o
+ obj-$(CONFIG_SPI_DW_MMIO)             += dw_spi_mmio.o
+ obj-$(CONFIG_SPI_EP93XX)              += ep93xx_spi.o
   obj-$(CONFIG_SPI_GPIO)                        += spi_gpio.o
   obj-$(CONFIG_SPI_IMX)                 += spi_imx.o
   obj-$(CONFIG_SPI_LM70_LLP)            += spi_lm70llp.o
diff --cc drivers/spi/spi.c

index e029cb56f5bec6908d3371799ddeeebc50abaf7b,b5a78a1f4421a0c19aa8735bd49f076fd8f91b46..90b6a3fbd36d4c8e51ba28a7ba6d16ec0e361a9e

mode 100755,100644..100755
--- 1/drivers/spi/spi.c
--- 2/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@@ -773,8 -865,84 +865,84 @@@ int spi_sync(struct spi_device *spi, st
   }
   EXPORT_SYMBOL_GPL(spi_sync);
   
+ /**
+  * spi_sync_locked - version of spi_sync with exclusive bus usage
+  * @spi: device with which data will be exchanged
+  * @message: describes the data transfers
+  * Context: can sleep
+  *
+  * This call may only be used from a context that may sleep.  The sleep
+  * is non-interruptible, and has no timeout.  Low-overhead controller
+  * drivers may DMA directly into and out of the message buffers.
+  *
+  * This call should be used by drivers that require exclusive access to the
+  * SPI bus. It has to be preceeded by a spi_bus_lock call. The SPI bus must
+  * be released by a spi_bus_unlock call when the exclusive access is over.
+  *
+  * It returns zero on success, else a negative error code.
+  */
+ int spi_sync_locked(struct spi_device *spi, struct spi_message *message)
+ {
+       return __spi_sync(spi, message, 1);
+ }
+ EXPORT_SYMBOL_GPL(spi_sync_locked);
+ 
+ /**
+  * spi_bus_lock - obtain a lock for exclusive SPI bus usage
+  * @master: SPI bus master that should be locked for exclusive bus access
+  * Context: can sleep
+  *
+  * This call may only be used from a context that may sleep.  The sleep
+  * is non-interruptible, and has no timeout.
+  *
+  * This call should be used by drivers that require exclusive access to the
+  * SPI bus. The SPI bus must be released by a spi_bus_unlock call when the
+  * exclusive access is over. Data transfer must be done by spi_sync_locked
+  * and spi_async_locked calls when the SPI bus lock is held.
+  *
+  * It returns zero on success, else a negative error code.
+  */
+ int spi_bus_lock(struct spi_master *master)
+ {
+       unsigned long flags;
+ 
+       mutex_lock(&master->bus_lock_mutex);
+ 
+       spin_lock_irqsave(&master->bus_lock_spinlock, flags);
+       master->bus_lock_flag = 1;
+       spin_unlock_irqrestore(&master->bus_lock_spinlock, flags);
+ 
+       /* mutex remains locked until spi_bus_unlock is called */
+ 
+       return 0;
+ }
+ EXPORT_SYMBOL_GPL(spi_bus_lock);
+ 
+ /**
+  * spi_bus_unlock - release the lock for exclusive SPI bus usage
+  * @master: SPI bus master that was locked for exclusive bus access
+  * Context: can sleep
+  *
+  * This call may only be used from a context that may sleep.  The sleep
+  * is non-interruptible, and has no timeout.
+  *
+  * This call releases an SPI bus lock previously obtained by an spi_bus_lock
+  * call.
+  *
+  * It returns zero on success, else a negative error code.
+  */
+ int spi_bus_unlock(struct spi_master *master)
+ {
+       master->bus_lock_flag = 0;
+ 
+       mutex_unlock(&master->bus_lock_mutex);
+ 
+       return 0;
+ }
+ EXPORT_SYMBOL_GPL(spi_bus_unlock);
+ 
   /* portable code must never pass more than 32 bytes */
- -#define       SPI_BUFSIZ      max(32,SMP_CACHE_BYTES)
+ +#define       SPI_BUFSIZ      max(1028,SMP_CACHE_BYTES)
   
   static u8     *buf;
   
diff --cc drivers/staging/Kconfig

index 23e5f39e8d2d444017deda3c3d866b914d6f8344,96f6dda3ee691f891f4b65b8eee45dfe7f345285..0d5e0134ce9dfc2fc2bb4b2c280ece69e6a3ab81

mode 100755,100644..100755
--- 1/drivers/staging/Kconfig
--- 2/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@@ -125,7 -117,43 +117,46 @@@ source "drivers/staging/memrar/Kconfig
   
   source "drivers/staging/iio/Kconfig"
   
+ +source "drivers/staging/rk29/vivante/Kconfig"
+ +source "drivers/staging/rk29/ipp/Kconfig"
++
+ source "drivers/staging/zram/Kconfig"
+ 
+ source "drivers/staging/wlags49_h2/Kconfig"
+ 
+ source "drivers/staging/wlags49_h25/Kconfig"
+ 
+ source "drivers/staging/batman-adv/Kconfig"
+ 
+ source "drivers/staging/samsung-laptop/Kconfig"
+ 
+ source "drivers/staging/sm7xx/Kconfig"
+ 
+ source "drivers/staging/dt3155v4l/Kconfig"
+ 
+ source "drivers/staging/crystalhd/Kconfig"
+ 
+ source "drivers/staging/cxt1e1/Kconfig"
+ 
+ source "drivers/staging/ti-st/Kconfig"
+ 
+ source "drivers/staging/adis16255/Kconfig"
+ 
+ source "drivers/staging/xgifb/Kconfig"
+ 
+ source "drivers/staging/mrst-touchscreen/Kconfig"
+ 
+ source "drivers/staging/msm/Kconfig"
+ 
+ source "drivers/staging/lirc/Kconfig"
+ 
+ source "drivers/staging/easycap/Kconfig"
+ 
+ source "drivers/staging/solo6x10/Kconfig"
+ 
+ source "drivers/staging/tidspbridge/Kconfig"
+ 
+ source "drivers/staging/quickstart/Kconfig"
+ 
   endif # !STAGING_EXCLUDE_BUILD
   endif # STAGING
diff --cc drivers/staging/Makefile

index 8964792e5153f7adf7da016a7fac3fcd83b558a2,47c0b9489caf7650515a1dc6a31b3e018c54551d..4ca0c0575945c05e9edb6576f6615c4801dac3d3

mode 100755,100644..100755
--- 1/drivers/staging/Makefile
--- 2/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@@ -41,8 -38,23 +38,25 @@@ obj-$(CONFIG_VT6656)                += vt6656
   obj-$(CONFIG_FB_UDL)          += udlfb/
   obj-$(CONFIG_HYPERV)          += hv/
   obj-$(CONFIG_VME_BUS)         += vme/
- obj-$(CONFIG_RAR_REGISTER)    += rar/
- obj-$(CONFIG_DX_SEP)          += sep/
+ obj-$(CONFIG_MRST_RAR_HANDLER)        += memrar/
   obj-$(CONFIG_IIO)             += iio/
+ +obj-$(CONFIG_VIVANTE)         += rk29/vivante/
+ +obj-$(CONFIG_RK29_IPP)                += rk29/ipp/
+ obj-$(CONFIG_ZRAM)            += zram/
+ obj-$(CONFIG_WLAGS49_H2)      += wlags49_h2/
+ obj-$(CONFIG_WLAGS49_H25)     += wlags49_h25/
+ obj-$(CONFIG_BATMAN_ADV)      += batman-adv/
+ obj-$(CONFIG_SAMSUNG_LAPTOP)  += samsung-laptop/
+ obj-$(CONFIG_FB_SM7XX)                += sm7xx/
+ obj-$(CONFIG_VIDEO_DT3155)    += dt3155v4l/
+ obj-$(CONFIG_CRYSTALHD)               += crystalhd/
+ obj-$(CONFIG_CXT1E1)          += cxt1e1/
+ obj-$(CONFIG_TI_ST)           += ti-st/
+ obj-$(CONFIG_ADIS16255)               += adis16255/
+ obj-$(CONFIG_FB_XGI)          += xgifb/
+ obj-$(CONFIG_TOUCHSCREEN_MRSTOUCH)    += mrst-touchscreen/
+ obj-$(CONFIG_MSM_STAGING)     += msm/
+ obj-$(CONFIG_EASYCAP)         += easycap/
+ obj-$(CONFIG_SOLO6X10)                += solo6x10/
+ obj-$(CONFIG_TIDSPBRIDGE)     += tidspbridge/
+ obj-$(CONFIG_ACPI_QUICKSTART) += quickstart/
diff --cc drivers/staging/android/timed_gpio.c

index be7cdaa783ae2fbdf79a444f370b35e352002646,a64481c3e86d02ed02d094235f7e510b3e0df058..a64481c3e86d02ed02d094235f7e510b3e0df058

mode 100755,100644..100755
--- 1/drivers/staging/android/timed_gpio.c
--- 2/drivers/staging/android/timed_gpio.c
+++ b/drivers/staging/android/timed_gpio.c
diff --cc drivers/staging/iio/Kconfig

index 2461d0173cec0f66f84903a6e2642f1e777d101e,ed48815a916b37b1d5c5ffd2aca810b863276baf..ed48815a916b37b1d5c5ffd2aca810b863276baf

mode 100755,100644..100755
--- 1/drivers/staging/iio/Kconfig
--- 2/drivers/staging/iio/Kconfig
+++ b/drivers/staging/iio/Kconfig
diff --cc drivers/staging/iio/Makefile

index 92f598131d1102c35e7c19a77873e8199ca0a8b4,e909674920fc4924cfdd98a2c2b69ff2514b3645..e909674920fc4924cfdd98a2c2b69ff2514b3645

mode 100755,100644..100755
--- 1/drivers/staging/iio/Makefile
--- 2/drivers/staging/iio/Makefile
+++ b/drivers/staging/iio/Makefile
diff --cc drivers/usb/Kconfig
Simple merge
diff --cc drivers/usb/Makefile
Simple merge
diff --cc drivers/usb/core/hcd.c
Simple merge
diff --cc drivers/usb/core/hub.c

index 185ff9c7479cc00a6969c50c241b6fe5a80b9799,566c1833f169500db9861c66cc1f61841e87e0d7..8323699c295006306a4c392888e7f81f63b4c451

mode 100755,100644..100755
--- 1/drivers/usb/core/hub.c
--- 2/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
diff --cc drivers/usb/core/usb.c

index 300b7b2e6ad64067b55d4ee822a509eb35fa193b,fdd4130fbb7d7190a36226f1c96b994f452d0f79..693305636c884c3a8c1721168175c66dc51aaa88

mode 100755,100644..100755
--- 1/drivers/usb/core/usb.c
--- 2/drivers/usb/core/usb.c
+++ b/drivers/usb/core/usb.c
diff --cc drivers/usb/gadget/Kconfig
Simple merge
diff --cc drivers/usb/gadget/composite.c

index d05397ec8a183ebb4467b10f55fe9b67e1cce189,331eb847e138a4e5dc5fd8859ae3946723480dd2..331eb847e138a4e5dc5fd8859ae3946723480dd2

mode 100755,100644..100755
--- 1/drivers/usb/gadget/composite.c
--- 2/drivers/usb/gadget/composite.c
+++ b/drivers/usb/gadget/composite.c
diff --cc drivers/usb/gadget/gadget_chips.h

index 06124950fa44bb704a4174d923455138e3745e40,e511fec9f26d8d5f529d3a6a7ba7ae5a648aa24e..edc9bc52c620fb10a65277fbd08a3a7f757f4e3d
--- 1/drivers/usb/gadget/gadget_chips.h
--- 2/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@@ -179,10 -136,10 +136,15 @@@
   #define       gadget_is_r8a66597(g)   0
   #endif
   
+ +#ifdef CONFIG_USB_GADGET_DWC_OTG
+ +#define gadget_is_dwc_otg(g)    !strcmp("dwc_otg_pcd", (g)->name)
+ +#else
+ +#define gadget_is_dwc_otg(g)    0
++
+ #ifdef CONFIG_USB_S3C_HSOTG
+ #define gadget_is_s3c_hsotg(g)    (!strcmp("s3c-hsotg", (g)->name))
+ #else
+ #define gadget_is_s3c_hsotg(g)    0
   #endif
   
   
@@@ -253,8 -198,8 +203,10 @@@ static inline int usb_gadget_controller
                 return 0x24;
         else if (gadget_is_r8a66597(gadget))
                 return 0x25;
+ +      else if (gadget_is_dwc_otg(gadget))
+ +              return 0x22;
+       else if (gadget_is_s3c_hsotg(gadget))
+               return 0x26;
         return -ENOENT;
   }
   
diff --cc drivers/usb/storage/usb.c

index 8060b85fe1a3fb377476e1cd0a6de55df6de9014,90bb0175a1526c86ff62b50d07923ae61af77c68..90bb0175a1526c86ff62b50d07923ae61af77c68

mode 100755,100644..100755
--- 1/drivers/usb/storage/usb.c
--- 2/drivers/usb/storage/usb.c
+++ b/drivers/usb/storage/usb.c
diff --cc drivers/video/Kconfig

index ad9cf7509cc97b79802c7e056a1c030ad0a1f32b,5176baf14aa6367eb3bfdfb5c5f0b3386d015655..f1d0463d086b6a91f9f0379c84fec47ecdc3213d

mode 100755,100644..100755
--- 1/drivers/video/Kconfig
--- 2/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@@ -1927,43 -1991,26 +1991,54 @@@ config FB_S3C2410_DEBU
           Turn on debugging messages. Note that you can set/unset at run time
           through sysfs
   
- config FB_RK2818
-       tristate "RK2818 lcd control"
-       depends on FB
-       select FB_CFB_FILLRECT
-       select FB_CFB_COPYAREA
-       select FB_CFB_IMAGEBLIT
-       ---help---
-         Framebuffer driver for RK2818 Platform,select it if you using rk2818
- 
+ +config FB_RK29
+ +      tristate "RK29 lcd control"
+ +      depends on FB
+ +      select FB_CFB_FILLRECT
+ +      select FB_CFB_COPYAREA
+ +      select FB_CFB_IMAGEBLIT
+ +      ---help---
+ +        Framebuffer driver for RK29 Platform,select it if you using rk29
+ +
+ +config FB_WORK_IPP
+ +      bool "fb use ipp to scale UI or rotate video"
+ +      depends on FB_RK29
+ +      ---help---
+ +         this function be used scale-up UI when video, it only support RGB565 UI;
+ +         it can use to rotate video .
+ +
+ +config FB_SCALING_OSD
+ +      bool "fb scale OSD support when video playing "
+ +      depends on FB_WORK_IPP
+ +      ---help---
+ +         this function be used scale-up UI when video, it only support RGB565 UI;
+ +
+ +config FB_ROTATE_VIDEO
+ +      bool "fb video rotate support"
+ +      depends on FB_WORK_IPP
+ +      ---help---
+ +              this function  can use to rotate video .
+ +
+ config FB_NUC900
+         bool "NUC900 LCD framebuffer support"
+         depends on FB && ARCH_W90X900
+         select FB_CFB_FILLRECT
+         select FB_CFB_COPYAREA
+         select FB_CFB_IMAGEBLIT
+         ---help---
+           Frame buffer driver for the built-in LCD controller in the Nuvoton
+           NUC900 processor
+ 
+ config GPM1040A0_320X240
+         bool "Giantplus Technology GPM1040A0 320x240 Color TFT LCD"
+         depends on FB_NUC900
+ 
+ config FB_NUC900_DEBUG
+         bool "NUC900 lcd debug messages"
+         depends on FB_NUC900
+         help
+           Turn on debugging messages. Note that you can set/unset at run time
+           through sysfs
   
   config FB_SM501
         tristate "Silicon Motion SM501 framebuffer support"
diff --cc drivers/video/Makefile

index 03016d17b9a05ca8e8536224e08b7443a7a2aacc,14200e4e1abd81b855fb1465b8e7524a3a009f83..1f4d80baac486c2ac0e68cfb2aef522658b8486b

mode 100755,100644..100755
--- 1/drivers/video/Makefile
--- 2/drivers/video/Makefile
+++ b/drivers/video/Makefile
@@@ -120,11 -121,13 +121,14 @@@ obj-$(CONFIG_FB_PNX4008_DUM)      += pnx40
   obj-$(CONFIG_FB_PNX4008_DUM_RGB)  += pnx4008/
   obj-$(CONFIG_FB_IBM_GXT4500)    += gxt4500.o
   obj-$(CONFIG_FB_PS3)            += ps3fb.o
+ +obj-$(CONFIG_FB_RK29)             += rk29_fb.o
   obj-$(CONFIG_FB_SM501)            += sm501fb.o
   obj-$(CONFIG_FB_XILINX)           += xilinxfb.o
+ obj-$(CONFIG_SH_MIPI_DSI)       += sh_mipi_dsi.o
+ obj-$(CONFIG_FB_SH_MOBILE_HDMI)         += sh_mobile_hdmi.o
   obj-$(CONFIG_FB_SH_MOBILE_LCDC)         += sh_mobile_lcdcfb.o
   obj-$(CONFIG_FB_OMAP)             += omap/
+ obj-y                             += omap2/
   obj-$(CONFIG_XEN_FBDEV_FRONTEND)  += xen-fbfront.o
   obj-$(CONFIG_FB_CARMINE)          += carminefb.o
   obj-$(CONFIG_FB_MB862XX)        += mb862xx/
diff --cc drivers/video/backlight/Kconfig

index 8ecc980c7faa42b0917747dc19ce1f43b4cda09a,e54a337227ea964c5c6fea4c9bd32fdb5ced97a0..cfb5be5ee6498e5cceef8fca83a9a7496e16b145
--- 1/drivers/video/backlight/Kconfig
--- 2/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@@ -262,36 -282,31 +282,64 @@@ config BACKLIGHT_ADP552
           To compile this driver as a module, choose M here: the module will
           be called adp5520_bl.
   
+ +config BACKLIGHT_RK2818_BL
+ +        bool "rk2818 backlight driver"
+ +      depends on BACKLIGHT_CLASS_DEVICE && ARCH_RK2818
+ +      default y
+ +      help
+ +        rk2818 backlight support.
+ +        
+ +config BACKLIGHT_RK29_BL
+ +        bool "rk29 backlight driver"
+ +      depends on BACKLIGHT_CLASS_DEVICE && ARCH_RK29
+ +      default y
+ +      help
+ +        rk29 backlight support.         
+ +
+ +config FIH_TOUCHKEY_LED
+ +        bool "fih touch key led driver"
+ +      depends on BACKLIGHT_CLASS_DEVICE && ARCH_RK29
+ +      help
+ +        fih touch key led support.
+ +
+ +config BACKLIGHT_AW9364
+ +        bool "aw9364 backlight driver"
+ +      depends on BACKLIGHT_CLASS_DEVICE && ARCH_RK29
+ +      help
+ +        aw9364 backlight support.      
+ +
+ +config BUTTON_LIGHT
+ +        bool "rk29 button light driver"
+ +      depends on BACKLIGHT_CLASS_DEVICE
+ +      default n
+ +      help
+ +        rk29 button light support.      
+ + 
+ config BACKLIGHT_ADP8860
+       tristate "Backlight Driver for ADP8860/ADP8861/ADP8863 using WLED"
+       depends on BACKLIGHT_CLASS_DEVICE && I2C
+       select NEW_LEDS
+       select LEDS_CLASS
+       help
+         If you have a LCD backlight connected to the ADP8860, ADP8861 or
+         ADP8863 say Y here to enable this driver.
+ 
+         To compile this driver as a module, choose M here: the module will
+         be called adp8860_bl.
+ 
+ config BACKLIGHT_88PM860X
+       tristate "Backlight Driver for 88PM8606 using WLED"
+       depends on MFD_88PM860X
+       help
+         Say Y to enable the backlight driver for Marvell 88PM8606.
+ 
+ config BACKLIGHT_PCF50633
+       tristate "Backlight driver for NXP PCF50633 MFD"
+       depends on BACKLIGHT_CLASS_DEVICE && MFD_PCF50633
+       help
+         If you have a backlight driven by a NXP PCF50633 MFD, say Y here to
+         enable its driver.
+ 
+ endif # BACKLIGHT_CLASS_DEVICE
+ 
+ endif # BACKLIGHT_LCD_SUPPORT
diff --cc drivers/video/backlight/Makefile

index 54235006d719081920b3c68da3eae9ab60693b74,44c0f81ad85d96c731e1bfe3f1a2068c37f3484c..c9635acc8e5f375664f86e291e7b79a3a1ba7660
--- 1/drivers/video/backlight/Makefile
--- 2/drivers/video/backlight/Makefile
+++ b/drivers/video/backlight/Makefile
@@@ -28,9 -32,7 +32,11 @@@ obj-$(CONFIG_BACKLIGHT_SAHARA)       += kb388
   obj-$(CONFIG_BACKLIGHT_WM831X)        += wm831x_bl.o
   obj-$(CONFIG_BACKLIGHT_ADX)    += adx_bl.o
   obj-$(CONFIG_BACKLIGHT_ADP5520)       += adp5520_bl.o
- obj-$(CONFIG_BACKLIGHT_RK2818_BL) += rk2818_backlight.o
- obj-$(CONFIG_BACKLIGHT_RK29_BL) += rk29_backlight.o
- obj-$(CONFIG_BACKLIGHT_AW9364) += aw9364_bl.o
- obj-$(CONFIG_FIH_TOUCHKEY_LED) += fih_touchkey_led.o
- obj-$(CONFIG_BUTTON_LIGHT) += rk29_buttonlight.o
++obj-$(CONFIG_BACKLIGHT_RK29_BL)       += rk29_backlight.o
++obj-$(CONFIG_BACKLIGHT_AW9364)        += aw9364_bl.o
++obj-$(CONFIG_FIH_TOUCHKEY_LED)        += fih_touchkey_led.o
++obj-$(CONFIG_BUTTON_LIGHT)    += rk29_buttonlight.o
+ obj-$(CONFIG_BACKLIGHT_ADP8860)       += adp8860_bl.o
+ obj-$(CONFIG_BACKLIGHT_88PM860X) += 88pm860x_bl.o
+ obj-$(CONFIG_BACKLIGHT_PCF50633)      += pcf50633-backlight.o
   
diff --cc drivers/video/backlight/wm831x_bl.c

index bb8ac47c51f2176f71a52d6f1486e806f43c353b,08fd87f3aecce368219ed7cb08dfdaa0aebafef6..920a23b9b9491034029b31d18b8c0064301fa097

mode 100755,100644..100755
--- 1/drivers/video/backlight/wm831x_bl.c
--- 2/drivers/video/backlight/wm831x_bl.c
+++ b/drivers/video/backlight/wm831x_bl.c
@@@ -268,17 -193,16 +268,16 @@@ static int wm831x_backlight_probe(struc
         data->current_brightness = 0;
         data->isink_reg = isink_reg;
   
--      props.max_brightness = max_isel;
++      props.max_brightness = BL_SET;
         bl = backlight_device_register("wm831x", &pdev->dev, data,
-                                      &wm831x_backlight_ops);
+                                      &wm831x_backlight_ops, &props);
         if (IS_ERR(bl)) {
                 dev_err(&pdev->dev, "failed to register backlight\n");
                 kfree(data);
                 return PTR_ERR(bl);
         }
   
- -      bl->props.brightness = max_isel;
+ +      bl->props.brightness = BL_INIT_VALUE;
-       bl->props.max_brightness= BL_SET;
   
         platform_set_drvdata(pdev, bl);
   
diff --cc drivers/video/console/fbcon.c
Simple merge
diff --cc drivers/video/fbmem.c

index 6955151c5a0d3d6ee6bab3d1b83544228669c759,b06647517c0e6a9523a690460c7b56ba61e89252..bd6b69e48f1491909be86e24acf64a51156065ca

mode 100755,100644..100755
--- 1/drivers/video/fbmem.c
--- 2/drivers/video/fbmem.c
+++ b/drivers/video/fbmem.c
diff --cc drivers/watchdog/Kconfig

index 8c510336896a979b396cd5410bb30c14f2b78b56,f775da5a1be526a2e916ed7cdf87484968da49da..57c1c7e1a14b7020c821b40fc35979d5dafa85eb
--- 1/drivers/watchdog/Kconfig
--- 2/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@@ -73,31 -73,12 +73,37 @@@ config WM8350_WATCHDO
   
   # ARM Architecture
   
+ +config RK29_WATCHDOG
+ +      tristate "RK29 watchdog"
+ +      depends on ARCH_RK29
+ +      help
+ +        Watchdog timer embedded into RK29xx chips. This will reboot your
+ +        system when the timeout is reached.
+ +
+ +config RK29_FEED_DOG_BY_INTE
+ +      bool "feed watchdog by interrupt"
+ +      depends on RK29_WATCHDOG
+ +
+ +config RK29_WATCHDOG_ATBOOT
+ +      bool "start watchdog at system boot"
+ +      depends on RK29_WATCHDOG
+ +
+ +config RK29_WATCHDOG_DEFAULT_TIME
+ +      int "set watchdog time out value (unit second)"
+ +      depends on RK29_WATCHDOG
+ +      help
+ +        the real time out value is two times more than the setting value
+ +
+ +config RK29_WATCHDOG_DEBUG
+ +      bool "enable watchdog debug"
+ +      depends on RK29_WATCHDOG
+ +
+ config ARM_SP805_WATCHDOG
+       tristate "ARM SP805 Watchdog"
+       depends on ARM_AMBA
+       help
+         ARM Primecell SP805 Watchdog timer. This will reboot your system when
+         the timeout is reached.
   
   config AT91RM9200_WATCHDOG
         tristate "AT91RM9200 watchdog"
diff --cc drivers/watchdog/Makefile

index b4de466ace6f33ff38b4df92721b118d37d694ea,62d90bee8dbe00281ee17ea9404c8d59cb37d56e..44e8964a5bd9f683fc305b9413da139b76b80876
--- 1/drivers/watchdog/Makefile
--- 2/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@@ -46,7 -48,8 +48,9 @@@ obj-$(CONFIG_COH901327_WATCHDOG) += coh
   obj-$(CONFIG_STMP3XXX_WATCHDOG) += stmp3xxx_wdt.o
   obj-$(CONFIG_NUC900_WATCHDOG) += nuc900_wdt.o
   obj-$(CONFIG_ADX_WATCHDOG) += adx_wdt.o
+ +obj-$(CONFIG_RK29_WATCHDOG) += rk29_wdt.o
+ obj-$(CONFIG_TS72XX_WATCHDOG) += ts72xx_wdt.o
+ obj-$(CONFIG_IMX2_WDT) += imx2_wdt.o
   
   # AVR32 Architecture
   obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
diff --cc fs/block_dev.c

index 699ac9358a9e313f69c8842ae71645071f1bbfc9,50e8c8582faa06a38bae5beb66c4f3ec8af929f3..0297699eb4367596c0e7c5b77c3bb403c3868e0c

mode 100755,100644..100755
--- 1/fs/block_dev.c
--- 2/fs/block_dev.c
+++ b/fs/block_dev.c
diff --cc fs/buffer.c
Simple merge
diff --cc fs/cramfs/inode.c

index 96cddcc5bed02bd855de9348707aeb5d89df0e40,1e7a33028d33908807d776d05840637cfd7e4f22..3a0d63c75ea4d94259ac1c6f60de5abbdc4a153f

mode 100755,100644..100755
--- 1/fs/cramfs/inode.c
--- 2/fs/cramfs/inode.c
+++ b/fs/cramfs/inode.c
diff --cc fs/fat/dir.c
Simple merge
diff --cc fs/fat/fatent.c
Simple merge
diff --cc fs/fat/inode.c
Simple merge
diff --cc fs/partitions/check.c

index fb6938a0fb05f4cfc46acb54c8666be5a33fd547,6ffb1ac7de0cb94a1c39904b5f5d8f355d0a699d..15527ac24bcf20f54b1ed24f92d1f65cabd74d31
--- 1/fs/partitions/check.c
--- 2/fs/partitions/check.c
+++ b/fs/partitions/check.c
@@@ -524,24 -584,36 +584,45 @@@ exit
         disk_part_iter_exit(&piter);
   }
   
+ static bool disk_unlock_native_capacity(struct gendisk *disk)
+ {
+       const struct block_device_operations *bdops = disk->fops;
+ 
+       if (bdops->unlock_native_capacity &&
+           !(disk->flags & GENHD_FL_NATIVE_CAPACITY)) {
+               printk(KERN_CONT "enabling native capacity\n");
+               bdops->unlock_native_capacity(disk);
+               disk->flags |= GENHD_FL_NATIVE_CAPACITY;
+               return true;
+       } else {
+               printk(KERN_CONT "truncated\n");
+               return false;
+       }
+ }
+ 
   int rescan_partitions(struct gendisk *disk, struct block_device *bdev)
   {
+       struct parsed_partitions *state = NULL;
         struct disk_part_iter piter;
         struct hd_struct *part;
-       struct parsed_partitions *state;
         int p, highest, res;
+ rescan:
+       if (state && !IS_ERR(state)) {
+               kfree(state);
+               state = NULL;
+       }
   
         if (bdev->bd_part_count)
+ +      {
+ +      #if defined(CONFIG_SDMMC_RK29) && !defined(CONFIG_SDMMC_RK29_OLD) 
+ +          if(179 == MAJOR(bdev->bd_dev))
+ +          {
+ +              printk("%s..%d.. The sdcard partition have been using.So device busy! ====xbw===\n",__FUNCTION__, __LINE__);
+ +          }
+ +      #endif    
+ +          
                 return -EBUSY;
+ +      }
         res = invalidate_partition(disk, 0);
         if (res)
                 return res;
@@@ -556,17 -628,33 +637,41 @@@
         check_disk_size_change(disk, bdev);
         bdev->bd_invalidated = 0;
         if (!get_capacity(disk) || !(state = check_partition(disk, bdev)))
+ +      {
+ +      #if defined(CONFIG_SDMMC_RK29) && !defined(CONFIG_SDMMC_RK29_OLD) 
+ +          if(179 == MAJOR(bdev->bd_dev))
+ +          {
+ +              printk("%s..%d... ==== check partition fail. partitionAddr=%x ====xbw===\n",__FUNCTION__, __LINE__, state);
+ +          }
+ +       #endif             
                 return 0;
-       if (IS_ERR(state))      /* I/O error reading the partition table */
+ +      }
+       if (IS_ERR(state)) {
+               /*
+                * I/O error reading the partition table.  If any
+                * partition code tried to read beyond EOD, retry
+                * after unlocking native capacity.
+                */
+               if (PTR_ERR(state) == -ENOSPC) {
+                       printk(KERN_WARNING "%s: partition table beyond EOD, ",
+                              disk->disk_name);
+                       if (disk_unlock_native_capacity(disk))
+                               goto rescan;
+               }
                 return -EIO;
+       }
+       /*
+        * If any partition code tried to read beyond EOD, try
+        * unlocking native capacity even if partition table is
+        * sucessfully read as we could be missing some partitions.
+        */
+       if (state->access_beyond_eod) {
+               printk(KERN_WARNING
+                      "%s: partition table partially beyond EOD, ",
+                      disk->disk_name);
+               if (disk_unlock_native_capacity(disk))
+                       goto rescan;
+       }
   
         /* tell userspace that the media / partition table may have changed */
         kobject_uevent(&disk_to_dev(disk)->kobj, KOBJ_CHANGE);
diff --cc include/asm-generic/gpio.h

index 49eb6ee841a2ddee10cfcf119b8a39e942fac632,8ca18e26d7e39fe429a8179d48f2f9f17f58a589..f744e93d1943c36e0033c550bb5e4305b242dad2
--- 1/include/asm-generic/gpio.h
--- 2/include/asm-generic/gpio.h
+++ b/include/asm-generic/gpio.h
@@@ -87,14 -103,11 +103,17 @@@ struct gpio_chip 
                                                 unsigned offset);
         int                     (*direction_output)(struct gpio_chip *chip,
                                                 unsigned offset, int value);
+       int                     (*set_debounce)(struct gpio_chip *chip,
+                                               unsigned offset, unsigned debounce);
+ 
         void                    (*set)(struct gpio_chip *chip,
                                                 unsigned offset, int value);
+ +      
+ +      int                   (*set_debounce)(struct gpio_chip *chip,
+ +                                      unsigned offset, unsigned debounce);     
+ +              
+ +      int                   (*pull_updown)(struct gpio_chip *chip,
+ +                                      unsigned offset, unsigned value);     
   
         int                     (*to_irq)(struct gpio_chip *chip,
                                                 unsigned offset);
@@@ -125,7 -152,9 +158,11 @@@ extern void gpio_free(unsigned gpio)
   
   extern int gpio_direction_input(unsigned gpio);
   extern int gpio_direction_output(unsigned gpio, int value);
+ 
+ +extern int gpio_pull_updown(unsigned gpio, unsigned value);
++
+ extern int gpio_set_debounce(unsigned gpio, unsigned debounce);
+ 
   extern int gpio_get_value_cansleep(unsigned gpio);
   extern void gpio_set_value_cansleep(unsigned gpio, int value);
   
diff --cc include/linux/dm9000.h

index def04936bacf1fed13a55e8768f6d9c7d57f6262,96e87693d93349c92563585f1abf59efd8d4c029..358fc8fdb42a55d0865ca69d8db1c1e4a186ee64

mode 100755,100644..100755
--- 1/include/linux/dm9000.h
--- 2/include/linux/dm9000.h
+++ b/include/linux/dm9000.h
diff --cc include/linux/fb.h

index 7f3b39b31bedb72ab53582c8c90e50082b1c8ba6,6654459e81af82a791a789e5d177f16cca6001c0..422c57fb85772f1bd886975028953d96a094bbaf

mode 100755,100644..100755
--- 1/include/linux/fb.h
--- 2/include/linux/fb.h
+++ b/include/linux/fb.h
@@@ -45,9 -38,7 +46,10 @@@
   #define FBIOGET_HWCINFO         0x4616
   #define FBIOPUT_MODEINFO        0x4617
   #define FBIOGET_DISPINFO        0x4618
+ +#define FBIOGET_OVERLAY_STATE   0X4619
+ +#define FBIOGET_SCREEN_STATE    0X4620
+ +
+ #define FBIO_WAITFORVSYNC     _IOW('F', 0x20, __u32)
   
   #define FB_TYPE_PACKED_PIXELS         0       /* Packed Pixels        */
   #define FB_TYPE_PLANES                        1       /* Non interleaved planes */
diff --cc include/linux/i2c.h

index 8d3d0315ef62ff8db25b0966ee9521ddf04fe90e,4bae0b72ed3cdba567f306bddb2a2e26326f7fc4..493791bdb5c4982135a784e33bc15d16520ed60f

mode 100755,100644..100755
--- 1/include/linux/i2c.h
--- 2/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@@ -53,18 -55,8 +55,19 @@@ struct i2c_board_info
    * on a bus (or read from them). Apart from two basic transfer functions to
    * transmit one message at a time, a more complex version can be used to
    * transmit an arbitrary number of messages without interruption.
+  * @count must be be less than 64k since msg.len is u16.
    */
+ +#if defined (CONFIG_I2C_RK2818) || defined(CONFIG_I2C_RK29)
+ +/* If everything went ok, return 'count' transmitted, else error code. */
+ +extern int i2c_master_normal_send(struct i2c_client *client,const char *buf ,int count, int scl_rate);
+ +extern int i2c_master_normal_recv(struct i2c_client *client, char *buf ,int count, int scl_rate);
+ +extern int i2c_master_reg8_send(struct i2c_client *client, const char reg, const char *buf, int count, int scl_rate);
+ +extern int i2c_master_reg8_recv(struct i2c_client *client, const char reg, char *buf, int count, int scl_rate);
+ +extern int i2c_master_reg16_send(struct i2c_client *client, const short regs, const short *buf, int count, int scl_rate);
+ +extern int i2c_master_reg16_recv(struct i2c_client *client, const short regs, short *buf, int count, int scl_rate);
+ +extern int i2c_suspended(struct i2c_adapter *adap);
+ +#endif
+ +
   extern int i2c_master_send(struct i2c_client *client, const char *buf,
                            int count);
   extern int i2c_master_recv(struct i2c_client *client, char *buf, int count);
@@@ -255,8 -255,10 +267,11 @@@ struct i2c_board_info 
         unsigned short  addr;
         void            *platform_data;
         struct dev_archdata     *archdata;
+ #ifdef CONFIG_OF
+       struct device_node *of_node;
+ #endif
         int             irq;
+ +      int             udelay;   //add by kfx
   };
   
   /**
diff --cc include/linux/l3g4200d-moto.h

index 0000000000000000000000000000000000000000,0000000000000000000000000000000000000000..ff8ca23c3745f5fcd23841e291de75607b934646

new file mode 100644 (file)
--- /dev/null
--- /dev/null
+++ b/include/linux/l3g4200d-moto.h
@@@ -1,0 -1,0 +1,62 @@@
++/*
++ * Copyright (C) 2010 Motorola, Inc.
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License version 2 as
++ * published by the Free Software Foundation.
++ *
++ * This program is distributed in the hope that it will be useful,
++ * but WITHOUT ANY WARRANTY; without even the implied warranty of
++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
++ * GNU General Public License for more details.
++ *
++ * You should have received a copy of the GNU General Public License
++ * along with this program; if not, write to the Free Software
++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
++ * 02111-1307, USA
++ */
++
++#ifndef __L3G4200D_H__
++#define __L3G4200D_H__
++
++#include <linux/ioctl.h>  /* For IOCTL macros */
++
++#define L3G4200D_NAME "l3g4200d"
++
++#define L3G4200D_IOCTL_BASE 77
++/** The following define the IOCTL command values via the ioctl macros */
++#define L3G4200D_IOCTL_SET_DELAY      _IOW(L3G4200D_IOCTL_BASE, 0, int)
++#define L3G4200D_IOCTL_GET_DELAY      _IOR(L3G4200D_IOCTL_BASE, 1, int)
++#define L3G4200D_IOCTL_SET_ENABLE     _IOW(L3G4200D_IOCTL_BASE, 2, int)
++#define L3G4200D_IOCTL_GET_ENABLE     _IOR(L3G4200D_IOCTL_BASE, 3, int)
++
++#ifdef __KERNEL__
++
++struct l3g4200d_platform_data {
++      int poll_interval;
++      unsigned gpio_drdy;
++
++      u8 ctrl_reg1;
++      u8 ctrl_reg2;
++      u8 ctrl_reg3;
++      u8 ctrl_reg4;
++      u8 ctrl_reg5;
++
++      u8 reference;
++
++      u8 fifo_ctrl_reg;
++
++      u8 int1_cfg;
++
++      u8 int1_tsh_xh;
++      u8 int1_tsh_xl;
++      u8 int1_tsh_yh;
++      u8 int1_tsh_yl;
++      u8 int1_tsh_zh;
++      u8 int1_tsh_zl;
++      u8 int1_duration;
++};
++#endif /* __KERNEL__ */
++
++#endif  /* __L3G4200D_H__ */
++
diff --cc include/linux/mmc/card.h

index 7189fd57c4b5ab594ffd07bef2661f933f1424d1,13fe335fe653185042ea53fc1503f458c0f33ee7..0090eb45951f6ad4d211a4799f93381a749af737

mode 100755,100644..100755
--- 1/include/linux/mmc/card.h
--- 2/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
diff --cc include/linux/mmc/host.h

index 7456efeb1ae36b1732bb5508cfadfcd62ceb6bde,8187e32d917dee8a071f6e45b85d1ff463c8f21a..ab8d6551dcfefcfaf6f336e419ae1792f4b0ace4
--- 1/include/linux/mmc/host.h
--- 2/include/linux/mmc/host.h
+++ b/include/linux/mmc/host.h
@@@ -197,8 -203,10 +203,12 @@@ struct mmc_host 
         const struct mmc_bus_ops *bus_ops;      /* current bus driver */
         unsigned int            bus_refs;       /* reference counter */
   
+ +      unsigned int            re_initialized_flags; //in order to begin the rescan ;  added by xbw@2011-04-07
+ +
+       unsigned int            bus_resume_flags;
+ #define MMC_BUSRESUME_MANUAL_RESUME   (1 << 0)
+ #define MMC_BUSRESUME_NEEDS_RESUME    (1 << 1)
+ 
         unsigned int            sdio_irqs;
         struct task_struct      *sdio_irq_thread;
         atomic_t                sdio_irq_thread_abort;
diff --cc include/linux/mmc/mmc.h
Simple merge
diff --cc include/linux/mtd/blktrans.h

index 2e0ef53f4a3aae4e204956f853ceadadbd442519,26529ebd59ccf3872fddca921c141184915fcf62..c2d0e5676207ee6fa47a7f23f658143fc26831d5

mode 100755,100644..100755
--- 1/include/linux/mtd/blktrans.h
--- 2/include/linux/mtd/blktrans.h
+++ b/include/linux/mtd/blktrans.h
diff --cc include/linux/mtd/nand.h

index 4186923e0d2532c11a42f6bcaa53934f6f9d057f,102e12c58cb3bbef023e0802c81f532a8cf428b0..43ae59580eba8647db91b2bc96e2f5c423bce314
--- 1/include/linux/mtd/nand.h
--- 2/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@@ -36,9 -40,12 +40,16 @@@ extern void nand_release (struct mtd_in
   /* Internal helper for board drivers which need to override command function */
   extern void nand_wait_ready(struct mtd_info *mtd);
   
+ /* locks all blockes present in the device */
+ extern int nand_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
+ 
+ /* unlocks specified locked blockes */
+ extern int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
+ 
+ +#ifdef CONFIG_MTD_NAND_RK29
+ +#define RK29_RESERVE_BLOCK_NUM    5
+ +#endif
++
   /* The maximum number of NAND chips in an array */
   #define NAND_MAX_CHIPS                8
   
diff --cc include/linux/regulator/consumer.h

index 2e94871b2fdd9f7ed8e9fe6bc930fa911792b813,ebd7472652942c116b66b5e17a8d00a6dd46b894..76650be01ed0138d64d4245abd98e4eabb7189d9

mode 100755,100644..100755
--- 1/include/linux/regulator/consumer.h
--- 2/include/linux/regulator/consumer.h
+++ b/include/linux/regulator/consumer.h
diff --cc include/linux/serial_core.h

index e83a0ad06d32be0f492ef33ea437419861c4287d,7b8a09e2ec7fdc95d8037f0f953c3f6782186f39..6ff564843793301c8e8b888fba8e6f3f67560599
--- 1/include/linux/serial_core.h
--- 2/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@@ -179,9 -180,22 +180,26 @@@
   /* BCM63xx family SoCs */
   #define PORT_BCM63XX  89
   
- #define PORT_RK2818           90
++#define PORT_RK2818   90
++
++#define PORT_RK29     90
++
+ /* Aeroflex Gaisler GRLIB APBUART */
+ #define PORT_APBUART    90
+ 
+ /* Altera UARTs */
+ #define PORT_ALTERA_JTAGUART  91
+ #define PORT_ALTERA_UART      92
+ 
+ /* SH-SCI */
+ #define PORT_SCIFB    93
+ 
+ /* MAX3107 */
+ #define PORT_MAX3107  94
+ 
+ /* High Speed UART for Medfield */
+ #define PORT_MFD      95
   
- #define PORT_RK29             90
   #ifdef __KERNEL__
   
   #include <linux/compiler.h>
diff --cc include/linux/spi/spi.h
Simple merge
diff --cc include/linux/videodev2.h

index 9c222309b34ed8435afc8ccfd606718b1c2d0800,61490c6dcdbdd74cd77ab0411563a6b4da3b71e1..82ae492f0b230e401205aed6784626aee6367be8
--- 1/include/linux/videodev2.h
--- 2/include/linux/videodev2.h
+++ b/include/linux/videodev2.h
@@@ -1159,14 -1292,9 +1292,16 @@@ enum  v4l2_exposure_auto_type 
   
   #define V4L2_CID_PRIVACY                      (V4L2_CID_CAMERA_CLASS_BASE+16)
   
- /* ddl@rock-chips.com : Add ioctrl -  V4L2_CID_SCENE for camera scene control */
- #define V4L2_CID_CAMERA_CLASS_BASE_ROCK                      (V4L2_CID_CAMERA_CLASS_BASE + 30)
- #define V4L2_CID_SCENE                        (V4L2_CID_CAMERA_CLASS_BASE_ROCK+1)
- #define V4L2_CID_EFFECT                       (V4L2_CID_CAMERA_CLASS_BASE_ROCK+2)
- #define V4L2_CID_FLASH                      (V4L2_CID_CAMERA_CLASS_BASE_ROCK+3)
- #define V4L2_CID_FOCUS_CONTINUOUS     (V4L2_CID_CAMERA_CLASS_BASE_ROCK+4)
+ #define V4L2_CID_IRIS_ABSOLUTE                        (V4L2_CID_CAMERA_CLASS_BASE+17)
+ #define V4L2_CID_IRIS_RELATIVE                        (V4L2_CID_CAMERA_CLASS_BASE+18)
   
++/* ddl@rock-chips.com : Add ioctrl -  V4L2_CID_SCENE for camera scene control */
++#define V4L2_CID_CAMERA_CLASS_BASE_ROCK               (V4L2_CID_CAMERA_CLASS_BASE + 30)
++#define V4L2_CID_SCENE                                (V4L2_CID_CAMERA_CLASS_BASE_ROCK+1)
++#define V4L2_CID_EFFECT                               (V4L2_CID_CAMERA_CLASS_BASE_ROCK+2)
++#define V4L2_CID_FLASH                                (V4L2_CID_CAMERA_CLASS_BASE_ROCK+3)
++#define V4L2_CID_FOCUS_CONTINUOUS             (V4L2_CID_CAMERA_CLASS_BASE_ROCK+4)
+ +
   /* FM Modulator class control IDs */
   #define V4L2_CID_FM_TX_CLASS_BASE             (V4L2_CTRL_CLASS_FM_TX | 0x900)
   #define V4L2_CID_FM_TX_CLASS                  (V4L2_CTRL_CLASS_FM_TX | 1)
diff --cc include/media/soc_camera.h
Simple merge
diff --cc include/media/v4l2-chip-ident.h

index f0607236595c973e28b5af344e21a92f0d9080f6,21b4428c12ab39d1846e527d40af12b9734682c2..2a3b3371806cafef50d28d2e91d6b2b3d66b0237

mode 100755,100644..100755
--- 1/include/media/v4l2-chip-ident.h
--- 2/include/media/v4l2-chip-ident.h
+++ b/include/media/v4l2-chip-ident.h
@@@ -64,13 -69,8 +69,15 @@@ enum 
         V4L2_IDENT_OV9650 = 254,
         V4L2_IDENT_OV9655 = 255,
         V4L2_IDENT_SOI968 = 256,
- -      V4L2_IDENT_OV9640 = 257,
+ +      V4L2_IDENT_OV2655 = 257,                            /* ddl@rock-chips.com : ov2655 support */
+ +      V4L2_IDENT_OV2659 = 258,
+ +      V4L2_IDENT_OV3640 = 259,
+ +      V4L2_IDENT_OV5640 = 260,
+ +      V4L2_IDENT_OV5642 = 261,
+ +      V4L2_IDENT_OV7675 = 262,
-     V4L2_IDENT_OV2640 = 263,
++      V4L2_IDENT_OV2640 = 263,
++      V4L2_IDENT_OV9640 = 264,
+ 
         /* module saa7146: reserved range 300-309 */
         V4L2_IDENT_SAA7146 = 300,
   
@@@ -276,21 -308,7 +323,19 @@@
         /* module upd64083: just ident 64083 */
         V4L2_IDENT_UPD64083 = 64083,
   
-       /* module m52790: just ident 52790 */
-       V4L2_IDENT_M52790 = 52790,
- 
+ +
+ +    V4L2_IDENT_GT2005 = 64100,       /* ddl@rock-chips.com : GT2005 support */
+ +    V4L2_IDENT_GC0308 = 64101,      /* ddl@rock-chips.com : GC0308 support */
+ +    V4L2_IDENT_GC0309 = 64102,      /* ddl@rock-chips.com : GC0309 support */
+ +    V4L2_IDENT_SIV120B = 64103,      /* ddl@rock-chips.com : siv120b support */    
+ +    
+ +    V4L2_IDENT_GC2015 = 64105,      /* ddl@rock-chips.com : gc2015 support */
+ +    V4L2_IDENT_HI253 = 64106,      /* ddl@rock-chips.com : hi253 support */
+ +    V4L2_IDENT_HI704 = 64107,      /* ddl@rock-chips.com : hi704 support */
+ +    V4L2_IDENT_NT99250 = 64108,    /* ddl@rock-chips.com : nt99250 support */
+ +    V4L2_IDENT_SID130B = 64109,      /* ddl@rock-chips.com : sid130B support */
+ +    
+       /* Don't just add new IDs at the end: KEEP THIS LIST ORDERED BY ID! */
   };
   
   #endif
diff --cc include/media/videobuf-core.h

index cf6668fa57a912cd71fbd1b23462a8b50cef9f9f,f2c41cebf453a65abbe4fc281f20103287e5fea0..3d8acce0017c9da74a6b1b5fcccf86ccda7c8ec1

mode 100755,100644..100755
--- 1/include/media/videobuf-core.h
--- 2/include/media/videobuf-core.h
+++ b/include/media/videobuf-core.h
diff --cc include/sound/asound.h
Simple merge
diff --cc include/sound/pcm.h

index 5685b7de99c94a945c0a31261f662274f7aab30d,85f1c6bf8566944eaa85d6b8742ebef2a06e6ce9..83a471ba9de0273a38700444850bd2a096718bb4

mode 100755,100644..100755
--- 1/include/sound/pcm.h
--- 2/include/sound/pcm.h
+++ b/include/sound/pcm.h
diff --cc include/sound/soc-dai.h

index ff690e178fcf2f2f27914ac8c620d83ec8f2bf76,377693a143855fe24a827aaaa035f1c55cccfe61..c9276c0ac0086f27e7a9ec9e6c1deeddf337d19a

mode 100755,100644..100755
--- 1/include/sound/soc-dai.h
--- 2/include/sound/soc-dai.h
+++ b/include/sound/soc-dai.h
@@@ -172,9 -182,12 +182,16 @@@ struct snd_soc_dai_ops 
                 struct snd_soc_dai *);
         int (*trigger)(struct snd_pcm_substream *, int,
                 struct snd_soc_dai *);
- void (*set_volume)(unsigned char mode,unsigned char volume);
+ +
+ +      /* set volume,add by qiuen*/
++      void (*set_volume)(unsigned char mode,unsigned char volume);
++
+       /*
+        * For hardware based FIFO caused delay reporting.
+        * Optional.
+        */
+       snd_pcm_sframes_t (*delay)(struct snd_pcm_substream *,
+               struct snd_soc_dai *);
   };
   
   /*
diff --cc include/sound/soc.h

index 855a9ce5af19a9bc1351be0ae79c45e68a9b6fe2,65e9d03ed4f5e0c34ca833d6e6570de05fc78125..84695defedd353ff1de717f8528503c00a1dce01

mode 100755,100644..100755
--- 1/include/sound/soc.h
--- 2/include/sound/soc.h
+++ b/include/sound/soc.h
diff --cc init/Kconfig

index 714597c6f8426c85227892c1b1c9eabdd42bf0e1,724e9b809318e7bff67abc0fdacb5a0786bd50d2..8513290b9143e60dcb611fbdfba86cbe600e579d
--- 1/init/Kconfig
--- 2/init/Kconfig
+++ b/init/Kconfig
@@@ -115,11 -123,13 +123,14 @@@ config HAVE_KERNEL_BZIP
   config HAVE_KERNEL_LZMA
         bool
   
+ config HAVE_KERNEL_LZO
+       bool
+ 
   choice
         prompt "Kernel compression mode"
+ +      default KERNEL_LZO if ARCH_RK29
         default KERNEL_GZIP
-       depends on HAVE_KERNEL_GZIP || HAVE_KERNEL_BZIP2 || HAVE_KERNEL_LZMA
+       depends on HAVE_KERNEL_GZIP || HAVE_KERNEL_BZIP2 || HAVE_KERNEL_LZMA || HAVE_KERNEL_LZO
         help
           The linux kernel is a kind of self-extracting executable.
           Several compression algorithms are available, which differ
diff --cc init/initramfs.c

index f7ae1992a774cd062541390038d3c2a22d1cf3d4,4b9c20205092e1f7de716633c0d51bd8746e74af..ea4d291434af1d275077132d292fbfba9fcc4bdd
--- 1/init/initramfs.c
--- 2/init/initramfs.c
+++ b/init/initramfs.c
@@@ -455,11 -457,10 +457,12 @@@ static char * __init unpack_to_rootfs(c
                                          compress_name);
                                 message = msg_buf;
                         }
-               }
+               } else
+                       error("junk in compressed archive");
                 if (state != Reset)
                         error("junk in compressed archive");
+ +              else
+ +                      break;
                 this_header = saved_offset + my_inptr;
                 buf += my_inptr;
                 len -= my_inptr;
diff --cc kernel/module.c
Simple merge
diff --cc kernel/printk.c
Simple merge
diff --cc kernel/sys.c

index 3bfc93832e5a37400b655ab16223aaa087d4ccde,7f5a0cd296a96ca44e43f0db028026094dbbb57a..fef7bdb1af800c9517b87694bcd53871eb1bcf62
--- 1/kernel/sys.c
--- 2/kernel/sys.c
+++ b/kernel/sys.c
@@@ -398,14 -389,9 +406,14 @@@ SYSCALL_DEFINE4(reboot, int, magic1, in
         if ((cmd == LINUX_REBOOT_CMD_POWER_OFF) && !pm_power_off)
                 cmd = LINUX_REBOOT_CMD_HALT;
   
-       lock_kernel();
+       mutex_lock(&reboot_mutex);
         switch (cmd) {
         case LINUX_REBOOT_CMD_RESTART:
+ +              /*
+ +              *  debug trace
+ +              */
+ +              restart_dbg("%s->%d->cmd=%x",__FUNCTION__,__LINE__,cmd);
+ +              
                 kernel_restart(NULL);
                 break;
   
@@@ -424,27 -409,17 +431,26 @@@
                 panic("cannot halt");
   
         case LINUX_REBOOT_CMD_POWER_OFF:
+ +              /*
+ +              *  debug trace
+ +              */
+ +              restart_dbg("%s->%d->cmd=%x",__FUNCTION__,__LINE__,cmd);
+ +              
                 kernel_power_off();
-               unlock_kernel();
                 do_exit(0);
                 break;
   
         case LINUX_REBOOT_CMD_RESTART2:
                 if (strncpy_from_user(&buffer[0], arg, sizeof(buffer) - 1) < 0) {
-                       unlock_kernel();
-                       return -EFAULT;
+                       ret = -EFAULT;
+                       break;
                 }
                 buffer[sizeof(buffer) - 1] = '\0';
- -
+ +              /*
+ +              *  debug trace
+ +              */
+ +              restart_dbg("%s->%d->cmd=%x args=%s",__FUNCTION__,__LINE__,cmd,buffer);
+ +              
                 kernel_restart(buffer);
                 break;
   
diff --cc net/bluetooth/rfcomm/core.c

index 25692bc0a3423bb78058a9bde2b8e2479eee5b3e,ecda6d52d4d4fdd1cd3a2996bc05e26d4bb88ad8..ecda6d52d4d4fdd1cd3a2996bc05e26d4bb88ad8

mode 100755,100644..100755
--- 1/net/bluetooth/rfcomm/core.c
--- 2/net/bluetooth/rfcomm/core.c
+++ b/net/bluetooth/rfcomm/core.c
diff --cc scripts/Makefile.build
Simple merge
diff --cc sound/core/pcm_native.c

index 9a127a033536b823ceda7903f52f030afc6ac00d,d4eb2ef8078416cc8d06e5d80f3ec3bb467a4f1b..081568771b0aeffbd6bd883b3e838599d8fcd807

mode 100755,100644..100755
--- 1/sound/core/pcm_native.c
--- 2/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
diff --cc sound/soc/Kconfig
Simple merge
diff --cc sound/soc/Makefile
Simple merge
diff --cc sound/soc/codecs/Kconfig

index d1be5eaa18333a8436a24a0ef3c5699f984b2870,83f5c67d3c41630794ee8d2aa3fc54409e240a70..f122f8c748b7118d20a2774eafd221f9d831421b
--- 1/sound/soc/codecs/Kconfig
--- 2/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@@ -42,21 -55,21 +55,25 @@@ config SND_SOC_ALL_CODEC
         select SND_SOC_WM8753 if SND_SOC_I2C_AND_SPI
         select SND_SOC_WM8776 if SND_SOC_I2C_AND_SPI
         select SND_SOC_WM8900 if I2C
+ +      select SND_SOC_alc5621 if I2C
+ +      select SND_SOC_alc5631 if I2C
+ +      select SND_SOC_RT5625 if I2C
         select SND_SOC_WM8903 if I2C
+       select SND_SOC_WM8904 if I2C
         select SND_SOC_WM8940 if I2C
+       select SND_SOC_WM8955 if I2C
         select SND_SOC_WM8960 if I2C
         select SND_SOC_WM8961 if I2C
         select SND_SOC_WM8971 if I2C
         select SND_SOC_WM8974 if I2C
+       select SND_SOC_WM8978 if I2C
         select SND_SOC_WM8988 if SND_SOC_I2C_AND_SPI
         select SND_SOC_WM8990 if I2C
+ +      select SND_SOC_CS42L52 if I2C   
         select SND_SOC_WM8993 if I2C
-       select SND_SOC_WM8994 if SND_SOC_I2C_AND_SPI
+       select SND_SOC_WM8994 if MFD_WM8994
         select SND_SOC_WM9081 if I2C
+       select SND_SOC_WM9090 if I2C
         select SND_SOC_WM9705 if SND_SOC_AC97_BUS
         select SND_SOC_WM9712 if SND_SOC_AC97_BUS
         select SND_SOC_WM9713 if SND_SOC_AC97_BUS
@@@ -70,13 -83,11 +87,13 @@@
           be selected separately.
   
             If unsure select "N".
- -
+ +select SND_SOC_ALC5623_RT if I2C
+ +config SND_SOC_ALC5623
+ +        tristate
   config SND_SOC_WM_HUBS
         tristate
-       default y if SND_SOC_WM8993=y
-       default m if SND_SOC_WM8993=m
+       default y if SND_SOC_WM8993=y || SND_SOC_WM8994=y
+       default m if SND_SOC_WM8993=m || SND_SOC_WM8994=m
   
   config SND_SOC_AC97_CODEC
         tristate
diff --cc sound/soc/codecs/Makefile

index 8b9bbc44b0bd39ee99f942177b77d888b057fc4a,53524095759c62ed322a033d818c78543182749a..158acdb7ee0e43b137aabd2538fe8eba22ea7069
--- 1/sound/soc/codecs/Makefile
--- 2/sound/soc/codecs/Makefile
+++ b/sound/soc/codecs/Makefile
@@@ -30,12 -40,10 +40,14 @@@ snd-soc-wm8750-objs := wm8750.
   snd-soc-wm8753-objs := wm8753.o
   snd-soc-wm8776-objs := wm8776.o
   snd-soc-wm8900-objs := wm8900.o
+ +snd-soc-alc5621-objs := alc5621.o
+ +snd-soc-alc5631-objs := rt5631.o
+ +snd-soc-rt5625-objs := rt5625.o
+ +snd-soc-cs42l52-objs := cs42l52.o
   snd-soc-wm8903-objs := wm8903.o
+ snd-soc-wm8904-objs := wm8904.o
   snd-soc-wm8940-objs := wm8940.o
+ snd-soc-wm8955-objs := wm8955.o
   snd-soc-wm8960-objs := wm8960.o
   snd-soc-wm8961-objs := wm8961.o
   snd-soc-wm8971-objs := wm8971.o
@@@ -49,17 -58,20 +62,23 @@@ snd-soc-wm9705-objs := wm9705.
   snd-soc-wm9712-objs := wm9712.o
   snd-soc-wm9713-objs := wm9713.o
   snd-soc-wm-hubs-objs := wm_hubs.o
+ +snd-soc-rk1000-objs := rk1000_codec.o
+ snd-soc-jz4740-codec-objs := jz4740.o
+ 
   # Amp
   snd-soc-max9877-objs := max9877.o
+ snd-soc-tpa6130a2-objs := tpa6130a2.o
+ snd-soc-wm2000-objs := wm2000.o
+ snd-soc-wm9090-objs := wm9090.o
   
+ +snd-soc-alc5623-objs := alc5623_tuning.o
+ +obj-$(CONFIG_SND_SOC_ALC5623)   += snd-soc-alc5623.o
   obj-$(CONFIG_SND_SOC_AC97_CODEC)      += snd-soc-ac97.o
   obj-$(CONFIG_SND_SOC_AD1836)  += snd-soc-ad1836.o
- obj-$(CONFIG_SND_SOC_AD1938)  += snd-soc-ad1938.o
+ obj-$(CONFIG_SND_SOC_AD193X)  += snd-soc-ad193x.o
   obj-$(CONFIG_SND_SOC_AD1980)  += snd-soc-ad1980.o
   obj-$(CONFIG_SND_SOC_AD73311) += snd-soc-ad73311.o
+ obj-$(CONFIG_SND_SOC_ADS117X) += snd-soc-ads117x.o
   obj-$(CONFIG_SND_SOC_AK4104)  += snd-soc-ak4104.o
   obj-$(CONFIG_SND_SOC_AK4535)  += snd-soc-ak4535.o
   obj-$(CONFIG_SND_SOC_AK4642)  += snd-soc-ak4642.o
@@@ -87,16 -109,15 +116,19 @@@ obj-$(CONFIG_SND_SOC_WM8750)     += snd-soc
   obj-$(CONFIG_SND_SOC_WM8753)  += snd-soc-wm8753.o
   obj-$(CONFIG_SND_SOC_WM8776)  += snd-soc-wm8776.o
   obj-$(CONFIG_SND_SOC_WM8900)  += snd-soc-wm8900.o
+ +obj-$(CONFIG_SND_SOC_alc5621) += snd-soc-alc5621.o
+ +obj-$(CONFIG_SND_SOC_alc5631) += snd-soc-alc5631.o
+ +obj-$(CONFIG_SND_SOC_RT5625)  += snd-soc-rt5625.o
+ +obj-$(CONFIG_SND_SOC_CS42L52) += snd-soc-cs42l52.o
   obj-$(CONFIG_SND_SOC_WM8903)  += snd-soc-wm8903.o
- obj-$(CONFIG_SND_SOC_WM8971)  += snd-soc-wm8971.o
- obj-$(CONFIG_SND_SOC_WM8974)  += snd-soc-wm8974.o
+ obj-$(CONFIG_SND_SOC_WM8904)  += snd-soc-wm8904.o
   obj-$(CONFIG_SND_SOC_WM8940)  += snd-soc-wm8940.o
+ obj-$(CONFIG_SND_SOC_WM8955)  += snd-soc-wm8955.o
   obj-$(CONFIG_SND_SOC_WM8960)  += snd-soc-wm8960.o
   obj-$(CONFIG_SND_SOC_WM8961)  += snd-soc-wm8961.o
+ obj-$(CONFIG_SND_SOC_WM8971)  += snd-soc-wm8971.o
+ obj-$(CONFIG_SND_SOC_WM8974)  += snd-soc-wm8974.o
+ obj-$(CONFIG_SND_SOC_WM8978)  += snd-soc-wm8978.o
   obj-$(CONFIG_SND_SOC_WM8988)  += snd-soc-wm8988.o
   obj-$(CONFIG_SND_SOC_WM8990)  += snd-soc-wm8990.o
   obj-$(CONFIG_SND_SOC_WM8993)  += snd-soc-wm8993.o
@@@ -106,6 -127,9 +138,9 @@@ obj-$(CONFIG_SND_SOC_WM9705)       += snd-soc
   obj-$(CONFIG_SND_SOC_WM9712)  += snd-soc-wm9712.o
   obj-$(CONFIG_SND_SOC_WM9713)  += snd-soc-wm9713.o
   obj-$(CONFIG_SND_SOC_WM_HUBS) += snd-soc-wm-hubs.o
- -
+ +obj-$(CONFIG_SND_SOC_RK1000)  += snd-soc-rk1000.o
   # Amp
   obj-$(CONFIG_SND_SOC_MAX9877) += snd-soc-max9877.o
+ obj-$(CONFIG_SND_SOC_TPA6130A2)       += snd-soc-tpa6130a2.o
+ obj-$(CONFIG_SND_SOC_WM2000)  += snd-soc-wm2000.o
+ obj-$(CONFIG_SND_SOC_WM9090)  += snd-soc-wm9090.o
diff --cc sound/soc/codecs/wm8900.c

index dc51742593f0c91bcf5828c1b5a6b354d9340dec,4b8ffc2ea71ddbdeb01913a40f26efb7a071c107..94717434b4b9d6c8bbe9e6066d01a5c7200e7ec4

mode 100755,100644..100755
--- 1/sound/soc/codecs/wm8900.c
--- 2/sound/soc/codecs/wm8900.c
+++ b/sound/soc/codecs/wm8900.c
@@@ -230,136 -199,426 +230,136 @@@ static void wm8900_reset(struct snd_soc
         snd_soc_write(codec, WM8900_REG_RESET, 0);
   
         memcpy(codec->reg_cache, wm8900_reg_defaults,
-              sizeof(codec->reg_cache));
+              sizeof(wm8900_reg_defaults));
   }
   
- -static int wm8900_hp_event(struct snd_soc_dapm_widget *w,
- -                         struct snd_kcontrol *kcontrol, int event)
+ +void codec_set_spk(bool on)
   {
- -      struct snd_soc_codec *codec = w->codec;
- -      u16 hpctl1 = snd_soc_read(codec, WM8900_REG_HPCTL1);
- -
- -      switch (event) {
- -      case SND_SOC_DAPM_PRE_PMU:
- -              /* Clamp headphone outputs */
- -              hpctl1 = WM8900_REG_HPCTL1_HP_CLAMP_IP |
- -                      WM8900_REG_HPCTL1_HP_CLAMP_OP;
- -              snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
- -              break;
+ +      isSPKon = on;
+ +      if (on) {
+ +#ifdef SPK_CON
+ +              gpio_set_value(SPK_CON, GPIO_HIGH);
+ +#endif
+ +      } else {
+ +#ifdef SPK_CON
+ +              gpio_set_value(SPK_CON, GPIO_LOW);
+ +#endif
+ +      }
+ +}
   
- -      case SND_SOC_DAPM_POST_PMU:
- -              /* Enable the input stage */
- -              hpctl1 &= ~WM8900_REG_HPCTL1_HP_CLAMP_IP;
- -              hpctl1 |= WM8900_REG_HPCTL1_HP_SHORT |
- -                      WM8900_REG_HPCTL1_HP_SHORT2 |
- -                      WM8900_REG_HPCTL1_HP_IPSTAGE_ENA;
- -              snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
- -
- -              msleep(400);
- -
- -              /* Enable the output stage */
- -              hpctl1 &= ~WM8900_REG_HPCTL1_HP_CLAMP_OP;
- -              hpctl1 |= WM8900_REG_HPCTL1_HP_OPSTAGE_ENA;
- -              snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
- -
- -              /* Remove the shorts */
- -              hpctl1 &= ~WM8900_REG_HPCTL1_HP_SHORT2;
- -              snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
- -              hpctl1 &= ~WM8900_REG_HPCTL1_HP_SHORT;
- -              snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
- -              break;
+ +EXPORT_SYMBOL_GPL(codec_set_spk);
   
- -      case SND_SOC_DAPM_PRE_PMD:
- -              /* Short the output */
- -              hpctl1 |= WM8900_REG_HPCTL1_HP_SHORT;
- -              snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
+ +static void wm8900_powerdown(void)
+ +{
+ +      printk("Power down wm8900\n");
+ +#ifndef WM8900_NO_POWEROFF
+ +      gpio_set_value(RK29_PIN1_PD6, GPIO_LOW);
+ +#endif
+ +
+ +      snd_soc_write(wm8900_codec, WM8900_REG_POWER1, 0x210D);
+ +
+ +      if (wm8900_current_status != WM8900_IS_SHUTDOWN) {
+ +#ifdef SPK_CON
+ +              gpio_set_value(SPK_CON, GPIO_LOW);
+ +#endif
+ +              msleep(20);
+ +              snd_soc_write(wm8900_codec, WM8900_REG_RESET, 0);
+ +              wm8900_current_status = WM8900_IS_SHUTDOWN;
+ +      }
+ +}
   
- -              /* Disable the output stage */
- -              hpctl1 &= ~WM8900_REG_HPCTL1_HP_OPSTAGE_ENA;
- -              snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
+ +static void wm8900_work(struct work_struct *work)
+ +{
+ +      WM8900_DBG("Enter::wm8900_work : wm8900_work_type = %d\n", wm8900_work_type);
   
- -              /* Clamp the outputs and power down input */
- -              hpctl1 |= WM8900_REG_HPCTL1_HP_CLAMP_IP |
- -                      WM8900_REG_HPCTL1_HP_CLAMP_OP;
- -              hpctl1 &= ~WM8900_REG_HPCTL1_HP_IPSTAGE_ENA;
- -              snd_soc_write(codec, WM8900_REG_HPCTL1, hpctl1);
+ +      switch (wm8900_work_type) {
+ +      case WM8900_WORK_POWERDOWN_PLAYBACK :
                 break;
- -
- -      case SND_SOC_DAPM_POST_PMD:
- -              /* Disable everything */
- -              snd_soc_write(codec, WM8900_REG_HPCTL1, 0);
+ +      case WM8900_WORK_POWERDOWN_CAPTURE:
+ +              snd_soc_write(wm8900_codec, WM8900_REG_POWER1, 0x210D);
+ +              break;
+ +      case WM8900_WORK_POWERDOWN_PLAYBACK_CAPTURE:
+ +              wm8900_powerdown();
                 break;
- -
         default:
- -              BUG();
+ +              break;
         }
   
- -      return 0;
+ +      wm8900_work_type = WM8900_WORK_NULL;
   }
   
- -static const DECLARE_TLV_DB_SCALE(out_pga_tlv, -5700, 100, 0);
- -
- -static const DECLARE_TLV_DB_SCALE(out_mix_tlv, -1500, 300, 0);
- -
- -static const DECLARE_TLV_DB_SCALE(in_boost_tlv, -1200, 600, 0);
- -
- -static const DECLARE_TLV_DB_SCALE(in_pga_tlv, -1200, 100, 0);
- -
- -static const DECLARE_TLV_DB_SCALE(dac_boost_tlv, 0, 600, 0);
- -
- -static const DECLARE_TLV_DB_SCALE(dac_tlv, -7200, 75, 1);
- -
- -static const DECLARE_TLV_DB_SCALE(adc_svol_tlv, -3600, 300, 0);
- -
- -static const DECLARE_TLV_DB_SCALE(adc_tlv, -7200, 75, 1);
- -
- -static const char *mic_bias_level_txt[] = { "0.9*AVDD", "0.65*AVDD" };
- -
- -static const struct soc_enum mic_bias_level =
- -SOC_ENUM_SINGLE(WM8900_REG_INCTL, 8, 2, mic_bias_level_txt);
- -
- -static const char *dac_mute_rate_txt[] = { "Fast", "Slow" };
- -
- -static const struct soc_enum dac_mute_rate =
- -SOC_ENUM_SINGLE(WM8900_REG_DACCTRL, 7, 2, dac_mute_rate_txt);
- -
- -static const char *dac_deemphasis_txt[] = {
- -      "Disabled", "32kHz", "44.1kHz", "48kHz"
- -};
- -
- -static const struct soc_enum dac_deemphasis =
- -SOC_ENUM_SINGLE(WM8900_REG_DACCTRL, 4, 4, dac_deemphasis_txt);
- -
- -static const char *adc_hpf_cut_txt[] = {
- -      "Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"
- -};
- -
- -static const struct soc_enum adc_hpf_cut =
- -SOC_ENUM_SINGLE(WM8900_REG_ADCCTRL, 5, 4, adc_hpf_cut_txt);
- -
- -static const char *lr_txt[] = {
- -      "Left", "Right"
- -};
- -
- -static const struct soc_enum aifl_src =
- -SOC_ENUM_SINGLE(WM8900_REG_AUDIO1, 15, 2, lr_txt);
- -
- -static const struct soc_enum aifr_src =
- -SOC_ENUM_SINGLE(WM8900_REG_AUDIO1, 14, 2, lr_txt);
- -
- -static const struct soc_enum dacl_src =
- -SOC_ENUM_SINGLE(WM8900_REG_AUDIO2, 15, 2, lr_txt);
- -
- -static const struct soc_enum dacr_src =
- -SOC_ENUM_SINGLE(WM8900_REG_AUDIO2, 14, 2, lr_txt);
- -
- -static const char *sidetone_txt[] = {
- -      "Disabled", "Left ADC", "Right ADC"
- -};
- -
- -static const struct soc_enum dacl_sidetone =
- -SOC_ENUM_SINGLE(WM8900_REG_SIDETONE, 2, 3, sidetone_txt);
- -
- -static const struct soc_enum dacr_sidetone =
- -SOC_ENUM_SINGLE(WM8900_REG_SIDETONE, 0, 3, sidetone_txt);
- -
- -static const struct snd_kcontrol_new wm8900_snd_controls[] = {
- -SOC_ENUM("Mic Bias Level", mic_bias_level),
- -
- -SOC_SINGLE_TLV("Left Input PGA Volume", WM8900_REG_LINVOL, 0, 31, 0,
- -             in_pga_tlv),
- -SOC_SINGLE("Left Input PGA Switch", WM8900_REG_LINVOL, 6, 1, 1),
- -SOC_SINGLE("Left Input PGA ZC Switch", WM8900_REG_LINVOL, 7, 1, 0),
- -
- -SOC_SINGLE_TLV("Right Input PGA Volume", WM8900_REG_RINVOL, 0, 31, 0,
- -             in_pga_tlv),
- -SOC_SINGLE("Right Input PGA Switch", WM8900_REG_RINVOL, 6, 1, 1),
- -SOC_SINGLE("Right Input PGA ZC Switch", WM8900_REG_RINVOL, 7, 1, 0),
- -
- -SOC_SINGLE("DAC Soft Mute Switch", WM8900_REG_DACCTRL, 6, 1, 1),
- -SOC_ENUM("DAC Mute Rate", dac_mute_rate),
- -SOC_SINGLE("DAC Mono Switch", WM8900_REG_DACCTRL, 9, 1, 0),
- -SOC_ENUM("DAC Deemphasis", dac_deemphasis),
- -SOC_SINGLE("DAC Sigma-Delta Modulator Clock Switch", WM8900_REG_DACCTRL,
- -         12, 1, 0),
- -
- -SOC_SINGLE("ADC HPF Switch", WM8900_REG_ADCCTRL, 8, 1, 0),
- -SOC_ENUM("ADC HPF Cut-Off", adc_hpf_cut),
- -SOC_DOUBLE("ADC Invert Switch", WM8900_REG_ADCCTRL, 1, 0, 1, 0),
- -SOC_SINGLE_TLV("Left ADC Sidetone Volume", WM8900_REG_SIDETONE, 9, 12, 0,
- -             adc_svol_tlv),
- -SOC_SINGLE_TLV("Right ADC Sidetone Volume", WM8900_REG_SIDETONE, 5, 12, 0,
- -             adc_svol_tlv),
- -SOC_ENUM("Left Digital Audio Source", aifl_src),
- -SOC_ENUM("Right Digital Audio Source", aifr_src),
- -
- -SOC_SINGLE_TLV("DAC Input Boost Volume", WM8900_REG_AUDIO2, 10, 4, 0,
- -             dac_boost_tlv),
- -SOC_ENUM("Left DAC Source", dacl_src),
- -SOC_ENUM("Right DAC Source", dacr_src),
- -SOC_ENUM("Left DAC Sidetone", dacl_sidetone),
- -SOC_ENUM("Right DAC Sidetone", dacr_sidetone),
- -SOC_DOUBLE("DAC Invert Switch", WM8900_REG_DACCTRL, 1, 0, 1, 0),
- -
- -SOC_DOUBLE_R_TLV("Digital Playback Volume",
- -               WM8900_REG_LDAC_DV, WM8900_REG_RDAC_DV,
- -               1, 96, 0, dac_tlv),
- -SOC_DOUBLE_R_TLV("Digital Capture Volume",
- -               WM8900_REG_LADC_DV, WM8900_REG_RADC_DV, 1, 119, 0, adc_tlv),
- -
- -SOC_SINGLE_TLV("LINPUT3 Bypass Volume", WM8900_REG_LOUTMIXCTL1, 4, 7, 0,
- -             out_mix_tlv),
- -SOC_SINGLE_TLV("RINPUT3 Bypass Volume", WM8900_REG_ROUTMIXCTL1, 4, 7, 0,
- -             out_mix_tlv),
- -SOC_SINGLE_TLV("Left AUX Bypass Volume", WM8900_REG_AUXOUT_CTL, 4, 7, 0,
- -             out_mix_tlv),
- -SOC_SINGLE_TLV("Right AUX Bypass Volume", WM8900_REG_AUXOUT_CTL, 0, 7, 0,
- -             out_mix_tlv),
- -
- -SOC_SINGLE_TLV("LeftIn to RightOut Mixer Volume", WM8900_REG_BYPASS1, 0, 7, 0,
- -             out_mix_tlv),
- -SOC_SINGLE_TLV("LeftIn to LeftOut Mixer Volume", WM8900_REG_BYPASS1, 4, 7, 0,
- -             out_mix_tlv),
- -SOC_SINGLE_TLV("RightIn to LeftOut Mixer Volume", WM8900_REG_BYPASS2, 0, 7, 0,
- -             out_mix_tlv),
- -SOC_SINGLE_TLV("RightIn to RightOut Mixer Volume", WM8900_REG_BYPASS2, 4, 7, 0,
- -             out_mix_tlv),
- -
- -SOC_SINGLE_TLV("IN2L Boost Volume", WM8900_REG_INBOOSTMIX1, 0, 3, 0,
- -             in_boost_tlv),
- -SOC_SINGLE_TLV("IN3L Boost Volume", WM8900_REG_INBOOSTMIX1, 4, 3, 0,
- -             in_boost_tlv),
- -SOC_SINGLE_TLV("IN2R Boost Volume", WM8900_REG_INBOOSTMIX2, 0, 3, 0,
- -             in_boost_tlv),
- -SOC_SINGLE_TLV("IN3R Boost Volume", WM8900_REG_INBOOSTMIX2, 4, 3, 0,
- -             in_boost_tlv),
- -SOC_SINGLE_TLV("Left AUX Boost Volume", WM8900_REG_AUXBOOST, 4, 3, 0,
- -             in_boost_tlv),
- -SOC_SINGLE_TLV("Right AUX Boost Volume", WM8900_REG_AUXBOOST, 0, 3, 0,
- -             in_boost_tlv),
- -
- -SOC_DOUBLE_R_TLV("LINEOUT1 Volume", WM8900_REG_LOUT1CTL, WM8900_REG_ROUT1CTL,
- -             0, 63, 0, out_pga_tlv),
- -SOC_DOUBLE_R("LINEOUT1 Switch", WM8900_REG_LOUT1CTL, WM8900_REG_ROUT1CTL,
- -           6, 1, 1),
- -SOC_DOUBLE_R("LINEOUT1 ZC Switch", WM8900_REG_LOUT1CTL, WM8900_REG_ROUT1CTL,
- -           7, 1, 0),
- -
- -SOC_DOUBLE_R_TLV("LINEOUT2 Volume",
- -               WM8900_REG_LOUT2CTL, WM8900_REG_ROUT2CTL,
- -               0, 63, 0, out_pga_tlv),
- -SOC_DOUBLE_R("LINEOUT2 Switch",
- -           WM8900_REG_LOUT2CTL, WM8900_REG_ROUT2CTL, 6, 1, 1),
- -SOC_DOUBLE_R("LINEOUT2 ZC Switch",
- -           WM8900_REG_LOUT2CTL, WM8900_REG_ROUT2CTL, 7, 1, 0),
- -SOC_SINGLE("LINEOUT2 LP -12dB", WM8900_REG_LOUTMIXCTL1,
- -         0, 1, 1),
- -
- -};
- -
- -static const struct snd_kcontrol_new wm8900_dapm_loutput2_control =
- -SOC_DAPM_SINGLE("LINEOUT2L Switch", WM8900_REG_POWER3, 6, 1, 0);
- -
- -static const struct snd_kcontrol_new wm8900_dapm_routput2_control =
- -SOC_DAPM_SINGLE("LINEOUT2R Switch", WM8900_REG_POWER3, 5, 1, 0);
- -
- -static const struct snd_kcontrol_new wm8900_loutmix_controls[] = {
- -SOC_DAPM_SINGLE("LINPUT3 Bypass Switch", WM8900_REG_LOUTMIXCTL1, 7, 1, 0),
- -SOC_DAPM_SINGLE("AUX Bypass Switch", WM8900_REG_AUXOUT_CTL, 7, 1, 0),
- -SOC_DAPM_SINGLE("Left Input Mixer Switch", WM8900_REG_BYPASS1, 7, 1, 0),
- -SOC_DAPM_SINGLE("Right Input Mixer Switch", WM8900_REG_BYPASS2, 3, 1, 0),
- -SOC_DAPM_SINGLE("DACL Switch", WM8900_REG_LOUTMIXCTL1, 8, 1, 0),
- -};
- -
- -static const struct snd_kcontrol_new wm8900_routmix_controls[] = {
- -SOC_DAPM_SINGLE("RINPUT3 Bypass Switch", WM8900_REG_ROUTMIXCTL1, 7, 1, 0),
- -SOC_DAPM_SINGLE("AUX Bypass Switch", WM8900_REG_AUXOUT_CTL, 3, 1, 0),
- -SOC_DAPM_SINGLE("Left Input Mixer Switch", WM8900_REG_BYPASS1, 3, 1, 0),
- -SOC_DAPM_SINGLE("Right Input Mixer Switch", WM8900_REG_BYPASS2, 7, 1, 0),
- -SOC_DAPM_SINGLE("DACR Switch", WM8900_REG_ROUTMIXCTL1, 8, 1, 0),
- -};
- -
- -static const struct snd_kcontrol_new wm8900_linmix_controls[] = {
- -SOC_DAPM_SINGLE("LINPUT2 Switch", WM8900_REG_INBOOSTMIX1, 2, 1, 1),
- -SOC_DAPM_SINGLE("LINPUT3 Switch", WM8900_REG_INBOOSTMIX1, 6, 1, 1),
- -SOC_DAPM_SINGLE("AUX Switch", WM8900_REG_AUXBOOST, 6, 1, 1),
- -SOC_DAPM_SINGLE("Input PGA Switch", WM8900_REG_ADCPATH, 6, 1, 0),
- -};
+ +static void wm8900_set_hw(struct snd_soc_codec *codec)
+ +{
+ +      u16 reg;
   
- -static const struct snd_kcontrol_new wm8900_rinmix_controls[] = {
- -SOC_DAPM_SINGLE("RINPUT2 Switch", WM8900_REG_INBOOSTMIX2, 2, 1, 1),
- -SOC_DAPM_SINGLE("RINPUT3 Switch", WM8900_REG_INBOOSTMIX2, 6, 1, 1),
- -SOC_DAPM_SINGLE("AUX Switch", WM8900_REG_AUXBOOST, 2, 1, 1),
- -SOC_DAPM_SINGLE("Input PGA Switch", WM8900_REG_ADCPATH, 2, 1, 0),
- -};
+ +      if (wm8900_current_status & WM8900_IS_STARTUP)
+ +              return;
+ +
+ +      printk("Power up wm8900\n");
+ +//CLK , PATH, VOL,POW.
+ +      
+ +      snd_soc_write(codec, WM8900_REG_HPCTL1, 0x30);
+ +      snd_soc_write(codec, WM8900_REG_POWER1, 0x0100);
+ +      snd_soc_write(codec, WM8900_REG_POWER3, 0x60);
+ +      snd_soc_write(codec, WM8900_REG_POWER1, 0x0101);
+ +      msleep(400);
+ +      snd_soc_write(codec, WM8900_REG_POWER1, 0x0109);
+ +      snd_soc_write(codec, WM8900_REG_ADDCTL, 0x02);
+ +      snd_soc_write(codec, WM8900_REG_POWER1, 0x09);
+ +      snd_soc_write(codec, WM8900_REG_POWER3, 0xEF);
+ +      snd_soc_write(codec, WM8900_REG_DACCTRL, WM8900_REG_DACCTRL_MUTE);
+ +      snd_soc_write(codec, WM8900_REG_LOUTMIXCTL1, 0x150);
+ +      snd_soc_write(codec, WM8900_REG_ROUTMIXCTL1, 0x150);
+ +
+ +      snd_soc_write(codec, WM8900_REG_HPCTL1, 0xB0);
+ +      snd_soc_write(codec, WM8900_REG_HPCTL1, 0xF0);
+ +      snd_soc_write(codec, WM8900_REG_HPCTL1, 0xC0);
+ +
+ +      //for recorder
+ +      snd_soc_write(codec, WM8900_REG_POWER1, 0x210D);
+ +      snd_soc_write(codec, WM8900_REG_POWER2, 0xC1AF);
+ +
+ +      snd_soc_write(codec, WM8900_REG_LADC_DV, 0x01C0);
+ +      snd_soc_write(codec, WM8900_REG_RADC_DV, 0x01C0);
+ +
+ +      snd_soc_write(codec, WM8900_REG_INCTL, 0x0040);
+ +
+ +      snd_soc_write(codec, WM8900_REG_LINVOL, 0x011A);
+ +      snd_soc_write(codec, WM8900_REG_RINVOL, 0x011A);
+ +      snd_soc_write(codec, WM8900_REG_INBOOSTMIX1, 0x0042);
+ +      snd_soc_write(codec, WM8900_REG_INBOOSTMIX2, 0x0042);
+ +      snd_soc_write(codec, WM8900_REG_ADCPATH, 0x0055);
   
- -static const struct snd_kcontrol_new wm8900_linpga_controls[] = {
- -SOC_DAPM_SINGLE("LINPUT1 Switch", WM8900_REG_INCTL, 6, 1, 0),
- -SOC_DAPM_SINGLE("LINPUT2 Switch", WM8900_REG_INCTL, 5, 1, 0),
- -SOC_DAPM_SINGLE("LINPUT3 Switch", WM8900_REG_INCTL, 4, 1, 0),
- -};
+ +      reg = snd_soc_read(codec, WM8900_REG_DACCTRL);
   
- -static const struct snd_kcontrol_new wm8900_rinpga_controls[] = {
- -SOC_DAPM_SINGLE("RINPUT1 Switch", WM8900_REG_INCTL, 2, 1, 0),
- -SOC_DAPM_SINGLE("RINPUT2 Switch", WM8900_REG_INCTL, 1, 1, 0),
- -SOC_DAPM_SINGLE("RINPUT3 Switch", WM8900_REG_INCTL, 0, 1, 0),
- -};
+ +      reg &= ~WM8900_REG_DACCTRL_MUTE;
+ +      snd_soc_write(codec, WM8900_REG_DACCTRL, reg);
   
- -static const char *wm9700_lp_mux[] = { "Disabled", "Enabled" };
- -
- -static const struct soc_enum wm8900_lineout2_lp_mux =
- -SOC_ENUM_SINGLE(WM8900_REG_LOUTMIXCTL1, 1, 2, wm9700_lp_mux);
- -
- -static const struct snd_kcontrol_new wm8900_lineout2_lp =
- -SOC_DAPM_ENUM("Route", wm8900_lineout2_lp_mux);
- -
- -static const struct snd_soc_dapm_widget wm8900_dapm_widgets[] = {
- -
- -/* Externally visible pins */
- -SND_SOC_DAPM_OUTPUT("LINEOUT1L"),
- -SND_SOC_DAPM_OUTPUT("LINEOUT1R"),
- -SND_SOC_DAPM_OUTPUT("LINEOUT2L"),
- -SND_SOC_DAPM_OUTPUT("LINEOUT2R"),
- -SND_SOC_DAPM_OUTPUT("HP_L"),
- -SND_SOC_DAPM_OUTPUT("HP_R"),
- -
- -SND_SOC_DAPM_INPUT("RINPUT1"),
- -SND_SOC_DAPM_INPUT("LINPUT1"),
- -SND_SOC_DAPM_INPUT("RINPUT2"),
- -SND_SOC_DAPM_INPUT("LINPUT2"),
- -SND_SOC_DAPM_INPUT("RINPUT3"),
- -SND_SOC_DAPM_INPUT("LINPUT3"),
- -SND_SOC_DAPM_INPUT("AUX"),
- -
- -SND_SOC_DAPM_VMID("VMID"),
- -
- -/* Input */
- -SND_SOC_DAPM_MIXER("Left Input PGA", WM8900_REG_POWER2, 3, 0,
- -                 wm8900_linpga_controls,
- -                 ARRAY_SIZE(wm8900_linpga_controls)),
- -SND_SOC_DAPM_MIXER("Right Input PGA", WM8900_REG_POWER2, 2, 0,
- -                 wm8900_rinpga_controls,
- -                 ARRAY_SIZE(wm8900_rinpga_controls)),
- -
- -SND_SOC_DAPM_MIXER("Left Input Mixer", WM8900_REG_POWER2, 5, 0,
- -                 wm8900_linmix_controls,
- -                 ARRAY_SIZE(wm8900_linmix_controls)),
- -SND_SOC_DAPM_MIXER("Right Input Mixer", WM8900_REG_POWER2, 4, 0,
- -                 wm8900_rinmix_controls,
- -                 ARRAY_SIZE(wm8900_rinmix_controls)),
- -
- -SND_SOC_DAPM_MICBIAS("Mic Bias", WM8900_REG_POWER1, 4, 0),
- -
- -SND_SOC_DAPM_ADC("ADCL", "Left HiFi Capture", WM8900_REG_POWER2, 1, 0),
- -SND_SOC_DAPM_ADC("ADCR", "Right HiFi Capture", WM8900_REG_POWER2, 0, 0),
- -
- -/* Output */
- -SND_SOC_DAPM_DAC("DACL", "Left HiFi Playback", WM8900_REG_POWER3, 1, 0),
- -SND_SOC_DAPM_DAC("DACR", "Right HiFi Playback", WM8900_REG_POWER3, 0, 0),
- -
- -SND_SOC_DAPM_PGA_E("Headphone Amplifier", WM8900_REG_POWER3, 7, 0, NULL, 0,
- -                 wm8900_hp_event,
- -                 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
- -                 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD),
- -
- -SND_SOC_DAPM_PGA("LINEOUT1L PGA", WM8900_REG_POWER2, 8, 0, NULL, 0),
- -SND_SOC_DAPM_PGA("LINEOUT1R PGA", WM8900_REG_POWER2, 7, 0, NULL, 0),
- -
- -SND_SOC_DAPM_MUX("LINEOUT2 LP", SND_SOC_NOPM, 0, 0, &wm8900_lineout2_lp),
- -SND_SOC_DAPM_PGA("LINEOUT2L PGA", WM8900_REG_POWER3, 6, 0, NULL, 0),
- -SND_SOC_DAPM_PGA("LINEOUT2R PGA", WM8900_REG_POWER3, 5, 0, NULL, 0),
- -
- -SND_SOC_DAPM_MIXER("Left Output Mixer", WM8900_REG_POWER3, 3, 0,
- -                 wm8900_loutmix_controls,
- -                 ARRAY_SIZE(wm8900_loutmix_controls)),
- -SND_SOC_DAPM_MIXER("Right Output Mixer", WM8900_REG_POWER3, 2, 0,
- -                 wm8900_routmix_controls,
- -                 ARRAY_SIZE(wm8900_routmix_controls)),
- -};
+ +      snd_soc_write(codec, WM8900_REG_LOUT1CTL, 0x130);
+ +      snd_soc_write(codec, WM8900_REG_ROUT1CTL, 0x130);
   
- -/* Target, Path, Source */
- -static const struct snd_soc_dapm_route audio_map[] = {
- -/* Inputs */
- -{"Left Input PGA", "LINPUT1 Switch", "LINPUT1"},
- -{"Left Input PGA", "LINPUT2 Switch", "LINPUT2"},
- -{"Left Input PGA", "LINPUT3 Switch", "LINPUT3"},
- -
- -{"Right Input PGA", "RINPUT1 Switch", "RINPUT1"},
- -{"Right Input PGA", "RINPUT2 Switch", "RINPUT2"},
- -{"Right Input PGA", "RINPUT3 Switch", "RINPUT3"},
- -
- -{"Left Input Mixer", "LINPUT2 Switch", "LINPUT2"},
- -{"Left Input Mixer", "LINPUT3 Switch", "LINPUT3"},
- -{"Left Input Mixer", "AUX Switch", "AUX"},
- -{"Left Input Mixer", "Input PGA Switch", "Left Input PGA"},
- -
- -{"Right Input Mixer", "RINPUT2 Switch", "RINPUT2"},
- -{"Right Input Mixer", "RINPUT3 Switch", "RINPUT3"},
- -{"Right Input Mixer", "AUX Switch", "AUX"},
- -{"Right Input Mixer", "Input PGA Switch", "Right Input PGA"},
- -
- -{"ADCL", NULL, "Left Input Mixer"},
- -{"ADCR", NULL, "Right Input Mixer"},
- -
- -/* Outputs */
- -{"LINEOUT1L", NULL, "LINEOUT1L PGA"},
- -{"LINEOUT1L PGA", NULL, "Left Output Mixer"},
- -{"LINEOUT1R", NULL, "LINEOUT1R PGA"},
- -{"LINEOUT1R PGA", NULL, "Right Output Mixer"},
- -
- -{"LINEOUT2L PGA", NULL, "Left Output Mixer"},
- -{"LINEOUT2 LP", "Disabled", "LINEOUT2L PGA"},
- -{"LINEOUT2 LP", "Enabled", "Left Output Mixer"},
- -{"LINEOUT2L", NULL, "LINEOUT2 LP"},
- -
- -{"LINEOUT2R PGA", NULL, "Right Output Mixer"},
- -{"LINEOUT2 LP", "Disabled", "LINEOUT2R PGA"},
- -{"LINEOUT2 LP", "Enabled", "Right Output Mixer"},
- -{"LINEOUT2R", NULL, "LINEOUT2 LP"},
- -
- -{"Left Output Mixer", "LINPUT3 Bypass Switch", "LINPUT3"},
- -{"Left Output Mixer", "AUX Bypass Switch", "AUX"},
- -{"Left Output Mixer", "Left Input Mixer Switch", "Left Input Mixer"},
- -{"Left Output Mixer", "Right Input Mixer Switch", "Right Input Mixer"},
- -{"Left Output Mixer", "DACL Switch", "DACL"},
- -
- -{"Right Output Mixer", "RINPUT3 Bypass Switch", "RINPUT3"},
- -{"Right Output Mixer", "AUX Bypass Switch", "AUX"},
- -{"Right Output Mixer", "Left Input Mixer Switch", "Left Input Mixer"},
- -{"Right Output Mixer", "Right Input Mixer Switch", "Right Input Mixer"},
- -{"Right Output Mixer", "DACR Switch", "DACR"},
- -
- -/* Note that the headphone output stage needs to be connected
- - * externally to LINEOUT2 via DC blocking capacitors.  Other
- - * configurations are not supported.
- - *
- - * Note also that left and right headphone paths are treated as a
- - * mono path.
- - */
- -{"Headphone Amplifier", NULL, "LINEOUT2 LP"},
- -{"Headphone Amplifier", NULL, "LINEOUT2 LP"},
- -{"HP_L", NULL, "Headphone Amplifier"},
- -{"HP_R", NULL, "Headphone Amplifier"},
- -};
+ +      /* Turn up vol slowly, for HP out pop noise */
   
- -static int wm8900_add_widgets(struct snd_soc_codec *codec)
- -{
- -      snd_soc_dapm_new_controls(codec, wm8900_dapm_widgets,
- -                                ARRAY_SIZE(wm8900_dapm_widgets));
+ +      for (reg = 0; reg <= 0x33; reg += 0x10) {
+ +                      snd_soc_write(codec, WM8900_REG_LOUT2CTL, 0x100 + reg);
+ +                      snd_soc_write(codec, WM8900_REG_ROUT2CTL, 0x100 + reg);
+ +                      msleep(5);
+ +      }
+ +      snd_soc_write(codec, WM8900_REG_LOUT2CTL, 0x133);
+ +      snd_soc_write(codec, WM8900_REG_ROUT2CTL, 0x133);
   
- -      snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
+ +      msleep(20);
   
- -      return 0;
+ +#ifdef SPK_CON
+ +      if (isSPKon) {
+ +              gpio_set_value(SPK_CON, GPIO_HIGH);
+ +      }
+ +#endif
+ +#ifndef WM8900_NO_POWEROFF
+ +      msleep(350);
+ +      gpio_set_value(RK29_PIN1_PD6, GPIO_HIGH);
+ +#endif
+ +      wm8900_current_status |= WM8900_IS_STARTUP;
   }
   
   static int wm8900_hw_params(struct snd_pcm_substream *substream,
@@@ -548,12 -812,9 +548,12 @@@ reenable
         return 0;
   }
   
- static int wm8900_set_dai_pll(struct snd_soc_dai *codec_dai,
-               int pll_id, unsigned int freq_in, unsigned int freq_out)
+ static int wm8900_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
+               int source, unsigned int freq_in, unsigned int freq_out)
   {
+ +
+ +      WM8900_DBG("Enter:%s, %d \n", __FUNCTION__, __LINE__);
+ +
         return wm8900_set_fll(codec_dai->codec, pll_id, freq_in, freq_out);
   }
   
@@@ -999,9 -1155,14 +998,8 @@@ static int wm8900_resume(struct platfor
   {
         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
         struct snd_soc_codec *codec = socdev->card->codec;
-       struct wm8900_priv *wm8900 = codec->private_data;
-       int ret;
+       struct wm8900_priv *wm8900 = snd_soc_codec_get_drvdata(codec);
- -      u16 *cache;
- -      int i, ret;
   
- -      cache = kmemdup(codec->reg_cache, sizeof(wm8900_reg_defaults),
- -                      GFP_KERNEL);
- -
- -      wm8900_reset(codec);
         wm8900_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
   
         /* Restart the FLL? */
@@@ -1123,28 -1305,6 +1116,12 @@@ static __devexit int wm8900_i2c_remove(
         return 0;
   }
   
- #ifdef CONFIG_PM
- static int wm8900_i2c_suspend(struct i2c_client *client, pm_message_t msg)
- {
-       WM8900_DBG("Enter:%s, %d \n", __FUNCTION__, __LINE__);
-       return snd_soc_suspend_device(&client->dev);
- }
- 
- static int wm8900_i2c_resume(struct i2c_client *client)
- {
-       return snd_soc_resume_device(&client->dev);
- }
- #else
- #define wm8900_i2c_suspend NULL
- #define wm8900_i2c_resume NULL
- #endif
- 
+ +void wm8900_i2c_shutdown(struct i2c_client *client)
+ +{
+ +      WM8900_DBG("Enter:%s, %d \n", __FUNCTION__, __LINE__);
+ +      wm8900_powerdown();
+ +}
+ +
   static const struct i2c_device_id wm8900_i2c_id[] = {
         { "wm8900", 0 },
         { }
@@@ -1158,9 -1318,6 +1135,7 @@@ static struct i2c_driver wm8900_i2c_dri
         },
         .probe = wm8900_i2c_probe,
         .remove = __devexit_p(wm8900_i2c_remove),
-       .suspend = wm8900_i2c_suspend,
-       .resume = wm8900_i2c_resume,
+ +      .shutdown = wm8900_i2c_shutdown,
         .id_table = wm8900_i2c_id,
   };
   
@@@ -1196,28 -1342,10 +1171,22 @@@ static int wm8900_probe(struct platform
                 goto pcm_err;
         }
   
-       ret = snd_soc_init_card(socdev);
-       if (ret < 0) {
-               dev_err(&pdev->dev, "Failed to register card\n");
-               goto card_err;
-       }
- 
- -      snd_soc_add_controls(codec, wm8900_snd_controls,
- -                              ARRAY_SIZE(wm8900_snd_controls));
- -      wm8900_add_widgets(codec);
+ +      wm8900_workq = create_freezeable_workqueue("wm8900");
+ +      if (wm8900_workq == NULL) {
+ +              kfree(codec->private_data);
+ +              kfree(codec);
+ +              return -ENOMEM;
+ +      }
+ +
+ +#ifdef WM8900_NO_POWEROFF
+ +      wm8900_set_hw(codec);
+ +#endif
   
+ +      return ret;
+ +
+ +card_err:
+ +      snd_soc_free_pcms(socdev);
+ +      snd_soc_dapm_free(socdev);
   pcm_err:
         return ret;
   }
diff --cc sound/soc/codecs/wm8988.c
Simple merge
diff --cc sound/soc/codecs/wm8994.c

index e4e8dc12fd45d0e07236dc47778911703f14a800,522249d5c2b463d9917e751bc0cac0fa9711c1da..c91e7bf73570da674226680956c1d022c9736eaf

mode 100755,100644..100755
--- 1/sound/soc/codecs/wm8994.c
--- 2/sound/soc/codecs/wm8994.c
+++ b/sound/soc/codecs/wm8994.c
@@@ -137,2733 -65,2954 +137,2735 @@@ unsigned short BT_vol_table[16]            ={0x01
   
   /* codec private data */
   struct wm8994_priv {
- -      struct wm_hubs_data hubs;
+ +      struct mutex io_lock;
+ +      struct mutex route_lock;
+ +      int sysclk;
+ +      int mclk;
+ +      int fmt;//master or salve
+ +      int rate;//Sampling rate
         struct snd_soc_codec codec;
- -      u16 reg_cache[WM8994_REG_CACHE_SIZE + 1];
- -      int sysclk[2];
- -      int sysclk_rate[2];
- -      int mclk[2];
- -      int aifclk[2];
- -      struct fll_config fll[2], fll_suspend[2];
- -
- -      int dac_rates[2];
- -      int lrclk_shared[2];
- -
- -      /* Platform dependant DRC configuration */
- -      const char **drc_texts;
- -      int drc_cfg[WM8994_NUM_DRC];
- -      struct soc_enum drc_enum;
- -
- -      /* Platform dependant ReTune mobile configuration */
- -      int num_retune_mobile_texts;
- -      const char **retune_mobile_texts;
- -      int retune_mobile_cfg[WM8994_NUM_EQ];
- -      struct soc_enum retune_mobile_enum;
- -
- -      struct wm8994_micdet micdet[2];
- -
- -      int revision;
+ +      struct snd_kcontrol *kcontrol;//The current working path
+ +      char RW_status;                         //ERROR = -1, TRUE = 0;
         struct wm8994_pdata *pdata;
- -};
+ +      
+ +      struct delayed_work wm8994_delayed_work;
+ +      int work_type;
   
- -static struct {
- -      unsigned short  readable;   /* Mask of readable bits */
- -      unsigned short  writable;   /* Mask of writable bits */
- -      unsigned short  vol;        /* Mask of volatile bits */
- -} access_masks[] = {
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R0     - Software Reset */
- -      { 0x3B37, 0x3B37, 0x0000 }, /* R1     - Power Management (1) */
- -      { 0x6BF0, 0x6BF0, 0x0000 }, /* R2     - Power Management (2) */
- -      { 0x3FF0, 0x3FF0, 0x0000 }, /* R3     - Power Management (3) */
- -      { 0x3F3F, 0x3F3F, 0x0000 }, /* R4     - Power Management (4) */
- -      { 0x3F0F, 0x3F0F, 0x0000 }, /* R5     - Power Management (5) */
- -      { 0x003F, 0x003F, 0x0000 }, /* R6     - Power Management (6) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R7 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R8 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R9 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R10 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R11 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R12 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R13 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R14 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R15 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R16 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R17 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R18 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R19 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R20 */
- -      { 0x01C0, 0x01C0, 0x0000 }, /* R21    - Input Mixer (1) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R22 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R23 */
- -      { 0x00DF, 0x01DF, 0x0000 }, /* R24    - Left Line Input 1&2 Volume */
- -      { 0x00DF, 0x01DF, 0x0000 }, /* R25    - Left Line Input 3&4 Volume */
- -      { 0x00DF, 0x01DF, 0x0000 }, /* R26    - Right Line Input 1&2 Volume */
- -      { 0x00DF, 0x01DF, 0x0000 }, /* R27    - Right Line Input 3&4 Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R28    - Left Output Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R29    - Right Output Volume */
- -      { 0x0077, 0x0077, 0x0000 }, /* R30    - Line Outputs Volume */
- -      { 0x0030, 0x0030, 0x0000 }, /* R31    - HPOUT2 Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R32    - Left OPGA Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R33    - Right OPGA Volume */
- -      { 0x007F, 0x007F, 0x0000 }, /* R34    - SPKMIXL Attenuation */
- -      { 0x017F, 0x017F, 0x0000 }, /* R35    - SPKMIXR Attenuation */
- -      { 0x003F, 0x003F, 0x0000 }, /* R36    - SPKOUT Mixers */
- -      { 0x003F, 0x003F, 0x0000 }, /* R37    - ClassD */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R38    - Speaker Volume Left */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R39    - Speaker Volume Right */
- -      { 0x00FF, 0x00FF, 0x0000 }, /* R40    - Input Mixer (2) */
- -      { 0x01B7, 0x01B7, 0x0000 }, /* R41    - Input Mixer (3) */
- -      { 0x01B7, 0x01B7, 0x0000 }, /* R42    - Input Mixer (4) */
- -      { 0x01C7, 0x01C7, 0x0000 }, /* R43    - Input Mixer (5) */
- -      { 0x01C7, 0x01C7, 0x0000 }, /* R44    - Input Mixer (6) */
- -      { 0x01FF, 0x01FF, 0x0000 }, /* R45    - Output Mixer (1) */
- -      { 0x01FF, 0x01FF, 0x0000 }, /* R46    - Output Mixer (2) */
- -      { 0x0FFF, 0x0FFF, 0x0000 }, /* R47    - Output Mixer (3) */
- -      { 0x0FFF, 0x0FFF, 0x0000 }, /* R48    - Output Mixer (4) */
- -      { 0x0FFF, 0x0FFF, 0x0000 }, /* R49    - Output Mixer (5) */
- -      { 0x0FFF, 0x0FFF, 0x0000 }, /* R50    - Output Mixer (6) */
- -      { 0x0038, 0x0038, 0x0000 }, /* R51    - HPOUT2 Mixer */
- -      { 0x0077, 0x0077, 0x0000 }, /* R52    - Line Mixer (1) */
- -      { 0x0077, 0x0077, 0x0000 }, /* R53    - Line Mixer (2) */
- -      { 0x03FF, 0x03FF, 0x0000 }, /* R54    - Speaker Mixer */
- -      { 0x00C1, 0x00C1, 0x0000 }, /* R55    - Additional Control */
- -      { 0x00F0, 0x00F0, 0x0000 }, /* R56    - AntiPOP (1) */
- -      { 0x01EF, 0x01EF, 0x0000 }, /* R57    - AntiPOP (2) */
- -      { 0x00FF, 0x00FF, 0x0000 }, /* R58    - MICBIAS */
- -      { 0x000F, 0x000F, 0x0000 }, /* R59    - LDO 1 */
- -      { 0x0007, 0x0007, 0x0000 }, /* R60    - LDO 2 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R61 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R62 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R63 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R64 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R65 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R66 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R67 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R68 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R69 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R70 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R71 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R72 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R73 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R74 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R75 */
- -      { 0x8000, 0x8000, 0x0000 }, /* R76    - Charge Pump (1) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R77 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R78 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R79 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R80 */
- -      { 0x0301, 0x0301, 0x0000 }, /* R81    - Class W (1) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R82 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R83 */
- -      { 0x333F, 0x333F, 0x0000 }, /* R84    - DC Servo (1) */
- -      { 0x0FEF, 0x0FEF, 0x0000 }, /* R85    - DC Servo (2) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R86 */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R87    - DC Servo (4) */
- -      { 0x0333, 0x0000, 0x0000 }, /* R88    - DC Servo Readback */
- -      { 0x0000, 0x0000, 0x0000 }, /* R89 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R90 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R91 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R92 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R93 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R94 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R95 */
- -      { 0x00EE, 0x00EE, 0x0000 }, /* R96    - Analogue HP (1) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R97 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R98 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R99 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R100 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R101 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R102 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R103 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R104 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R105 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R106 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R107 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R108 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R109 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R110 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R111 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R112 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R113 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R114 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R115 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R116 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R117 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R118 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R119 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R120 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R121 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R122 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R123 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R124 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R125 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R126 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R127 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R128 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R129 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R130 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R131 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R132 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R133 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R134 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R135 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R136 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R137 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R138 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R139 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R140 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R141 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R142 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R143 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R144 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R145 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R146 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R147 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R148 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R149 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R150 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R151 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R152 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R153 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R154 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R155 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R156 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R157 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R158 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R159 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R160 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R161 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R162 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R163 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R164 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R165 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R166 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R167 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R168 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R169 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R170 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R171 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R172 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R173 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R174 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R175 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R176 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R177 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R178 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R179 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R180 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R181 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R182 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R183 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R184 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R185 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R186 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R187 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R188 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R189 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R190 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R191 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R192 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R193 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R194 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R195 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R196 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R197 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R198 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R199 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R200 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R201 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R202 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R203 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R204 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R205 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R206 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R207 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R208 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R209 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R210 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R211 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R212 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R213 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R214 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R215 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R216 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R217 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R218 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R219 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R220 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R221 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R222 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R223 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R224 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R225 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R226 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R227 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R228 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R229 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R230 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R231 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R232 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R233 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R234 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R235 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R236 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R237 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R238 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R239 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R240 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R241 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R242 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R243 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R244 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R245 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R246 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R247 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R248 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R249 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R250 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R251 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R252 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R253 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R254 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R255 */
- -      { 0x000F, 0x0000, 0x0000 }, /* R256   - Chip Revision */
- -      { 0x0074, 0x0074, 0x0000 }, /* R257   - Control Interface */
- -      { 0x0000, 0x0000, 0x0000 }, /* R258 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R259 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R260 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R261 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R262 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R263 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R264 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R265 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R266 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R267 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R268 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R269 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R270 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R271 */
- -      { 0x807F, 0x837F, 0x0000 }, /* R272   - Write Sequencer Ctrl (1) */
- -      { 0x017F, 0x0000, 0x0000 }, /* R273   - Write Sequencer Ctrl (2) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R274 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R275 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R276 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R277 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R278 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R279 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R280 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R281 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R282 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R283 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R284 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R285 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R286 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R287 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R288 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R289 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R290 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R291 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R292 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R293 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R294 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R295 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R296 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R297 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R298 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R299 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R300 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R301 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R302 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R303 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R304 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R305 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R306 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R307 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R308 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R309 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R310 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R311 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R312 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R313 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R314 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R315 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R316 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R317 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R318 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R319 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R320 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R321 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R322 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R323 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R324 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R325 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R326 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R327 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R328 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R329 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R330 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R331 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R332 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R333 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R334 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R335 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R336 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R337 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R338 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R339 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R340 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R341 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R342 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R343 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R344 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R345 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R346 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R347 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R348 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R349 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R350 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R351 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R352 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R353 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R354 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R355 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R356 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R357 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R358 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R359 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R360 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R361 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R362 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R363 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R364 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R365 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R366 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R367 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R368 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R369 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R370 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R371 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R372 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R373 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R374 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R375 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R376 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R377 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R378 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R379 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R380 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R381 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R382 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R383 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R384 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R385 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R386 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R387 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R388 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R389 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R390 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R391 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R392 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R393 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R394 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R395 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R396 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R397 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R398 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R399 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R400 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R401 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R402 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R403 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R404 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R405 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R406 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R407 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R408 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R409 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R410 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R411 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R412 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R413 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R414 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R415 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R416 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R417 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R418 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R419 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R420 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R421 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R422 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R423 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R424 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R425 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R426 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R427 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R428 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R429 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R430 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R431 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R432 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R433 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R434 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R435 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R436 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R437 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R438 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R439 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R440 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R441 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R442 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R443 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R444 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R445 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R446 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R447 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R448 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R449 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R450 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R451 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R452 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R453 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R454 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R455 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R456 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R457 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R458 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R459 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R460 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R461 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R462 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R463 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R464 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R465 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R466 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R467 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R468 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R469 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R470 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R471 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R472 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R473 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R474 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R475 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R476 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R477 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R478 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R479 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R480 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R481 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R482 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R483 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R484 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R485 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R486 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R487 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R488 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R489 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R490 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R491 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R492 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R493 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R494 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R495 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R496 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R497 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R498 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R499 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R500 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R501 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R502 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R503 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R504 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R505 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R506 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R507 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R508 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R509 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R510 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R511 */
- -      { 0x001F, 0x001F, 0x0000 }, /* R512   - AIF1 Clocking (1) */
- -      { 0x003F, 0x003F, 0x0000 }, /* R513   - AIF1 Clocking (2) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R514 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R515 */
- -      { 0x001F, 0x001F, 0x0000 }, /* R516   - AIF2 Clocking (1) */
- -      { 0x003F, 0x003F, 0x0000 }, /* R517   - AIF2 Clocking (2) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R518 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R519 */
- -      { 0x001F, 0x001F, 0x0000 }, /* R520   - Clocking (1) */
- -      { 0x0777, 0x0777, 0x0000 }, /* R521   - Clocking (2) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R522 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R523 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R524 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R525 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R526 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R527 */
- -      { 0x00FF, 0x00FF, 0x0000 }, /* R528   - AIF1 Rate */
- -      { 0x00FF, 0x00FF, 0x0000 }, /* R529   - AIF2 Rate */
- -      { 0x000F, 0x0000, 0x0000 }, /* R530   - Rate Status */
- -      { 0x0000, 0x0000, 0x0000 }, /* R531 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R532 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R533 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R534 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R535 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R536 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R537 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R538 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R539 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R540 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R541 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R542 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R543 */
- -      { 0x0007, 0x0007, 0x0000 }, /* R544   - FLL1 Control (1) */
- -      { 0x3F77, 0x3F77, 0x0000 }, /* R545   - FLL1 Control (2) */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R546   - FLL1 Control (3) */
- -      { 0x7FEF, 0x7FEF, 0x0000 }, /* R547   - FLL1 Control (4) */
- -      { 0x1FDB, 0x1FDB, 0x0000 }, /* R548   - FLL1 Control (5) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R549 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R550 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R551 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R552 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R553 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R554 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R555 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R556 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R557 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R558 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R559 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R560 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R561 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R562 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R563 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R564 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R565 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R566 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R567 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R568 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R569 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R570 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R571 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R572 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R573 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R574 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R575 */
- -      { 0x0007, 0x0007, 0x0000 }, /* R576   - FLL2 Control (1) */
- -      { 0x3F77, 0x3F77, 0x0000 }, /* R577   - FLL2 Control (2) */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R578   - FLL2 Control (3) */
- -      { 0x7FEF, 0x7FEF, 0x0000 }, /* R579   - FLL2 Control (4) */
- -      { 0x1FDB, 0x1FDB, 0x0000 }, /* R580   - FLL2 Control (5) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R581 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R582 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R583 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R584 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R585 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R586 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R587 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R588 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R589 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R590 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R591 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R592 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R593 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R594 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R595 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R596 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R597 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R598 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R599 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R600 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R601 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R602 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R603 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R604 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R605 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R606 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R607 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R608 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R609 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R610 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R611 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R612 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R613 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R614 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R615 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R616 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R617 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R618 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R619 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R620 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R621 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R622 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R623 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R624 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R625 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R626 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R627 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R628 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R629 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R630 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R631 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R632 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R633 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R634 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R635 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R636 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R637 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R638 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R639 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R640 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R641 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R642 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R643 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R644 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R645 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R646 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R647 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R648 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R649 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R650 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R651 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R652 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R653 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R654 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R655 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R656 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R657 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R658 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R659 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R660 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R661 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R662 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R663 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R664 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R665 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R666 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R667 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R668 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R669 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R670 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R671 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R672 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R673 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R674 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R675 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R676 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R677 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R678 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R679 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R680 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R681 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R682 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R683 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R684 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R685 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R686 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R687 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R688 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R689 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R690 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R691 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R692 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R693 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R694 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R695 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R696 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R697 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R698 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R699 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R700 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R701 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R702 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R703 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R704 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R705 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R706 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R707 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R708 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R709 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R710 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R711 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R712 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R713 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R714 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R715 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R716 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R717 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R718 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R719 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R720 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R721 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R722 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R723 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R724 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R725 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R726 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R727 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R728 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R729 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R730 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R731 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R732 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R733 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R734 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R735 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R736 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R737 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R738 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R739 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R740 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R741 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R742 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R743 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R744 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R745 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R746 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R747 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R748 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R749 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R750 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R751 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R752 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R753 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R754 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R755 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R756 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R757 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R758 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R759 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R760 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R761 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R762 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R763 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R764 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R765 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R766 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R767 */
- -      { 0xE1F8, 0xE1F8, 0x0000 }, /* R768   - AIF1 Control (1) */
- -      { 0xCD1F, 0xCD1F, 0x0000 }, /* R769   - AIF1 Control (2) */
- -      { 0xF000, 0xF000, 0x0000 }, /* R770   - AIF1 Master/Slave */
- -      { 0x01F0, 0x01F0, 0x0000 }, /* R771   - AIF1 BCLK */
- -      { 0x0FFF, 0x0FFF, 0x0000 }, /* R772   - AIF1ADC LRCLK */
- -      { 0x0FFF, 0x0FFF, 0x0000 }, /* R773   - AIF1DAC LRCLK */
- -      { 0x0003, 0x0003, 0x0000 }, /* R774   - AIF1DAC Data */
- -      { 0x0003, 0x0003, 0x0000 }, /* R775   - AIF1ADC Data */
- -      { 0x0000, 0x0000, 0x0000 }, /* R776 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R777 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R778 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R779 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R780 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R781 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R782 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R783 */
- -      { 0xF1F8, 0xF1F8, 0x0000 }, /* R784   - AIF2 Control (1) */
- -      { 0xFD1F, 0xFD1F, 0x0000 }, /* R785   - AIF2 Control (2) */
- -      { 0xF000, 0xF000, 0x0000 }, /* R786   - AIF2 Master/Slave */
- -      { 0x01F0, 0x01F0, 0x0000 }, /* R787   - AIF2 BCLK */
- -      { 0x0FFF, 0x0FFF, 0x0000 }, /* R788   - AIF2ADC LRCLK */
- -      { 0x0FFF, 0x0FFF, 0x0000 }, /* R789   - AIF2DAC LRCLK */
- -      { 0x0003, 0x0003, 0x0000 }, /* R790   - AIF2DAC Data */
- -      { 0x0003, 0x0003, 0x0000 }, /* R791   - AIF2ADC Data */
- -      { 0x0000, 0x0000, 0x0000 }, /* R792 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R793 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R794 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R795 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R796 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R797 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R798 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R799 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R800 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R801 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R802 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R803 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R804 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R805 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R806 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R807 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R808 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R809 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R810 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R811 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R812 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R813 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R814 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R815 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R816 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R817 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R818 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R819 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R820 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R821 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R822 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R823 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R824 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R825 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R826 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R827 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R828 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R829 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R830 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R831 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R832 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R833 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R834 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R835 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R836 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R837 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R838 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R839 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R840 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R841 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R842 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R843 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R844 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R845 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R846 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R847 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R848 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R849 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R850 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R851 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R852 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R853 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R854 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R855 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R856 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R857 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R858 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R859 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R860 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R861 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R862 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R863 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R864 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R865 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R866 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R867 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R868 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R869 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R870 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R871 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R872 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R873 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R874 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R875 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R876 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R877 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R878 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R879 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R880 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R881 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R882 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R883 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R884 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R885 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R886 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R887 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R888 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R889 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R890 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R891 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R892 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R893 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R894 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R895 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R896 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R897 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R898 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R899 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R900 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R901 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R902 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R903 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R904 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R905 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R906 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R907 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R908 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R909 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R910 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R911 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R912 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R913 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R914 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R915 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R916 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R917 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R918 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R919 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R920 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R921 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R922 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R923 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R924 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R925 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R926 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R927 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R928 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R929 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R930 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R931 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R932 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R933 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R934 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R935 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R936 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R937 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R938 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R939 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R940 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R941 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R942 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R943 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R944 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R945 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R946 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R947 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R948 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R949 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R950 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R951 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R952 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R953 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R954 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R955 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R956 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R957 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R958 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R959 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R960 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R961 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R962 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R963 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R964 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R965 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R966 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R967 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R968 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R969 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R970 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R971 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R972 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R973 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R974 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R975 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R976 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R977 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R978 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R979 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R980 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R981 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R982 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R983 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R984 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R985 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R986 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R987 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R988 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R989 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R990 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R991 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R992 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R993 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R994 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R995 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R996 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R997 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R998 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R999 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1000 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1001 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1002 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1003 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1004 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1005 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1006 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1007 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1008 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1009 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1010 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1011 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1012 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1013 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1014 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1015 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1016 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1017 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1018 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1019 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1020 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1021 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1022 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1023 */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R1024  - AIF1 ADC1 Left Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R1025  - AIF1 ADC1 Right Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R1026  - AIF1 DAC1 Left Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R1027  - AIF1 DAC1 Right Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R1028  - AIF1 ADC2 Left Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R1029  - AIF1 ADC2 Right Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R1030  - AIF1 DAC2 Left Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R1031  - AIF1 DAC2 Right Volume */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1032 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1033 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1034 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1035 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1036 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1037 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1038 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1039 */
- -      { 0xF800, 0xF800, 0x0000 }, /* R1040  - AIF1 ADC1 Filters */
- -      { 0x7800, 0x7800, 0x0000 }, /* R1041  - AIF1 ADC2 Filters */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1042 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1043 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1044 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1045 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1046 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1047 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1048 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1049 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1050 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1051 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1052 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1053 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1054 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1055 */
- -      { 0x02B6, 0x02B6, 0x0000 }, /* R1056  - AIF1 DAC1 Filters (1) */
- -      { 0x3F00, 0x3F00, 0x0000 }, /* R1057  - AIF1 DAC1 Filters (2) */
- -      { 0x02B6, 0x02B6, 0x0000 }, /* R1058  - AIF1 DAC2 Filters (1) */
- -      { 0x3F00, 0x3F00, 0x0000 }, /* R1059  - AIF1 DAC2 Filters (2) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1060 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1061 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1062 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1063 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1064 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1065 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1066 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1067 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1068 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1069 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1070 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1071 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1072 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1073 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1074 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1075 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1076 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1077 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1078 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1079 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1080 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1081 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1082 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1083 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1084 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1085 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1086 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1087 */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1088  - AIF1 DRC1 (1) */
- -      { 0x1FFF, 0x1FFF, 0x0000 }, /* R1089  - AIF1 DRC1 (2) */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1090  - AIF1 DRC1 (3) */
- -      { 0x07FF, 0x07FF, 0x0000 }, /* R1091  - AIF1 DRC1 (4) */
- -      { 0x03FF, 0x03FF, 0x0000 }, /* R1092  - AIF1 DRC1 (5) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1093 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1094 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1095 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1096 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1097 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1098 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1099 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1100 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1101 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1102 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1103 */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1104  - AIF1 DRC2 (1) */
- -      { 0x1FFF, 0x1FFF, 0x0000 }, /* R1105  - AIF1 DRC2 (2) */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1106  - AIF1 DRC2 (3) */
- -      { 0x07FF, 0x07FF, 0x0000 }, /* R1107  - AIF1 DRC2 (4) */
- -      { 0x03FF, 0x03FF, 0x0000 }, /* R1108  - AIF1 DRC2 (5) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1109 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1110 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1111 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1112 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1113 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1114 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1115 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1116 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1117 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1118 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1119 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1120 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1121 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1122 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1123 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1124 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1125 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1126 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1127 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1128 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1129 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1130 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1131 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1132 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1133 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1134 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1135 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1136 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1137 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1138 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1139 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1140 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1141 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1142 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1143 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1144 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1145 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1146 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1147 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1148 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1149 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1150 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1151 */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1152  - AIF1 DAC1 EQ Gains (1) */
- -      { 0xFFC0, 0xFFC0, 0x0000 }, /* R1153  - AIF1 DAC1 EQ Gains (2) */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1154  - AIF1 DAC1 EQ Band 1 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1155  - AIF1 DAC1 EQ Band 1 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1156  - AIF1 DAC1 EQ Band 1 PG */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1157  - AIF1 DAC1 EQ Band 2 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1158  - AIF1 DAC1 EQ Band 2 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1159  - AIF1 DAC1 EQ Band 2 C */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1160  - AIF1 DAC1 EQ Band 2 PG */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1161  - AIF1 DAC1 EQ Band 3 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1162  - AIF1 DAC1 EQ Band 3 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1163  - AIF1 DAC1 EQ Band 3 C */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1164  - AIF1 DAC1 EQ Band 3 PG */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1165  - AIF1 DAC1 EQ Band 4 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1166  - AIF1 DAC1 EQ Band 4 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1167  - AIF1 DAC1 EQ Band 4 C */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1168  - AIF1 DAC1 EQ Band 4 PG */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1169  - AIF1 DAC1 EQ Band 5 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1170  - AIF1 DAC1 EQ Band 5 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1171  - AIF1 DAC1 EQ Band 5 PG */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1172 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1173 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1174 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1175 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1176 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1177 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1178 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1179 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1180 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1181 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1182 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1183 */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1184  - AIF1 DAC2 EQ Gains (1) */
- -      { 0xFFC0, 0xFFC0, 0x0000 }, /* R1185  - AIF1 DAC2 EQ Gains (2) */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1186  - AIF1 DAC2 EQ Band 1 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1187  - AIF1 DAC2 EQ Band 1 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1188  - AIF1 DAC2 EQ Band 1 PG */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1189  - AIF1 DAC2 EQ Band 2 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1190  - AIF1 DAC2 EQ Band 2 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1191  - AIF1 DAC2 EQ Band 2 C */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1192  - AIF1 DAC2 EQ Band 2 PG */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1193  - AIF1 DAC2 EQ Band 3 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1194  - AIF1 DAC2 EQ Band 3 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1195  - AIF1 DAC2 EQ Band 3 C */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1196  - AIF1 DAC2 EQ Band 3 PG */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1197  - AIF1 DAC2 EQ Band 4 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1198  - AIF1 DAC2 EQ Band 4 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1199  - AIF1 DAC2 EQ Band 4 C */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1200  - AIF1 DAC2 EQ Band 4 PG */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1201  - AIF1 DAC2 EQ Band 5 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1202  - AIF1 DAC2 EQ Band 5 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1203  - AIF1 DAC2 EQ Band 5 PG */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1204 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1205 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1206 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1207 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1208 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1209 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1210 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1211 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1212 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1213 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1214 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1215 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1216 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1217 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1218 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1219 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1220 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1221 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1222 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1223 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1224 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1225 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1226 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1227 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1228 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1229 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1230 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1231 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1232 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1233 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1234 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1235 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1236 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1237 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1238 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1239 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1240 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1241 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1242 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1243 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1244 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1245 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1246 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1247 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1248 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1249 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1250 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1251 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1252 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1253 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1254 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1255 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1256 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1257 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1258 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1259 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1260 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1261 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1262 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1263 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1264 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1265 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1266 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1267 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1268 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1269 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1270 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1271 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1272 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1273 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1274 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1275 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1276 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1277 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1278 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1279 */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R1280  - AIF2 ADC Left Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R1281  - AIF2 ADC Right Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R1282  - AIF2 DAC Left Volume */
- -      { 0x00FF, 0x01FF, 0x0000 }, /* R1283  - AIF2 DAC Right Volume */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1284 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1285 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1286 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1287 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1288 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1289 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1290 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1291 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1292 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1293 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1294 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1295 */
- -      { 0xF800, 0xF800, 0x0000 }, /* R1296  - AIF2 ADC Filters */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1297 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1298 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1299 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1300 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1301 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1302 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1303 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1304 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1305 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1306 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1307 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1308 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1309 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1310 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1311 */
- -      { 0x02B6, 0x02B6, 0x0000 }, /* R1312  - AIF2 DAC Filters (1) */
- -      { 0x3F00, 0x3F00, 0x0000 }, /* R1313  - AIF2 DAC Filters (2) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1314 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1315 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1316 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1317 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1318 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1319 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1320 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1321 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1322 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1323 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1324 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1325 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1326 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1327 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1328 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1329 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1330 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1331 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1332 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1333 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1334 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1335 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1336 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1337 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1338 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1339 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1340 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1341 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1342 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1343 */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1344  - AIF2 DRC (1) */
- -      { 0x1FFF, 0x1FFF, 0x0000 }, /* R1345  - AIF2 DRC (2) */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1346  - AIF2 DRC (3) */
- -      { 0x07FF, 0x07FF, 0x0000 }, /* R1347  - AIF2 DRC (4) */
- -      { 0x03FF, 0x03FF, 0x0000 }, /* R1348  - AIF2 DRC (5) */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1349 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1350 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1351 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1352 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1353 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1354 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1355 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1356 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1357 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1358 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1359 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1360 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1361 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1362 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1363 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1364 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1365 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1366 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1367 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1368 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1369 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1370 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1371 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1372 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1373 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1374 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1375 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1376 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1377 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1378 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1379 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1380 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1381 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1382 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1383 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1384 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1385 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1386 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1387 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1388 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1389 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1390 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1391 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1392 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1393 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1394 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1395 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1396 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1397 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1398 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1399 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1400 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1401 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1402 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1403 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1404 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1405 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1406 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1407 */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1408  - AIF2 EQ Gains (1) */
- -      { 0xFFC0, 0xFFC0, 0x0000 }, /* R1409  - AIF2 EQ Gains (2) */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1410  - AIF2 EQ Band 1 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1411  - AIF2 EQ Band 1 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1412  - AIF2 EQ Band 1 PG */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1413  - AIF2 EQ Band 2 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1414  - AIF2 EQ Band 2 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1415  - AIF2 EQ Band 2 C */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1416  - AIF2 EQ Band 2 PG */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1417  - AIF2 EQ Band 3 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1418  - AIF2 EQ Band 3 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1419  - AIF2 EQ Band 3 C */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1420  - AIF2 EQ Band 3 PG */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1421  - AIF2 EQ Band 4 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1422  - AIF2 EQ Band 4 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1423  - AIF2 EQ Band 4 C */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1424  - AIF2 EQ Band 4 PG */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1425  - AIF2 EQ Band 5 A */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1426  - AIF2 EQ Band 5 B */
- -      { 0xFFFF, 0xFFFF, 0x0000 }, /* R1427  - AIF2 EQ Band 5 PG */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1428 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1429 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1430 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1431 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1432 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1433 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1434 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1435 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1436 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1437 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1438 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1439 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1440 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1441 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1442 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1443 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1444 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1445 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1446 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1447 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1448 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1449 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1450 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1451 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1452 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1453 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1454 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1455 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1456 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1457 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1458 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1459 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1460 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1461 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1462 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1463 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1464 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1465 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1466 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1467 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1468 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1469 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1470 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1471 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1472 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1473 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1474 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1475 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1476 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1477 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1478 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1479 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1480 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1481 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1482 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1483 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1484 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1485 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1486 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1487 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1488 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1489 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1490 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1491 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1492 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1493 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1494 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1495 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1496 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1497 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1498 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1499 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1500 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1501 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1502 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1503 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1504 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1505 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1506 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1507 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1508 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1509 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1510 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1511 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1512 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1513 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1514 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1515 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1516 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1517 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1518 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1519 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1520 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1521 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1522 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1523 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1524 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1525 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1526 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1527 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1528 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1529 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1530 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1531 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1532 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1533 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1534 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1535 */
- -      { 0x01EF, 0x01EF, 0x0000 }, /* R1536  - DAC1 Mixer Volumes */
- -      { 0x0037, 0x0037, 0x0000 }, /* R1537  - DAC1 Left Mixer Routing */
- -      { 0x0037, 0x0037, 0x0000 }, /* R1538  - DAC1 Right Mixer Routing */
- -      { 0x01EF, 0x01EF, 0x0000 }, /* R1539  - DAC2 Mixer Volumes */
- -      { 0x0037, 0x0037, 0x0000 }, /* R1540  - DAC2 Left Mixer Routing */
- -      { 0x0037, 0x0037, 0x0000 }, /* R1541  - DAC2 Right Mixer Routing */
- -      { 0x0003, 0x0003, 0x0000 }, /* R1542  - AIF1 ADC1 Left Mixer Routing */
- -      { 0x0003, 0x0003, 0x0000 }, /* R1543  - AIF1 ADC1 Right Mixer Routing */
- -      { 0x0003, 0x0003, 0x0000 }, /* R1544  - AIF1 ADC2 Left Mixer Routing */
- -      { 0x0003, 0x0003, 0x0000 }, /* R1545  - AIF1 ADC2 Right mixer Routing */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1546 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1547 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1548 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1549 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1550 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1551 */
- -      { 0x02FF, 0x03FF, 0x0000 }, /* R1552  - DAC1 Left Volume */
- -      { 0x02FF, 0x03FF, 0x0000 }, /* R1553  - DAC1 Right Volume */
- -      { 0x02FF, 0x03FF, 0x0000 }, /* R1554  - DAC2 Left Volume */
- -      { 0x02FF, 0x03FF, 0x0000 }, /* R1555  - DAC2 Right Volume */
- -      { 0x0003, 0x0003, 0x0000 }, /* R1556  - DAC Softmute */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1557 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1558 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1559 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1560 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1561 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1562 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1563 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1564 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1565 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1566 */
- -      { 0x0000, 0x0000, 0x0000 }, /* R1567 */
- -      { 0x0003, 0x0003, 0x0000 }, /* R1568  - Oversampling */
- -      { 0x03C3, 0x03C3, 0x0000 }, /* R1569  - Sidetone */
+ +      unsigned int playback_active:1;
+ +      unsigned int capture_active:1;
+ +      /* call_vol:  save all kinds of system volume value. */
+ +      unsigned char call_vol;
+ +      unsigned char BT_call_vol;      
+ +
+ +      struct wake_lock        wm8994_on_wake;
   };
   
- -static int wm8994_readable(unsigned int reg)
+ +int reg_send_data(struct i2c_client *client, unsigned short *reg, unsigned short *data, u32 scl_rate)
   {
- -      switch (reg) {
- -      case WM8994_GPIO_1:
- -      case WM8994_GPIO_2:
- -      case WM8994_GPIO_3:
- -      case WM8994_GPIO_4:
- -      case WM8994_GPIO_5:
- -      case WM8994_GPIO_6:
- -      case WM8994_GPIO_7:
- -      case WM8994_GPIO_8:
- -      case WM8994_GPIO_9:
- -      case WM8994_GPIO_10:
- -      case WM8994_GPIO_11:
- -      case WM8994_INTERRUPT_STATUS_1:
- -      case WM8994_INTERRUPT_STATUS_2:
- -      case WM8994_INTERRUPT_RAW_STATUS_2:
- -              return 1;
- -      default:
- -              break;
- -      }
- -
- -      if (reg >= ARRAY_SIZE(access_masks))
- -              return 0;
- -      return access_masks[reg].readable != 0;
- -}
+ +      int ret;
+ +      struct i2c_adapter *adap = client->adapter;
+ +      struct i2c_msg msg;
+ +      char tx_buf[4];
+ +
+ +      memcpy(tx_buf, reg, 2);
+ +      memcpy(tx_buf+2, data, 2);
+ +      msg.addr = client->addr;
+ +      msg.buf = tx_buf;
+ +      msg.len = 4;
+ +      msg.flags = client->flags;
+ +      msg.scl_rate = scl_rate;
+ +      msg.read_type = 0;
+ +      ret = i2c_transfer(adap, &msg, 1);
   
- -static int wm8994_volatile(unsigned int reg)
- -{
- -      if (reg >= WM8994_REG_CACHE_SIZE)
- -              return 1;
- -
- -      switch (reg) {
- -      case WM8994_SOFTWARE_RESET:
- -      case WM8994_CHIP_REVISION:
- -      case WM8994_DC_SERVO_1:
- -      case WM8994_DC_SERVO_READBACK:
- -      case WM8994_RATE_STATUS:
- -      case WM8994_LDO_1:
- -      case WM8994_LDO_2:
- -              return 1;
- -      default:
- -              return 0;
- -      }
+ +      return ret;
   }
   
- -static int wm8994_write(struct snd_soc_codec *codec, unsigned int reg,
- -      unsigned int value)
+ +int reg_recv_data(struct i2c_client *client, unsigned short *reg, unsigned short *buf, u32 scl_rate)
   {
- -      struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
+ +      int ret;
+ +      struct i2c_adapter *adap = client->adapter;
+ +      struct i2c_msg msgs[2];
   
- -      BUG_ON(reg > WM8994_MAX_REGISTER);
+ +      msgs[0].addr = client->addr;
+ +      msgs[0].buf = (char *)reg;
+ +      msgs[0].flags = client->flags;
+ +      msgs[0].len = 2;
+ +      msgs[0].scl_rate = scl_rate;
+ +      msgs[0].read_type = 2;
   
- -      if (!wm8994_volatile(reg))
- -              wm8994->reg_cache[reg] = value;
+ +      msgs[1].addr = client->addr;
+ +      msgs[1].buf = (char *)buf;
+ +      msgs[1].flags = client->flags | I2C_M_RD;
+ +      msgs[1].len = 2;
+ +      msgs[1].scl_rate = scl_rate;
+ +      msgs[1].read_type = 2;
   
- -      dev_dbg(codec->dev, "0x%x = 0x%x\n", reg, value);
+ +      ret = i2c_transfer(adap, msgs, 2);
   
- -      return wm8994_reg_write(codec->control_data, reg, value);
+ +      return ret;
   }
   
- -static unsigned int wm8994_read(struct snd_soc_codec *codec,
- -                              unsigned int reg)
+ +int wm8994_set_status(void)
   {
- -      u16 *reg_cache = codec->reg_cache;
- -
- -      BUG_ON(reg > WM8994_MAX_REGISTER);
- -
- -      if (wm8994_volatile(reg))
- -              return wm8994_reg_read(codec->control_data, reg);
- -      else
- -              return reg_cache[reg];
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;        
+ +      int ret = 1;
+ +      mutex_lock(&wm8994->route_lock);
+ +      
+ +      if(wm8994->work_type == SNDRV_PCM_TRIGGER_SUSPEND)
+ +              ret = -2;
+ +      
+ +      mutex_unlock(&wm8994->route_lock);      
+ +      return ret;
   }
+ +EXPORT_SYMBOL_GPL(wm8994_set_status);
   
- -static int configure_aif_clock(struct snd_soc_codec *codec, int aif)
+ +static int wm8994_read(unsigned short reg,unsigned short *value)
+ +{
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
+ +      
+ +      unsigned short regs=((reg>>8)&0x00FF)|((reg<<8)&0xFF00),values;
+ +      char i = 2;
+ +      mutex_lock(&wm8994->io_lock);
+ +      if(wm8994->RW_status == ERROR) goto out;
+ +
+ +      while(i > 0)
+ +      {
+ +              i--;
+ +              if (reg_recv_data(wm8994_codec->control_data,&regs,&values,400000) > 0)
+ +              {
+ +                      *value=((values>>8)& 0x00FF)|((values<<8)&0xFF00);
+ +              #ifdef WM8994_PROC      
+ +                      if(debug_write_read != 0)
+ +                              DBG("%s:0x%04x = 0x%04x",__FUNCTION__,reg,*value);
+ +              #endif
+ +                      mutex_unlock(&wm8994->io_lock);
+ +                      return 0;
+ +              }
+ +      }
+ +      
+ +      wm8994->RW_status = ERROR;      
+ +      printk("%s---line->%d:Codec read error! reg = 0x%x , value = 0x%x\n",__FUNCTION__,__LINE__,reg,*value);
+ +out:  
+ +      mutex_unlock(&wm8994->io_lock);
+ +      return -EIO;
+ +}
+ +      
+ +static int wm8994_write(unsigned short reg,unsigned short value)
   {
- -      struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
- -      int rate;
- -      int reg1 = 0;
- -      int offset;
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
   
- -      if (aif)
- -              offset = 4;
- -      else
- -              offset = 0;
+ +      unsigned short regs=((reg>>8)&0x00FF)|((reg<<8)&0xFF00),values=((value>>8)&0x00FF)|((value<<8)&0xFF00);
+ +      char i = 2;
+ +      
+ +      mutex_lock(&wm8994->io_lock);
   
- -      switch (wm8994->sysclk[aif]) {
- -      case WM8994_SYSCLK_MCLK1:
- -              rate = wm8994->mclk[0];
- -              break;
+ +      if(wm8994->RW_status == ERROR) goto out;
   
- -      case WM8994_SYSCLK_MCLK2:
- -              reg1 |= 0x8;
- -              rate = wm8994->mclk[1];
- -              break;
+ +#ifdef WM8994_PROC    
+ +      if(debug_write_read != 0)
+ +              DBG("%s:0x%04x = 0x%04x\n",__FUNCTION__,reg,value);
+ +#endif                
+ +      while(i > 0)
+ +      {
+ +              i--;
+ +              if (reg_send_data(wm8994_codec->control_data,&regs,&values,400000) > 0) 
+ +              {
+ +                      mutex_unlock(&wm8994->io_lock);
+ +                      return 0;
+ +              }       
+ +      }
+ +      
+ +      wm8994->RW_status = ERROR;
+ +      printk("%s---line->%d:Codec write error! reg = 0x%x , value = 0x%x\n",__FUNCTION__,__LINE__,reg,value);
   
- -      case WM8994_SYSCLK_FLL1:
- -              reg1 |= 0x10;
- -              rate = wm8994->fll[0].out;
- -              break;
+ +out:  
+ +      mutex_unlock(&wm8994->io_lock);
+ +      return -EIO;
+ +}
   
- -      case WM8994_SYSCLK_FLL2:
- -              reg1 |= 0x18;
- -              rate = wm8994->fll[1].out;
- -              break;
+ +static void wm8994_set_volume(unsigned char wm8994_mode,unsigned char volume,unsigned char max_volume)
+ +{
+ +      unsigned short lvol=0,rvol=0;
+ +//    DBG("%s::volume = %d \n",__FUNCTION__,volume);
   
- -      default:
- -              return -EINVAL;
+ +      if(volume>max_volume)
+ +              volume=max_volume;
+ +      
+ +      switch(wm8994_mode)
+ +      {
+ +              case wm8994_handsetMIC_to_baseband_to_headset_and_record:
+ +              case wm8994_handsetMIC_to_baseband_to_headset:
+ +              case wm8994_mainMIC_to_baseband_to_headset:
+ +                      wm8994_read(0x001C, &lvol);
+ +                      wm8994_read(0x001D, &rvol);
+ +                      //HPOUT1L_VOL bit 0~5 /-57dB to +6dB in 1dB steps
+ +                      wm8994_write(0x001C, (lvol&~0x003f)|headset_vol_table[volume]); 
+ +                      //HPOUT1R_VOL bit 0~5 /-57dB to +6dB in 1dB steps
+ +                      wm8994_write(0x001D, (rvol&~0x003f)|headset_vol_table[volume]); 
+ +                      break;
+ +              case wm8994_mainMIC_to_baseband_to_speakers_and_record:
+ +              case wm8994_mainMIC_to_baseband_to_speakers:
+ +                      wm8994_read(0x0026, &lvol);
+ +                      wm8994_read(0x0027, &rvol);
+ +                      //SPKOUTL_VOL bit 0~5 /-57dB to +6dB in 1dB steps
+ +                      wm8994_write(0x0026, (lvol&~0x003f)|speakers_vol_table[volume]);
+ +                      //SPKOUTR_VOL bit 0~5 /-57dB to +6dB in 1dB steps
+ +                      wm8994_write(0x0027, (rvol&~0x003f)|speakers_vol_table[volume]);
+ +                      break;
+ +              case wm8994_mainMIC_to_baseband_to_earpiece:
+ +              case wm8994_mainMIC_to_baseband_to_earpiece_and_record:
+ +                      wm8994_read(0x0020, &lvol);
+ +                      wm8994_read(0x0021, &rvol);
+ +                      //MIXOUTL_VOL bit 0~5 /-57dB to +6dB in 1dB steps
+ +                      wm8994_write(0x0020, (lvol&~0x003f)|earpiece_vol_table[volume]);
+ +                      //MIXOUTR_VOL bit 0~5 /-57dB to +6dB in 1dB steps
+ +                      wm8994_write(0x0021, (rvol&~0x003f)|earpiece_vol_table[volume]);
+ +                      break;
+ +              case wm8994_BT_baseband:
+ +              case wm8994_BT_baseband_and_record:
+ +                      //bit 0~4 /-16.5dB to +30dB in 1.5dB steps
+ +                      DBG("BT_vol_table[volume] = 0x%x\n",BT_vol_table[volume]);
+ +                      wm8994_write(0x0500, BT_vol_table[volume]);
+ +                      wm8994_write(0x0501, 0x0100);           
+ +                      break;
+ +              default:
+ +              //      DBG("Set all volume\n");
+ +                      wm8994_read(0x001C, &lvol);
+ +                      wm8994_read(0x001D, &rvol);
+ +                      wm8994_write(0x001C, (lvol&~0x003f)|headset_vol_table[volume]); 
+ +                      wm8994_write(0x001D, (rvol&~0x003f)|headset_vol_table[volume]); 
+ +                      wm8994_read(0x0026, &lvol);
+ +                      wm8994_read(0x0027, &rvol);
+ +                      wm8994_write(0x0026, (lvol&~0x003f)|speakers_vol_table[volume]);
+ +                      wm8994_write(0x0027, (rvol&~0x003f)|speakers_vol_table[volume]);        
+ +                      wm8994_read(0x0020, &lvol);
+ +                      wm8994_read(0x0021, &rvol);
+ +                      wm8994_write(0x0020, (lvol&~0x003f)|earpiece_vol_table[volume]);
+ +                      wm8994_write(0x0021, (rvol&~0x003f)|earpiece_vol_table[volume]);
+ +                      break;
         }
+ +}
   
- -      if (rate >= 13500000) {
- -              rate /= 2;
- -              reg1 |= WM8994_AIF1CLK_DIV;
- -
- -              dev_dbg(codec->dev, "Dividing AIF%d clock to %dHz\n",
- -                      aif + 1, rate);
- -      }
+ +static void wm8994_set_all_mute(void)
+ +{
+ +      int i;
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
   
- -      if (rate && rate < 3000000)
- -              dev_warn(codec->dev, "AIF%dCLK is %dHz, should be >=3MHz for optimal performance\n",
- -                       aif + 1, rate);
+ +      if(wm8994->call_vol < 0)
+ +              return;
   
- -      wm8994->aifclk[aif] = rate;
+ +      for (i = wm8994->call_vol; i >= 0; i--)        
+ +              wm8994_set_volume(null,i,call_maxvol);
   
- -      snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1 + offset,
- -                          WM8994_AIF1CLK_SRC_MASK | WM8994_AIF1CLK_DIV,
- -                          reg1);
+ +}
   
- -      return 0;
+ +static void wm8994_set_level_volume(void)
+ +{
+ +      int i;
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
+ +      
+ +      for (i = 0; i <= wm8994->call_vol; i++)
+ +              wm8994_set_volume(wm8994_current_mode,i,call_maxvol);
+ +      
   }
   
- -static int configure_clock(struct snd_soc_codec *codec)
+ +static void PA_ctrl(unsigned char ctrl)
   {
- -      struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
- -      int old, new;
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
+ +      struct wm8994_pdata *pdata = wm8994->pdata;
+ +      
+ +      if(pdata->PA_control_pin > 0)
+ +      {
+ +              if(ctrl == GPIO_HIGH)
+ +              {
+ +                      DBG("enable PA_control\n");
+ +                      gpio_request(pdata->PA_control_pin, NULL);              //AUDIO_PA_ON    
+ +                      gpio_direction_output(pdata->PA_control_pin,GPIO_HIGH);                 
+ +                      gpio_free(pdata->PA_control_pin);
+ +              }
+ +              else
+ +              {
+ +                      DBG("disable PA_control\n");
+ +                      gpio_request(pdata->PA_control_pin, NULL);              //AUDIO_PA_ON    
+ +                      gpio_direction_output(pdata->PA_control_pin,GPIO_LOW);          
+ +                      gpio_free(pdata->PA_control_pin);                       
+ +              }
+ +      }
+ +}
   
- -      /* Bring up the AIF clocks first */
- -      configure_aif_clock(codec, 0);
- -      configure_aif_clock(codec, 1);
+ +/* The size in bits of the FLL divide multiplied by 10
+ + * to allow rounding later */
+ +#define FIXED_FLL_SIZE ((1 << 16) * 10)
   
- -      /* Then switch CLK_SYS over to the higher of them; a change
- -       * can only happen as a result of a clocking change which can
- -       * only be made outside of DAPM so we can safely redo the
- -       * clocking.
- -       */
+ +struct fll_div {
+ +      u16 outdiv;
+ +      u16 n;
+ +      u16 k;
+ +      u16 clk_ref_div;
+ +      u16 fll_fratio;
+ +};
   
- -      /* If they're equal it doesn't matter which is used */
- -      if (wm8994->aifclk[0] == wm8994->aifclk[1])
- -              return 0;
+ +static int wm8994_get_fll_config(struct fll_div *fll,
+ +                               int freq_in, int freq_out)
+ +{
+ +      u64 Kpart;
+ +      unsigned int K, Ndiv, Nmod;
   
- -      if (wm8994->aifclk[0] < wm8994->aifclk[1])
- -              new = WM8994_SYSCLK_SRC;
- -      else
- -              new = 0;
+ +//    DBG("FLL input=%dHz, output=%dHz\n", freq_in, freq_out);
   
- -      old = snd_soc_read(codec, WM8994_CLOCKING_1) & WM8994_SYSCLK_SRC;
+ +      /* Scale the input frequency down to <= 13.5MHz */
+ +      fll->clk_ref_div = 0;
+ +      while (freq_in > 13500000) {
+ +              fll->clk_ref_div++;
+ +              freq_in /= 2;
   
- -      /* If there's no change then we're done. */
- -      if (old == new)
- -              return 0;
+ +              if (fll->clk_ref_div > 3)
+ +                      return -EINVAL;
+ +      }
+ +//    DBG("CLK_REF_DIV=%d, Fref=%dHz\n", fll->clk_ref_div, freq_in);//0 12m
   
- -      snd_soc_update_bits(codec, WM8994_CLOCKING_1, WM8994_SYSCLK_SRC, new);
+ +      /* Scale the output to give 90MHz<=Fvco<=100MHz */
+ +      fll->outdiv = 3;
+ +      while (freq_out * (fll->outdiv + 1) < 90000000) {
+ +              fll->outdiv++;
+ +              if (fll->outdiv > 63)
+ +                      return -EINVAL;
+ +      }
+ +      freq_out *= fll->outdiv + 1;
+ +//    DBG("OUTDIV=%d, Fvco=%dHz\n", fll->outdiv, freq_out);//8 98.304MHz
   
- -      snd_soc_dapm_sync(codec);
+ +      if (freq_in > 1000000) {
+ +              fll->fll_fratio = 0;
+ +      } else {
+ +              fll->fll_fratio = 3;
+ +              freq_in *= 8;
+ +      }
+ +//    DBG("FLL_FRATIO=%d, Fref=%dHz\n", fll->fll_fratio, freq_in);//0 12M
   
- -      return 0;
- -}
+ +      /* Now, calculate N.K */
+ +      Ndiv = freq_out / freq_in;
   
- -static int check_clk_sys(struct snd_soc_dapm_widget *source,
- -                       struct snd_soc_dapm_widget *sink)
- -{
- -      int reg = snd_soc_read(source->codec, WM8994_CLOCKING_1);
- -      const char *clk;
+ +      fll->n = Ndiv;
+ +      Nmod = freq_out % freq_in;
+ +//    DBG("Nmod=%d\n", Nmod);
   
- -      /* Check what we're currently using for CLK_SYS */
- -      if (reg & WM8994_SYSCLK_SRC)
- -              clk = "AIF2CLK";
- -      else
- -              clk = "AIF1CLK";
+ +      /* Calculate fractional part - scale up so we can round. */
+ +      Kpart = FIXED_FLL_SIZE * (long long)Nmod;
   
- -      return strcmp(source->name, clk) == 0;
- -}
+ +      do_div(Kpart, freq_in);
   
- -static const char *sidetone_hpf_text[] = {
- -      "2.7kHz", "1.35kHz", "675Hz", "370Hz", "180Hz", "90Hz", "45Hz"
- -};
+ +      K = Kpart & 0xFFFFFFFF;
   
- -static const struct soc_enum sidetone_hpf =
- -      SOC_ENUM_SINGLE(WM8994_SIDETONE, 7, 7, sidetone_hpf_text);
+ +      if ((K % 10) >= 5)
+ +              K += 5;
   
- -static const DECLARE_TLV_DB_SCALE(aif_tlv, 0, 600, 0);
- -static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
- -static const DECLARE_TLV_DB_SCALE(st_tlv, -3600, 300, 0);
- -static const DECLARE_TLV_DB_SCALE(wm8994_3d_tlv, -1600, 183, 0);
- -static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
+ +      /* Move down to proper range now rounding is done */
+ +      fll->k = K / 10;
   
- -#define WM8994_DRC_SWITCH(xname, reg, shift) \
- -{     .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
- -      .info = snd_soc_info_volsw, .get = snd_soc_get_volsw,\
- -      .put = wm8994_put_drc_sw, \
- -      .private_value =  SOC_SINGLE_VALUE(reg, shift, 1, 0) }
+ +//    DBG("N=%x K=%x\n", fll->n, fll->k);//8 3127
   
- -static int wm8994_put_drc_sw(struct snd_kcontrol *kcontrol,
- -                           struct snd_ctl_elem_value *ucontrol)
- -{
- -      struct soc_mixer_control *mc =
- -              (struct soc_mixer_control *)kcontrol->private_value;
- -      struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- -      int mask, ret;
- -
- -      /* Can't enable both ADC and DAC paths simultaneously */
- -      if (mc->shift == WM8994_AIF1DAC1_DRC_ENA_SHIFT)
- -              mask = WM8994_AIF1ADC1L_DRC_ENA_MASK |
- -                      WM8994_AIF1ADC1R_DRC_ENA_MASK;
- -      else
- -              mask = WM8994_AIF1DAC1_DRC_ENA_MASK;
+ +      return 0;
+ +}
   
- -      ret = snd_soc_read(codec, mc->reg);
+ +static int wm8994_set_fll(unsigned int freq_in, unsigned int freq_out)                          
+ +{
+ +      int ret;
+ +      struct fll_div fll;
+ +      u16 reg=0;
+ +//    DBG("Enter %s::%s---%d\n",__FILE__,__FUNCTION__,__LINE__);
+ +      wm8994_write(0x220, 0x0000); 
+ +      /* If we're stopping the FLL redo the old config - no
+ +       * registers will actually be written but we avoid GCC flow
+ +       * analysis bugs spewing warnings.
+ +       */
+ +      ret = wm8994_get_fll_config(&fll, freq_in, freq_out);
         if (ret < 0)
                 return ret;
- -      if (ret & mask)
- -              return -EINVAL;
   
- -      return snd_soc_put_volsw(kcontrol, ucontrol);
+ +      reg = (fll.outdiv << WM8994_FLL1_OUTDIV_SHIFT) |(fll.fll_fratio << WM8994_FLL1_FRATIO_SHIFT);
+ +      wm8994_write(0x221, reg);//0x221  DIV
+ +      wm8994_write(0x222, fll.k);//0x222      K
+ +      wm8994_write(0x223,     fll.n << WM8994_FLL1_N_SHIFT);//0x223           N
+ +      wm8994_write(0x224, fll.clk_ref_div << WM8994_FLL1_REFCLK_DIV_SHIFT);//0x224    
+ +
+ +      wm8994_write(0x220, 0x0004); 
+ +      msleep(10);
+ +      wm8994_write(0x220, 0x0005);                    
+ +      msleep(5);
+ +      wm8994_write(0x200, 0x0010); // sysclk = MCLK1  
+ +      return 0;
   }
   
- -
- -
- -static void wm8994_set_drc(struct snd_soc_codec *codec, int drc)
+ +static int wm8994_sysclk_config(void)
   {
- -      struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
- -      struct wm8994_pdata *pdata = wm8994->pdata;
- -      int base = wm8994_drc_base[drc];
- -      int cfg = wm8994->drc_cfg[drc];
- -      int save, i;
- -
- -      /* Save any enables; the configuration should clear them. */
- -      save = snd_soc_read(codec, base);
- -      save &= WM8994_AIF1DAC1_DRC_ENA | WM8994_AIF1ADC1L_DRC_ENA |
- -              WM8994_AIF1ADC1R_DRC_ENA;
- -
- -      for (i = 0; i < WM8994_DRC_REGS; i++)
- -              snd_soc_update_bits(codec, base + i, 0xffff,
- -                                  pdata->drc_cfgs[cfg].regs[i]);
- -
- -      snd_soc_update_bits(codec, base, WM8994_AIF1DAC1_DRC_ENA |
- -                           WM8994_AIF1ADC1L_DRC_ENA |
- -                           WM8994_AIF1ADC1R_DRC_ENA, save);
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
+ +      unsigned int freq_in,freq_out;
+ +      
+ +      wm8994_write(0x200, 0x0000); 
+ +      freq_in =       wm8994->mclk;
+ +      switch(wm8994->mclk)
+ +      {
+ +      case 12288000:
+ +      case 11289600:
+ +              freq_out = wm8994->mclk;
+ +              break;
+ +      case 3072000:
+ +      case 2822400:   
+ +              freq_out = wm8994->mclk * 4;
+ +              break;
+ +      default:
+ +              printk("wm8994->mclk error = %d\n",wm8994->mclk);
+ +              return -1;
+ +      }
+ +      
+ +      switch(wm8994->sysclk)
+ +      {
+ +      case WM8994_SYSCLK_FLL1: 
+ +              wm8994_set_fll(freq_in,freq_out);
+ +              break;
+ +      case WM8994_SYSCLK_FLL2:
+ +              break;
+ +      case WM8994_SYSCLK_MCLK2:
+ +              wm8994_write(0x701, 0x0000);//MCLK2
+ +      case WM8994_SYSCLK_MCLK1:
+ +              if(freq_out == freq_in)
+ +                      break;
+ +      default:
+ +              printk("wm8994->sysclk error = %d\n",wm8994->sysclk);
+ +              return -1;
+ +      }
+ +      
+ +      wm8994_write(0x208, 0x0008); //DSP_FS1CLK_ENA=1, DSP_FSINTCLK_ENA=1
+ +      wm8994_write(0x208, 0x000A); //DSP_FS1CLK_ENA=1, DSP_FSINTCLK_ENA=1     
+ +      
+ +      switch(wm8994->rate)
+ +      {
+ +      case 8000:
+ +              printk("wm8994->rate = %d!!!!\n",wm8994->rate);
+ +              break;
+ +      case 44100:
+ +              wm8994_write(0x210, 0x0073); // SR=48KHz
+ +              break;
+ +      case 48000:
+ +              wm8994_write(0x210, 0x0083); // SR=48KHz
+ +              break;
+ +      case 11025:
+ +      case 16000:
+ +      case 22050:
+ +      case 32000:             
+ +      default:
+ +              printk("wm8994->rate error = %d\n",wm8994->rate);
+ +              return -1;
+ +      }       
+ +      
+ +      switch(wm8994->fmt)
+ +      {
+ +      case SND_SOC_DAIFMT_CBS_CFS:
+ +      case SND_SOC_DAIFMT_CBM_CFM:
+ +              break;
+ +      default:
+ +              printk("wm8994->fmt error = %d\n",wm8994->fmt);
+ +              return -1;
+ +      }
+ +      
+ +      wm8994_write(0x200, wm8994->sysclk << 3|0x01); 
+ +      return 0;
   }
   
- -/* Icky as hell but saves code duplication */
- -static int wm8994_get_drc(const char *name)
+ +static void wm8994_set_AIF1DAC_EQ(void)
   {
- -      if (strcmp(name, "AIF1DRC1 Mode") == 0)
- -              return 0;
- -      if (strcmp(name, "AIF1DRC2 Mode") == 0)
- -              return 1;
- -      if (strcmp(name, "AIF2DRC Mode") == 0)
- -              return 2;
- -      return -EINVAL;
+ +      //100HZ. 300HZ.  875HZ  2400HZ    6900HZ
+ +//    int bank_vol[6] = {0,0,-3,3,-6,3};//-12DB ~ 12DB   default 0DB
+ +      int bank_vol[6] = {6,2,0,0,0,0};//-12DB ~ 12DB   default 0DB    
+ +      wm8994_write(0x0480, 0x0001|((bank_vol[1]+12)<<11)|
+ +              ((bank_vol[2]+12)<<6)|((bank_vol[3]+12)<<1));
+ +      wm8994_write(0x0481, 0x0000|((bank_vol[4]+12)<<11)|
+ +              ((bank_vol[5]+12)<<6));
   }
   
- -static int wm8994_put_drc_enum(struct snd_kcontrol *kcontrol,
- -                             struct snd_ctl_elem_value *ucontrol)
+ +static int wm8994_reset_ldo(void)
   {
- -      struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- -      struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);  
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;        
         struct wm8994_pdata *pdata = wm8994->pdata;
- -      int drc = wm8994_get_drc(kcontrol->id.name);
- -      int value = ucontrol->value.integer.value[0];
- -
- -      if (drc < 0)
- -              return drc;
+ +      unsigned short value;
+ +      
+ +      if(wm8994->RW_status == TRUE)
+ +              return 0;
+ +              
+ +      gpio_request(pdata->Power_EN_Pin, NULL);
+ +      gpio_direction_output(pdata->Power_EN_Pin,GPIO_LOW);
+ +      gpio_free(pdata->Power_EN_Pin); 
+ +      msleep(50);
+ +      gpio_request(pdata->Power_EN_Pin, NULL);
+ +      gpio_direction_output(pdata->Power_EN_Pin,GPIO_HIGH);
+ +      gpio_free(pdata->Power_EN_Pin);         
+ +      msleep(50);
+ +      
+ +      wm8994->RW_status = TRUE;
+ +      wm8994_read(0x00,  &value);
+ +
+ +      if(value == 0x8994)
+ +              DBG("wm8994_reset_ldo Read ID = 0x%x\n",value);
+ +      else
+ +      {
+ +              wm8994->RW_status = ERROR;
+ +              printk("wm8994_reset_ldo Read ID error value = 0x%x\n",value);
+ +              return -1;
+ +      }       
+ +              
+ +      return 0;       
+ +}
+ +//Set the volume of each channel (including recording)
+ +static void wm8994_set_channel_vol(void)
+ +{
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
+ +      struct wm8994_pdata *pdata = wm8994->pdata;     
+ +      int vol;
+ +
+ +      switch(wm8994_current_mode){
+ +      case wm8994_AP_to_speakers_and_headset:
+ +              MAX_MIN(-57,pdata->speaker_normal_vol,6);
+ +              MAX_MIN(-57,pdata->headset_normal_vol,6);
+ +              DBG("headset_normal_vol = %ddB \n",pdata->headset_normal_vol);
+ +              DBG("speaker_normal_vol = %ddB \n",pdata->speaker_normal_vol);
+ +              
+ +              vol = pdata->speaker_normal_vol;
+ +              wm8994_write(0x26,  320+vol+57);  //-57dB~6dB
+ +              wm8994_write(0x27,  320+vol+57);  //-57dB~6dB
+ +
+ +              vol = pdata->headset_normal_vol-4;
+ +              //for turn off headset volume when ringtone
+ +              if(vol >= -48)
+ +                      vol -= 14;
+ +              else
+ +                      vol = -57;
   
- -      if (value >= pdata->num_drc_cfgs)
- -              return -EINVAL;
+ +              wm8994_write(0x1C,  320+vol+57);  //-57dB~6dB
+ +              wm8994_write(0x1D,  320+vol+57);  //-57dB~6dB
   
- -      wm8994->drc_cfg[drc] = value;
+ +              wm8994_set_AIF1DAC_EQ();
+ +              break;
   
- -      wm8994_set_drc(codec, drc);
+ +      case wm8994_recorder_and_AP_to_headset:
+ +              MAX_MIN(-57,pdata->headset_normal_vol,6);
+ +              MAX_MIN(-16,pdata->recorder_vol,60);
+ +              DBG("recorder_vol = %ddB \n",pdata->recorder_vol);
+ +              DBG("headset_normal_vol = %ddB \n",pdata->headset_normal_vol);
   
- -      return 0;
- -}
+ +              vol = pdata->recorder_vol;
+ +              if(vol<30)
+ +                      wm8994_write(0x1A,  320+(vol+16)*10/15);  //mic vol
+ +              else
+ +              {
+ +                      wm8994_write(0x2A,  0x0030);
+ +                      wm8994_write(0x1A,  320+(vol-14)*10/15);  //mic vol
+ +              }
+ +              vol = pdata->headset_normal_vol;
+ +              wm8994_write(0x1C,  320+vol+57);  //-57dB~6dB
+ +              wm8994_write(0x1D,  320+vol+57);  //-57dB~6dB
+ +      //      wm8994_set_AIF1DAC_EQ();
+ +              break;
   
- -static int wm8994_get_drc_enum(struct snd_kcontrol *kcontrol,
- -                             struct snd_ctl_elem_value *ucontrol)
- -{
- -      struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- -      struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
- -      int drc = wm8994_get_drc(kcontrol->id.name);
+ +      case wm8994_recorder_and_AP_to_speakers:
+ +      case wm8994_FM_to_speakers:
+ +              MAX_MIN(-57,pdata->speaker_normal_vol,6);
+ +              MAX_MIN(-16,pdata->recorder_vol,60);
+ +              DBG("speaker_normal_vol = %ddB \n",pdata->speaker_normal_vol);
+ +              DBG("recorder_vol = %ddB \n",pdata->recorder_vol);
   
- -      ucontrol->value.enumerated.item[0] = wm8994->drc_cfg[drc];
+ +              vol = pdata->recorder_vol;
+ +              if(vol<30)
+ +                      wm8994_write(0x1A,  320+(vol+16)*10/15);  //mic vol
+ +              else
+ +              {
+ +                      wm8994_write(0x2A,  0x0030);
+ +                      wm8994_write(0x1A,  320+(vol-14)*10/15);  //mic vol
+ +              }
   
- -      return 0;
- -}
+ +              vol = pdata->speaker_normal_vol;
+ +              wm8994_write(0x26,  320+vol+57);  //-57dB~6dB
+ +              wm8994_write(0x27,  320+vol+57);  //-57dB~6dB
   
- -static void wm8994_set_retune_mobile(struct snd_soc_codec *codec, int block)
- -{
- -      struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
- -      struct wm8994_pdata *pdata = wm8994->pdata;
- -      int base = wm8994_retune_mobile_base[block];
- -      int iface, best, best_val, save, i, cfg;
+ +              wm8994_set_AIF1DAC_EQ();
+ +              break;
+ +      case wm8994_handsetMIC_to_baseband_to_headset:
+ +              MAX_MIN(-12,pdata->headset_incall_vol,6);
+ +              MAX_MIN(-22,pdata->headset_incall_mic_vol,30);
+ +              DBG("headset_incall_mic_vol = %ddB \n",pdata->headset_incall_mic_vol);
+ +              DBG("headset_incall_vol = %ddB \n",pdata->headset_incall_vol);
+ +
+ +              vol = pdata->headset_incall_mic_vol;
+ +              if(vol<-16)
+ +              {
+ +                      wm8994_write(0x1E,  0x0016);  //mic vol
+ +                      wm8994_write(0x18,  320+(vol+22)*10/15);  //mic vol     
+ +              }
+ +              else
+ +              {
+ +                      wm8994_write(0x1E,  0x0006);  //mic vol
+ +                      wm8994_write(0x18,  320+(vol+16)*10/15);  //mic vol
+ +              }
+ +              break;
+ +      case wm8994_mainMIC_to_baseband_to_headset:
+ +              MAX_MIN(-12,pdata->headset_incall_vol,6);
+ +              MAX_MIN(-22,pdata->speaker_incall_mic_vol,30);
+ +              DBG("speaker_incall_mic_vol = %ddB \n",pdata->speaker_incall_mic_vol);
+ +              DBG("headset_incall_vol = %ddB \n",pdata->headset_incall_vol);
+ +
+ +              vol=pdata->speaker_incall_mic_vol;
+ +              if(vol<-16)
+ +              {
+ +                      wm8994_write(0x1E,  0x0016);  //mic vol
+ +                      wm8994_write(0x1A,  320+(vol+22)*10/15);  //mic vol     
+ +              }
+ +              else
+ +              {
+ +                      wm8994_write(0x1E,  0x0006);  //mic vol
+ +                      wm8994_write(0x1A,  320+(vol+16)*10/15);  //mic vol
+ +              }
+ +              break;
   
- -      if (!pdata || !wm8994->num_retune_mobile_texts)
- -              return;
+ +      case wm8994_mainMIC_to_baseband_to_earpiece:
+ +              MAX_MIN(-22,pdata->speaker_incall_mic_vol,30);
+ +              MAX_MIN(-21,pdata->earpiece_incall_vol,6);
+ +              DBG("earpiece_incall_vol = %ddB \n",pdata->earpiece_incall_vol);
+ +              DBG("speaker_incall_mic_vol = %ddB \n",pdata->speaker_incall_mic_vol);
+ +
+ +              vol = pdata->earpiece_incall_vol;
+ +              if(vol>=0)
+ +              {
+ +                      wm8994_write(0x33,  0x0018);  //6dB
+ +                      wm8994_write(0x31,  (((6-vol)/3)<<3)+(6-vol)/3);  //-21dB
+ +              }
+ +              else
+ +              {
+ +                      wm8994_write(0x33,  0x0010);
+ +                      wm8994_write(0x31,  (((-vol)/3)<<3)+(-vol)/3);  //-21dB
+ +              }
+ +              vol = pdata->speaker_incall_mic_vol;
+ +              if(vol<-16)
+ +              {
+ +                      wm8994_write(0x1E,  0x0016);
+ +                      wm8994_write(0x1A,  320+(vol+22)*10/15);        
+ +              }
+ +              else
+ +              {
+ +                      wm8994_write(0x1E,  0x0006);
+ +                      wm8994_write(0x1A,  320+(vol+16)*10/15);
+ +              }
+ +              break;
   
- -      switch (block) {
- -      case 0:
- -      case 1:
- -              iface = 0;
+ +      case wm8994_mainMIC_to_baseband_to_speakers:
+ +              MAX_MIN(-22,pdata->speaker_incall_mic_vol,30);
+ +              MAX_MIN(-21,pdata->speaker_incall_vol,12);
+ +              DBG("speaker_incall_vol = %ddB \n",pdata->speaker_incall_vol);
+ +              DBG("speaker_incall_mic_vol = %ddB \n",pdata->speaker_incall_mic_vol);
+ +
+ +              vol = pdata->speaker_incall_mic_vol;
+ +              if(vol<-16)
+ +              {
+ +                      wm8994_write(0x1E,  0x0016);
+ +                      wm8994_write(0x1A,  320+(vol+22)*10/15);        
+ +              }
+ +              else
+ +              {
+ +                      wm8994_write(0x1E,  0x0006);
+ +                      wm8994_write(0x1A,  320+(vol+16)*10/15);
+ +              }
+ +              vol = pdata->speaker_incall_vol;
+ +              if(vol<=0)
+ +              {
+ +                      wm8994_write(0x31,  (((-vol)/3)<<3)+(-vol)/3);
+ +              }
+ +              else if(vol <= 9)
+ +              {
+ +                      wm8994_write(0x25,  ((vol*10/15)<<3)+vol*10/15);
+ +              }
+ +              else
+ +              {
+ +                      wm8994_write(0x25,  0x003F);
+ +              }
                 break;
- -      case 2:
- -              iface = 1;
+ +
+ +      case wm8994_BT_baseband:
+ +              MAX_MIN(-16,pdata->BT_incall_vol,30);
+ +              MAX_MIN(-57,pdata->BT_incall_mic_vol,6);
+ +              DBG("BT_incall_mic_vol = %ddB \n",pdata->BT_incall_mic_vol);
+ +              DBG("BT_incall_vol = %ddB \n",pdata->BT_incall_vol);
+ +              vol = pdata->BT_incall_mic_vol;
+ +              wm8994_write(0x20,  320+vol+57);
+ +              vol = pdata->BT_incall_vol;
+ +              wm8994_write(0x19, 0x0500+(vol+16)*10/15);
                 break;
         default:
- -              return;
- -      }
- -
- -      /* Find the version of the currently selected configuration
- -       * with the nearest sample rate. */
- -      cfg = wm8994->retune_mobile_cfg[block];
- -      best = 0;
- -      best_val = INT_MAX;
- -      for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) {
- -              if (strcmp(pdata->retune_mobile_cfgs[i].name,
- -                         wm8994->retune_mobile_texts[cfg]) == 0 &&
- -                  abs(pdata->retune_mobile_cfgs[i].rate
- -                      - wm8994->dac_rates[iface]) < best_val) {
- -                      best = i;
- -                      best_val = abs(pdata->retune_mobile_cfgs[i].rate
- -                                     - wm8994->dac_rates[iface]);
- -              }
+ +              printk("route error !\n");
         }
   
- -      dev_dbg(codec->dev, "ReTune Mobile %d %s/%dHz for %dHz sample rate\n",
- -              block,
- -              pdata->retune_mobile_cfgs[best].name,
- -              pdata->retune_mobile_cfgs[best].rate,
- -              wm8994->dac_rates[iface]);
+ +}
   
- -      /* The EQ will be disabled while reconfiguring it, remember the
- -       * current configuration. 
- -       */
- -      save = snd_soc_read(codec, base);
- -      save &= WM8994_AIF1DAC1_EQ_ENA;
+ +#define wm8994_reset()        wm8994_set_all_mute();\
+ +                                              wm8994_write(WM8994_RESET, 0)                                   
   
- -      for (i = 0; i < WM8994_EQ_REGS; i++)
- -              snd_soc_update_bits(codec, base + i, 0xffff,
- -                              pdata->retune_mobile_cfgs[best].regs[i]);
+ +void AP_to_headset(void)
+ +{
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_AP_to_headset)return;
+ +      wm8994_current_mode=wm8994_AP_to_headset;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x700, 0xA101);
+ +      wm8994_write(0x01,  0x0023);
+ +      wm8994_write(0x200, 0x0000);
+ +      mdelay(WM8994_DELAY);
+ +
+ +      wm8994_write(0x220, 0x0000);
+ +      wm8994_write(0x221, 0x0700);
+ +      wm8994_write(0x222, 0x3126);
+ +      wm8994_write(0x223, 0x0100);
+ +
+ +      wm8994_write(0x220, 0x0004);
+ +      msleep(10);
+ +      wm8994_write(0x220, 0x0005);
+ +      msleep(5);
+ +
+ +      wm8994_write(0x200, 0x0010);
+ +      wm8994_write(0x208, 0x0008); //DSP_FS1CLK_ENA=1, DSP_FSINTCLK_ENA=1
+ +      wm8994_write(0x208, 0x000A); //DSP_FS1CLK_ENA=1, DSP_FSINTCLK_ENA=1
+ +      wm8994_write(0x210, 0x0083); // SR=48KHz
+ +#ifdef CONFIG_SND_RK29_CODEC_SOC_MASTER
+ +      wm8994_write(0x302, 0x3000); // AIF1_MSTR=1
+ +      wm8994_write(0x302, 0x7000); // AIF1_MSTR=1
+ +      wm8994_write(0x303, 0x0040); // AIF1 BCLK DIV--------AIF1CLK/4
+ +      wm8994_write(0x304, 0x0040); // AIF1 ADCLRCK DIV-----BCLK/64
+ +      wm8994_write(0x305, 0x0040); // AIF1 DACLRCK DIV-----BCLK/64
+ +      wm8994_write(0x300, 0x4010); // i2s 16 bits
+ +#endif
+ +      wm8994_write(0x200, 0x0011); // sysclk = fll (bit4 =1)   0x0011
+ +  
+ +      wm8994_write(0x04,  0x0303); // AIF1ADC1L_ENA=1, AIF1ADC1R_ENA=1, ADCL_ENA=1, ADCR_ENA=1/ q
+ +      wm8994_write(0x05,  0x0303);   
+ +      wm8994_write(0x2D,  0x0100);
+ +      wm8994_write(0x2E,  0x0100);
+ +      
+ +      wm8994_write(0x4C,  0x9F25);
+ +      msleep(5);
+ +      wm8994_write(0x01,  0x0323);
+ +      msleep(50);
+ +      wm8994_write(0x60,  0x0022);
+ +      wm8994_write(0x60,  0x00FF);
+ +
+ +      wm8994_write(0x420, 0x0000);
+ +      wm8994_write(0x601, 0x0001);
+ +      wm8994_write(0x602, 0x0001);
+ +    
+ +      wm8994_write(0x610, 0x01A0);  //DAC1 Left Volume bit0~7                 
+ +      wm8994_write(0x611, 0x01A0);  //DAC1 Right Volume bit0~7        
+ +      wm8994_write(0x03,  0x3030);
+ +      wm8994_write(0x22,  0x0000);
+ +      wm8994_write(0x23,  0x0100);
+ +      wm8994_write(0x36,  0x0003);
+ +      wm8994_write(0x1C,  0x017F);  //HPOUT1L Volume
+ +      wm8994_write(0x1D,  0x017F);  //HPOUT1R Volume
+ +}
   
- -      snd_soc_update_bits(codec, base, WM8994_AIF1DAC1_EQ_ENA, save);
+ +void AP_to_speakers(void)
+ +{
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_AP_to_speakers)return;
+ +      wm8994_current_mode=wm8994_AP_to_speakers;
+ +//    wm8994_reset();
+ +      wm8994_write(0,0);
+ +      msleep(WM8994_DELAY);
+ +
+ +//    wm8994_write(0x700, 0xA101);
+ +//    wm8994_write(0x39,  0x006C);
+ +      wm8994_write(0x01,  0x0023);
+ +      wm8994_write(0x200, 0x0000);
+ +      mdelay(WM8994_DELAY);
+ +
+ +      wm8994_write(0x220, 0x0000);
+ +      wm8994_write(0x221, 0x0700);
+ +      wm8994_write(0x222, 0x3126);
+ +      wm8994_write(0x223, 0x0100);
+ +
+ +      wm8994_write(0x220, 0x0004);
+ +      msleep(10);
+ +      wm8994_write(0x220, 0x0005);
+ +      msleep(5);
+ +
+ +      wm8994_write(0x200, 0x0010);
+ +      wm8994_write(0x208, 0x0008); //DSP_FS1CLK_ENA=1, DSP_FSINTCLK_ENA=1
+ +      wm8994_write(0x208, 0x000A); //DSP_FS1CLK_ENA=1, DSP_FSINTCLK_ENA=1
+ +      wm8994_write(0x210, 0x0083); // SR=48KHz
+ +#ifdef CONFIG_SND_RK29_CODEC_SOC_MASTER
+ +      wm8994_write(0x302, 0x3000); // AIF1_MSTR=1
+ +      wm8994_write(0x302, 0x7000); // AIF1_MSTR=1
+ +      wm8994_write(0x303, 0x0040); // AIF1 BCLK DIV--------AIF1CLK/4
+ +      wm8994_write(0x304, 0x0040); // AIF1 ADCLRCK DIV-----BCLK/64
+ +      wm8994_write(0x305, 0x0040); // AIF1 DACLRCK DIV-----BCLK/64
+ +      wm8994_write(0x300, 0xC010); // i2s 16 bits
+ +#endif
+ +      wm8994_write(0x200, 0x0011); // sysclk = fll (bit4 =1)   0x0011
+ +  
+ +      wm8994_write(0x01,  0x3023);
+ +      wm8994_write(0x03,  0x0330);
+ +      wm8994_write(0x05,  0x0303);   
+ +      wm8994_write(0x22,  0x0000);
+ +      wm8994_write(0x23,  0x0100);    
+ +      wm8994_write(0x2D,  0x0001);
+ +      wm8994_write(0x2E,  0x0000);
+ +      wm8994_write(0x36,  0x000C);    
+ +      wm8994_write(0x4C,  0x9F25);
+ +      wm8994_write(0x60,  0x00EE);
+ +      wm8994_write(0x420, 0x0000); 
+ +
+ +      wm8994_write(0x601, 0x0001);
+ +      wm8994_write(0x602, 0x0001);
+ +
+ +      wm8994_write(0x610, 0x01c0);  //DAC1 Left Volume bit0~7 
+ +      wm8994_write(0x611, 0x01c0);  //DAC1 Right Volume bit0~7        
+ +
+ +      wm8994_write(0x26,  0x017F);  //Speaker Left Output Volume
+ +      wm8994_write(0x27,  0x017F);  //Speaker Right Output Volume
   }
   
- -/* Icky as hell but saves code duplication */
- -static int wm8994_get_retune_mobile_block(const char *name)
+ +void FM_to_headset(void)
   {
- -      if (strcmp(name, "AIF1.1 EQ Mode") == 0)
- -              return 0;
- -      if (strcmp(name, "AIF1.2 EQ Mode") == 0)
- -              return 1;
- -      if (strcmp(name, "AIF2 EQ Mode") == 0)
- -              return 2;
- -      return -EINVAL;
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode == wm8994_FM_to_headset)return;
+ +      wm8994_current_mode = wm8994_FM_to_headset;
+ +      wm8994_write(0,0);
+ +      msleep(WM8994_DELAY);
+ +
+ +//clk
+ +//    wm8994_write(0x701, 0x0000);//MCLK2
+ +      wm8994_write(0x208, 0x0008); //DSP_FS1CLK_ENA=1, DSP_FSINTCLK_ENA=1
+ +      wm8994_write(0x208, 0x000A); //DSP_FS1CLK_ENA=1, DSP_FSINTCLK_ENA=1
+ +      wm8994_write(0x210, 0x0083); // SR=48KHz
+ +      wm8994_write(0x300, 0xC010); // i2s 16 bits
+ +      wm8994_write(0x200, 0x0001); // sysclk = MCLK1
+ +//    wm8994_write(0x200, 0x0009); // sysclk = MCLK2
+ +      wm8994_set_channel_vol();
+ +      
+ +      wm8994_write(0x01,  0x0303); 
+ +      wm8994_write(0x02,  0x03A0);  
+ +      wm8994_write(0x03,  0x0030);    
+ +      wm8994_write(0x19,  0x010B);  //LEFT LINE INPUT 3&4 VOLUME      
+ +      wm8994_write(0x1B,  0x010B);  //RIGHT LINE INPUT 3&4 VOLUME
+ +
+ +      wm8994_write(0x28,  0x0044);  
+ +      wm8994_write(0x29,  0x0100);     
+ +      wm8994_write(0x2A,  0x0100);
+ +      wm8994_write(0x2D,  0x0040); 
+ +      wm8994_write(0x2E,  0x0040);
+ +      wm8994_write(0x4C,  0x9F25);
+ +      wm8994_write(0x60,  0x00EE);
+ +      wm8994_write(0x220, 0x0003);
+ +      wm8994_write(0x221, 0x0700);
+ +      wm8994_write(0x224, 0x0CC0);
+ +      wm8994_write(0x200, 0x0011);
+ +      wm8994_write(0x1C,  0x01F9);  //LEFT OUTPUT VOLUME      
+ +      wm8994_write(0x1D,  0x01F9);  //RIGHT OUTPUT VOLUME
   }
   
- -static int wm8994_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
- -                                       struct snd_ctl_elem_value *ucontrol)
+ +void FM_to_headset_and_record(void)
   {
- -      struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- -      struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);  
- -      struct wm8994_pdata *pdata = wm8994->pdata;
- -      int block = wm8994_get_retune_mobile_block(kcontrol->id.name);
- -      int value = ucontrol->value.integer.value[0];
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
   
- -      if (block < 0)
- -              return block;
+ +      if(wm8994_current_mode == wm8994_FM_to_headset_and_record)return;
+ +      wm8994_current_mode = wm8994_FM_to_headset_and_record;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
   
- -      if (value >= pdata->num_retune_mobile_cfgs)
- -              return -EINVAL;
+ +      wm8994_write(0x01,   0x0003);
+ +      msleep(WM8994_DELAY);
+ +      wm8994_write(0x221,  0x1900);  //8~13BIT div
   
- -      wm8994->retune_mobile_cfg[block] = value;
+ +#ifdef CONFIG_SND_RK29_CODEC_SOC_MASTER
+ +      wm8994_write(0x302,  0x4000);  // master = 0x4000 // slave= 0x0000
+ +      wm8994_write(0x303,  0x0040);  // master  0x0050 lrck 7.94kHz bclk 510KHz
+ +#endif
+ +      
+ +      wm8994_write(0x220,  0x0004);
+ +      msleep(WM8994_DELAY);
+ +      wm8994_write(0x220,  0x0005);  
+ +
+ +      wm8994_write(0x01,   0x0323);
+ +      wm8994_write(0x02,   0x03A0);
+ +      wm8994_write(0x03,   0x0030);
+ +      wm8994_write(0x19,   0x010B);  //LEFT LINE INPUT 3&4 VOLUME     
+ +      wm8994_write(0x1B,   0x010B);  //RIGHT LINE INPUT 3&4 VOLUME
+ +  
+ +      wm8994_write(0x28,   0x0044);
+ +      wm8994_write(0x29,   0x0100);
+ +      wm8994_write(0x2A,   0x0100);
+ +      wm8994_write(0x2D,   0x0040);
+ +      wm8994_write(0x2E,   0x0040);
+ +      wm8994_write(0x4C,   0x9F25);
+ +      wm8994_write(0x60,   0x00EE);
+ +      wm8994_write(0x200,  0x0011);
+ +      wm8994_write(0x1C,   0x01F9);  //LEFT OUTPUT VOLUME
+ +      wm8994_write(0x1D,   0x01F9);  //RIGHT OUTPUT VOLUME
+ +      wm8994_write(0x04,   0x0303);
+ +      wm8994_write(0x208,  0x000A);
+ +      wm8994_write(0x300,  0x4050);
+ +      wm8994_write(0x606,  0x0002);
+ +      wm8994_write(0x607,  0x0002);
+ +      wm8994_write(0x620,  0x0000);
+ +}
   
- -      wm8994_set_retune_mobile(codec, block);
+ +void FM_test(void)
+ +{
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode == wm8994_FM_to_speakers)return;
+ +      wm8994_current_mode = wm8994_FM_to_speakers;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +//clk
+ +//    wm8994_write(0x701, 0x0000);//MCLK2
+ +      wm8994_write(0x208, 0x0008); //DSP_FS1CLK_ENA=1, DSP_FSINTCLK_ENA=1
+ +      wm8994_write(0x208, 0x000A); //DSP_FS1CLK_ENA=1, DSP_FSINTCLK_ENA=1
+ +      wm8994_write(0x210, 0x0083); // SR=48KHz
+ +      wm8994_write(0x300, 0xC010); // i2s 16 bits
+ +      wm8994_write(0x200, 0x0001); // sysclk = MCLK1
+ +//    wm8994_write(0x200, 0x0009); // sysclk = MCLK2
+ +      wm8994_set_channel_vol();
+ +      
+ +      wm8994_write(0x20,   0x013F);
+ +      wm8994_write(0x21,   0x013F);
+ +//path
+ +      wm8994_write(0x28,   0x0044);//IN2RN_TO_IN2R IN2LN_TO_IN2L
+ +      wm8994_write(0x29,   0x0107);//IN2L PGA Output to MIXINL UnMute
+ +      wm8994_write(0x2A,   0x0107);//IN2R PGA Output to MIXINR UnMute
+ +      wm8994_write(0x2D,   0x0040);//MIXINL_TO_MIXOUTL
+ +      wm8994_write(0x2E,   0x0040);//MIXINR_TO_MIXOUTR
+ +      wm8994_write(0x36,   0x000C);//MIXOUTL_TO_SPKMIXL   MIXOUTR_TO_SPKMIXR
+ +//volume
+ +      wm8994_write(0x22,   0x0000);
+ +      wm8994_write(0x23,   0x0000);
+ +      wm8994_write(0x19,   0x013F);  //LEFT LINE INPUT 3&4 VOLUME
+ +      wm8994_write(0x1B,   0x013F);  //RIGHT LINE INPUT 3&4 VOLUME            
+ +//power
+ +      wm8994_write(0x01,   0x3003);
+ +      wm8994_write(0x02,   0x03A0);
+ +      wm8994_write(0x03,   0x0330);   
+ +}
   
- -      return 0;
+ +void FM_to_speakers(void)
+ +{
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +      if(wm8994_current_mode == wm8994_FM_to_speakers)return;
+ +      wm8994_current_mode = wm8994_FM_to_speakers;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +      wm8994_write(0x01,  0x0003);
+ +      msleep(WM8994_DELAY);
+ +//clk
+ +//    wm8994_write(0x701, 0x0000);//MCLK2
+ +      wm8994_write(0x208, 0x0008); //DSP_FS1CLK_ENA=1, DSP_FSINTCLK_ENA=1
+ +      wm8994_write(0x208, 0x000A); //DSP_FS1CLK_ENA=1, DSP_FSINTCLK_ENA=1
+ +      wm8994_write(0x210, 0x0083); // SR=48KHz
+ +      wm8994_write(0x300, 0xC010); // i2s 16 bits
+ +      wm8994_write(0x200, 0x0001); // sysclk = MCLK1
+ +//    wm8994_write(0x200, 0x0009); // sysclk = MCLK2
+ +      wm8994_set_channel_vol();
+ +      
+ +//path
+ +      wm8994_write(0x22,  0x0000);
+ +      wm8994_write(0x23,  0x0100);
+ +      wm8994_write(0x2D,  0x0030);  //bit 1 IN2LP_TO_MIXOUTL bit 12 DAC1L_TO_HPOUT1L  0x0102 
+ +      wm8994_write(0x2E,  0x0030);  //bit 1 IN2RP_TO_MIXOUTR bit 12 DAC1R_TO_HPOUT1R  0x0102
+ +      wm8994_write(0x36,  0x000C);//MIXOUTL_TO_SPKMIXL        MIXOUTR_TO_SPKMIXR
+ +//volume
+ +      wm8994_write(0x25,  0x003F);
+ +      wm8994_write(0x610, 0x01C0);  //DAC1 Left Volume bit0~7 
+ +      wm8994_write(0x611, 0x01C0);  //DAC1 Right Volume bit0~7
+ +//power
+ +      wm8994_write(0x01,  0x3003);    
+ +      wm8994_write(0x03,  0x0330);
+ +      wm8994_write(0x05,  0x0003);
   }
   
- -static int wm8994_get_retune_mobile_enum(struct snd_kcontrol *kcontrol,
- -                                       struct snd_ctl_elem_value *ucontrol)
+ +void FM_to_speakers_and_record(void)
   {
- -      struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- -      struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
- -      int block = wm8994_get_retune_mobile_block(kcontrol->id.name);
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
   
- -      ucontrol->value.enumerated.item[0] = wm8994->retune_mobile_cfg[block];
+ +      if(wm8994_current_mode == wm8994_FM_to_speakers_and_record)return;
+ +      wm8994_current_mode = wm8994_FM_to_speakers_and_record;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
   
- -      return 0;
- -}
- -
- -static const struct snd_kcontrol_new wm8994_snd_controls[] = {
- -SOC_DOUBLE_R_TLV("AIF1ADC1 Volume", WM8994_AIF1_ADC1_LEFT_VOLUME,
- -               WM8994_AIF1_ADC1_RIGHT_VOLUME,
- -               1, 119, 0, digital_tlv),
- -SOC_DOUBLE_R_TLV("AIF1ADC2 Volume", WM8994_AIF1_ADC2_LEFT_VOLUME,
- -               WM8994_AIF1_ADC2_RIGHT_VOLUME,
- -               1, 119, 0, digital_tlv),
- -SOC_DOUBLE_R_TLV("AIF2ADC Volume", WM8994_AIF2_ADC_LEFT_VOLUME,
- -               WM8994_AIF2_ADC_RIGHT_VOLUME,
- -               1, 119, 0, digital_tlv),
- -
- -SOC_DOUBLE_R_TLV("AIF1DAC1 Volume", WM8994_AIF1_DAC1_LEFT_VOLUME,
- -               WM8994_AIF1_DAC1_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
- -SOC_DOUBLE_R_TLV("AIF1DAC2 Volume", WM8994_AIF1_DAC2_LEFT_VOLUME,
- -               WM8994_AIF1_DAC2_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
- -SOC_DOUBLE_R_TLV("AIF2DAC Volume", WM8994_AIF2_DAC_LEFT_VOLUME,
- -               WM8994_AIF2_DAC_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
- -
- -SOC_SINGLE_TLV("AIF1 Boost Volume", WM8994_AIF1_CONTROL_2, 10, 3, 0, aif_tlv),
- -SOC_SINGLE_TLV("AIF2 Boost Volume", WM8994_AIF2_CONTROL_2, 10, 3, 0, aif_tlv),
- -
- -SOC_SINGLE("AIF1DAC1 EQ Switch", WM8994_AIF1_DAC1_EQ_GAINS_1, 0, 1, 0),
- -SOC_SINGLE("AIF1DAC2 EQ Switch", WM8994_AIF1_DAC2_EQ_GAINS_1, 0, 1, 0),
- -SOC_SINGLE("AIF2 EQ Switch", WM8994_AIF2_EQ_GAINS_1, 0, 1, 0),
- -
- -WM8994_DRC_SWITCH("AIF1DAC1 DRC Switch", WM8994_AIF1_DRC1_1, 2),
- -WM8994_DRC_SWITCH("AIF1ADC1L DRC Switch", WM8994_AIF1_DRC1_1, 1),
- -WM8994_DRC_SWITCH("AIF1ADC1R DRC Switch", WM8994_AIF1_DRC1_1, 0),
- -
- -WM8994_DRC_SWITCH("AIF1DAC2 DRC Switch", WM8994_AIF1_DRC2_1, 2),
- -WM8994_DRC_SWITCH("AIF1ADC2L DRC Switch", WM8994_AIF1_DRC2_1, 1),
- -WM8994_DRC_SWITCH("AIF1ADC2R DRC Switch", WM8994_AIF1_DRC2_1, 0),
- -
- -WM8994_DRC_SWITCH("AIF2DAC DRC Switch", WM8994_AIF2_DRC_1, 2),
- -WM8994_DRC_SWITCH("AIF2ADCL DRC Switch", WM8994_AIF2_DRC_1, 1),
- -WM8994_DRC_SWITCH("AIF2ADCR DRC Switch", WM8994_AIF2_DRC_1, 0),
- -
- -SOC_SINGLE_TLV("DAC1 Right Sidetone Volume", WM8994_DAC1_MIXER_VOLUMES,
- -             5, 12, 0, st_tlv),
- -SOC_SINGLE_TLV("DAC1 Left Sidetone Volume", WM8994_DAC1_MIXER_VOLUMES,
- -             0, 12, 0, st_tlv),
- -SOC_SINGLE_TLV("DAC2 Right Sidetone Volume", WM8994_DAC2_MIXER_VOLUMES,
- -             5, 12, 0, st_tlv),
- -SOC_SINGLE_TLV("DAC2 Left Sidetone Volume", WM8994_DAC2_MIXER_VOLUMES,
- -             0, 12, 0, st_tlv),
- -SOC_ENUM("Sidetone HPF Mux", sidetone_hpf),
- -SOC_SINGLE("Sidetone HPF Switch", WM8994_SIDETONE, 6, 1, 0),
- -
- -SOC_DOUBLE_R_TLV("DAC1 Volume", WM8994_DAC1_LEFT_VOLUME,
- -               WM8994_DAC1_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
- -SOC_DOUBLE_R("DAC1 Switch", WM8994_DAC1_LEFT_VOLUME,
- -           WM8994_DAC1_RIGHT_VOLUME, 9, 1, 1),
- -
- -SOC_DOUBLE_R_TLV("DAC2 Volume", WM8994_DAC2_LEFT_VOLUME,
- -               WM8994_DAC2_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
- -SOC_DOUBLE_R("DAC2 Switch", WM8994_DAC2_LEFT_VOLUME,
- -           WM8994_DAC2_RIGHT_VOLUME, 9, 1, 1),
- -
- -SOC_SINGLE_TLV("SPKL DAC2 Volume", WM8994_SPKMIXL_ATTENUATION,
- -             6, 1, 1, wm_hubs_spkmix_tlv),
- -SOC_SINGLE_TLV("SPKL DAC1 Volume", WM8994_SPKMIXL_ATTENUATION,
- -             2, 1, 1, wm_hubs_spkmix_tlv),
- -
- -SOC_SINGLE_TLV("SPKR DAC2 Volume", WM8994_SPKMIXR_ATTENUATION,
- -             6, 1, 1, wm_hubs_spkmix_tlv),
- -SOC_SINGLE_TLV("SPKR DAC1 Volume", WM8994_SPKMIXR_ATTENUATION,
- -             2, 1, 1, wm_hubs_spkmix_tlv),
- -
- -SOC_SINGLE_TLV("AIF1DAC1 3D Stereo Volume", WM8994_AIF1_DAC1_FILTERS_2,
- -             10, 15, 0, wm8994_3d_tlv),
- -SOC_SINGLE("AIF1DAC1 3D Stereo Switch", WM8994_AIF1_DAC2_FILTERS_2,
- -         8, 1, 0),
- -SOC_SINGLE_TLV("AIF1DAC2 3D Stereo Volume", WM8994_AIF1_DAC2_FILTERS_2,
- -             10, 15, 0, wm8994_3d_tlv),
- -SOC_SINGLE("AIF1DAC2 3D Stereo Switch", WM8994_AIF1_DAC2_FILTERS_2,
- -         8, 1, 0),
- -SOC_SINGLE_TLV("AIF2DAC 3D Stereo Volume", WM8994_AIF1_DAC1_FILTERS_2,
- -             10, 15, 0, wm8994_3d_tlv),
- -SOC_SINGLE("AIF2DAC 3D Stereo Switch", WM8994_AIF1_DAC2_FILTERS_2,
- -         8, 1, 0),
- -};
+ +      wm8994_write(0x01,   0x0003);  
+ +      msleep(WM8994_DELAY);
   
- -static const struct snd_kcontrol_new wm8994_eq_controls[] = {
- -SOC_SINGLE_TLV("AIF1DAC1 EQ1 Volume", WM8994_AIF1_DAC1_EQ_GAINS_1, 11, 31, 0,
- -             eq_tlv),
- -SOC_SINGLE_TLV("AIF1DAC1 EQ2 Volume", WM8994_AIF1_DAC1_EQ_GAINS_1, 6, 31, 0,
- -             eq_tlv),
- -SOC_SINGLE_TLV("AIF1DAC1 EQ3 Volume", WM8994_AIF1_DAC1_EQ_GAINS_1, 1, 31, 0,
- -             eq_tlv),
- -SOC_SINGLE_TLV("AIF1DAC1 EQ4 Volume", WM8994_AIF1_DAC1_EQ_GAINS_2, 11, 31, 0,
- -             eq_tlv),
- -SOC_SINGLE_TLV("AIF1DAC1 EQ5 Volume", WM8994_AIF1_DAC1_EQ_GAINS_2, 6, 31, 0,
- -             eq_tlv),
- -
- -SOC_SINGLE_TLV("AIF1DAC2 EQ1 Volume", WM8994_AIF1_DAC2_EQ_GAINS_1, 11, 31, 0,
- -             eq_tlv),
- -SOC_SINGLE_TLV("AIF1DAC2 EQ2 Volume", WM8994_AIF1_DAC2_EQ_GAINS_1, 6, 31, 0,
- -             eq_tlv),
- -SOC_SINGLE_TLV("AIF1DAC2 EQ3 Volume", WM8994_AIF1_DAC2_EQ_GAINS_1, 1, 31, 0,
- -             eq_tlv),
- -SOC_SINGLE_TLV("AIF1DAC2 EQ4 Volume", WM8994_AIF1_DAC2_EQ_GAINS_2, 11, 31, 0,
- -             eq_tlv),
- -SOC_SINGLE_TLV("AIF1DAC2 EQ5 Volume", WM8994_AIF1_DAC2_EQ_GAINS_2, 6, 31, 0,
- -             eq_tlv),
- -
- -SOC_SINGLE_TLV("AIF2 EQ1 Volume", WM8994_AIF2_EQ_GAINS_1, 11, 31, 0,
- -             eq_tlv),
- -SOC_SINGLE_TLV("AIF2 EQ2 Volume", WM8994_AIF2_EQ_GAINS_1, 6, 31, 0,
- -             eq_tlv),
- -SOC_SINGLE_TLV("AIF2 EQ3 Volume", WM8994_AIF2_EQ_GAINS_1, 1, 31, 0,
- -             eq_tlv),
- -SOC_SINGLE_TLV("AIF2 EQ4 Volume", WM8994_AIF2_EQ_GAINS_2, 11, 31, 0,
- -             eq_tlv),
- -SOC_SINGLE_TLV("AIF2 EQ5 Volume", WM8994_AIF2_EQ_GAINS_2, 6, 31, 0,
- -             eq_tlv),
- -};
+ +#ifdef CONFIG_SND_RK29_CODEC_SOC_MASTER
+ +      wm8994_write(0x302,  0x4000);  // master = 0x4000 // slave= 0x0000
+ +      wm8994_write(0x303,  0x0090);  //
+ +#endif
+ +      
+ +      wm8994_write(0x220,  0x0006);
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x01,   0x3023);
+ +      wm8994_write(0x02,   0x03A0);
+ +      wm8994_write(0x03,   0x0330);
+ +      wm8994_write(0x19,   0x010B);  //LEFT LINE INPUT 3&4 VOLUME
+ +      wm8994_write(0x1B,   0x010B);  //RIGHT LINE INPUT 3&4 VOLUME
+ +  
+ +      wm8994_write(0x22,   0x0000);
+ +      wm8994_write(0x23,   0x0000);
+ +      wm8994_write(0x36,   0x000C);
+ +
+ +      wm8994_write(0x28,   0x0044);
+ +      wm8994_write(0x29,   0x0100);
+ +      wm8994_write(0x2A,   0x0100);
+ +      wm8994_write(0x2D,   0x0040);
+ +      wm8994_write(0x2E,   0x0040);
+ +
+ +      wm8994_write(0x220,  0x0003);
+ +      wm8994_write(0x221,  0x0700);
+ +      wm8994_write(0x224,  0x0CC0);
+ +
+ +      wm8994_write(0x200,  0x0011);
+ +      wm8994_write(0x20,   0x01F9);
+ +      wm8994_write(0x21,   0x01F9);
+ +      wm8994_write(0x04,   0x0303);
+ +      wm8994_write(0x208,  0x000A);   
+ +      wm8994_write(0x300,  0x4050);
+ +      wm8994_write(0x606,  0x0002);   
+ +      wm8994_write(0x607,  0x0002);
+ +      wm8994_write(0x620,  0x0000);
+ +}
   
- -static int clk_sys_event(struct snd_soc_dapm_widget *w,
- -                       struct snd_kcontrol *kcontrol, int event)
+ +void record_only(void)
   {
- -      struct snd_soc_codec *codec = w->codec;
- -
- -      switch (event) {
- -      case SND_SOC_DAPM_PRE_PMU:
- -              return configure_clock(codec);
- -
- -      case SND_SOC_DAPM_POST_PMD:
- -              configure_clock(codec);
- -              break;
- -      }
- -
- -      return 0;
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +      wm8994_write(0,0);
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x01,  0x0003);
+ +      msleep(WM8994_DELAY);
+ +//clk
+ +      wm8994_sysclk_config();
+ +      wm8994_write(0x300, 0xC010); //AIF1ADCL_SRC=1, AIF1ADCR_SRC=1, AIF1_WL=00, AIF1_FMT=10
+ +//    wm8994_write(0x300, 0xC050); // AIF1ADCL_SRC=1, AIF1ADCR_SRC=1, AIF1_WL=10, AIF1_FMT=10
+ +      
+ +//path
+ +      wm8994_write(0x28,  0x0003); // IN1RP_TO_IN1R=1, IN1RN_TO_IN1R=1
+ +      wm8994_write(0x2A,  0x0030); //IN1R_TO_MIXINR   IN1R_MIXINR_VOL
+ +      wm8994_write(0x606, 0x0002); // ADC1L_TO_AIF1ADC1L=1
+ +      wm8994_write(0x607, 0x0002); // ADC1R_TO_AIF1ADC1R=1
+ +      wm8994_write(0x620, 0x0000); //ADC_OSR128=0, DAC_OSR128=0       
+ +//DRC
+ +      wm8994_write(0x440, 0x01BF);
+ +      wm8994_write(0x450, 0x01BF);    
+ +//valume
+ +      wm8994_write(0x1A,  0x014B);//IN1_VU=1, IN1R_MUTE=0, IN1R_ZC=1, IN1R_VOL=0_1011
+ +      wm8994_write(0x402, 0x01FF); // AIF1ADC1L_VOL [7:0]
+ +      wm8994_write(0x403, 0x01FF); // AIF1ADC1R_VOL [7:0]
+ +      
+ +//power
+ +      wm8994_write(0x02,  0x6110); // TSHUT_ENA=1, TSHUT_OPDIS=1, MIXINR_ENA=1,IN1R_ENA=1
+ +      wm8994_write(0x04,  0x0303); // AIF1ADC1L_ENA=1, AIF1ADC1R_ENA=1, ADCL_ENA=1, ADCR_ENA=1        
+ +      wm8994_write(0x01,  0x3033);
   }
   
- -static void wm8994_update_class_w(struct snd_soc_codec *codec)
+ +void AP_to_speakers_and_headset(void)
   {
- -      int enable = 1;
- -      int source = 0;  /* GCC flow analysis can't track enable */
- -      int reg, reg_r;
- -
- -      /* Only support direct DAC->headphone paths */
- -      reg = snd_soc_read(codec, WM8994_OUTPUT_MIXER_1);
- -      if (!(reg & WM8994_DAC1L_TO_HPOUT1L)) {
- -              dev_vdbg(codec->dev, "HPL connected to output mixer\n");
- -              enable = 0;
- -      }
- -
- -      reg = snd_soc_read(codec, WM8994_OUTPUT_MIXER_2);
- -      if (!(reg & WM8994_DAC1R_TO_HPOUT1R)) {
- -              dev_vdbg(codec->dev, "HPR connected to output mixer\n");
- -              enable = 0;
- -      }
- -
- -      /* We also need the same setting for L/R and only one path */
- -      reg = snd_soc_read(codec, WM8994_DAC1_LEFT_MIXER_ROUTING);
- -      switch (reg) {
- -      case WM8994_AIF2DACL_TO_DAC1L:
- -              dev_vdbg(codec->dev, "Class W source AIF2DAC\n");
- -              source = 2 << WM8994_CP_DYN_SRC_SEL_SHIFT;
- -              break;
- -      case WM8994_AIF1DAC2L_TO_DAC1L:
- -              dev_vdbg(codec->dev, "Class W source AIF1DAC2\n");
- -              source = 1 << WM8994_CP_DYN_SRC_SEL_SHIFT;
- -              break;
- -      case WM8994_AIF1DAC1L_TO_DAC1L:
- -              dev_vdbg(codec->dev, "Class W source AIF1DAC1\n");
- -              source = 0 << WM8994_CP_DYN_SRC_SEL_SHIFT;
- -              break;
- -      default:
- -              dev_vdbg(codec->dev, "DAC mixer setting: %x\n", reg);
- -              enable = 0;
- -              break;
- -      }
- -
- -      reg_r = snd_soc_read(codec, WM8994_DAC1_RIGHT_MIXER_ROUTING);
- -      if (reg_r != reg) {
- -              dev_vdbg(codec->dev, "Left and right DAC mixers different\n");
- -              enable = 0;
- -      }
- -
- -      if (enable) {
- -              dev_dbg(codec->dev, "Class W enabled\n");
- -              snd_soc_update_bits(codec, WM8994_CLASS_W_1,
- -                                  WM8994_CP_DYN_PWR |
- -                                  WM8994_CP_DYN_SRC_SEL_MASK,
- -                                  source | WM8994_CP_DYN_PWR);
- -              
- -      } else {
- -              dev_dbg(codec->dev, "Class W disabled\n");
- -              snd_soc_update_bits(codec, WM8994_CLASS_W_1,
- -                                  WM8994_CP_DYN_PWR, 0);
- -      }
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +      if(wm8994_current_mode==wm8994_AP_to_speakers_and_headset)return;
+ +      wm8994_current_mode=wm8994_AP_to_speakers_and_headset;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x39,  0x006C);
+ +      wm8994_write(0x01,  0x0023);
+ +      msleep(WM8994_DELAY);
+ +//clk
+ +      wm8994_sysclk_config();
+ +      wm8994_write(0x300, 0xC010); // i2s 16 bits     
+ +//path
+ +      wm8994_write(0x2D,  0x0100);
+ +      wm8994_write(0x2E,  0x0100);
+ +      wm8994_write(0x60,  0x0022);
+ +      wm8994_write(0x60,  0x00EE);
+ +      wm8994_write(0x420, 0x0000);    
+ +      wm8994_write(0x601, 0x0001);
+ +      wm8994_write(0x602, 0x0001);
+ +      wm8994_write(0x36,  0x0003);
+ +//    wm8994_write(0x24,  0x0011);    
+ +//other
+ +      wm8994_write(0x4C,  0x9F25);
+ +//volume
+ +      wm8994_write(0x22,  0x0000);
+ +      wm8994_write(0x23,  0x0100);
+ +      wm8994_write(0x610, 0x01C0);  //DAC1 Left Volume bit0~7 
+ +      wm8994_write(0x611, 0x01C0);  //DAC1 Right Volume bit0~7
+ +//    wm8994_write(0x25,  0x003F);    
+ +      wm8994_set_channel_vol();
+ +//power
+ +      wm8994_write(0x04,  0x0303); // AIF1ADC1L_ENA=1, AIF1ADC1R_ENA=1, ADCL_ENA=1, ADCR_ENA=1
+ +      wm8994_write(0x05,  0x0303);  
+ +      wm8994_write(0x03,  0x3330);    
+ +      wm8994_write(0x01,  0x3303);
+ +      msleep(50); 
+ +      wm8994_write(0x01,  0x3333);    
   }
   
- -static const char *hp_mux_text[] = {
- -      "Mixer",
- -      "DAC",
- -};
- -
- -#define WM8994_HP_ENUM(xname, xenum) \
- -{     .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
- -      .info = snd_soc_info_enum_double, \
- -      .get = snd_soc_dapm_get_enum_double, \
- -      .put = wm8994_put_hp_enum, \
- -      .private_value = (unsigned long)&xenum }
- -
- -static int wm8994_put_hp_enum(struct snd_kcontrol *kcontrol,
- -                            struct snd_ctl_elem_value *ucontrol)
+ +void recorder_and_AP_to_headset(void)
   {
- -      struct snd_soc_dapm_widget *w = snd_kcontrol_chip(kcontrol);
- -      struct snd_soc_codec *codec = w->codec;
- -      int ret;
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_recorder_and_AP_to_headset)return;
+ +      wm8994_current_mode=wm8994_recorder_and_AP_to_headset;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +      
+ +      wm8994_write(0x39, 0x006C);
+ +
+ +      wm8994_write(0x01, 0x0003);
+ +      msleep(35);     
+ +      wm8994_write(0xFF, 0x0000);
+ +      msleep(5);
+ +      wm8994_write(0x4C, 0x9F25);
+ +      msleep(5);
+ +      wm8994_write(0x01, 0x0303);
+ +      wm8994_write(0x60, 0x0022);
+ +      msleep(5);      
+ +      wm8994_write(0x54, 0x0033);//
+ +      
+ +//    wm8994_write(0x01,  0x0003);    
+ +      wm8994_write(0x200, 0x0000);
+ +      msleep(WM8994_DELAY);
+ +//clk
+ +      wm8994_sysclk_config();
+ +      wm8994_write(0x300, 0xC010); // i2s 16 bits     
+ +//recorder
+ +      wm8994_write(0x28,  0x0003); // IN1RP_TO_IN1R=1, IN1RN_TO_IN1R=1
+ +      wm8994_write(0x606, 0x0002); // ADC1L_TO_AIF1ADC1L=1
+ +      wm8994_write(0x607, 0x0002); // ADC1R_TO_AIF1ADC1R=1
+ +      wm8994_write(0x620, 0x0001); 
+ +      wm8994_write(0x402, 0x01FF); // AIF1ADC1L_VOL [7:0]
+ +      wm8994_write(0x403, 0x01FF); // AIF1ADC1R_VOL [7:0]
+ +//DRC 
+ +      wm8994_write(0x440, 0x01BF);
+ +      wm8994_write(0x450, 0x01BF);
+ +//path        
+ +      wm8994_write(0x2D,  0x0100); // DAC1L_TO_HPOUT1L=1   
+ +      wm8994_write(0x2E,  0x0100); // DAC1R_TO_HPOUT1R=1   
+ +      wm8994_write(0x60,  0x0022);
+ +      wm8994_write(0x60,  0x00FF);
+ +      wm8994_write(0x420, 0x0000); 
+ +      wm8994_write(0x601, 0x0001); // AIF1DAC1L_TO_DAC1L=1
+ +      wm8994_write(0x602, 0x0001); // AIF1DAC1R_TO_DAC1R=1
+ +//volume      
+ +      wm8994_write(0x610, 0x01FF); // DAC1_VU=1, DAC1L_VOL=1100_0000
+ +      wm8994_write(0x611, 0x01FF); // DAC1_VU=1, DAC1R_VOL=1100_0000
+ +      wm8994_set_channel_vol();       
+ +//other
+ +//    wm8994_write(0x4C,  0x9F25);            
+ +//power
+ +      wm8994_write(0x01,  0x0333);
+ +      wm8994_write(0x02,  0x6110); // TSHUT_ENA=1, TSHUT_OPDIS=1, MIXINR_ENA=1,IN1R_ENA=1
+ +      wm8994_write(0x03,  0x3030);
+ +      wm8994_write(0x04,  0x0303); // AIF1ADC1L_ENA=1, AIF1ADC1R_ENA=1, ADCL_ENA=1, ADCR_ENA=1
+ +      wm8994_write(0x05,  0x0303); // AIF1DAC1L_ENA=1, AIF1DAC1R_ENA=1, DAC1L_ENA=1, DAC1R_ENA=1
   
- -      ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol);
- -
- -      wm8994_update_class_w(codec);
- -
- -      return ret;
   }
   
- -static const struct soc_enum hpl_enum =
- -      SOC_ENUM_SINGLE(WM8994_OUTPUT_MIXER_1, 8, 2, hp_mux_text);
- -
- -static const struct snd_kcontrol_new hpl_mux =
- -      WM8994_HP_ENUM("Left Headphone Mux", hpl_enum);
- -
- -static const struct soc_enum hpr_enum =
- -      SOC_ENUM_SINGLE(WM8994_OUTPUT_MIXER_2, 8, 2, hp_mux_text);
- -
- -static const struct snd_kcontrol_new hpr_mux =
- -      WM8994_HP_ENUM("Right Headphone Mux", hpr_enum);
- -
- -static const char *adc_mux_text[] = {
- -      "ADC",
- -      "DMIC",
- -};
- -
- -static const struct soc_enum adc_enum =
- -      SOC_ENUM_SINGLE(0, 0, 2, adc_mux_text);
- -
- -static const struct snd_kcontrol_new adcl_mux =
- -      SOC_DAPM_ENUM_VIRT("ADCL Mux", adc_enum);
- -
- -static const struct snd_kcontrol_new adcr_mux =
- -      SOC_DAPM_ENUM_VIRT("ADCR Mux", adc_enum);
- -
- -static const struct snd_kcontrol_new left_speaker_mixer[] = {
- -SOC_DAPM_SINGLE("DAC2 Switch", WM8994_SPEAKER_MIXER, 9, 1, 0),
- -SOC_DAPM_SINGLE("Input Switch", WM8994_SPEAKER_MIXER, 7, 1, 0),
- -SOC_DAPM_SINGLE("IN1LP Switch", WM8994_SPEAKER_MIXER, 5, 1, 0),
- -SOC_DAPM_SINGLE("Output Switch", WM8994_SPEAKER_MIXER, 3, 1, 0),
- -SOC_DAPM_SINGLE("DAC1 Switch", WM8994_SPEAKER_MIXER, 1, 1, 0),
- -};
- -
- -static const struct snd_kcontrol_new right_speaker_mixer[] = {
- -SOC_DAPM_SINGLE("DAC2 Switch", WM8994_SPEAKER_MIXER, 8, 1, 0),
- -SOC_DAPM_SINGLE("Input Switch", WM8994_SPEAKER_MIXER, 6, 1, 0),
- -SOC_DAPM_SINGLE("IN1RP Switch", WM8994_SPEAKER_MIXER, 4, 1, 0),
- -SOC_DAPM_SINGLE("Output Switch", WM8994_SPEAKER_MIXER, 2, 1, 0),
- -SOC_DAPM_SINGLE("DAC1 Switch", WM8994_SPEAKER_MIXER, 0, 1, 0),
- -};
- -
- -/* Debugging; dump chip status after DAPM transitions */
- -static int post_ev(struct snd_soc_dapm_widget *w,
- -          struct snd_kcontrol *kcontrol, int event)
+ +void recorder_and_AP_to_speakers(void)
   {
- -      struct snd_soc_codec *codec = w->codec;
- -      dev_dbg(codec->dev, "SRC status: %x\n",
- -              snd_soc_read(codec,
- -                           WM8994_RATE_STATUS));
- -      return 0;
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_recorder_and_AP_to_speakers)return;
+ +      wm8994_current_mode=wm8994_recorder_and_AP_to_speakers;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x39,  0x006C);
+ +      wm8994_write(0x01,  0x0023);
+ +      msleep(WM8994_DELAY);
+ +//clk
+ +      wm8994_sysclk_config();
+ +      wm8994_write(0x300, 0xC010); // i2s 16 bits     
+ +//recorder
+ +      wm8994_write(0x02,  0x6110); // TSHUT_ENA=1, TSHUT_OPDIS=1, MIXINR_ENA=1,IN1R_ENA=1
+ +      wm8994_write(0x04,  0x0303); // AIF1ADC1L_ENA=1, AIF1ADC1R_ENA=1, ADCL_ENA=1, ADCR_ENA=1
+ +      wm8994_write(0x28,  0x0003); // IN1RP_TO_IN1R=1, IN1RN_TO_IN1R=1        
+ +      wm8994_write(0x606, 0x0002); // ADC1L_TO_AIF1ADC1L=1
+ +      wm8994_write(0x607, 0x0002); // ADC1R_TO_AIF1ADC1R=1
+ +      wm8994_write(0x620, 0x0000); 
+ +      wm8994_write(0x402, 0x01FF); // AIF1ADC1L_VOL [7:0]
+ +      wm8994_write(0x403, 0x01FF); // AIF1ADC1R_VOL [7:0]
+ +//path
+ +      wm8994_write(0x2D,  0x0001); // DAC1L_TO_MIXOUTL=1
+ +      wm8994_write(0x2E,  0x0001); // DAC1R_TO_MIXOUTR=1
+ +      wm8994_write(0x36,  0x000C); // MIXOUTL_TO_SPKMIXL=1, MIXOUTR_TO_SPKMIXR=1
+ +      wm8994_write(0x601, 0x0001); // AIF1DAC1L_TO_DAC1L=1
+ +      wm8994_write(0x602, 0x0001); // AIF1DAC1R_TO_DAC1R=1
+ +      wm8994_write(0x420, 0x0000);
+ +//    wm8994_write(0x24,  0x001f);    
+ +//volume
+ +      wm8994_write(0x22,  0x0000);
+ +      wm8994_write(0x23,  0x0100); // SPKOUT_CLASSAB=1        
+ +      wm8994_write(0x610, 0x01C0); // DAC1_VU=1, DAC1L_VOL=1100_0000
+ +      wm8994_write(0x611, 0x01C0); // DAC1_VU=1, DAC1R_VOL=1100_0000  
+ +      wm8994_write(0x25,  0x003F);
+ +      wm8994_set_channel_vol();
+ +//other
+ +      wm8994_write(0x4C,  0x9F25);
+ +//DRC
+ +      wm8994_write(0x440, 0x01BF);
+ +      wm8994_write(0x450, 0x01BF);            
+ +//power
+ +      wm8994_write(0x03,  0x0330); // SPKRVOL_ENA=1, SPKLVOL_ENA=1, MIXOUTL_ENA=1, MIXOUTR_ENA=1  
+ +      wm8994_write(0x05,  0x0303); // AIF1DAC1L_ENA=1, AIF1DAC1R_ENA=1, DAC1L_ENA=1, DAC1R_ENA=1      
+ +      wm8994_write(0x01,  0x3003);
+ +      msleep(50);
+ +      wm8994_write(0x01,  0x3033);
   }
   
- -static const struct snd_kcontrol_new aif1adc1l_mix[] = {
- -SOC_DAPM_SINGLE("ADC/DMIC Switch", WM8994_AIF1_ADC1_LEFT_MIXER_ROUTING,
- -              1, 1, 0),
- -SOC_DAPM_SINGLE("AIF2 Switch", WM8994_AIF1_ADC1_LEFT_MIXER_ROUTING,
- -              0, 1, 0),
- -};
- -
- -static const struct snd_kcontrol_new aif1adc1r_mix[] = {
- -SOC_DAPM_SINGLE("ADC/DMIC Switch", WM8994_AIF1_ADC1_RIGHT_MIXER_ROUTING,
- -              1, 1, 0),
- -SOC_DAPM_SINGLE("AIF2 Switch", WM8994_AIF1_ADC1_RIGHT_MIXER_ROUTING,
- -              0, 1, 0),
- -};
- -
- -static const struct snd_kcontrol_new aif1adc2l_mix[] = {
- -SOC_DAPM_SINGLE("DMIC Switch", WM8994_AIF1_ADC2_LEFT_MIXER_ROUTING,
- -              1, 1, 0),
- -SOC_DAPM_SINGLE("AIF2 Switch", WM8994_AIF1_ADC2_LEFT_MIXER_ROUTING,
- -              0, 1, 0),
- -};
- -
- -static const struct snd_kcontrol_new aif1adc2r_mix[] = {
- -SOC_DAPM_SINGLE("DMIC Switch", WM8994_AIF1_ADC2_RIGHT_MIXER_ROUTING,
- -              1, 1, 0),
- -SOC_DAPM_SINGLE("AIF2 Switch", WM8994_AIF1_ADC2_RIGHT_MIXER_ROUTING,
- -              0, 1, 0),
- -};
- -
- -static const struct snd_kcontrol_new aif2dac2l_mix[] = {
- -SOC_DAPM_SINGLE("Right Sidetone Switch", WM8994_DAC2_LEFT_MIXER_ROUTING,
- -              5, 1, 0),
- -SOC_DAPM_SINGLE("Left Sidetone Switch", WM8994_DAC2_LEFT_MIXER_ROUTING,
- -              4, 1, 0),
- -SOC_DAPM_SINGLE("AIF2 Switch", WM8994_DAC2_LEFT_MIXER_ROUTING,
- -              2, 1, 0),
- -SOC_DAPM_SINGLE("AIF1.2 Switch", WM8994_DAC2_LEFT_MIXER_ROUTING,
- -              1, 1, 0),
- -SOC_DAPM_SINGLE("AIF1.1 Switch", WM8994_DAC2_LEFT_MIXER_ROUTING,
- -              0, 1, 0),
- -};
- -
- -static const struct snd_kcontrol_new aif2dac2r_mix[] = {
- -SOC_DAPM_SINGLE("Right Sidetone Switch", WM8994_DAC2_RIGHT_MIXER_ROUTING,
- -              5, 1, 0),
- -SOC_DAPM_SINGLE("Left Sidetone Switch", WM8994_DAC2_RIGHT_MIXER_ROUTING,
- -              4, 1, 0),
- -SOC_DAPM_SINGLE("AIF2 Switch", WM8994_DAC2_RIGHT_MIXER_ROUTING,
- -              2, 1, 0),
- -SOC_DAPM_SINGLE("AIF1.2 Switch", WM8994_DAC2_RIGHT_MIXER_ROUTING,
- -              1, 1, 0),
- -SOC_DAPM_SINGLE("AIF1.1 Switch", WM8994_DAC2_RIGHT_MIXER_ROUTING,
- -              0, 1, 0),
- -};
+ +#ifndef PCM_BB
+ +void handsetMIC_to_baseband_to_headset(void)
+ +{//
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode == wm8994_handsetMIC_to_baseband_to_headset)return;
+ +      wm8994_current_mode = wm8994_handsetMIC_to_baseband_to_headset;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +      
+ +      wm8994_write(0x01,  0x0023); 
+ +      wm8994_write(0x200, 0x0000);
+ +      msleep(WM8994_DELAY);
+ +//clk
+ +      wm8994_sysclk_config();
+ +      wm8994_write(0x300, 0xC010); // i2s 16 bits     
+ +//path
+ +      wm8994_write(0x22,  0x0000);
+ +      wm8994_write(0x23,  0x0100);
+ +      wm8994_write(0x02,  0x6240);
+ +      wm8994_write(0x28,  0x0030);  //IN1LN_TO_IN1L IN1LP_TO_IN1L
+ +      wm8994_write(0x2D,  0x0003);  //bit 1 IN2LP_TO_MIXOUTL bit 12 DAC1L_TO_HPOUT1L  0x0102 
+ +      wm8994_write(0x2E,  0x0003);  //bit 1 IN2RP_TO_MIXOUTR bit 12 DAC1R_TO_HPOUT1R  0x0102
+ +      wm8994_write(0x34,  0x0002);  //IN1L_TO_LINEOUT1P
+ +      wm8994_write(0x36,  0x0003);
+ +      wm8994_write(0x60,  0x0022);
+ +      wm8994_write(0x60,  0x00EE);
+ +      wm8994_write(0x420, 0x0000);
+ +      wm8994_write(0x601, 0x0001);
+ +      wm8994_write(0x602, 0x0001);
+ +//volume
+ +      wm8994_write(0x610, 0x01A0);  //DAC1 Left Volume bit0~7                 
+ +      wm8994_write(0x611, 0x01A0);  //DAC1 Right Volume bit0~7
+ +      wm8994_set_channel_vol();       
+ +//other
+ +      wm8994_write(0x4C,  0x9F25);    
+ +//power
+ +      wm8994_write(0x03,  0x3030);
+ +      wm8994_write(0x04,  0x0300); // AIF1ADC1L_ENA=1, AIF1ADC1R_ENA=1
+ +      wm8994_write(0x05,  0x0303);
+ +      wm8994_write(0x01,  0x0303);
+ +      msleep(50);
+ +      wm8994_write(0x01,  0x0333);    
+ +      
+ +      wm8994_set_level_volume();
+ +}
   
- -#define WM8994_CLASS_W_SWITCH(xname, reg, shift, max, invert) \
- -{     .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
- -      .info = snd_soc_info_volsw, \
- -      .get = snd_soc_dapm_get_volsw, .put = wm8994_put_class_w, \
- -      .private_value =  SOC_SINGLE_VALUE(reg, shift, max, invert) }
+ +void mainMIC_to_baseband_to_headset(void)
+ +{//
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode == wm8994_mainMIC_to_baseband_to_headset)return;
+ +      wm8994_current_mode = wm8994_mainMIC_to_baseband_to_headset;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x01,  0x0023);
+ +      wm8994_write(0x200, 0x0000);
+ +      mdelay(WM8994_DELAY);
+ +//clk
+ +      wm8994_sysclk_config();
+ +      wm8994_write(0x300, 0xC010); // i2s 16 bits     
+ +//path
+ +      wm8994_write(0x22,  0x0000);
+ +      wm8994_write(0x23,  0x0100);
+ +      wm8994_write(0x02,  0x6210);
+ +      wm8994_write(0x28,  0x0003);  //IN1RN_TO_IN1R IN1RP_TO_IN1R
+ +      wm8994_write(0x2D,  0x0003);  //bit 1 IN2LP_TO_MIXOUTL bit 12 DAC1L_TO_HPOUT1L  0x0102 
+ +      wm8994_write(0x2E,  0x0003);  //bit 1 IN2RP_TO_MIXOUTR bit 12 DAC1R_TO_HPOUT1R  0x0102
+ +      wm8994_write(0x34,  0x0004);  //IN1R_TO_LINEOUT1P
+ +      wm8994_write(0x36,  0x0003);
+ +      wm8994_write(0x60,  0x0022);
+ +      wm8994_write(0x60,  0x00EE);
+ +      wm8994_write(0x420, 0x0000);
+ +      wm8994_write(0x601, 0x0001);
+ +      wm8994_write(0x602, 0x0001);
+ +//volume
+ +      wm8994_write(0x610, 0x01A0);  //DAC1 Left Volume bit0~7                 
+ +      wm8994_write(0x611, 0x01A0);  //DAC1 Right Volume bit0~7
+ +      wm8994_set_channel_vol();       
+ +//other
+ +      wm8994_write(0x4C,  0x9F25);    
+ +//power
+ +      wm8994_write(0x03,  0x3030);
+ +      wm8994_write(0x04,  0x0300); // AIF1ADC1L_ENA=1, AIF1ADC1R_ENA=1
+ +      wm8994_write(0x05,  0x0303);
+ +      wm8994_write(0x01,  0x0303);
+ +      msleep(50);
+ +      wm8994_write(0x01,  0x0333);    
+ +      
+ +      wm8994_set_level_volume();
+ +}
   
- -static int wm8994_put_class_w(struct snd_kcontrol *kcontrol,
- -                            struct snd_ctl_elem_value *ucontrol)
+ +void handsetMIC_to_baseband_to_headset_and_record(void)
   {
- -      struct snd_soc_dapm_widget *w = snd_kcontrol_chip(kcontrol);
- -      struct snd_soc_codec *codec = w->codec;
- -      int ret;
- -
- -      ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol);
- -
- -      wm8994_update_class_w(codec);
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode == wm8994_handsetMIC_to_baseband_to_headset_and_record)return;
+ +      wm8994_current_mode = wm8994_handsetMIC_to_baseband_to_headset_and_record;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x01,  0x0303); 
+ +      wm8994_write(0x02,  0x62C0); 
+ +      wm8994_write(0x03,  0x3030); 
+ +      wm8994_write(0x04,  0x0303); 
+ +      wm8994_write(0x18,  0x014B);  //volume
+ +      wm8994_write(0x19,  0x014B);  //volume
+ +      wm8994_set_volume(wm8994_current_mode,wm8994->call_vol,call_maxvol);
+ +      wm8994_write(0x1E,  0x0006); 
+ +      wm8994_write(0x28,  0x00B0);  //IN2LP_TO_IN2L
+ +      wm8994_write(0x29,  0x0120); 
+ +      wm8994_write(0x2D,  0x0002);  //bit 1 IN2LP_TO_MIXOUTL
+ +      wm8994_write(0x2E,  0x0002);  //bit 1 IN2RP_TO_MIXOUTR
+ +      wm8994_write(0x34,  0x0002); 
+ +      wm8994_write(0x4C,  0x9F25); 
+ +      wm8994_write(0x60,  0x00EE); 
+ +      wm8994_write(0x200, 0x0001); 
+ +      wm8994_write(0x208, 0x000A); 
+ +      wm8994_write(0x300, 0x0050); 
+ +
+ +#ifdef CONFIG_SND_RK29_CODEC_SOC_MASTER
+ +      wm8994_write(0x302, 0x4000);  // master = 0x4000 // slave= 0x0000
+ +      wm8994_write(0x303, 0x0090);  // master lrck 16k
+ +#endif
   
- -      return ret;
+ +      wm8994_write(0x606, 0x0002); 
+ +      wm8994_write(0x607, 0x0002); 
+ +      wm8994_write(0x620, 0x0000);
   }
   
- -static const struct snd_kcontrol_new dac1l_mix[] = {
- -WM8994_CLASS_W_SWITCH("Right Sidetone Switch", WM8994_DAC1_LEFT_MIXER_ROUTING,
- -                    5, 1, 0),
- -WM8994_CLASS_W_SWITCH("Left Sidetone Switch", WM8994_DAC1_LEFT_MIXER_ROUTING,
- -                    4, 1, 0),
- -WM8994_CLASS_W_SWITCH("AIF2 Switch", WM8994_DAC1_LEFT_MIXER_ROUTING,
- -                    2, 1, 0),
- -WM8994_CLASS_W_SWITCH("AIF1.2 Switch", WM8994_DAC1_LEFT_MIXER_ROUTING,
- -                    1, 1, 0),
- -WM8994_CLASS_W_SWITCH("AIF1.1 Switch", WM8994_DAC1_LEFT_MIXER_ROUTING,
- -                    0, 1, 0),
- -};
- -
- -static const struct snd_kcontrol_new dac1r_mix[] = {
- -WM8994_CLASS_W_SWITCH("Right Sidetone Switch", WM8994_DAC1_RIGHT_MIXER_ROUTING,
- -                    5, 1, 0),
- -WM8994_CLASS_W_SWITCH("Left Sidetone Switch", WM8994_DAC1_RIGHT_MIXER_ROUTING,
- -                    4, 1, 0),
- -WM8994_CLASS_W_SWITCH("AIF2 Switch", WM8994_DAC1_RIGHT_MIXER_ROUTING,
- -                    2, 1, 0),
- -WM8994_CLASS_W_SWITCH("AIF1.2 Switch", WM8994_DAC1_RIGHT_MIXER_ROUTING,
- -                    1, 1, 0),
- -WM8994_CLASS_W_SWITCH("AIF1.1 Switch", WM8994_DAC1_RIGHT_MIXER_ROUTING,
- -                    0, 1, 0),
- -};
+ +void mainMIC_to_baseband_to_earpiece(void)
+ +{//
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode == wm8994_mainMIC_to_baseband_to_earpiece)return;
+ +      wm8994_current_mode = wm8994_mainMIC_to_baseband_to_earpiece;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x01,  0x0023);
+ +      wm8994_write(0x200, 0x0000);
+ +      msleep(WM8994_DELAY);
+ +//clk
+ +      wm8994_sysclk_config();
+ +      wm8994_write(0x300, 0xC010); // i2s 16 bits     
+ +//path
+ +      wm8994_write(0x28,  0x0003); //IN1RP_TO_IN1R IN1RN_TO_IN1R
+ +      wm8994_write(0x34,  0x0004); //IN1R_TO_LINEOUT1P
+ +      wm8994_write(0x2D,  0x0003);  //bit 1 IN2LP_TO_MIXOUTL bit 12 DAC1L_TO_HPOUT1L  0x0102 
+ +      wm8994_write(0x2E,  0x0003);  //bit 1 IN2RP_TO_MIXOUTR bit 12 DAC1R_TO_HPOUT1R  0x0102
+ +      wm8994_write(0x601, 0x0001); //AIF1DAC1L_TO_DAC1L=1
+ +      wm8994_write(0x602, 0x0001); //AIF1DAC1R_TO_DAC1R=1
+ +      wm8994_write(0x420, 0x0000);
+ +//volume
+ +      wm8994_write(0x610, 0x01C0); //DAC1_VU=1, DAC1L_VOL=1100_0000
+ +      wm8994_write(0x611, 0x01C0); //DAC1_VU=1, DAC1R_VOL=1100_0000
+ +      wm8994_write(0x1F,  0x0000);//HPOUT2
+ +      wm8994_set_channel_vol();       
+ +//other
+ +      wm8994_write(0x4C,  0x9F25);            
+ +//power
+ +      wm8994_write(0x01,  0x0833); //HPOUT2_ENA=1, VMID_SEL=01, BIAS_ENA=1
+ +      wm8994_write(0x02,  0x6250); //bit4 IN1R_ENV bit6 IN1L_ENV 
+ +      wm8994_write(0x03,  0x30F0);
+ +      wm8994_write(0x04,  0x0303); // AIF1ADC1L_ENA=1, AIF1ADC1R_ENA=1, ADCL_ENA=1, ADCR_ENA=1
+ +      wm8994_write(0x05,  0x0303);
+ +      
+ +      wm8994_set_level_volume();      
+ +}
   
- -static const char *sidetone_text[] = {
- -      "ADC/DMIC1", "DMIC2",
- -};
+ +void mainMIC_to_baseband_to_earpiece_and_record(void)
+ +{
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_mainMIC_to_baseband_to_earpiece_and_record)return;
+ +      wm8994_current_mode=wm8994_mainMIC_to_baseband_to_earpiece_and_record;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x01  ,0x0803|wm8994_mic_VCC);
+ +      wm8994_write(0x02  ,0x6310);
+ +      wm8994_write(0x03  ,0x30A0);
+ +      wm8994_write(0x04  ,0x0303);
+ +      wm8994_write(0x1A  ,0x014F);
+ +      wm8994_write(0x1E  ,0x0006);
+ +      wm8994_write(0x1F  ,0x0000);
+ +      wm8994_write(0x28  ,0x0003);  //MAINMIC_TO_IN1R
+ +      wm8994_write(0x2A  ,0x0020);  //IN1R_TO_MIXINR
+ +      wm8994_write(0x2B  ,0x0005);  //VRX_MIXINL_VOL bit 0~2
+ +      wm8994_write(0x2C  ,0x0005);  //VRX_MIXINR_VOL
+ +      wm8994_write(0x2D  ,0x0040);  //MIXINL_TO_MIXOUTL
+ +      wm8994_write(0x33  ,0x0010);  //MIXOUTLVOL_TO_HPOUT2
+ +      wm8994_write(0x34  ,0x0004);  //IN1R_TO_LINEOUT1
+ +      wm8994_write(0x200 ,0x0001);
+ +      wm8994_write(0x208 ,0x000A);
+ +      wm8994_write(0x300 ,0xC050);
+ +      wm8994_set_volume(wm8994_current_mode,wm8994->call_vol,call_maxvol);
+ +
+ +#ifdef CONFIG_SND_RK29_CODEC_SOC_MASTER
+ +      wm8994_write(0x302, 0x4000);  // master = 0x4000 // slave= 0x0000
+ +      wm8994_write(0x303, 0x0090);  // master lrck 16k
+ +#endif
   
- -static const struct soc_enum sidetone1_enum =
- -      SOC_ENUM_SINGLE(WM8994_SIDETONE, 0, 2, sidetone_text);
+ +      wm8994_write(0x606 ,0x0002);
+ +      wm8994_write(0x607 ,0x0002);
+ +      wm8994_write(0x620 ,0x0000);
+ +}
   
- -static const struct snd_kcontrol_new sidetone1_mux =
- -      SOC_DAPM_ENUM("Left Sidetone Mux", sidetone1_enum);
+ +void mainMIC_to_baseband_to_speakers(void)
+ +{//
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_mainMIC_to_baseband_to_speakers)return;
+ +
+ +      wm8994_current_mode=wm8994_mainMIC_to_baseband_to_speakers;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x39,  0x006C);
+ +      wm8994_write(0x01,  0x0023);
+ +      wm8994_write(0x200, 0x0000);
+ +      msleep(WM8994_DELAY);
+ +//clk
+ +      wm8994_sysclk_config();
+ +      wm8994_write(0x300, 0xC010); // i2s 16 bits     
+ +//path
+ +      wm8994_write(0x22,  0x0000);
+ +      wm8994_write(0x23,  0x0100);
+ +      wm8994_write(0x28,  0x0003);  //IN1LN_TO_IN1L IN1LP_TO_IN1L
+ +      wm8994_write(0x29,  0x0030);
+ +      wm8994_write(0x2D,  0x0003);  //bit 1 IN2LP_TO_MIXOUTL bit 12 DAC1L_TO_HPOUT1L  0x0102 
+ +      wm8994_write(0x2E,  0x0003);  //bit 1 IN2RP_TO_MIXOUTR bit 12 DAC1R_TO_HPOUT1R  0x0102
+ +      wm8994_write(0x34,  0x000C);  //IN1L_TO_LINEOUT1P
+ +      wm8994_write(0x60,  0x0022);
+ +      wm8994_write(0x36,  0x000C);    
+ +      wm8994_write(0x60,  0x00EE);
+ +      wm8994_write(0x420, 0x0000);
+ +      wm8994_write(0x601, 0x0001);
+ +      wm8994_write(0x602, 0x0001);
+ +      wm8994_write(0x24,  0x0011);    
+ +//volume
+ +//    wm8994_write(0x25,  0x003F);
+ +      wm8994_write(0x610, 0x01C0);  //DAC1 Left Volume bit0~7 
+ +      wm8994_write(0x611, 0x01C0);  //DAC1 Right Volume bit0~7
+ +      wm8994_set_channel_vol();       
+ +//other
+ +      wm8994_write(0x4C,  0x9F25);            
+ +//power
+ +      wm8994_write(0x01,  0x3003);
+ +      msleep(50);
+ +      wm8994_write(0x01,  0x3033);    
+ +      wm8994_write(0x02,  0x6210);
+ +      wm8994_write(0x03,  0x1330);
+ +      wm8994_write(0x04,  0x0303); // AIF1ADC1L_ENA=1, AIF1ADC1R_ENA=1, ADCL_ENA=1, ADCR_ENA=1
+ +      wm8994_write(0x05,  0x0303);    
+ +      wm8994_set_level_volume();              
+ +}
   
- -static const struct soc_enum sidetone2_enum =
- -      SOC_ENUM_SINGLE(WM8994_SIDETONE, 1, 2, sidetone_text);
+ +void mainMIC_to_baseband_to_speakers_and_record(void)
+ +{
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_mainMIC_to_baseband_to_speakers_and_record)return;
+ +      wm8994_current_mode=wm8994_mainMIC_to_baseband_to_speakers_and_record;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x01, 0x3023|wm8994_mic_VCC);
+ +      wm8994_write(0x02, 0x6330);
+ +      wm8994_write(0x03, 0x3330);
+ +      wm8994_write(0x04, 0x0303);
+ +      wm8994_write(0x1A, 0x014B);
+ +      wm8994_write(0x1B, 0x014B);
+ +      wm8994_write(0x1E, 0x0006);
+ +      wm8994_write(0x22, 0x0000);
+ +      wm8994_write(0x23, 0x0100);
+ +      wm8994_write(0x28, 0x0007);
+ +      wm8994_write(0x2A, 0x0120);
+ +      wm8994_write(0x2D, 0x0002);  //bit 1 IN2LP_TO_MIXOUTL
+ +      wm8994_write(0x2E, 0x0002);  //bit 1 IN2RP_TO_MIXOUTR
+ +      wm8994_write(0x34, 0x0004);
+ +      wm8994_write(0x36, 0x000C);
+ +      wm8994_write(0x200, 0x0001);
+ +      wm8994_write(0x208, 0x000A);
+ +      wm8994_write(0x300, 0xC050);
+ +      wm8994_set_volume(wm8994_current_mode,wm8994->call_vol,call_maxvol);
+ +
+ +#ifdef CONFIG_SND_RK29_CODEC_SOC_MASTER
+ +      wm8994_write(0x302, 0x4000);  // master = 0x4000 // slave= 0x0000
+ +      wm8994_write(0x303, 0x0090);  // master lrck 16k
+ +#endif
   
- -static const struct snd_kcontrol_new sidetone2_mux =
- -      SOC_DAPM_ENUM("Right Sidetone Mux", sidetone2_enum);
+ +      wm8994_write(0x606, 0x0002);
+ +      wm8994_write(0x607, 0x0002);
+ +      wm8994_write(0x620, 0x0000);
+ +}
   
- -static const char *aif1dac_text[] = {
- -      "AIF1DACDAT", "AIF3DACDAT",
- -};
+ +void BT_baseband(void)
+ +{//
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_BT_baseband)return;
+ +
+ +      wm8994_current_mode=wm8994_BT_baseband;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x01,  0x0023);
+ +      wm8994_write(0x200, 0x0000);
+ +      msleep(WM8994_DELAY);
+ +//CLK 
+ +      //AIF1CLK
+ +      wm8994_sysclk_config();
+ +      wm8994_write(0x300, 0xC010); // i2s 16 bits     
+ +      //AIF2CLK use FLL2
+ +      wm8994_write(0x204, 0x0000);
+ +      msleep(WM8994_DELAY);
+ +      wm8994_write(0x240, 0x0000);
+ +      switch(wm8994->mclk)
+ +      {
+ +      case 12288000:
+ +              wm8994_write(0x241, 0x2F00);//48
+ +              wm8994_write(0x242, 0);
+ +              wm8994_write(0x243, 0x0100);            
+ +              break;
+ +      case 11289600:
+ +              wm8994_write(0x241, 0x2b00);
+ +              wm8994_write(0x242, 0xfb5b);
+ +              wm8994_write(0x243, 0x00e0);    
+ +              break;
+ +      case 3072000:
+ +              wm8994_write(0x241, 0x2F00);//48
+ +              wm8994_write(0x242, 0);
+ +              wm8994_write(0x243, 0x0400);
+ +              break;
+ +      case 2822400:
+ +              wm8994_write(0x241, 0x2b00);
+ +              wm8994_write(0x242, 0xed6d);
+ +              wm8994_write(0x243, 0x03e0);
+ +              break;
+ +      default:
+ +              printk("wm8994->mclk error = %d\n",wm8994->mclk);
+ +              return;
+ +      }       
+ +      
+ +      wm8994_write(0x240, 0x0004);
+ +      msleep(10);
+ +      wm8994_write(0x240, 0x0005);
+ +      msleep(5);
+ +      wm8994_write(0x204, 0x0018);    // SMbus_16inx_16dat     Write  0x34      * AIF2 Clocking (1)(204H): 0011  AIF2CLK_SRC=10, AIF2CLK_INV=0, AIF2CLK_DIV=0, AIF2CLK_ENA=1
+ +      wm8994_write(0x208, 0x000E);
+ +      wm8994_write(0x211, 0x0003); 
+ +      
+ +      wm8994_write(0x312, 0x3000);    // SMbus_16inx_16dat     Write  0x34      * AIF2 Master/Slave(312H): 7000  AIF2_TRI=0, AIF2_MSTR=1, AIF2_CLK_FRC=0, AIF2_LRCLK_FRC=0
+ +      msleep(30);
+ +      wm8994_write(0x312, 0x7000);
+ +      wm8994_write(0x313, 0x0020);    // SMbus_16inx_16dat     Write  0x34      * AIF2 BCLK DIV--------AIF1CLK/2
+ +      wm8994_write(0x314, 0x0080);    // SMbus_16inx_16dat     Write  0x34      * AIF2 ADCLRCK DIV-----BCLK/128
+ +      wm8994_write(0x315, 0x0080);
+ +      wm8994_write(0x310, 0x0118);    //DSP/PCM; 16bits; ADC L channel = R channel;MODE A
+ +      
+ +      wm8994_write(0x204, 0x0019);    // SMbus_16inx_16dat     Write  0x34      * AIF2 Clocking (1)(204H): 0011  AIF2CLK_SRC=10, AIF2CLK_INV=0, AIF2CLK_DIV=0, AIF2CLK_ENA=1
+ +/*    
+ +      wm8994_write(0x310, 0x0118); 
+ +      wm8994_write(0x204, 0x0001);    
+ +      wm8994_write(0x208, 0x000F);    
+ +      wm8994_write(0x211, 0x0009);    
+ +      wm8994_write(0x312, 0x7000);    
+ +      wm8994_write(0x313, 0x00F0); 
+ +*/    
+ +//GPIO
+ +      wm8994_write(0x702, 0x2100);
+ +      wm8994_write(0x703, 0x2100);
+ +      wm8994_write(0x704, 0xA100);
+ +      wm8994_write(0x707, 0xA100);
+ +      wm8994_write(0x708, 0x2100);
+ +      wm8994_write(0x709, 0x2100);
+ +      wm8994_write(0x70A, 0x2100);
+ +      wm8994_write(0x06,   0x000A);
+ +//path
+ +      wm8994_write(0x29,   0x0100);
+ +      wm8994_write(0x2A,   0x0100);
+ +      wm8994_write(0x28,   0x00C0);   
+ +      wm8994_write(0x24,   0x0009);
+ +      wm8994_write(0x29,   0x0130);
+ +      wm8994_write(0x2A,   0x0130);
+ +      wm8994_write(0x2D,   0x0001);
+ +      wm8994_write(0x2E,   0x0001);
+ +      wm8994_write(0x34,   0x0001);
+ +      wm8994_write(0x36,   0x0004);
+ +      wm8994_write(0x601, 0x0004);
+ +      wm8994_write(0x602, 0x0001);
+ +      wm8994_write(0x603, 0x000C);
+ +      wm8994_write(0x604, 0x0010);
+ +      wm8994_write(0x605, 0x0010);
+ +      wm8994_write(0x620, 0x0000);
+ +      wm8994_write(0x420, 0x0000);
+ +//DRC&&EQ
+ +      wm8994_write(0x440, 0x0018);
+ +      wm8994_write(0x450, 0x0018);
+ +      wm8994_write(0x540, 0x01BF); //open nosie gate
+ +      wm8994_write(0x550, 0x01BF); //open nosie gate
+ +      wm8994_write(0x480, 0x0000);
+ +      wm8994_write(0x481, 0x0000);
+ +      wm8994_write(0x4A0, 0x0000);
+ +      wm8994_write(0x4A1, 0x0000);
+ +      wm8994_write(0x520, 0x0000);
+ +      wm8994_write(0x540, 0x0018);
+ +      wm8994_write(0x580, 0x0000);
+ +      wm8994_write(0x581, 0x0000);
+ +//volume
+ +      wm8994_set_volume(wm8994_current_mode,wm8994->call_vol,call_maxvol);
+ +      wm8994_write(0x1E,   0x0006);
+ +      wm8994_set_channel_vol();
+ +      wm8994_write(0x22,   0x0000);
+ +      wm8994_write(0x23,   0x0100);   
+ +      wm8994_write(0x610, 0x01C0);
+ +      wm8994_write(0x611, 0x01C0);
+ +      wm8994_write(0x612, 0x01C0);
+ +      wm8994_write(0x613, 0x01C0);    
+ +//other
+ +      wm8994_write(0x4C,   0x9F25);
+ +      wm8994_write(0x60,   0x00EE);
+ +      msleep(5);
+ +//power       
+ +      wm8994_write(0x01,   0x3033);
+ +      wm8994_write(0x02,   0x63A0);
+ +      wm8994_write(0x03,   0x33F0);
+ +      wm8994_write(0x04,   0x3303);
+ +      wm8994_write(0x05,   0x3303);   
+ +}
   
- -static const struct soc_enum aif1dac_enum =
- -      SOC_ENUM_SINGLE(WM8994_POWER_MANAGEMENT_6, 0, 2, aif1dac_text);
+ +void BT_baseband_old(void)
+ +{
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;        
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_BT_baseband)return;
+ +
+ +      wm8994_current_mode=wm8994_BT_baseband;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x01, 0x3003);
+ +      wm8994_write(0x02, 0x63A0);
+ +      wm8994_write(0x03, 0x33F0);
+ +      wm8994_write(0x04, 0x3303);
+ +      wm8994_write(0x05, 0x3303);
+ +      wm8994_write(0x06, 0x000A);
+ +      wm8994_set_volume(wm8994_current_mode,wm8994->call_vol,call_maxvol);
+ +      wm8994_write(0x1E, 0x0006);
+ +      wm8994_write(0x29, 0x0100);
+ +      wm8994_write(0x2A, 0x0100);
+ +
+ +      wm8994_set_channel_vol();
+ +
+ +#ifdef CONFIG_SND_BB_NORMAL_INPUT
+ +      wm8994_write(0x28, 0x00C0);
+ +#endif
+ +#ifdef CONFIG_SND_BB_DIFFERENTIAL_INPUT
+ +      /*vol = BT_incall_vol;
+ +      if(vol>6)vol=6;
+ +      if(vol<-12)vol=-12;
+ +      wm8994_write(0x2B, (vol+12)/3 + 1);*/
+ +      wm8994_write(0x28, 0x00CC);
+ +#endif
+ +      wm8994_write(0x22, 0x0000);
+ +      wm8994_write(0x23, 0x0100);
+ +      wm8994_write(0x24, 0x0009);
+ +      wm8994_write(0x29, 0x0130);
+ +      wm8994_write(0x2A, 0x0130);
+ +      wm8994_write(0x2D, 0x0001);
+ +      wm8994_write(0x2E, 0x0001);
+ +      wm8994_write(0x34, 0x0001);
+ +      wm8994_write(0x36, 0x0004);
+ +      wm8994_write(0x4C, 0x9F25);
+ +      wm8994_write(0x60, 0x00EE);
+ +      wm8994_write(0x01, 0x3023);
+ +      //roger_chen@20100524
+ +      //8KHz, BCLK=8KHz*128=1024KHz, Fout=2.048MHz
+ +      wm8994_write(0x200, 0x0001);
+ +      wm8994_write(0x204, 0x0001);    // SMbus_16inx_16dat     Write  0x34      * AIF2 Clocking (1)(204H): 0011  AIF2CLK_SRC=00, AIF2CLK_INV=0, AIF2CLK_DIV=0, AIF2CLK_ENA=1
+ +      wm8994_write(0x208, 0x000E);
+ +      wm8994_write(0x220, 0x0000);    // SMbus_16inx_16dat     Write  0x34      * FLL1 Control (1)(220H):  0005  FLL1_FRACN_ENA=0, FLL1_OSC_ENA=0, FLL1_ENA=0
+ +      wm8994_write(0x221, 0x0700);    // SMbus_16inx_16dat     Write  0x34      * FLL1 Control (2)(221H):  0700  FLL1_OUTDIV=2Fh, FLL1_CTRL_RATE=000, FLL1_FRATIO=000
+ +      wm8994_write(0x222, 0x3126);    // SMbus_16inx_16dat     Write  0x34      * FLL1 Control (3)(222H):  8FD5  FLL1_K=3126h
+ +      wm8994_write(0x223, 0x0100);    // SMbus_16inx_16dat     Write  0x34      * FLL1 Control (4)(223H):  00E0  FLL1_N=8h, FLL1_GAIN=0000
+ +
+ +      wm8994_write(0x303, 0x0040);
+ +      wm8994_write(0x304, 0x0040);
+ +      wm8994_write(0x305, 0x0040);
+ +      wm8994_write(0x300, 0xC050);    //DSP/PCM; 16bits; ADC L channel = R channel;MODE A
+ +
+ +      wm8994_write(0x210, 0x0083);    // SMbus_16inx_16dat     Write  0x34      * SR=48KHz
+ +      wm8994_write(0x220, 0x0004);    // SMbus_16inx_16dat     Write  0x34      * FLL1 Control (1)(220H):  0005  FLL1_FRACN_ENA=1, FLL1_OSC_ENA=0, FLL1_ENA=0
+ +      msleep(50);
+ +      wm8994_write(0x220, 0x0005);    // SMbus_16inx_16dat     Write  0x34      * FLL1 Control (1)(220H):  0005  FLL1_FRACN_ENA=1, FLL1_OSC_ENA=0, FLL1_ENA=1
+ +
+ +      wm8994_write(0x240, 0x0000);
+ +      wm8994_write(0x241, 0x2F00);
+ +      wm8994_write(0x242, 0x3126);
+ +      wm8994_write(0x243, 0x0100);
+ +
+ +      wm8994_write(0x313, 0x0020);    // SMbus_16inx_16dat     Write  0x34      * AIF2 BCLK DIV--------AIF1CLK/2
+ +      wm8994_write(0x314, 0x0080);    // SMbus_16inx_16dat     Write  0x34      * AIF2 ADCLRCK DIV-----BCLK/128
+ +      wm8994_write(0x315, 0x0080);
+ +      wm8994_write(0x310, 0x0118);    //DSP/PCM; 16bits; ADC L channel = R channel;MODE A
+ +
+ +      wm8994_write(0x211, 0x0003);    // SMbus_16inx_16dat     Write  0x34      * SR=8KHz
+ +      wm8994_write(0x240, 0x0004);
+ +      msleep(50);
+ +      wm8994_write(0x240, 0x0005);
+ +
+ +      wm8994_write(0x200, 0x0011);
+ +      wm8994_write(0x204, 0x0019);    // SMbus_16inx_16dat     Write  0x34      * AIF2 Clocking (1)(204H): 0011  AIF2CLK_SRC=10, AIF2CLK_INV=0, AIF2CLK_DIV=0, AIF2CLK_ENA=1
+ +      wm8994_write(0x440, 0x0018);
+ +      wm8994_write(0x450, 0x0018);
+ +      wm8994_write(0x540, 0x01BF); //open nosie gate
+ +      wm8994_write(0x550, 0x01BF); //open nosie gate
+ +      wm8994_write(0x480, 0x0000);
+ +      wm8994_write(0x481, 0x0000);
+ +      wm8994_write(0x4A0, 0x0000);
+ +      wm8994_write(0x4A1, 0x0000);
+ +      wm8994_write(0x520, 0x0000);
+ +      wm8994_write(0x540, 0x0018);
+ +      wm8994_write(0x580, 0x0000);
+ +      wm8994_write(0x581, 0x0000);
+ +      wm8994_write(0x601, 0x0004);
+ +
+ +      wm8994_write(0x602, 0x0001);
+ +
+ +      wm8994_write(0x603, 0x000C);
+ +      wm8994_write(0x604, 0x0010);
+ +      wm8994_write(0x605, 0x0010);
+ +      wm8994_write(0x610, 0x01C0);
+ +      wm8994_write(0x611, 0x01C0);
+ +      wm8994_write(0x612, 0x01C0);
+ +      wm8994_write(0x613, 0x01C0);
+ +      wm8994_write(0x620, 0x0000);
+ +      wm8994_write(0x420, 0x0000);
+ +
+ +      //roger_chen@20100519
+ +      //enable AIF2 BCLK,LRCK
+ +      //Rev.B and Rev.D is different
+ +      wm8994_write(0x702, 0x2100);
+ +      wm8994_write(0x703, 0x2100);
+ +
+ +      wm8994_write(0x704, 0xA100);
+ +      wm8994_write(0x707, 0xA100);
+ +      wm8994_write(0x708, 0x2100);
+ +      wm8994_write(0x709, 0x2100);
+ +      wm8994_write(0x70A, 0x2100);
+ +#ifdef CONFIG_SND_RK29_CODEC_SOC_MASTER
+ +      wm8994_write(0x700, 0xA101);
+ +      wm8994_write(0x705, 0xA101);
+ +      wm8994_write(0x302, 0x3000); 
+ +      msleep(30);
+ +      wm8994_write(0x302, 0x7000); 
+ +      msleep(30);
+ +      wm8994_write(0x312, 0x3000);    // SMbus_16inx_16dat     Write  0x34      * AIF2 Master/Slave(312H): 7000  AIF2_TRI=0, AIF2_MSTR=1, AIF2_CLK_FRC=0, AIF2_LRCLK_FRC=0
+ +      msleep(30);
+ +      wm8994_write(0x312, 0x7000); 
+ +#endif
+ +}
   
- -static const struct snd_kcontrol_new aif1dac_mux =
- -      SOC_DAPM_ENUM("AIF1DAC Mux", aif1dac_enum);
+ +void BT_baseband_and_record(void)
+ +{
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_BT_baseband_and_record)return;
+ +      wm8994_current_mode=wm8994_BT_baseband_and_record;
+ +      wm8994_reset();
+ +      msleep(WM8994_DELAY);
+ +
+ +      wm8994_write(0x01, 0x0023);
+ +      wm8994_write(0x02, 0x63A0);
+ +      wm8994_write(0x03, 0x30A0);
+ +      wm8994_write(0x04, 0x3303);
+ +      wm8994_write(0x05, 0x3002);
+ +      wm8994_write(0x06, 0x000A);
+ +      wm8994_set_volume(wm8994_current_mode,wm8994->call_vol,call_maxvol);
+ +      wm8994_write(0x1E, 0x0006);
+ +      wm8994_write(0x28, 0x00CC);
+ +      wm8994_write(0x29, 0x0100);
+ +      wm8994_write(0x2A, 0x0100);
+ +      wm8994_write(0x2D, 0x0001);
+ +      wm8994_write(0x34, 0x0001);
+ +      wm8994_write(0x200, 0x0001);
+ +
+ +      //roger_chen@20100524
+ +      //8KHz, BCLK=8KHz*128=1024KHz, Fout=2.048MHz
+ +      wm8994_write(0x204, 0x0001);    // SMbus_16inx_16dat     Write  0x34      * AIF2 Clocking (1)(204H): 0011  AIF2CLK_SRC=00, AIF2CLK_INV=0, AIF2CLK_DIV=0, AIF2CLK_ENA=1
+ +      wm8994_write(0x208, 0x000F);
+ +      wm8994_write(0x220, 0x0000);    // SMbus_16inx_16dat     Write  0x34      * FLL1 Control (1)(220H):  0005  FLL1_FRACN_ENA=0, FLL1_OSC_ENA=0, FLL1_ENA=0
+ +      wm8994_write(0x221, 0x2F00);    // SMbus_16inx_16dat     Write  0x34      * FLL1 Control (2)(221H):  0700  FLL1_OUTDIV=2Fh, FLL1_CTRL_RATE=000, FLL1_FRATIO=000
+ +      wm8994_write(0x222, 0x3126);    // SMbus_16inx_16dat     Write  0x34      * FLL1 Control (3)(222H):  8FD5  FLL1_K=3126h
+ +      wm8994_write(0x223, 0x0100);    // SMbus_16inx_16dat     Write  0x34      * FLL1 Control (4)(223H):  00E0  FLL1_N=8h, FLL1_GAIN=0000
+ +      wm8994_write(0x302, 0x4000);
+ +      wm8994_write(0x303, 0x0090);    
+ +      wm8994_write(0x310, 0xC118);  //DSP/PCM; 16bits; ADC L channel = R channel;MODE A
+ +      wm8994_write(0x312, 0x4000);    // SMbus_16inx_16dat     Write  0x34      * AIF2 Master/Slave(312H): 7000  AIF2_TRI=0, AIF2_MSTR=1, AIF2_CLK_FRC=0, AIF2_LRCLK_FRC=0
+ +      wm8994_write(0x313, 0x0020);    // SMbus_16inx_16dat     Write  0x34      * AIF2 BCLK DIV--------AIF1CLK/2
+ +      wm8994_write(0x314, 0x0080);    // SMbus_16inx_16dat     Write  0x34      * AIF2 ADCLRCK DIV-----BCLK/128
+ +      wm8994_write(0x315, 0x0080);    // SMbus_16inx_16dat     Write  0x34      * AIF2 DACLRCK DIV-----BCLK/128
+ +      wm8994_write(0x210, 0x0003);    // SMbus_16inx_16dat     Write  0x34      * SR=8KHz
+ +      wm8994_write(0x220, 0x0004);    // SMbus_16inx_16dat     Write  0x34      * FLL1 Control (1)(220H):  0005  FLL1_FRACN_ENA=1, FLL1_OSC_ENA=0, FLL1_ENA=0
+ +      msleep(WM8994_DELAY);
+ +      wm8994_write(0x220, 0x0005);    // SMbus_16inx_16dat     Write  0x34      * FLL1 Control (1)(220H):  0005  FLL1_FRACN_ENA=1, FLL1_OSC_ENA=0, FLL1_ENA=1
+ +      wm8994_write(0x204, 0x0011);    // SMbus_16inx_16dat     Write  0x34      * AIF2 Clocking (1)(204H): 0011  AIF2CLK_SRC=10, AIF2CLK_INV=0, AIF2CLK_DIV=0, AIF2CLK_ENA=1
+ +
+ +      wm8994_write(0x440, 0x0018);
+ +      wm8994_write(0x450, 0x0018);
+ +      wm8994_write(0x480, 0x0000);
+ +      wm8994_write(0x481, 0x0000);
+ +      wm8994_write(0x4A0, 0x0000);
+ +      wm8994_write(0x4A1, 0x0000);
+ +      wm8994_write(0x520, 0x0000);
+ +      wm8994_write(0x540, 0x0018);
+ +      wm8994_write(0x580, 0x0000);
+ +      wm8994_write(0x581, 0x0000);
+ +      wm8994_write(0x601, 0x0004);
+ +      wm8994_write(0x603, 0x000C);
+ +      wm8994_write(0x604, 0x0010);
+ +      wm8994_write(0x605, 0x0010);
+ +      wm8994_write(0x606, 0x0003);
+ +      wm8994_write(0x607, 0x0003);
+ +      wm8994_write(0x610, 0x01C0);
+ +      wm8994_write(0x612, 0x01C0);
+ +      wm8994_write(0x613, 0x01C0);
+ +      wm8994_write(0x620, 0x0000);
+ +
+ +      //roger_chen@20100519
+ +      //enable AIF2 BCLK,LRCK
+ +      //Rev.B and Rev.D is different
+ +      wm8994_write(0x702, 0xA100);    
+ +      wm8994_write(0x703, 0xA100);
+ +
+ +      wm8994_write(0x704, 0xA100);
+ +      wm8994_write(0x707, 0xA100);
+ +      wm8994_write(0x708, 0x2100);
+ +      wm8994_write(0x709, 0x2100);
+ +      wm8994_write(0x70A, 0x2100);
+ +}
   
- -static const char *aif2dac_text[] = {
- -      "AIF2DACDAT", "AIF3DACDAT",
- -};
+ +#else //PCM_BB
   
- -static const struct soc_enum aif2dac_enum =
- -      SOC_ENUM_SINGLE(WM8994_POWER_MANAGEMENT_6, 1, 2, aif2dac_text);
+ +/******************PCM BB BEGIN*****************/
   
- -static const struct snd_kcontrol_new aif2dac_mux =
- -      SOC_DAPM_ENUM("AIF2DAC Mux", aif2dac_enum);
+ +void handsetMIC_to_baseband_to_headset(void) //pcmbaseband
+ +{
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_handsetMIC_to_baseband_to_headset)return;
+ +      wm8994_current_mode=wm8994_handsetMIC_to_baseband_to_headset;
+ +      wm8994_reset();
+ +      msleep(50);
+ +      
+ +      wm8994_write(0x01,  0x0003|wm8994_mic_VCC);  
+ +      msleep(50);
+ +      wm8994_write(0x221, 0x0700);  
+ +      wm8994_write(0x222, 0x3127);    
+ +      wm8994_write(0x223, 0x0100);    
+ +      wm8994_write(0x220, 0x0004);
+ +      msleep(50);
+ +      wm8994_write(0x220, 0x0005);  
+ +
+ +      wm8994_write(0x01,  0x0303|wm8994_mic_VCC);  ///0x0303);         // sysclk = fll (bit4 =1)   0x0011 
+ +      wm8994_write(0x02,  0x0240);
+ +      wm8994_write(0x03,  0x0030);
+ +      wm8994_write(0x04,  0x3003);
+ +      wm8994_write(0x05,  0x3003);  // i2s 16 bits
+ +      wm8994_write(0x18,  0x010B);
+ +      wm8994_write(0x28,  0x0030);
+ +      wm8994_write(0x29,  0x0020);
+ +      wm8994_write(0x2D,  0x0100);  //0x0100);DAC1L_TO_HPOUT1L    ;;;bit 8 
+ +      wm8994_write(0x2E,  0x0100);  //0x0100);DAC1R_TO_HPOUT1R    ;;;bit 8 
+ +      wm8994_write(0x4C,  0x9F25);
+ +      wm8994_write(0x60,  0x00EE);
+ +      wm8994_write(0x200, 0x0001);    
+ +      wm8994_write(0x204, 0x0001);
+ +      wm8994_write(0x208, 0x0007);    
+ +      wm8994_write(0x520, 0x0000);    
+ +      wm8994_write(0x601, 0x0004);  //AIF2DACL_TO_DAC1L
+ +      wm8994_write(0x602, 0x0004);  //AIF2DACR_TO_DAC1R
+ +
+ +      wm8994_write(0x610, 0x01C0);  //DAC1 Left Volume bit0~7
+ +      wm8994_write(0x611, 0x01C0);  //DAC1 Right Volume bit0~7
+ +      wm8994_write(0x612, 0x01C0);  //DAC2 Left Volume bit0~7 
+ +      wm8994_write(0x613, 0x01C0);  //DAC2 Right Volume bit0~7
+ +
+ +      wm8994_write(0x702, 0xC100);
+ +      wm8994_write(0x703, 0xC100);
+ +      wm8994_write(0x704, 0xC100);
+ +      wm8994_write(0x706, 0x4100);
+ +      wm8994_write(0x204, 0x0011);
+ +      wm8994_write(0x211, 0x0009);
+ +      #ifdef TD688_MODE
+ +      wm8994_write(0x310, 0x4108); ///0x4118);  ///interface dsp mode 16bit
+ +      #endif
+ +      #ifdef CHONGY_MODE
+ +      wm8994_write(0x310, 0x4118); ///0x4118);  ///interface dsp mode 16bit
+ +      #endif  
+ +      #ifdef MU301_MODE
+ +      wm8994_write(0x310, 0x4118); ///0x4118);  ///interface dsp mode 16bit
+ +      wm8994_write(0x241, 0x2f04);
+ +      wm8994_write(0x242, 0x0000);
+ +      wm8994_write(0x243, 0x0300);
+ +      wm8994_write(0x240, 0x0004);
+ +      msleep(40);
+ +      wm8994_write(0x240, 0x0005);
+ +      wm8994_write(0x204, 0x0019); 
+ +      wm8994_write(0x211, 0x0003);
+ +      wm8994_write(0x244, 0x0c83);
+ +      wm8994_write(0x620, 0x0000);
+ +      #endif
+ +      #ifdef THINKWILL_M800_MODE
+ +      wm8994_write(0x310, 0x4118); ///0x4118);  ///interface dsp mode 16bit
+ +      #endif
+ +      wm8994_write(0x313, 0x00F0);
+ +      wm8994_write(0x314, 0x0020);
+ +      wm8994_write(0x315, 0x0020);
+ +      wm8994_write(0x603, 0x018c);  ///0x000C);  //Rev.D ADCL SideTone
+ +      wm8994_write(0x604, 0x0010); //XX
+ +      wm8994_write(0x605, 0x0010); //XX
+ +      wm8994_write(0x621, 0x0000);  //0x0001);   ///0x0000);
+ +      wm8994_write(0x317, 0x0003);
+ +      wm8994_write(0x312, 0x0000); /// as slave  ///0x4000);  //AIF2 SET AS MASTER
+ +      
   
- -static const char *aif2adc_text[] = {
- -      "AIF2ADCDAT", "AIF3DACDAT",
- -};
+ +}
   
- -static const struct soc_enum aif2adc_enum =
- -      SOC_ENUM_SINGLE(WM8994_POWER_MANAGEMENT_6, 2, 2, aif2adc_text);
+ +void handsetMIC_to_baseband_to_headset_and_record(void) //pcmbaseband
+ +{
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_handsetMIC_to_baseband_to_headset_and_record)return;
+ +      wm8994_current_mode=wm8994_handsetMIC_to_baseband_to_headset_and_record;
+ +      wm8994_reset();
+ +      msleep(50);
+ +
+ +      wm8994_write(0x01,  0x0003|wm8994_mic_VCC);  
+ +      msleep(50);
+ +      wm8994_write(0x221, 0x0700);  //MCLK=12MHz
+ +      wm8994_write(0x222, 0x3127);    
+ +      wm8994_write(0x223, 0x0100);    
+ +      wm8994_write(0x220, 0x0004);
+ +      msleep(50);
+ +      wm8994_write(0x220, 0x0005);  
+ +
+ +      wm8994_write(0x01,  0x0303|wm8994_mic_VCC);      
+ +      wm8994_write(0x02,  0x0240);
+ +      wm8994_write(0x03,  0x0030);
+ +      wm8994_write(0x04,  0x3003);
+ +      wm8994_write(0x05,  0x3003); 
+ +      wm8994_write(0x18,  0x010B);  // 0x011F=+30dB for MIC
+ +      wm8994_write(0x28,  0x0030);
+ +      wm8994_write(0x29,  0x0020);
+ +      wm8994_write(0x2D,  0x0100);
+ +      wm8994_write(0x2E,  0x0100);
+ +      wm8994_write(0x4C,  0x9F25);
+ +      wm8994_write(0x60,  0x00EE);
+ +      wm8994_write(0x200, 0x0001);    
+ +      wm8994_write(0x204, 0x0001);
+ +      wm8994_write(0x208, 0x0007);    
+ +      wm8994_write(0x520, 0x0000);    
+ +      wm8994_write(0x601, 0x0004);
+ +      wm8994_write(0x602, 0x0004);
+ +
+ +      wm8994_write(0x610, 0x01C0);  //DAC1 Left Volume bit0~7
+ +      wm8994_write(0x611, 0x01C0);  //DAC1 Right Volume bit0~7
+ +      wm8994_write(0x612, 0x01C0);  //DAC2 Left Volume bit0~7 
+ +      wm8994_write(0x613, 0x01C0);  //DAC2 Right Volume bit0~7
+ +
+ +      wm8994_write(0x700, 0x8141);  //SYNC issue, AIF1 ADCLRC1 from LRCK1
+ +      wm8994_write(0x702, 0xC100);
+ +      wm8994_write(0x703, 0xC100);
+ +      wm8994_write(0x704, 0xC100);
+ +      wm8994_write(0x706, 0x4100);
+ +      wm8994_write(0x204, 0x0011);  //AIF2 MCLK=FLL1
+ +      wm8994_write(0x211, 0x0009);  //LRCK=8KHz, Rate=MCLK/1536
+ +      wm8994_write(0x310, 0x4118);  //DSP/PCM 16bits
+ +      wm8994_write(0x313, 0x00F0);
+ +      wm8994_write(0x314, 0x0020);
+ +      wm8994_write(0x315, 0x0020);
+ +
+ +      wm8994_write(0x603, 0x018c);  ///0x000C);  //Rev.D ADCL SideTone
+ +      wm8994_write(0x604, 0x0010);
+ +      wm8994_write(0x605, 0x0010);
+ +      wm8994_write(0x621, 0x0000);
+ +      //wm8994_write(0x317, 0x0003);
+ +      //wm8994_write(0x312, 0x4000);  //AIF2 SET AS MASTER
+ +////AIF1
+ +      wm8994_write(0x04,   0x3303);
+ +      wm8994_write(0x200,  0x0001);
+ +      wm8994_write(0x208,  0x000F);
+ +      wm8994_write(0x210,  0x0009);  //LRCK=8KHz, Rate=MCLK/1536
+ +      wm8994_write(0x300,  0x0118);  //DSP/PCM 16bits, R ADC = L ADC 
+ +      wm8994_write(0x606,  0x0003);   
+ +      wm8994_write(0x607,  0x0003);
+ +
+ +////AIF1 Master Clock(SR=8KHz)
+ +      wm8994_write(0x200,  0x0011);
+ +      wm8994_write(0x302,  0x4000);
+ +      wm8994_write(0x303,  0x00F0);
+ +      wm8994_write(0x304,  0x0020);
+ +      wm8994_write(0x305,  0x0020);
+ +
+ +////AIF1 DAC1 HP
+ +      wm8994_write(0x05,   0x3303);
+ +      wm8994_write(0x420,  0x0000);
+ +      wm8994_write(0x601,  0x0001);
+ +      wm8994_write(0x602,  0x0001);
+ +      wm8994_write(0x700,  0x8140);//SYNC issue, AIF1 ADCLRC1 from FLL after AIF1 MASTER!!!
+ +      
+ +      
+ +}
   
- -static const struct snd_kcontrol_new aif2adc_mux =
- -      SOC_DAPM_ENUM("AIF2ADC Mux", aif2adc_enum);
+ +void mainMIC_to_baseband_to_earpiece(void) //pcmbaseband
+ +{
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_mainMIC_to_baseband_to_earpiece)return;
+ +      wm8994_current_mode=wm8994_mainMIC_to_baseband_to_earpiece;
+ +      wm8994_reset();
+ +      msleep(50);
+ +
+ +      wm8994_write(0x01,  0x0003|wm8994_mic_VCC);  
+ +      msleep(50);
+ +      wm8994_write(0x221, 0x0700);  //MCLK=12MHz
+ +      wm8994_write(0x222, 0x3127);    
+ +      wm8994_write(0x223, 0x0100);    
+ +      wm8994_write(0x220, 0x0004);
+ +      msleep(50);
+ +      wm8994_write(0x220, 0x0005);  
+ +
+ +      wm8994_write(0x01,  0x0803|wm8994_mic_VCC);   ///0x0813);        
+ +      wm8994_write(0x02,  0x0240);   ///0x0110);
+ +      wm8994_write(0x03,  0x00F0);
+ +      wm8994_write(0x04,  0x3003);
+ +      wm8994_write(0x05,  0x3003); 
+ +      wm8994_write(0x18,  0x011F);
+ +      wm8994_write(0x1F,  0x0000); 
+ +      wm8994_write(0x28,  0x0030);  ///0x0003);
+ +      wm8994_write(0x29,  0x0020);
+ +      wm8994_write(0x2D,  0x0001);
+ +      wm8994_write(0x2E,  0x0001);
+ +      wm8994_write(0x33,  0x0018);
+ +      wm8994_write(0x200, 0x0001);
+ +      wm8994_write(0x204, 0x0001);
+ +      wm8994_write(0x208, 0x0007);
+ +      wm8994_write(0x520, 0x0000);
+ +      wm8994_write(0x601, 0x0004);
+ +      wm8994_write(0x602, 0x0004);
+ +
+ +      wm8994_write(0x610, 0x01C0);  //DAC1 Left Volume bit0~7
+ +      wm8994_write(0x611, 0x01C0);  //DAC1 Right Volume bit0~7
+ +      wm8994_write(0x612, 0x01C0);  //DAC2 Left Volume bit0~7 
+ +      wm8994_write(0x613, 0x01C0);  //DAC2 Right Volume bit0~7
+ +
+ +      wm8994_write(0x702, 0xC100);
+ +      wm8994_write(0x703, 0xC100);
+ +      wm8994_write(0x704, 0xC100);
+ +      wm8994_write(0x706, 0x4100);
+ +      wm8994_write(0x204, 0x0011);  //AIF2 MCLK=FLL1
+ +      wm8994_write(0x211, 0x0009);  //LRCK=8KHz, Rate=MCLK/1536
+ +      #ifdef TD688_MODE
+ +      wm8994_write(0x310, 0x4108); ///0x4118);  ///interface dsp mode 16bit
+ +      #endif
+ +      #ifdef CHONGY_MODE
+ +      wm8994_write(0x310, 0x4118); ///0x4118);  ///interface dsp mode 16bit
+ +      #endif
+ +      #ifdef MU301_MODE
+ +      wm8994_write(0x310, 0x4118); ///0x4118);  ///interface dsp mode 16bit
+ +      wm8994_write(0x241, 0x2f04);
+ +      wm8994_write(0x242, 0x0000);
+ +      wm8994_write(0x243, 0x0300);
+ +      wm8994_write(0x240, 0x0004);
+ +      msleep(40);
+ +      wm8994_write(0x240, 0x0005);
+ +      wm8994_write(0x204, 0x0019); 
+ +      wm8994_write(0x211, 0x0003);
+ +      wm8994_write(0x244, 0x0c83);
+ +      wm8994_write(0x620, 0x0000);
+ +      #endif
+ +      #ifdef THINKWILL_M800_MODE
+ +      wm8994_write(0x310, 0x4118); ///0x4118);  ///interface dsp mode 16bit
+ +      #endif
+ +      wm8994_write(0x313, 0x00F0);
+ +      wm8994_write(0x314, 0x0020);
+ +      wm8994_write(0x315, 0x0020);
+ +
+ +      wm8994_write(0x603, 0x018C);  //Rev.D ADCL SideTone
+ +      wm8994_write(0x604, 0x0010);
+ +      wm8994_write(0x605, 0x0010);
+ +      wm8994_write(0x621, 0x0000);  ///0x0001);
+ +      wm8994_write(0x317, 0x0003);
+ +      wm8994_write(0x312, 0x0000);  //AIF2 SET AS MASTER
+ +      
+ +      
+ +}
   
- -static const char *aif3adc_text[] = {
- -      "AIF1ADCDAT", "AIF2ADCDAT", "AIF2DACDAT",
- -};
+ +void mainMIC_to_baseband_to_earpiece_and_record(void) //pcmbaseband
+ +{
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_mainMIC_to_baseband_to_earpiece_and_record)return;
+ +      wm8994_current_mode=wm8994_mainMIC_to_baseband_to_earpiece_and_record;
+ +      wm8994_reset();
+ +      msleep(50);
+ +
+ +      wm8994_write(0x01,  0x0003|wm8994_mic_VCC);  
+ +      msleep(50);
+ +      wm8994_write(0x221, 0x0700);  //MCLK=12MHz
+ +      wm8994_write(0x222, 0x3127);
+ +      wm8994_write(0x223, 0x0100);
+ +      wm8994_write(0x220, 0x0004);
+ +      msleep(50);
+ +      wm8994_write(0x220, 0x0005);  
+ +
+ +      wm8994_write(0x01,  0x0803|wm8994_mic_VCC);
+ +      wm8994_write(0x02,  0x0110);
+ +      wm8994_write(0x03,  0x00F0);
+ +      wm8994_write(0x04,  0x3003);
+ +      wm8994_write(0x05,  0x3003); 
+ +      wm8994_write(0x1A,  0x010B); 
+ +      wm8994_write(0x1F,  0x0000); 
+ +      wm8994_write(0x28,  0x0003);
+ +      wm8994_write(0x2A,  0x0020);
+ +      wm8994_write(0x2D,  0x0001);
+ +      wm8994_write(0x2E,  0x0001);
+ +      wm8994_write(0x33,  0x0018);
+ +      wm8994_write(0x200, 0x0001);    
+ +      wm8994_write(0x204, 0x0001);
+ +      wm8994_write(0x208, 0x0007);    
+ +      wm8994_write(0x520, 0x0000);    
+ +      wm8994_write(0x601, 0x0004);
+ +      wm8994_write(0x602, 0x0004);
+ +
+ +      wm8994_write(0x610, 0x01C0);  //DAC1 Left Volume bit0~7
+ +      wm8994_write(0x611, 0x01C0);  //DAC1 Right Volume bit0~7
+ +      wm8994_write(0x612, 0x01C0);  //DAC2 Left Volume bit0~7 
+ +      wm8994_write(0x613, 0x01C0);  //DAC2 Right Volume bit0~7
+ +
+ +      wm8994_write(0x702, 0xC100);
+ +      wm8994_write(0x703, 0xC100);
+ +      wm8994_write(0x704, 0xC100);
+ +      wm8994_write(0x706, 0x4100);
+ +      wm8994_write(0x204, 0x0011);  //AIF2 MCLK=FLL1
+ +      wm8994_write(0x211, 0x0009);  //LRCK=8KHz, Rate=MCLK/1536
+ +      wm8994_write(0x310, 0x4118);  //DSP/PCM 16bits
+ +      wm8994_write(0x313, 0x00F0);
+ +      wm8994_write(0x314, 0x0020);
+ +      wm8994_write(0x315, 0x0020);
+ +
+ +      wm8994_write(0x603, 0x018C);  //Rev.D ADCL SideTone
+ +      wm8994_write(0x604, 0x0010);
+ +      wm8994_write(0x605, 0x0010);
+ +      wm8994_write(0x621, 0x0001);
+ +
+ +////AIF1
+ +      wm8994_write(0x04,   0x3303);
+ +      wm8994_write(0x200,  0x0001);
+ +      wm8994_write(0x208,  0x000F);
+ +      wm8994_write(0x210,  0x0009);  //LRCK=8KHz, Rate=MCLK/1536
+ +      wm8994_write(0x300,  0xC118);  //DSP/PCM 16bits, R ADC = L ADC 
+ +      wm8994_write(0x606,  0x0003);   
+ +      wm8994_write(0x607,  0x0003);
+ +
+ +////AIF1 Master Clock(SR=8KHz)
+ +      wm8994_write(0x200,  0x0011);
+ +      wm8994_write(0x302,  0x4000);
+ +      wm8994_write(0x303,  0x00F0);
+ +      wm8994_write(0x304,  0x0020);
+ +      wm8994_write(0x305,  0x0020);
+ +
+ +////AIF1 DAC1 HP
+ +      wm8994_write(0x05,   0x3303);
+ +      wm8994_write(0x420,  0x0000);
+ +      wm8994_write(0x601,  0x0001);
+ +      wm8994_write(0x602,  0x0001);
+ +      wm8994_write(0x700,  0x8140);//SYNC issue, AIF1 ADCLRC1 from FLL after AIF1 MASTER!!!
+ +      
+ +      
+ +}
   
- -static const struct soc_enum aif3adc_enum =
- -      SOC_ENUM_SINGLE(WM8994_POWER_MANAGEMENT_6, 3, 3, aif3adc_text);
- -
- -static const struct snd_kcontrol_new aif3adc_mux =
- -      SOC_DAPM_ENUM("AIF3ADC Mux", aif3adc_enum);
- -
- -static const struct snd_soc_dapm_widget wm8994_dapm_widgets[] = {
- -SND_SOC_DAPM_INPUT("DMIC1DAT"),
- -SND_SOC_DAPM_INPUT("DMIC2DAT"),
- -SND_SOC_DAPM_INPUT("Clock"),
- -
- -SND_SOC_DAPM_SUPPLY("CLK_SYS", SND_SOC_NOPM, 0, 0, clk_sys_event,
- -                  SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
- -
- -SND_SOC_DAPM_SUPPLY("DSP1CLK", WM8994_CLOCKING_1, 3, 0, NULL, 0),
- -SND_SOC_DAPM_SUPPLY("DSP2CLK", WM8994_CLOCKING_1, 2, 0, NULL, 0),
- -SND_SOC_DAPM_SUPPLY("DSPINTCLK", WM8994_CLOCKING_1, 1, 0, NULL, 0),
- -
- -SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8994_AIF1_CLOCKING_1, 0, 0, NULL, 0),
- -SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8994_AIF2_CLOCKING_1, 0, 0, NULL, 0),
- -
- -SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", "AIF1 Capture",
- -                   0, WM8994_POWER_MANAGEMENT_4, 9, 0),
- -SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", "AIF1 Capture",
- -                   0, WM8994_POWER_MANAGEMENT_4, 8, 0),
- -SND_SOC_DAPM_AIF_IN("AIF1DAC1L", NULL, 0,
- -                  WM8994_POWER_MANAGEMENT_5, 9, 0),
- -SND_SOC_DAPM_AIF_IN("AIF1DAC1R", NULL, 0,
- -                  WM8994_POWER_MANAGEMENT_5, 8, 0),
- -
- -SND_SOC_DAPM_AIF_OUT("AIF1ADC2L", "AIF1 Capture",
- -                   0, WM8994_POWER_MANAGEMENT_4, 11, 0),
- -SND_SOC_DAPM_AIF_OUT("AIF1ADC2R", "AIF1 Capture",
- -                   0, WM8994_POWER_MANAGEMENT_4, 10, 0),
- -SND_SOC_DAPM_AIF_IN("AIF1DAC2L", NULL, 0,
- -                  WM8994_POWER_MANAGEMENT_5, 11, 0),
- -SND_SOC_DAPM_AIF_IN("AIF1DAC2R", NULL, 0,
- -                  WM8994_POWER_MANAGEMENT_5, 10, 0),
- -
- -SND_SOC_DAPM_MIXER("AIF1ADC1L Mixer", SND_SOC_NOPM, 0, 0,
- -                 aif1adc1l_mix, ARRAY_SIZE(aif1adc1l_mix)),
- -SND_SOC_DAPM_MIXER("AIF1ADC1R Mixer", SND_SOC_NOPM, 0, 0,
- -                 aif1adc1r_mix, ARRAY_SIZE(aif1adc1r_mix)),
- -
- -SND_SOC_DAPM_MIXER("AIF1ADC2L Mixer", SND_SOC_NOPM, 0, 0,
- -                 aif1adc2l_mix, ARRAY_SIZE(aif1adc2l_mix)),
- -SND_SOC_DAPM_MIXER("AIF1ADC2R Mixer", SND_SOC_NOPM, 0, 0,
- -                 aif1adc2r_mix, ARRAY_SIZE(aif1adc2r_mix)),
- -
- -SND_SOC_DAPM_MIXER("AIF2DAC2L Mixer", SND_SOC_NOPM, 0, 0,
- -                 aif2dac2l_mix, ARRAY_SIZE(aif2dac2l_mix)),
- -SND_SOC_DAPM_MIXER("AIF2DAC2R Mixer", SND_SOC_NOPM, 0, 0,
- -                 aif2dac2r_mix, ARRAY_SIZE(aif2dac2r_mix)),
- -
- -SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &sidetone1_mux),
- -SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &sidetone2_mux),
- -
- -SND_SOC_DAPM_MIXER("DAC1L Mixer", SND_SOC_NOPM, 0, 0,
- -                 dac1l_mix, ARRAY_SIZE(dac1l_mix)),
- -SND_SOC_DAPM_MIXER("DAC1R Mixer", SND_SOC_NOPM, 0, 0,
- -                 dac1r_mix, ARRAY_SIZE(dac1r_mix)),
- -
- -SND_SOC_DAPM_AIF_OUT("AIF2ADCL", NULL, 0,
- -                   WM8994_POWER_MANAGEMENT_4, 13, 0),
- -SND_SOC_DAPM_AIF_OUT("AIF2ADCR", NULL, 0,
- -                   WM8994_POWER_MANAGEMENT_4, 12, 0),
- -SND_SOC_DAPM_AIF_IN("AIF2DACL", NULL, 0,
- -                  WM8994_POWER_MANAGEMENT_5, 13, 0),
- -SND_SOC_DAPM_AIF_IN("AIF2DACR", NULL, 0,
- -                  WM8994_POWER_MANAGEMENT_5, 12, 0),
- -
- -SND_SOC_DAPM_AIF_IN("AIF1DACDAT", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
- -SND_SOC_DAPM_AIF_IN("AIF2DACDAT", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
- -SND_SOC_DAPM_AIF_OUT("AIF2ADCDAT", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
- -
- -SND_SOC_DAPM_MUX("AIF1DAC Mux", SND_SOC_NOPM, 0, 0, &aif1dac_mux),
- -SND_SOC_DAPM_MUX("AIF2DAC Mux", SND_SOC_NOPM, 0, 0, &aif2dac_mux),
- -SND_SOC_DAPM_MUX("AIF2ADC Mux", SND_SOC_NOPM, 0, 0, &aif2adc_mux),
- -SND_SOC_DAPM_MUX("AIF3ADC Mux", SND_SOC_NOPM, 0, 0, &aif3adc_mux),
- -
- -SND_SOC_DAPM_AIF_IN("AIF3DACDAT", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
- -SND_SOC_DAPM_AIF_IN("AIF3ADCDAT", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
- -
- -SND_SOC_DAPM_SUPPLY("TOCLK", WM8994_CLOCKING_1, 4, 0, NULL, 0),
- -
- -SND_SOC_DAPM_ADC("DMIC2L", NULL, WM8994_POWER_MANAGEMENT_4, 5, 0),
- -SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8994_POWER_MANAGEMENT_4, 4, 0),
- -SND_SOC_DAPM_ADC("DMIC1L", NULL, WM8994_POWER_MANAGEMENT_4, 3, 0),
- -SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8994_POWER_MANAGEMENT_4, 2, 0),
- -
- -/* Power is done with the muxes since the ADC power also controls the
- - * downsampling chain, the chip will automatically manage the analogue
- - * specific portions.
- - */
- -SND_SOC_DAPM_ADC("ADCL", NULL, SND_SOC_NOPM, 1, 0),
- -SND_SOC_DAPM_ADC("ADCR", NULL, SND_SOC_NOPM, 0, 0),
+ +void mainMIC_to_baseband_to_speakers(void) //pcmbaseband
+ +{
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_mainMIC_to_baseband_to_speakers)return;
+ +      wm8994_current_mode=wm8994_mainMIC_to_baseband_to_speakers;
+ +      wm8994_reset();
+ +      msleep(50);
+ +
+ +      wm8994_write(0x01,  0x0003|wm8994_mic_VCC);  //0x0013);  
+ +      msleep(50);
+ +      wm8994_write(0x221, 0x0700);  //MCLK=12MHz   //FLL1 CONTRLO(2)
+ +      wm8994_write(0x222, 0x3127);  //FLL1 CONTRLO(3) 
+ +      wm8994_write(0x223, 0x0100);  //FLL1 CONTRLO(4) 
+ +      wm8994_write(0x220, 0x0004);  //FLL1 CONTRLO(1)
+ +      msleep(50);
+ +      wm8994_write(0x220, 0x0005);  //FLL1 CONTRLO(1)
+ +
+ +      wm8994_write(0x01,  0x3003|wm8994_mic_VCC);      
+ +      wm8994_write(0x02,  0x0110);
+ +      wm8994_write(0x03,  0x0030);  ///0x0330);
+ +      wm8994_write(0x04,  0x3003);
+ +      wm8994_write(0x05,  0x3003); 
+ +      wm8994_write(0x1A,  0x011F);
+ +      wm8994_write(0x22,  0x0000);
+ +      wm8994_write(0x23,  0x0100);  ///0x0000);
+ +      //wm8994_write(0x25,  0x0152);
+ +      wm8994_write(0x28,  0x0003);
+ +      wm8994_write(0x2A,  0x0020);
+ +      wm8994_write(0x2D,  0x0001);
+ +      wm8994_write(0x2E,  0x0001);
+ +      wm8994_write(0x36,  0x000C);  //MIXOUTL_TO_SPKMIXL  MIXOUTR_TO_SPKMIXR
+ +      wm8994_write(0x200, 0x0001);  //AIF1 CLOCKING(1)
+ +      wm8994_write(0x204, 0x0001);  //AIF2 CLOCKING(1)
+ +      wm8994_write(0x208, 0x0007);  //CLOCKING(1)
+ +      wm8994_write(0x520, 0x0000);  //AIF2 DAC FILTERS(1)
+ +      wm8994_write(0x601, 0x0004);  //AIF2DACL_DAC1L
+ +      wm8994_write(0x602, 0x0004);  //AIF2DACR_DAC1R
+ +
+ +      wm8994_write(0x610, 0x01C0);  //DAC1 Left Volume bit0~7
+ +      wm8994_write(0x611, 0x01C0);  //DAC1 Right Volume bit0~7
+ +      wm8994_write(0x612, 0x01C0);  //DAC2 Left Volume bit0~7 
+ +      wm8994_write(0x613, 0x01C0);  //DAC2 Right Volume bit0~7
+ +
+ +      wm8994_write(0x702, 0xC100);  //GPIO3
+ +      wm8994_write(0x703, 0xC100);  //GPIO4
+ +      wm8994_write(0x704, 0xC100);  //GPIO5
+ +      wm8994_write(0x706, 0x4100);  //GPIO7
+ +      wm8994_write(0x204, 0x0011);  //AIF2 MCLK=FLL1
+ +      wm8994_write(0x211, 0x0009);  //LRCK=8KHz, Rate=MCLK/1536
+ +      #ifdef TD688_MODE
+ +      wm8994_write(0x310, 0xc108); ///0x4118);  ///interface dsp mode 16bit
+ +      #endif
+ +      #ifdef CHONGY_MODE
+ +      wm8994_write(0x310, 0xc018); ///0x4118);  ///interface dsp mode 16bit
+ +      #endif
+ +      #ifdef MU301_MODE
+ +      wm8994_write(0x310, 0xc118); ///0x4118);  ///interface dsp mode 16bit
+ +      wm8994_write(0x241, 0x2f04);
+ +      wm8994_write(0x242, 0x0000);
+ +      wm8994_write(0x243, 0x0300);
+ +      wm8994_write(0x240, 0x0004);
+ +      msleep(40);
+ +      wm8994_write(0x240, 0x0005);
+ +      wm8994_write(0x204, 0x0019);
+ +      wm8994_write(0x211, 0x0003);
+ +      wm8994_write(0x244, 0x0c83);
+ +      wm8994_write(0x620, 0x0000);
+ +      #endif
+ +      #ifdef THINKWILL_M800_MODE
+ +      wm8994_write(0x310, 0xc118); ///0x4118);  ///interface dsp mode 16bit
+ +      #endif
+ +      wm8994_write(0x313, 0x00F0);  //AIF2BCLK
+ +      wm8994_write(0x314, 0x0020);  //AIF2ADCLRCK
+ +      wm8994_write(0x315, 0x0020);  //AIF2DACLRCLK
+ +
+ +      wm8994_write(0x603, 0x018C);  //Rev.D ADCL SideTone
+ +      wm8994_write(0x604, 0x0020);  ///0x0010);  //ADC2_TO_DAC2L
+ +      wm8994_write(0x605, 0x0020);  //0x0010);  //ADC2_TO_DAC2R
+ +      wm8994_write(0x621, 0x0000);  ///0x0001);
+ +      wm8994_write(0x317, 0x0003);
+ +      wm8994_write(0x312, 0x0000);  //AIF2 SET AS MASTER
   
- -SND_SOC_DAPM_MUX("ADCL Mux", WM8994_POWER_MANAGEMENT_4, 1, 0, &adcl_mux),
- -SND_SOC_DAPM_MUX("ADCR Mux", WM8994_POWER_MANAGEMENT_4, 0, 0, &adcr_mux),
   
- -SND_SOC_DAPM_DAC("DAC2L", NULL, WM8994_POWER_MANAGEMENT_5, 3, 0),
- -SND_SOC_DAPM_DAC("DAC2R", NULL, WM8994_POWER_MANAGEMENT_5, 2, 0),
- -SND_SOC_DAPM_DAC("DAC1L", NULL, WM8994_POWER_MANAGEMENT_5, 1, 0),
- -SND_SOC_DAPM_DAC("DAC1R", NULL, WM8994_POWER_MANAGEMENT_5, 0, 0),
+ +}
   
- -SND_SOC_DAPM_MUX("Left Headphone Mux", SND_SOC_NOPM, 0, 0, &hpl_mux),
- -SND_SOC_DAPM_MUX("Right Headphone Mux", SND_SOC_NOPM, 0, 0, &hpr_mux),
+ +void mainMIC_to_baseband_to_speakers_and_record(void) //pcmbaseband
+ +{
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_mainMIC_to_baseband_to_speakers_and_record)return;
+ +      wm8994_current_mode=wm8994_mainMIC_to_baseband_to_speakers_and_record;
+ +      wm8994_reset();
+ +      msleep(50);
+ +
+ +      wm8994_write(0x01,  0x0003|wm8994_mic_VCC);  
+ +      msleep(50);
+ +      wm8994_write(0x221, 0x0700);  //MCLK=12MHz
+ +      wm8994_write(0x222, 0x3127);    
+ +      wm8994_write(0x223, 0x0100);    
+ +      wm8994_write(0x220, 0x0004);
+ +      msleep(50);
+ +      wm8994_write(0x220, 0x0005);  
+ +
+ +      wm8994_write(0x02,  0x0110);
+ +      wm8994_write(0x03,  0x0330);
+ +      wm8994_write(0x04,  0x3003);
+ +      wm8994_write(0x05,  0x3003); 
+ +      wm8994_write(0x1A,  0x010B); 
+ +      wm8994_write(0x22,  0x0000);
+ +      wm8994_write(0x23,  0x0000);
+ +      wm8994_write(0x28,  0x0003);
+ +      wm8994_write(0x2A,  0x0020);
+ +      wm8994_write(0x2D,  0x0001);
+ +      wm8994_write(0x2E,  0x0001);
+ +      wm8994_write(0x36,  0x000C);
+ +      wm8994_write(0x200, 0x0001);    
+ +      wm8994_write(0x204, 0x0001);
+ +      wm8994_write(0x208, 0x0007);    
+ +      wm8994_write(0x520, 0x0000);    
+ +      wm8994_write(0x601, 0x0004);
+ +      wm8994_write(0x602, 0x0004);
+ +
+ +      wm8994_write(0x610, 0x01C0);  //DAC1 Left Volume bit0~7
+ +      wm8994_write(0x611, 0x01C0);  //DAC1 Right Volume bit0~7
+ +      wm8994_write(0x612, 0x01C0);  //DAC2 Left Volume bit0~7 
+ +      wm8994_write(0x613, 0x01C0);  //DAC2 Right Volume bit0~7
+ +
+ +      wm8994_write(0x700, 0x8141);
+ +      wm8994_write(0x702, 0xC100);
+ +      wm8994_write(0x703, 0xC100);
+ +      wm8994_write(0x704, 0xC100);
+ +      wm8994_write(0x706, 0x4100);
+ +      wm8994_write(0x204, 0x0011);  //AIF2 MCLK=FLL1
+ +      wm8994_write(0x211, 0x0009);  //LRCK=8KHz, Rate=MCLK/1536
+ +      wm8994_write(0x310, 0x4118);  //DSP/PCM 16bits
+ +      wm8994_write(0x313, 0x00F0);
+ +      wm8994_write(0x314, 0x0020);
+ +      wm8994_write(0x315, 0x0020);
+ +
+ +      wm8994_write(0x603, 0x018C);  //Rev.D ADCL SideTone
+ +      wm8994_write(0x604, 0x0010);
+ +      wm8994_write(0x605, 0x0010);
+ +      wm8994_write(0x621, 0x0001);
+ +
+ +////AIF1
+ +      wm8994_write(0x04,   0x3303);
+ +      wm8994_write(0x200,  0x0001);
+ +      wm8994_write(0x208,  0x000F);
+ +      wm8994_write(0x210,  0x0009);  //LRCK=8KHz, Rate=MCLK/1536
+ +      wm8994_write(0x300,  0xC118);  //DSP/PCM 16bits, R ADC = L ADC 
+ +      wm8994_write(0x606,  0x0003);   
+ +      wm8994_write(0x607,  0x0003);
+ +
+ +////AIF1 Master Clock(SR=8KHz)
+ +      wm8994_write(0x200,  0x0011);
+ +      wm8994_write(0x302,  0x4000);
+ +      wm8994_write(0x303,  0x00F0);
+ +      wm8994_write(0x304,  0x0020);
+ +      wm8994_write(0x305,  0x0020);
+ +
+ +////AIF1 DAC1 HP
+ +      wm8994_write(0x05,   0x3303);
+ +      wm8994_write(0x420,  0x0000);
+ +      wm8994_write(0x601,  0x0001);
+ +      wm8994_write(0x602,  0x0001);
+ +      wm8994_write(0x700,  0x8140);//SYNC issue, AIF1 ADCLRC1 from FLL after AIF1 MASTER!!!
+ +      
+ +}
   
- -SND_SOC_DAPM_MIXER("SPKL", WM8994_POWER_MANAGEMENT_3, 8, 0,
- -                 left_speaker_mixer, ARRAY_SIZE(left_speaker_mixer)),
- -SND_SOC_DAPM_MIXER("SPKR", WM8994_POWER_MANAGEMENT_3, 9, 0,
- -                 right_speaker_mixer, ARRAY_SIZE(right_speaker_mixer)),
+ +void BT_baseband(void) //pcmbaseband
+ +{
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_BT_baseband)return;
+ +      wm8994_current_mode=wm8994_BT_baseband;
+ +      wm8994_reset();
+ +      msleep(50);
+ +
+ +      wm8994_write(0x01 ,0x0003);
+ +      msleep (50);
+ +
+ +      wm8994_write(0x200 ,0x0001);
+ +      wm8994_write(0x221 ,0x0700);//MCLK=12MHz
+ +      wm8994_write(0x222 ,0x3127);
+ +      wm8994_write(0x223 ,0x0100);
+ +      wm8994_write(0x220 ,0x0004);
+ +      msleep (50);
+ +      wm8994_write(0x220 ,0x0005); 
+ +
+ +      wm8994_write(0x02 ,0x0000); 
+ +      wm8994_write(0x200 ,0x0011);// AIF1 MCLK=FLL1
+ +      wm8994_write(0x210 ,0x0009);// LRCK=8KHz, Rate=MCLK/1536
+ +      wm8994_write(0x300 ,0x4018);// DSP/PCM 16bits
+ +
+ +      wm8994_write(0x204 ,0x0011);// AIF2 MCLK=FLL1
+ +      wm8994_write(0x211 ,0x0009);// LRCK=8KHz, Rate=MCLK/1536
+ +      wm8994_write(0x310 ,0x4118);// DSP/PCM 16bits
+ +      wm8994_write(0x208 ,0x000F); 
+ +
+ +/////AIF1
+ +      wm8994_write(0x700 ,0x8101);
+ +/////AIF2
+ +      wm8994_write(0x702 ,0xC100);
+ +      wm8994_write(0x703 ,0xC100);
+ +      wm8994_write(0x704 ,0xC100);
+ +      wm8994_write(0x706 ,0x4100);
+ +/////AIF3
+ +      wm8994_write(0x707 ,0xA100); 
+ +      wm8994_write(0x708 ,0xA100);
+ +      wm8994_write(0x709 ,0xA100); 
+ +      wm8994_write(0x70A ,0xA100);
+ +
+ +      wm8994_write(0x06 ,0x0001);
+ +
+ +      wm8994_write(0x02 ,0x0300);
+ +      wm8994_write(0x03 ,0x0030);
+ +      wm8994_write(0x04 ,0x3301);//ADCL off
+ +      wm8994_write(0x05 ,0x3301);//DACL off
+ +
+ +      wm8994_write(0x2A ,0x0005);
+ +
+ +      wm8994_write(0x313 ,0x00F0);
+ +      wm8994_write(0x314 ,0x0020);
+ +      wm8994_write(0x315 ,0x0020);
+ +
+ +      wm8994_write(0x2E ,0x0001);
+ +      wm8994_write(0x420 ,0x0000);
+ +      wm8994_write(0x520 ,0x0000);
+ +      wm8994_write(0x601 ,0x0001);
+ +      wm8994_write(0x602 ,0x0001);
+ +      wm8994_write(0x604 ,0x0001);
+ +      wm8994_write(0x605 ,0x0001);
+ +      wm8994_write(0x607 ,0x0002);
+ +      wm8994_write(0x611, 0x01C0);  //DAC1 Right Volume bit0~7
+ +      wm8994_write(0x612, 0x01C0);  //DAC2 Left Volume bit0~7 
+ +      wm8994_write(0x613, 0x01C0);  //DAC2 Right Volume bit0~7
+ +
+ +
+ +      wm8994_write(0x312 ,0x4000);
+ +
+ +      wm8994_write(0x606 ,0x0001);
+ +      wm8994_write(0x607 ,0x0003);//R channel for data mix/CPU record data
+ +
+ +
+ +////////////HP output test
+ +      wm8994_write(0x01 ,0x0303);
+ +      wm8994_write(0x4C ,0x9F25);
+ +      wm8994_write(0x60 ,0x00EE);
+ +///////////end HP test
   
- -SND_SOC_DAPM_POST("Debug log", post_ev),
- -};
+ +}
   
- -static const struct snd_soc_dapm_route intercon[] = {
- -
- -      { "CLK_SYS", NULL, "AIF1CLK", check_clk_sys },
- -      { "CLK_SYS", NULL, "AIF2CLK", check_clk_sys },
- -
- -      { "DSP1CLK", NULL, "CLK_SYS" },
- -      { "DSP2CLK", NULL, "CLK_SYS" },
- -      { "DSPINTCLK", NULL, "CLK_SYS" },
- -
- -      { "AIF1ADC1L", NULL, "AIF1CLK" },
- -      { "AIF1ADC1L", NULL, "DSP1CLK" },
- -      { "AIF1ADC1R", NULL, "AIF1CLK" },
- -      { "AIF1ADC1R", NULL, "DSP1CLK" },
- -      { "AIF1ADC1R", NULL, "DSPINTCLK" },
- -
- -      { "AIF1DAC1L", NULL, "AIF1CLK" },
- -      { "AIF1DAC1L", NULL, "DSP1CLK" },
- -      { "AIF1DAC1R", NULL, "AIF1CLK" },
- -      { "AIF1DAC1R", NULL, "DSP1CLK" },
- -      { "AIF1DAC1R", NULL, "DSPINTCLK" },
- -
- -      { "AIF1ADC2L", NULL, "AIF1CLK" },
- -      { "AIF1ADC2L", NULL, "DSP1CLK" },
- -      { "AIF1ADC2R", NULL, "AIF1CLK" },
- -      { "AIF1ADC2R", NULL, "DSP1CLK" },
- -      { "AIF1ADC2R", NULL, "DSPINTCLK" },
- -
- -      { "AIF1DAC2L", NULL, "AIF1CLK" },
- -      { "AIF1DAC2L", NULL, "DSP1CLK" },
- -      { "AIF1DAC2R", NULL, "AIF1CLK" },
- -      { "AIF1DAC2R", NULL, "DSP1CLK" },
- -      { "AIF1DAC2R", NULL, "DSPINTCLK" },
- -
- -      { "AIF2ADCL", NULL, "AIF2CLK" },
- -      { "AIF2ADCL", NULL, "DSP2CLK" },
- -      { "AIF2ADCR", NULL, "AIF2CLK" },
- -      { "AIF2ADCR", NULL, "DSP2CLK" },
- -      { "AIF2ADCR", NULL, "DSPINTCLK" },
- -
- -      { "AIF2DACL", NULL, "AIF2CLK" },
- -      { "AIF2DACL", NULL, "DSP2CLK" },
- -      { "AIF2DACR", NULL, "AIF2CLK" },
- -      { "AIF2DACR", NULL, "DSP2CLK" },
- -      { "AIF2DACR", NULL, "DSPINTCLK" },
- -
- -      { "DMIC1L", NULL, "DMIC1DAT" },
- -      { "DMIC1L", NULL, "CLK_SYS" },
- -      { "DMIC1R", NULL, "DMIC1DAT" },
- -      { "DMIC1R", NULL, "CLK_SYS" },
- -      { "DMIC2L", NULL, "DMIC2DAT" },
- -      { "DMIC2L", NULL, "CLK_SYS" },
- -      { "DMIC2R", NULL, "DMIC2DAT" },
- -      { "DMIC2R", NULL, "CLK_SYS" },
- -
- -      { "ADCL", NULL, "AIF1CLK" },
- -      { "ADCL", NULL, "DSP1CLK" },
- -      { "ADCL", NULL, "DSPINTCLK" },
- -
- -      { "ADCR", NULL, "AIF1CLK" },
- -      { "ADCR", NULL, "DSP1CLK" },
- -      { "ADCR", NULL, "DSPINTCLK" },
- -
- -      { "ADCL Mux", "ADC", "ADCL" },
- -      { "ADCL Mux", "DMIC", "DMIC1L" },
- -      { "ADCR Mux", "ADC", "ADCR" },
- -      { "ADCR Mux", "DMIC", "DMIC1R" },
- -
- -      { "DAC1L", NULL, "AIF1CLK" },
- -      { "DAC1L", NULL, "DSP1CLK" },
- -      { "DAC1L", NULL, "DSPINTCLK" },
- -
- -      { "DAC1R", NULL, "AIF1CLK" },
- -      { "DAC1R", NULL, "DSP1CLK" },
- -      { "DAC1R", NULL, "DSPINTCLK" },
- -
- -      { "DAC2L", NULL, "AIF2CLK" },
- -      { "DAC2L", NULL, "DSP2CLK" },
- -      { "DAC2L", NULL, "DSPINTCLK" },
- -
- -      { "DAC2R", NULL, "AIF2DACR" },
- -      { "DAC2R", NULL, "AIF2CLK" },
- -      { "DAC2R", NULL, "DSP2CLK" },
- -      { "DAC2R", NULL, "DSPINTCLK" },
- -
- -      { "TOCLK", NULL, "CLK_SYS" },
- -
- -      /* AIF1 outputs */
- -      { "AIF1ADC1L", NULL, "AIF1ADC1L Mixer" },
- -      { "AIF1ADC1L Mixer", "ADC/DMIC Switch", "ADCL Mux" },
- -      { "AIF1ADC1L Mixer", "AIF2 Switch", "AIF2DACL" },
- -
- -      { "AIF1ADC1R", NULL, "AIF1ADC1R Mixer" },
- -      { "AIF1ADC1R Mixer", "ADC/DMIC Switch", "ADCR Mux" },
- -      { "AIF1ADC1R Mixer", "AIF2 Switch", "AIF2DACR" },
- -
- -      { "AIF1ADC2L", NULL, "AIF1ADC2L Mixer" },
- -      { "AIF1ADC2L Mixer", "DMIC Switch", "DMIC2L" },
- -      { "AIF1ADC2L Mixer", "AIF2 Switch", "AIF2DACL" },
- -
- -      { "AIF1ADC2R", NULL, "AIF1ADC2R Mixer" },
- -      { "AIF1ADC2R Mixer", "DMIC Switch", "DMIC2R" },
- -      { "AIF1ADC2R Mixer", "AIF2 Switch", "AIF2DACR" },
- -
- -      /* Pin level routing for AIF3 */
- -      { "AIF1DAC1L", NULL, "AIF1DAC Mux" },
- -      { "AIF1DAC1R", NULL, "AIF1DAC Mux" },
- -      { "AIF1DAC2L", NULL, "AIF1DAC Mux" },
- -      { "AIF1DAC2R", NULL, "AIF1DAC Mux" },
- -
- -      { "AIF2DACL", NULL, "AIF2DAC Mux" },
- -      { "AIF2DACR", NULL, "AIF2DAC Mux" },
- -
- -      { "AIF1DAC Mux", "AIF1DACDAT", "AIF1DACDAT" },
- -      { "AIF1DAC Mux", "AIF3DACDAT", "AIF3DACDAT" },
- -      { "AIF2DAC Mux", "AIF2DACDAT", "AIF2DACDAT" },
- -      { "AIF2DAC Mux", "AIF3DACDAT", "AIF3DACDAT" },
- -      { "AIF2ADC Mux", "AIF2ADCDAT", "AIF2ADCL" },
- -      { "AIF2ADC Mux", "AIF2ADCDAT", "AIF2ADCR" },
- -      { "AIF2ADC Mux", "AIF3DACDAT", "AIF3ADCDAT" },
- -
- -      /* DAC1 inputs */
- -      { "DAC1L", NULL, "DAC1L Mixer" },
- -      { "DAC1L Mixer", "AIF2 Switch", "AIF2DACL" },
- -      { "DAC1L Mixer", "AIF1.2 Switch", "AIF1DAC2L" },
- -      { "DAC1L Mixer", "AIF1.1 Switch", "AIF1DAC1L" },
- -      { "DAC1L Mixer", "Left Sidetone Switch", "Left Sidetone" },
- -      { "DAC1L Mixer", "Right Sidetone Switch", "Right Sidetone" },
- -
- -      { "DAC1R", NULL, "DAC1R Mixer" },
- -      { "DAC1R Mixer", "AIF2 Switch", "AIF2DACR" },
- -      { "DAC1R Mixer", "AIF1.2 Switch", "AIF1DAC2R" },
- -      { "DAC1R Mixer", "AIF1.1 Switch", "AIF1DAC1R" },
- -      { "DAC1R Mixer", "Left Sidetone Switch", "Left Sidetone" },
- -      { "DAC1R Mixer", "Right Sidetone Switch", "Right Sidetone" },
- -
- -      /* DAC2/AIF2 outputs  */
- -      { "AIF2ADCL", NULL, "AIF2DAC2L Mixer" },
- -      { "DAC2L", NULL, "AIF2DAC2L Mixer" },
- -      { "AIF2DAC2L Mixer", "AIF2 Switch", "AIF2DACL" },
- -      { "AIF2DAC2L Mixer", "AIF1.2 Switch", "AIF1DAC2L" },
- -      { "AIF2DAC2L Mixer", "AIF1.1 Switch", "AIF1DAC1L" },
- -      { "AIF2DAC2L Mixer", "Left Sidetone Switch", "Left Sidetone" },
- -      { "AIF2DAC2L Mixer", "Right Sidetone Switch", "Right Sidetone" },
- -
- -      { "AIF2ADCR", NULL, "AIF2DAC2R Mixer" },
- -      { "DAC2R", NULL, "AIF2DAC2R Mixer" },
- -      { "AIF2DAC2R Mixer", "AIF2 Switch", "AIF2DACR" },
- -      { "AIF2DAC2R Mixer", "AIF1.2 Switch", "AIF1DAC2R" },
- -      { "AIF2DAC2R Mixer", "AIF1.1 Switch", "AIF1DAC1R" },
- -      { "AIF2DAC2R Mixer", "Left Sidetone Switch", "Left Sidetone" },
- -      { "AIF2DAC2R Mixer", "Right Sidetone Switch", "Right Sidetone" },
- -
- -      { "AIF2ADCDAT", NULL, "AIF2ADC Mux" },
- -
- -      /* AIF3 output */
- -      { "AIF3ADCDAT", "AIF1ADCDAT", "AIF1ADC1L" },
- -      { "AIF3ADCDAT", "AIF1ADCDAT", "AIF1ADC1R" },
- -      { "AIF3ADCDAT", "AIF1ADCDAT", "AIF1ADC2L" },
- -      { "AIF3ADCDAT", "AIF1ADCDAT", "AIF1ADC2R" },
- -      { "AIF3ADCDAT", "AIF2ADCDAT", "AIF2ADCL" },
- -      { "AIF3ADCDAT", "AIF2ADCDAT", "AIF2ADCR" },
- -      { "AIF3ADCDAT", "AIF2DACDAT", "AIF2DACL" },
- -      { "AIF3ADCDAT", "AIF2DACDAT", "AIF2DACR" },
- -
- -      /* Sidetone */
- -      { "Left Sidetone", "ADC/DMIC1", "ADCL Mux" },
- -      { "Left Sidetone", "DMIC2", "DMIC2L" },
- -      { "Right Sidetone", "ADC/DMIC1", "ADCR Mux" },
- -      { "Right Sidetone", "DMIC2", "DMIC2R" },
- -
- -      /* Output stages */
- -      { "Left Output Mixer", "DAC Switch", "DAC1L" },
- -      { "Right Output Mixer", "DAC Switch", "DAC1R" },
- -
- -      { "SPKL", "DAC1 Switch", "DAC1L" },
- -      { "SPKL", "DAC2 Switch", "DAC2L" },
- -
- -      { "SPKR", "DAC1 Switch", "DAC1R" },
- -      { "SPKR", "DAC2 Switch", "DAC2R" },
- -
- -      { "Left Headphone Mux", "DAC", "DAC1L" },
- -      { "Right Headphone Mux", "DAC", "DAC1R" },
- -};
+ +void BT_baseband_and_record(void) //pcmbaseband
+ +{
+ +      DBG("%s::%d\n",__FUNCTION__,__LINE__);
+ +
+ +      if(wm8994_current_mode==wm8994_BT_baseband_and_record)return;
+ +      wm8994_current_mode=wm8994_BT_baseband_and_record;
+ +      wm8994_reset();
+ +      msleep(50);
+ +
+ +      wm8994_write(0x01  ,0x0003);
+ +      msleep (50);
+ +
+ +      wm8994_write(0x200 ,0x0001);
+ +      wm8994_write(0x221 ,0x0700);//MCLK=12MHz
+ +      wm8994_write(0x222 ,0x3127);
+ +      wm8994_write(0x223 ,0x0100);
+ +      wm8994_write(0x220 ,0x0004);
+ +      msleep (50);
+ +      wm8994_write(0x220 ,0x0005); 
+ +
+ +      wm8994_write(0x02 ,0x0000); 
+ +      wm8994_write(0x200 ,0x0011);// AIF1 MCLK=FLL1
+ +      wm8994_write(0x210 ,0x0009);// LRCK=8KHz, Rate=MCLK/1536
+ +      wm8994_write(0x300 ,0x4018);// DSP/PCM 16bits
+ +
+ +      wm8994_write(0x204 ,0x0011);// AIF2 MCLK=FLL1
+ +      wm8994_write(0x211 ,0x0009);// LRCK=8KHz, Rate=MCLK/1536
+ +      wm8994_write(0x310 ,0x4118);// DSP/PCM 16bits
+ +      wm8994_write(0x208 ,0x000F); 
+ +
+ +/////AIF1
+ +      wm8994_write(0x700 ,0x8101);
+ +/////AIF2
+ +      wm8994_write(0x702 ,0xC100);
+ +      wm8994_write(0x703 ,0xC100);
+ +      wm8994_write(0x704 ,0xC100);
+ +      wm8994_write(0x706 ,0x4100);
+ +/////AIF3
+ +      wm8994_write(0x707 ,0xA100); 
+ +      wm8994_write(0x708 ,0xA100);
+ +      wm8994_write(0x709 ,0xA100); 
+ +      wm8994_write(0x70A ,0xA100);
+ +
+ +      wm8994_write(0x06 ,0x0001);
+ +      wm8994_write(0x02 ,0x0300);
+ +      wm8994_write(0x03 ,0x0030);
+ +      wm8994_write(0x04 ,0x3301);//ADCL off
+ +      wm8994_write(0x05 ,0x3301);//DACL off
+ +      wm8994_write(0x2A ,0x0005);
+ +
+ +      wm8994_write(0x313 ,0x00F0);
+ +      wm8994_write(0x314 ,0x0020);
+ +      wm8994_write(0x315 ,0x0020);
+ +
+ +      wm8994_write(0x2E  ,0x0001);
+ +      wm8994_write(0x420 ,0x0000);
+ +      wm8994_write(0x520 ,0x0000);
+ +      wm8994_write(0x602 ,0x0001);
+ +      wm8994_write(0x604 ,0x0001);
+ +      wm8994_write(0x605 ,0x0001);
+ +      wm8994_write(0x607 ,0x0002);
+ +      wm8994_write(0x611, 0x01C0);  //DAC1 Right Volume bit0~7
+ +      wm8994_write(0x612, 0x01C0);  //DAC2 Left Volume bit0~7 
+ +      wm8994_write(0x613, 0x01C0);  //DAC2 Right Volume bit0~7
+ +
+ +      wm8994_write(0x312 ,0x4000);
+ +
+ +      wm8994_write(0x606 ,0x0001);
+ +      wm8994_write(0x607 ,0x0003);//R channel for data mix/CPU record data
+ +////////////HP output test
+ +      wm8994_write(0x01 ,0x0303);
+ +      wm8994_write(0x4C ,0x9F25); 
+ +      wm8994_write(0x60 ,0x00EE); 
+ +///////////end HP test
   
- -/* The size in bits of the FLL divide multiplied by 10
- - * to allow rounding later */
- -#define FIXED_FLL_SIZE ((1 << 16) * 10)
+ +}
+ +#endif //PCM_BB
   
- -struct fll_div {
- -      u16 outdiv;
- -      u16 n;
- -      u16 k;
- -      u16 clk_ref_div;
- -      u16 fll_fratio;
- -};
+ +#define SOC_DOUBLE_SWITCH_WM8994CODEC(xname, route) \
+ +{     .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
+ +      .info = snd_soc_info_route, \
+ +      .get = snd_soc_get_route, .put = snd_soc_put_route, \
+ +      .private_value = route }
   
- -static int wm8994_get_fll_config(struct fll_div *fll,
- -                               int freq_in, int freq_out)
+ +int snd_soc_info_route(struct snd_kcontrol *kcontrol,
+ +      struct snd_ctl_elem_info *uinfo)
   {
- -      u64 Kpart;
- -      unsigned int K, Ndiv, Nmod;
+ +      uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
   
- -      pr_debug("FLL input=%dHz, output=%dHz\n", freq_in, freq_out);
+ +      uinfo->count = 1;
+ +      uinfo->value.integer.min = 0;
+ +      uinfo->value.integer.max = 0;
+ +      return 0;
+ +}
   
- -      /* Scale the input frequency down to <= 13.5MHz */
- -      fll->clk_ref_div = 0;
- -      while (freq_in > 13500000) {
- -              fll->clk_ref_div++;
- -              freq_in /= 2;
+ +int snd_soc_get_route(struct snd_kcontrol *kcontrol,
+ +      struct snd_ctl_elem_value *ucontrol)
+ +{
+ +      return 0;
+ +}
   
- -              if (fll->clk_ref_div > 3)
- -                      return -EINVAL;
+ +int snd_soc_put_route(struct snd_kcontrol *kcontrol,
+ +      struct snd_ctl_elem_value *ucontrol)
+ +{
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
+ +      char route = kcontrol->private_value & 0xff;
+ +      wake_lock(&wm8994->wm8994_on_wake);
+ +      mutex_lock(&wm8994->route_lock);
+ +      wm8994->kcontrol = kcontrol;//save rount
+ +
+ +      //before set the route -- disable PA
-       PA_ctrl(GPIO_LOW);
- 
++      switch(route)
++      {
++              case HEADSET_NORMAL:
++              case HEADSET_INCALL:
++              case EARPIECE_INCALL:
++                      PA_ctrl(GPIO_LOW);
++                      break;
++              default:
++                      break;
+       }
- -      pr_debug("CLK_REF_DIV=%d, Fref=%dHz\n", fll->clk_ref_div, freq_in);
- -
- -      /* Scale the output to give 90MHz<=Fvco<=100MHz */
- -      fll->outdiv = 3;
- -      while (freq_out * (fll->outdiv + 1) < 90000000) {
- -              fll->outdiv++;
- -              if (fll->outdiv > 63)
- -                      return -EINVAL;
+ +      //set rount
+ +      switch(route)
+ +      {
+ +              case SPEAKER_NORMAL:                                            //AP-> 8994Codec -> Speaker
+ +              case SPEAKER_RINGTONE:                  
+ +              case EARPIECE_RINGTONE: 
+ +                      recorder_and_AP_to_speakers();
+ +                      break;
+ +              case SPEAKER_INCALL:                                            //BB-> 8994Codec -> Speaker
+ +                      mainMIC_to_baseband_to_speakers();
+ +                      break;                                  
+ +              case HEADSET_NORMAL:                                            //AP-> 8994Codec -> Headset
+ +                      recorder_and_AP_to_headset();
+ +                      break;
+ +              case HEADSET_INCALL:                                            //AP-> 8994Codec -> Headset
+ +                      if(Headset_isMic())
+ +                              handsetMIC_to_baseband_to_headset();
+ +                      else
+ +                              mainMIC_to_baseband_to_headset();
+ +                      break;      
+ +              case EARPIECE_INCALL:                                           //BB-> 8994Codec -> EARPIECE
+ +                      mainMIC_to_baseband_to_earpiece();
+ +                      break;
+ +              case EARPIECE_NORMAL:                                           //BB-> 8994Codec -> EARPIECE
+ +                      switch(wm8994_current_mode)
+ +                      {
+ +                              case wm8994_handsetMIC_to_baseband_to_headset:
+ +                              case wm8994_mainMIC_to_baseband_to_headset:
+ +                                      recorder_and_AP_to_headset();
+ +                                      break;
+ +                              default:
+ +                                      recorder_and_AP_to_speakers();  
+ +                                      break;
+ +                      }
+ +                      break;          
+ +              case BLUETOOTH_SCO_INCALL:                                      //BB-> 8994Codec -> BLUETOOTH_SCO 
+ +                      BT_baseband();
+ +                      break;   
+ +              case MIC_CAPTURE:
+ +                      switch(wm8994_current_mode)
+ +                      {
+ +                              case wm8994_AP_to_headset:
+ +                                      recorder_and_AP_to_headset();
+ +                                      break;
+ +                              case wm8994_AP_to_speakers:
+ +                                      recorder_and_AP_to_speakers();
+ +                                      break;
+ +                              case wm8994_recorder_and_AP_to_speakers:
+ +                              case wm8994_recorder_and_AP_to_headset:
+ +                                      break;
+ +                              default:
+ +                                      recorder_and_AP_to_speakers();  
+ +                                      break;
+ +                      }
+ +                      break;
+ +              case HEADSET_RINGTONE:
+ +                      AP_to_speakers_and_headset();
+ +                      break;
+ +              case BLUETOOTH_A2DP_NORMAL:                                     //AP-> 8994Codec -> BLUETOOTH_A2DP
+ +              case BLUETOOTH_A2DP_INCALL:
+ +              case BLUETOOTH_SCO_NORMAL:
+ +                      printk("this route not use\n");
+ +                      break;                                  
+ +              default:
+ +                      printk("wm8994 error route!!!\n");
+ +                      goto out;
         }
- -      freq_out *= fll->outdiv + 1;
- -      pr_debug("OUTDIV=%d, Fvco=%dHz\n", fll->outdiv, freq_out);
   
- -      if (freq_in > 1000000) {
- -              fll->fll_fratio = 0;
- -      } else if (freq_in > 256000) {
- -              fll->fll_fratio = 1;
- -              freq_in *= 2;
- -      } else if (freq_in > 128000) {
- -              fll->fll_fratio = 2;
- -              freq_in *= 4;
- -      } else if (freq_in > 64000) {
- -              fll->fll_fratio = 3;
- -              freq_in *= 8;
- -      } else {
- -              fll->fll_fratio = 4;
- -              freq_in *= 16;
+ +      if(wm8994->RW_status == ERROR)
+ +      {//Failure to read or write, will re-power on wm8994
+ +              cancel_delayed_work_sync(&wm8994->wm8994_delayed_work);
+ +              wm8994->work_type = SNDRV_PCM_TRIGGER_PAUSE_PUSH;
+ +              schedule_delayed_work(&wm8994->wm8994_delayed_work, msecs_to_jiffies(10));
+ +              goto out;
         }
- -      pr_debug("FLL_FRATIO=%d, Fref=%dHz\n", fll->fll_fratio, freq_in);
- -
- -      /* Now, calculate N.K */
- -      Ndiv = freq_out / freq_in;
+ +      //after set the route -- enable PA
+ +      switch(route)
+ +      {
-               case MIC_CAPTURE:
-                       if(wm8994_current_mode == wm8994_AP_to_headset)
-                               break;
-               case EARPIECE_NORMAL:
-                       if(wm8994_current_mode == wm8994_handsetMIC_to_baseband_to_headset||
-                               wm8994_current_mode == wm8994_mainMIC_to_baseband_to_headset)
-                               break;
-               case SPEAKER_NORMAL:    
-               case SPEAKER_RINGTONE:
-               case SPEAKER_INCALL:                    
-               case EARPIECE_RINGTONE: 
-               case HEADSET_RINGTONE:
-                       msleep(50);
-                       PA_ctrl(GPIO_HIGH);                             
++              case EARPIECE_INCALL:
++              case HEADSET_NORMAL:
++              case HEADSET_INCALL:
++              case BLUETOOTH_A2DP_NORMAL:     
++              case BLUETOOTH_A2DP_INCALL:
++              case BLUETOOTH_SCO_NORMAL:      
+ +                      break;
-               default:                
++              default:
++                      msleep(50);
++                      PA_ctrl(GPIO_HIGH);             
+ +                      break;
+ +      }       
+ +out:  
+ +      mutex_unlock(&wm8994->route_lock);      
+ +      wake_unlock(&wm8994->wm8994_on_wake);   
+ +      return 0;
+ +}
   
- -      fll->n = Ndiv;
- -      Nmod = freq_out % freq_in;
- -      pr_debug("Nmod=%d\n", Nmod);
+ +/*
+ + * WM8994 Controls
+ + */
+ +static const struct snd_kcontrol_new wm8994_snd_controls[] = {
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Speaker incall Switch", SPEAKER_INCALL),       
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Speaker normal Switch", SPEAKER_NORMAL),
   
- -      /* Calculate fractional part - scale up so we can round. */
- -      Kpart = FIXED_FLL_SIZE * (long long)Nmod;
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Earpiece incall Switch", EARPIECE_INCALL),     
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Earpiece normal Switch", EARPIECE_NORMAL),
   
- -      do_div(Kpart, freq_in);
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Headset incall Switch", HEADSET_INCALL),       
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Headset normal Switch", HEADSET_NORMAL),
   
- -      K = Kpart & 0xFFFFFFFF;
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Bluetooth incall Switch", BLUETOOTH_SCO_INCALL),       
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Bluetooth normal Switch", BLUETOOTH_SCO_NORMAL),
   
- -      if ((K % 10) >= 5)
- -              K += 5;
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Bluetooth-A2DP incall Switch", BLUETOOTH_A2DP_INCALL), 
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Bluetooth-A2DP normal Switch", BLUETOOTH_A2DP_NORMAL),
   
- -      /* Move down to proper range now rounding is done */
- -      fll->k = K / 10;
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Capture Switch", MIC_CAPTURE),
   
- -      pr_debug("N=%x K=%x\n", fll->n, fll->k);
- -
- -      return 0;
- -}
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Earpiece ringtone Switch",EARPIECE_RINGTONE),
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Speaker ringtone Switch",SPEAKER_RINGTONE),
+ +SOC_DOUBLE_SWITCH_WM8994CODEC("Headset ringtone Switch",HEADSET_RINGTONE),
+ +};
   
- -static int wm8994_set_fll(struct snd_soc_dai *dai, int id, int src,
- -                        unsigned int freq_in, unsigned int freq_out)
+ +static void wm8994_codec_set_volume(unsigned char system_type,unsigned char volume)
   {
- -      struct snd_soc_codec *codec = dai->codec;
- -      struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
- -      int reg_offset, ret;
- -      struct fll_div fll;
- -      u16 reg, aif1, aif2;
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
+ +//    DBG("%s:: system_type = %d volume = %d \n",__FUNCTION__,system_type,volume);
   
- -      aif1 = snd_soc_read(codec, WM8994_AIF1_CLOCKING_1)
- -              & WM8994_AIF1CLK_ENA;
- -
- -      aif2 = snd_soc_read(codec, WM8994_AIF2_CLOCKING_1)
- -              & WM8994_AIF2CLK_ENA;
- -
- -      switch (id) {
- -      case WM8994_FLL1:
- -              reg_offset = 0;
- -              id = 0;
- -              break;
- -      case WM8994_FLL2:
- -              reg_offset = 0x20;
- -              id = 1;
- -              break;
- -      default:
- -              return -EINVAL;
+ +      if(system_type == VOICE_CALL)
+ +      {
+ +              if(volume <= call_maxvol)
+ +                      wm8994->call_vol=volume;
+ +              else
+ +              {
+ +                      printk("%s----%d::max value is 5\n",__FUNCTION__,__LINE__);
+ +                      wm8994->call_vol=call_maxvol;
+ +              }
+ +              if(wm8994_current_mode<=wm8994_mainMIC_to_baseband_to_speakers_and_record&&
+ +                      wm8994_current_mode>=wm8994_handsetMIC_to_baseband_to_headset)
+ +                      wm8994_set_volume(wm8994_current_mode,wm8994->call_vol,call_maxvol);
         }
- -
- -      switch (src) {
- -      case 0:
- -              /* Allow no source specification when stopping */
- -              if (freq_out)
- -                      return -EINVAL;
- -              break;
- -      case WM8994_FLL_SRC_MCLK1:
- -      case WM8994_FLL_SRC_MCLK2:
- -      case WM8994_FLL_SRC_LRCLK:
- -      case WM8994_FLL_SRC_BCLK:
- -              break;
- -      default:
- -              return -EINVAL;
+ +      else if(system_type == BLUETOOTH_SCO)
+ +      {
+ +              if(volume <= BT_call_maxvol)
+ +                      wm8994->BT_call_vol = volume;
+ +              else
+ +              {
+ +                      printk("%s----%d::max value is 15\n",__FUNCTION__,__LINE__);
+ +                      wm8994->BT_call_vol = BT_call_maxvol;
+ +              }
+ +              if(wm8994_current_mode<null&&
+ +                      wm8994_current_mode>=wm8994_BT_baseband)
+ +                      wm8994_set_volume(wm8994_current_mode,wm8994->BT_call_vol,BT_call_maxvol);
         }
- -
- -      /* Are we changing anything? */
- -      if (wm8994->fll[id].src == src &&
- -          wm8994->fll[id].in == freq_in && wm8994->fll[id].out == freq_out)
- -              return 0;
- -
- -      /* If we're stopping the FLL redo the old config - no
- -       * registers will actually be written but we avoid GCC flow
- -       * analysis bugs spewing warnings.
- -       */
- -      if (freq_out)
- -              ret = wm8994_get_fll_config(&fll, freq_in, freq_out);
         else
- -              ret = wm8994_get_fll_config(&fll, wm8994->fll[id].in,
- -                                          wm8994->fll[id].out);
- -      if (ret < 0)
- -              return ret;
- -
- -      /* Gate the AIF clocks while we reclock */
- -      snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
- -                          WM8994_AIF1CLK_ENA, 0);
- -      snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
- -                          WM8994_AIF2CLK_ENA, 0);
- -
- -      /* We always need to disable the FLL while reconfiguring */
- -      snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_1 + reg_offset,
- -                          WM8994_FLL1_ENA, 0);
- -
- -      reg = (fll.outdiv << WM8994_FLL1_OUTDIV_SHIFT) |
- -              (fll.fll_fratio << WM8994_FLL1_FRATIO_SHIFT);
- -      snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_2 + reg_offset,
- -                          WM8994_FLL1_OUTDIV_MASK |
- -                          WM8994_FLL1_FRATIO_MASK, reg);
- -
- -      snd_soc_write(codec, WM8994_FLL1_CONTROL_3 + reg_offset, fll.k);
- -
- -      snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_4 + reg_offset,
- -                          WM8994_FLL1_N_MASK,
- -                                  fll.n << WM8994_FLL1_N_SHIFT);
- -
- -      snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_5 + reg_offset,
- -                          WM8994_FLL1_REFCLK_DIV_MASK |
- -                          WM8994_FLL1_REFCLK_SRC_MASK,
- -                          (fll.clk_ref_div << WM8994_FLL1_REFCLK_DIV_SHIFT) |
- -                          (src - 1));
- -
- -      /* Enable (with fractional mode if required) */
- -      if (freq_out) {
- -              if (fll.k)
- -                      reg = WM8994_FLL1_ENA | WM8994_FLL1_FRAC;
- -              else
- -                      reg = WM8994_FLL1_ENA;
- -              snd_soc_update_bits(codec, WM8994_FLL1_CONTROL_1 + reg_offset,
- -                                  WM8994_FLL1_ENA | WM8994_FLL1_FRAC,
- -                                  reg);
+ +      {
+ +              printk("%s----%d::system type error!\n",__FUNCTION__,__LINE__);
+ +              return;
         }
- -
- -      wm8994->fll[id].in = freq_in;
- -      wm8994->fll[id].out = freq_out;
- -      wm8994->fll[id].src = src;
- -
- -      /* Enable any gated AIF clocks */
- -      snd_soc_update_bits(codec, WM8994_AIF1_CLOCKING_1,
- -                          WM8994_AIF1CLK_ENA, aif1);
- -      snd_soc_update_bits(codec, WM8994_AIF2_CLOCKING_1,
- -                          WM8994_AIF2CLK_ENA, aif2);
- -
- -      configure_clock(codec);
- -
- -      return 0;
   }
   
- -static int opclk_divs[] = { 10, 20, 30, 40, 55, 60, 80, 120, 160 };
- -
- -static int wm8994_set_dai_sysclk(struct snd_soc_dai *dai,
+ +/*
+ + * Note that this should be called from init rather than from hw_params.
+ + */
+ +static int wm8994_set_dai_sysclk(struct snd_soc_dai *codec_dai,
                 int clk_id, unsigned int freq, int dir)
   {
- -      struct snd_soc_codec *codec = dai->codec;
- -      struct wm8994_priv *wm8994 = snd_soc_codec_get_drvdata(codec);
- -      int i;
- -
- -      switch (dai->id) {
- -      case 1:
- -      case 2:
- -              break;
- -
- -      default:
- -              /* AIF3 shares clocking with AIF1/2 */
- -              return -EINVAL;
- -      }
+ +      struct snd_soc_codec *codec = codec_dai->codec;
+ +      struct wm8994_priv *wm8994 = codec->private_data;
+ +      
+ +//    DBG("%s----%d\n",__FUNCTION__,__LINE__);
   
         switch (clk_id) {
         case WM8994_SYSCLK_MCLK1:
@@@ -3139,223 -3641,144 +3141,207 @@@ static int wm8994_resume(struct platfor
   
         return 0;
   }
- -#else
- -#define wm8994_suspend NULL
- -#define wm8994_resume NULL
- -#endif
   
- -static void wm8994_handle_retune_mobile_pdata(struct wm8994_priv *wm8994)
+ +#ifdef WM8994_PROC
+ +static ssize_t wm8994_proc_write(struct file *file, const char __user *buffer,
+ +                         unsigned long len, void *data)
   {
- -      struct snd_soc_codec *codec = &wm8994->codec;
+ +      char *cookie_pot; 
+ +      char *p;
+ +      int reg;
+ +      int value;
+ +      struct snd_kcontrol kcontrol;
+ +      struct wm8994_priv *wm8994 = wm8994_codec->private_data;
         struct wm8994_pdata *pdata = wm8994->pdata;
- -      struct snd_kcontrol_new controls[] = {
- -              SOC_ENUM_EXT("AIF1.1 EQ Mode",
- -                           wm8994->retune_mobile_enum,
- -                           wm8994_get_retune_mobile_enum,
- -                           wm8994_put_retune_mobile_enum),
- -              SOC_ENUM_EXT("AIF1.2 EQ Mode",
- -                           wm8994->retune_mobile_enum,
- -                           wm8994_get_retune_mobile_enum,
- -                           wm8994_put_retune_mobile_enum),
- -              SOC_ENUM_EXT("AIF2 EQ Mode",
- -                           wm8994->retune_mobile_enum,
- -                           wm8994_get_retune_mobile_enum,
- -                           wm8994_put_retune_mobile_enum),
- -      };
- -      int ret, i, j;
- -      const char **t;
- -
- -      /* We need an array of texts for the enum API but the number
- -       * of texts is likely to be less than the number of
- -       * configurations due to the sample rate dependency of the
- -       * configurations. */
- -      wm8994->num_retune_mobile_texts = 0;
- -      wm8994->retune_mobile_texts = NULL;
- -      for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) {
- -              for (j = 0; j < wm8994->num_retune_mobile_texts; j++) {
- -                      if (strcmp(pdata->retune_mobile_cfgs[i].name,
- -                                 wm8994->retune_mobile_texts[j]) == 0)
- -                              break;
+ +      
+ +      cookie_pot = (char *)vmalloc( len );
+ +      if (!cookie_pot) 
+ +      {
+ +              return -ENOMEM;
+ +      } 
+ +      else 
+ +      {
+ +              if (copy_from_user( cookie_pot, buffer, len )) 
+ +                      return -EFAULT;
+ +      }
+ +      
+ +      switch(cookie_pot[0])
+ +      {
+ +      case 'd':
+ +      case 'D':
+ +              debug_write_read ++;
+ +              debug_write_read %= 2;
+ +              if(debug_write_read != 0)
+ +                      DBG("Debug read and write reg on\n");
+ +              else    
+ +                      DBG("Debug read and write reg off\n");  
+ +              break;  
+ +      case 'r':
+ +      case 'R':
+ +              DBG("Read reg debug\n");                
+ +              if(cookie_pot[1] ==':')
+ +              {
+ +                      debug_write_read = 1;
+ +                      strsep(&cookie_pot,":");
+ +                      while((p=strsep(&cookie_pot,",")))
+ +                      {
+ +                              wm8994_read(simple_strtol(p,NULL,16),(unsigned short *)&value);
+ +                      }
+ +                      debug_write_read = 0;;
+ +                      DBG("\n");              
                 }
- -
- -              if (j != wm8994->num_retune_mobile_texts)
- -                      continue;
- -
- -              /* Expand the array... */
- -              t = krealloc(wm8994->retune_mobile_texts,
- -                           sizeof(char *) * 
- -                           (wm8994->num_retune_mobile_texts + 1),
- -                           GFP_KERNEL);
- -              if (t == NULL)
- -                      continue;
- -
- -              /* ...store the new entry... */
- -              t[wm8994->num_retune_mobile_texts] = 
- -                      pdata->retune_mobile_cfgs[i].name;
- -
- -              /* ...and remember the new version. */
- -              wm8994->num_retune_mobile_texts++;
- -              wm8994->retune_mobile_texts = t;
+ +              else
+ +              {
+ +                      DBG("Error Read reg debug.\n");
+ +                      DBG("For example: echo 'r:22,23,24,25'>wm8994_ts\n");
+ +              }
+ +              break;
+ +      case 'w':
+ +      case 'W':
+ +              DBG("Write reg debug\n");               
+ +              if(cookie_pot[1] ==':')
+ +              {
+ +                      debug_write_read = 1;
+ +                      strsep(&cookie_pot,":");
+ +                      while((p=strsep(&cookie_pot,"=")))
+ +                      {
+ +                              reg = simple_strtol(p,NULL,16);
+ +                              p=strsep(&cookie_pot,",");
+ +                              value = simple_strtol(p,NULL,16);
+ +                              wm8994_write(reg,value);
+ +                      }
+ +                      debug_write_read = 0;;
+ +                      DBG("\n");
+ +              }
+ +              else
+ +              {
+ +                      DBG("Error Write reg debug.\n");
+ +                      DBG("For example: w:22=0,23=0,24=0,25=0\n");
+ +              }
+ +              break;  
+ +      case 'p':
+ +      case 'P':
+ +              if(cookie_pot[1] =='-')
+ +              {
+ +                      kcontrol.private_value = simple_strtol(&cookie_pot[2],NULL,10);
+ +                      printk("kcontrol.private_value = %ld\n",kcontrol.private_value);
+ +                      if(kcontrol.private_value<SPEAKER_INCALL || kcontrol.private_value>HEADSET_RINGTONE)
+ +                      {
+ +                              printk("route error\n");
+ +                              goto help;
+ +                      }       
+ +                      snd_soc_put_route(&kcontrol,NULL);
+ +                      break;
+ +              }       
-               else if(cookie_pot[1] ==':')
-               {
-                       strsep(&cookie_pot,":");
-                       while((p=strsep(&cookie_pot,",")))
-                       {
-                               kcontrol.private_value = simple_strtol(p,NULL,10);
-                               printk("kcontrol.private_value = %ld\n",kcontrol.private_value);
-                               if(kcontrol.private_value<SPEAKER_INCALL || kcontrol.private_value>HEADSET_RINGTONE)
-                               {
-                                       printk("route error\n");
-                                       goto help;
-                               }       
-                               snd_soc_put_route(&kcontrol,NULL);
-                       }
-                       break;
-               }               
+ +              else
+ +              {
+ +                      goto help;
+ +              }
+ +              help:
+ +                      printk("snd_soc_put_route list\n");
+ +                      printk("SPEAKER_INCALL--\"p-0\",\nSPEAKER_NORMAL--\"p-1\",\nHEADSET_INCALL--\"p-2\",\
+ +                      \nHEADSET_NORMAL--\"p-3\",\nEARPIECE_INCALL--\"p-4\",\nEARPIECE_NORMAL--\"p-5\",\
+ +                      \nBLUETOOTH_SCO_INCALL--\"p-6\",\nMIC_CAPTURE--\"p-10\",\nEARPIECE_RINGTONE--\"p-11\",\
+ +                      \nSPEAKER_RINGTONE--\"p-12\",\nHEADSET_RINGTONE--\"p-13\"\n");                  
+ +              break;
+ +      case 'F':
+ +      case 'f':
+ +              PA_ctrl(GPIO_HIGH);             
+ +              FM_to_speakers();
+ +              break;
+ +      case 'S':
+ +      case 's':
+ +              printk("Debug : Set volume begin\n");
+ +              switch(cookie_pot[1])
+ +              {
+ +                      case '+':
+ +                              if(cookie_pot[2] == '\n')
+ +                              {
+ +                              
+ +                              }
+ +                              else
+ +                              {
+ +                                      value = simple_strtol(&cookie_pot[2],NULL,10);
+ +                                      printk("value = %d\n",value);
+ +
+ +                              }
+ +                              break;
+ +                      case '-':
+ +                              if(cookie_pot[2] == '\n')
+ +                              {
+ +                                      
+ +                              }
+ +                              else
+ +                              {
+ +                                      value = simple_strtol(&cookie_pot[2],NULL,10);
+ +                                      printk("value = %d\n",value);
+ +                              }
+ +                              break;
+ +                      default:
+ +                              if(cookie_pot[1] == '=')
+ +                              {
+ +                                      value = simple_strtol(&cookie_pot[2],NULL,10);
+ +                                      printk("value = %d\n",value);
+ +                              }       
+ +                              else
+ +                                      printk("Help the set volume,Example: echo s+**>wm8994_ts,s=**>wm8994_ts,s-**>wm8994_ts\n");
+ +
+ +                              break;                          
+ +              }               
+ +              break;  
+ +      case '1':
+ +              gpio_request(pdata->Power_EN_Pin, NULL);
+ +              gpio_direction_output(pdata->Power_EN_Pin,GPIO_LOW);
+ +              gpio_free(pdata->Power_EN_Pin); 
+ +              break;
+ +      case '2':       
+ +              gpio_request(pdata->Power_EN_Pin, NULL);
+ +              gpio_direction_output(pdata->Power_EN_Pin,GPIO_HIGH);
+ +              gpio_free(pdata->Power_EN_Pin);                 
+ +              break;
+ +      default:
+ +              DBG("Help for wm8994_ts .\n-->The Cmd list: \n");
+ +              DBG("-->'d&&D' Open or close the debug\n");
+ +              DBG("-->'r&&R' Read reg debug,Example: echo 'r:22,23,24,25'>wm8994_ts\n");
+ +              DBG("-->'w&&W' Write reg debug,Example: echo 'w:22=0,23=0,24=0,25=0'>wm8994_ts\n");
+ +              DBG("-->'ph&&Ph' cat snd_soc_put_route list\n");
+ +              break;
         }
   
- -      dev_dbg(codec->dev, "Allocated %d unique ReTune Mobile names\n",
- -              wm8994->num_retune_mobile_texts);
- -
- -      wm8994->retune_mobile_enum.max = wm8994->num_retune_mobile_texts;
- -      wm8994->retune_mobile_enum.texts = wm8994->retune_mobile_texts;
- -
- -      ret = snd_soc_add_controls(&wm8994->codec, controls,
- -                                 ARRAY_SIZE(controls));
- -      if (ret != 0)
- -              dev_err(wm8994->codec.dev,
- -                      "Failed to add ReTune Mobile controls: %d\n", ret);
+ +      return len;
   }
   
- -static void wm8994_handle_pdata(struct wm8994_priv *wm8994)
- -{
- -      struct snd_soc_codec *codec = &wm8994->codec;
- -      struct wm8994_pdata *pdata = wm8994->pdata;
- -      int ret, i;
+ +static const struct file_operations wm8994_proc_fops = {
+ +      .owner          = THIS_MODULE,
+ +      //.open         = snd_mem_proc_open,
+ +      //.read         = seq_read,
+ +//#ifdef CONFIG_PCI
+ +      .write          = wm8994_proc_write,
+ +//#endif
+ +      //.llseek       = seq_lseek,
+ +      //.release      = single_release,
+ +};
   
- -      if (!pdata)
- -              return;
+ +static int wm8994_proc_init(void){
   
- -      wm_hubs_handle_analogue_pdata(codec, pdata->lineout1_diff,
- -                                    pdata->lineout2_diff,
- -                                    pdata->lineout1fb,
- -                                    pdata->lineout2fb,
- -                                    pdata->jd_scthr,
- -                                    pdata->jd_thr,
- -                                    pdata->micbias1_lvl,
- -                                    pdata->micbias2_lvl);
- -
- -      dev_dbg(codec->dev, "%d DRC configurations\n", pdata->num_drc_cfgs);
- -
- -      if (pdata->num_drc_cfgs) {
- -              struct snd_kcontrol_new controls[] = {
- -                      SOC_ENUM_EXT("AIF1DRC1 Mode", wm8994->drc_enum,
- -                                   wm8994_get_drc_enum, wm8994_put_drc_enum),
- -                      SOC_ENUM_EXT("AIF1DRC2 Mode", wm8994->drc_enum,
- -                                   wm8994_get_drc_enum, wm8994_put_drc_enum),
- -                      SOC_ENUM_EXT("AIF2DRC Mode", wm8994->drc_enum,
- -                                   wm8994_get_drc_enum, wm8994_put_drc_enum),
- -              };
- -
- -              /* We need an array of texts for the enum API */
- -              wm8994->drc_texts = kmalloc(sizeof(char *)
- -                                          * pdata->num_drc_cfgs, GFP_KERNEL);
- -              if (!wm8994->drc_texts) {
- -                      dev_err(wm8994->codec.dev,
- -                              "Failed to allocate %d DRC config texts\n",
- -                              pdata->num_drc_cfgs);
- -                      return;
- -              }
+ +      struct proc_dir_entry *wm8994_proc_entry;
   
- -              for (i = 0; i < pdata->num_drc_cfgs; i++)
- -                      wm8994->drc_texts[i] = pdata->drc_cfgs[i].name;
+ +      wm8994_proc_entry = create_proc_entry("driver/wm8994_ts", 0777, NULL);
   
- -              wm8994->drc_enum.max = pdata->num_drc_cfgs;
- -              wm8994->drc_enum.texts = wm8994->drc_texts;
+ +      if(wm8994_proc_entry != NULL){
   
- -              ret = snd_soc_add_controls(&wm8994->codec, controls,
- -                                         ARRAY_SIZE(controls));
- -              if (ret != 0)
- -                      dev_err(wm8994->codec.dev,
- -                              "Failed to add DRC mode controls: %d\n", ret);
+ +              wm8994_proc_entry->write_proc = wm8994_proc_write;
   
- -              for (i = 0; i < WM8994_NUM_DRC; i++)
- -                      wm8994_set_drc(codec, i);
+ +              return -1;
+ +      }else{
+ +              printk("create proc error !\n");
         }
   
- -      dev_dbg(codec->dev, "%d ReTune Mobile configurations\n",
- -              pdata->num_retune_mobile_cfgs);
- -
- -      if (pdata->num_retune_mobile_cfgs)
- -              wm8994_handle_retune_mobile_pdata(wm8994);
- -      else
- -              snd_soc_add_controls(&wm8994->codec, wm8994_eq_controls,
- -                                   ARRAY_SIZE(wm8994_eq_controls));
+ +      return 0;
   }
   
+ +#endif
+ +
   static int wm8994_probe(struct platform_device *pdev)
   {
         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
diff --cc sound/soc/codecs/wm_hubs.c

index 8d05a852686cc385429bdc1e112042e7518c7a29,47cd284f678030dfda8a9cace24e7aad61f87636..e1924d5dc3fd4fa6e85a5859e71666542cfe485b

mode 100755,100644..100755
--- 1/sound/soc/codecs/wm_hubs.c
--- 2/sound/soc/codecs/wm_hubs.c
+++ b/sound/soc/codecs/wm_hubs.c
@@@ -709,12 -707,12 +709,12 @@@ static const struct snd_soc_dapm_route 
   
         { "SPKL", "Input Switch", "MIXINL" },
         { "SPKL", "IN1LP Switch", "IN1LP" },
--      { "SPKL", "Output Switch", "Left Output Mixer" },
++      { "SPKL", "Output Switch", "Left Output PGA" },
         { "SPKL", NULL, "TOCLK" },
   
         { "SPKR", "Input Switch", "MIXINR" },
         { "SPKR", "IN1RP Switch", "IN1RP" },
--      { "SPKR", "Output Switch", "Right Output Mixer" },
++      { "SPKR", "Output Switch", "Right Output PGA" },
         { "SPKR", NULL, "TOCLK" },
   
         { "SPKL Boost", "Direct Voice Switch", "Direct Voice" },
@@@ -736,8 -734,8 +736,8 @@@
         { "SPKOUTRP", NULL, "SPKR Driver" },
         { "SPKOUTRN", NULL, "SPKR Driver" },
   
--      { "Left Headphone Mux", "Mixer", "Left Output Mixer" },
--      { "Right Headphone Mux", "Mixer", "Right Output Mixer" },
++      { "Left Headphone Mux", "Mixer", "Left Output PGA" },
++      { "Right Headphone Mux", "Mixer", "Right Output PGA" },
   
         { "Headphone PGA", NULL, "Left Headphone Mux" },
         { "Headphone PGA", NULL, "Right Headphone Mux" },
@@@ -756,17 -754,17 +756,17 @@@
   static const struct snd_soc_dapm_route lineout1_diff_routes[] = {
         { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" },
         { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" },
--      { "LINEOUT1 Mixer", "Output Switch", "Left Output Mixer" },
++      { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" },
   
         { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" },
         { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" },
   };
   
   static const struct snd_soc_dapm_route lineout1_se_routes[] = {
--      { "LINEOUT1N Mixer", "Left Output Switch", "Left Output Mixer" },
--      { "LINEOUT1N Mixer", "Right Output Switch", "Left Output Mixer" },
++      { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" },
++      { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" },
   
--      { "LINEOUT1P Mixer", "Left Output Switch", "Left Output Mixer" },
++      { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" },
   
         { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" },
         { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" },
@@@ -775,17 -773,17 +775,17 @@@
   static const struct snd_soc_dapm_route lineout2_diff_routes[] = {
         { "LINEOUT2 Mixer", "IN2L Switch", "IN2L PGA" },
         { "LINEOUT2 Mixer", "IN2R Switch", "IN2R PGA" },
--      { "LINEOUT2 Mixer", "Output Switch", "Right Output Mixer" },
++      { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" },
   
         { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" },
         { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" },
   };
   
   static const struct snd_soc_dapm_route lineout2_se_routes[] = {
--      { "LINEOUT2N Mixer", "Left Output Switch", "Left Output Mixer" },
--      { "LINEOUT2N Mixer", "Right Output Switch", "Left Output Mixer" },
++      { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" },
++      { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" },
   
--      { "LINEOUT2P Mixer", "Right Output Switch", "Right Output Mixer" },
++      { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" },
   
         { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" },
         { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" },
@@@ -803,17 -801,17 +803,21 @@@ int wm_hubs_add_analogue_controls(struc
         snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME,
                             WM8993_IN2_VU, WM8993_IN2_VU);
   
++      snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT,
++                          WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
         snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT,
                             WM8993_SPKOUT_VU, WM8993_SPKOUT_VU);
   
         snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME,
--                          WM8993_HPOUT1L_ZC, WM8993_HPOUT1L_ZC);
++                          WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC,
++                          WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC);
         snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME,
                             WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC,
                             WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC);
   
         snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME,
--                          WM8993_MIXOUTL_ZC, WM8993_MIXOUTL_ZC);
++                          WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU,
++                          WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU);
         snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME,
                             WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU,
                             WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU);
diff --cc sound/soc/soc-cache.c
Simple merge
author	黄涛 <huangtao@rock-chips.com>
	Sun, 31 Jul 2011 16:04:45 +0000 (00:04 +0800)
committer	黄涛 <huangtao@rock-chips.com>
	Sun, 31 Jul 2011 16:04:45 +0000 (00:04 +0800)
		1	2
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drivers/mtd/mtdblock.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/mtd/mtdblock_ro.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/mtd/nand/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/mtd/nand/Makefile	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/mtd/nand/nand_base.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/mtd/nand/nand_bbt.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/net/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/net/Makefile	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/net/dm9000.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/net/enc28j60.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/net/irda/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/net/irda/Makefile	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/net/usb/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/net/usb/Makefile	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/net/wireless/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
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drivers/power/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/power/Makefile	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/power/wm831x_power.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/regulator/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/regulator/Makefile	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/regulator/core.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/regulator/wm8994-regulator.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/rtc/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/rtc/Makefile	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/rtc/rtc-wm831x.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/serial/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/serial/Makefile	patch \|	diff1 \|	diff2 \|	blob \| history
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drivers/spi/spi.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/staging/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
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drivers/staging/android/timed_gpio.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/staging/iio/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
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drivers/usb/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/usb/Makefile	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/usb/core/hcd.c	patch \|	diff1 \|	diff2 \|	blob \| history
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drivers/usb/gadget/composite.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/usb/gadget/gadget_chips.h	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/usb/storage/usb.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/video/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
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drivers/video/backlight/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/video/backlight/Makefile	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/video/backlight/wm831x_bl.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/video/console/fbcon.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/video/fbmem.c	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/watchdog/Kconfig	patch \|	diff1 \|	diff2 \|	blob \| history
drivers/watchdog/Makefile	patch \|	diff1 \|	diff2 \|	blob \| history
fs/block_dev.c	patch \|	diff1 \|	diff2 \|	blob \| history
fs/buffer.c	patch \|	diff1 \|	diff2 \|	blob \| history
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include/asm-generic/gpio.h	patch \|	diff1 \|	diff2 \|	blob \| history
include/linux/dm9000.h	patch \|	diff1 \|	diff2 \|	blob \| history
include/linux/fb.h	patch \|	diff1 \|	diff2 \|	blob \| history
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include/linux/l3g4200d-moto.h	patch \|	\|	\|	blob
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include/linux/mtd/blktrans.h	patch \|	diff1 \|	diff2 \|	blob \| history
include/linux/mtd/nand.h	patch \|	diff1 \|	diff2 \|	blob \| history
include/linux/regulator/consumer.h	patch \|	diff1 \|	diff2 \|	blob \| history
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include/media/soc_camera.h	patch \|	diff1 \|	diff2 \|	blob \| history
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kernel/printk.c	patch \|	diff1 \|	diff2 \|	blob \| history
kernel/sys.c	patch \|	diff1 \|	diff2 \|	blob \| history
net/bluetooth/rfcomm/core.c	patch \|	diff1 \|	diff2 \|	blob \| history
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