rk312x: dts config for vpu, hevc and iep

diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index 62e75e6f54c6cfbe12e86bcf58c8b34d411133bf..c3a60e155092280d3c2aec37e084b69e42f7a257 100755 (executable)
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -351,4 +351,35 @@
        //         clock-names = "pclk_pwm";
                 status = "disabled";
         };
+
+        vpu: vpu_service@10104000 {
+               compatible = "vpu_service";
+               reg = <0x10104000 0x800>;
+               interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "irq_enc", "irq_dec";
+               clocks = <&aclk_vcodec_pre>, <&clk_gates3 12>;
+               clock-names = "aclk_vcodec", "hclk_vcodec";
+               name = "vpu_service";
+               status = "disabled";
+       };
+
+       hevc: hevc_service@10104000 {
+               compatible = "rockchip,hevc_service";
+               reg = <0x10104000 0x400>;
+               interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "irq_dec";
+               clocks = <&aclk_vcodec_pre>, <&clk_gates3 12>, <&clk_hevc_core>;
+               clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core";
+               name = "hevc_service";
+               status = "disabled";
+        };
+
+        iep: iep@10108000 {
+               compatible = "rockchip,iep";
+               reg = <0x10108000 0x800>;
+               interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&clk_gates9 8>, <&clk_gates9 7>;
+               clock-names = "aclk_iep", "hclk_iep";
+               status = "okay";
+       };
 };