Make a bunch of static arrays const.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@250642 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Fuzzer/FuzzerDriver.cpp b/lib/Fuzzer/FuzzerDriver.cpp
index ce745fed387b929cf25732645ea74edc7cc9537a..d73e351d6493cb5a564b35e9d97f0ea29469ec27 100644 (file)
--- a/lib/Fuzzer/FuzzerDriver.cpp
+++ b/lib/Fuzzer/FuzzerDriver.cpp
@@ -42,7 +42,7 @@ struct {
 #undef FUZZER_FLAG_STRING
 } Flags;
 
-static FlagDescription FlagDescriptions [] {
+static const FlagDescription FlagDescriptions [] {
 #define FUZZER_FLAG_INT(Name, Default, Description)                            \
   { #Name, Description, Default, &Flags.Name, nullptr},
 #define FUZZER_FLAG_STRING(Name, Description)                                  \

diff --git a/lib/IR/AutoUpgrade.cpp b/lib/IR/AutoUpgrade.cpp
index 5ffe288efb65a392ecf215258bee93b76df8c6ed..9de149559df6cf4e364f8df2d0241f965f14bde5 100644 (file)
--- a/lib/IR/AutoUpgrade.cpp
+++ b/lib/IR/AutoUpgrade.cpp
@@ -106,14 +106,15 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
     }
     Regex vstRegex("^arm\\.neon\\.vst([1234]|[234]lane)\\.v[a-z0-9]*$");
     if (vstRegex.match(Name)) {
-      static Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1,
-                                          Intrinsic::arm_neon_vst2,
-                                          Intrinsic::arm_neon_vst3,
-                                          Intrinsic::arm_neon_vst4};
-
-      static Intrinsic::ID StoreLaneInts[] = {Intrinsic::arm_neon_vst2lane,
-                                              Intrinsic::arm_neon_vst3lane,
-                                              Intrinsic::arm_neon_vst4lane};
+      static const Intrinsic::ID StoreInts[] = {Intrinsic::arm_neon_vst1,
+                                                Intrinsic::arm_neon_vst2,
+                                                Intrinsic::arm_neon_vst3,
+                                                Intrinsic::arm_neon_vst4};
+
+      static const Intrinsic::ID StoreLaneInts[] = {
+        Intrinsic::arm_neon_vst2lane, Intrinsic::arm_neon_vst3lane,
+        Intrinsic::arm_neon_vst4lane
+      };
 
       auto fArgs = F->getFunctionType()->params();
       Type *Tys[] = {fArgs[0], fArgs[1]};

diff --git a/lib/Support/Windows/Path.inc b/lib/Support/Windows/Path.inc
index 839beebfcb6494c3dc3802f24d91a54c431df94f..30f0bb8204c64b1aa20200cfd7ada7af39e3a218 100644 (file)
--- a/lib/Support/Windows/Path.inc
+++ b/lib/Support/Windows/Path.inc
@@ -348,10 +348,12 @@ std::error_code equivalent(const Twine &A, const Twine &B, bool &result) {
 static bool isReservedName(StringRef path) {
   // This list of reserved names comes from MSDN, at:
   // http://msdn.microsoft.com/en-us/library/aa365247%28v=vs.85%29.aspx
-  static const char *sReservedNames[] = { "nul", "con", "prn", "aux",
-                              "com1", "com2", "com3", "com4", "com5", "com6",
-                              "com7", "com8", "com9", "lpt1", "lpt2", "lpt3",
-                              "lpt4", "lpt5", "lpt6", "lpt7", "lpt8", "lpt9" };
+  static const char *const sReservedNames[] = { "nul", "con", "prn", "aux",
+                                                "com1", "com2", "com3", "com4",
+                                                "com5", "com6", "com7", "com8",
+                                                "com9", "lpt1", "lpt2", "lpt3",
+                                                "lpt4", "lpt5", "lpt6", "lpt7",
+                                                "lpt8", "lpt9" };
 
   // First, check to see if this is a device namespace, which always
   // starts with \\.\, since device namespaces are not legal file paths.

diff --git a/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index e5293f011ba3f92fe6a81fd8ff39eed0f31fb9bd..7b7003236877d68ce40d4a8f0fb7bd5c6052c4d4 100644 (file)
--- a/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -1282,8 +1282,8 @@ SDNode *AArch64DAGToDAGISel::SelectLoadLane(SDNode *N, unsigned NumVecs,
   SDValue SuperReg = SDValue(Ld, 0);
 
   EVT WideVT = RegSeq.getOperand(1)->getValueType(0);
-  static unsigned QSubs[] = { AArch64::qsub0, AArch64::qsub1, AArch64::qsub2,
-                              AArch64::qsub3 };
+  static const unsigned QSubs[] = { AArch64::qsub0, AArch64::qsub1,
+                                    AArch64::qsub2, AArch64::qsub3 };
   for (unsigned i = 0; i < NumVecs; ++i) {
     SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT, SuperReg);
     if (Narrow)
@@ -1335,8 +1335,8 @@ SDNode *AArch64DAGToDAGISel::SelectPostLoadLane(SDNode *N, unsigned NumVecs,
                 Narrow ? NarrowVector(SuperReg, *CurDAG) : SuperReg);
   } else {
     EVT WideVT = RegSeq.getOperand(1)->getValueType(0);
-    static unsigned QSubs[] = { AArch64::qsub0, AArch64::qsub1, AArch64::qsub2,
-                                AArch64::qsub3 };
+    static const unsigned QSubs[] = { AArch64::qsub0, AArch64::qsub1,
+                                      AArch64::qsub2, AArch64::qsub3 };
     for (unsigned i = 0; i < NumVecs; ++i) {
       SDValue NV = CurDAG->getTargetExtractSubreg(QSubs[i], dl, WideVT,
                                                   SuperReg);

diff --git a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
index 3980d3698c12ad17ca4dd6ffd5801e25806e4bb5..e2504e57532689358784f5d0d2cf63717eee577d 100644 (file)
--- a/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
+++ b/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
@@ -1186,8 +1186,10 @@ public:
   template <unsigned NumRegs>
   void addVectorList64Operands(MCInst &Inst, unsigned N) const {
     assert(N == 1 && "Invalid number of operands!");
-    static unsigned FirstRegs[] = { AArch64::D0,       AArch64::D0_D1,
-                                    AArch64::D0_D1_D2, AArch64::D0_D1_D2_D3 };
+    static const unsigned FirstRegs[] = { AArch64::D0,
+                                          AArch64::D0_D1,
+                                          AArch64::D0_D1_D2,
+                                          AArch64::D0_D1_D2_D3 };
     unsigned FirstReg = FirstRegs[NumRegs - 1];
 
     Inst.addOperand(
@@ -1197,8 +1199,10 @@ public:
   template <unsigned NumRegs>
   void addVectorList128Operands(MCInst &Inst, unsigned N) const {
     assert(N == 1 && "Invalid number of operands!");
-    static unsigned FirstRegs[] = { AArch64::Q0,       AArch64::Q0_Q1,
-                                    AArch64::Q0_Q1_Q2, AArch64::Q0_Q1_Q2_Q3 };
+    static const unsigned FirstRegs[] = { AArch64::Q0,
+                                          AArch64::Q0_Q1,
+                                          AArch64::Q0_Q1_Q2,
+                                          AArch64::Q0_Q1_Q2_Q3 };
     unsigned FirstReg = FirstRegs[NumRegs - 1];
 
     Inst.addOperand(

diff --git a/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp b/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
index 7f56c2cf6bb841b330f6e6faa9b9cf7c414d2365..f5c27dd8a78b576d69aaa487dd9b6ba116432023 100644 (file)
--- a/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
+++ b/lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
@@ -269,7 +269,7 @@ struct LdStNInstrDesc {
   int NaturalOffset;
 };
 
-static LdStNInstrDesc LdStNInstInfo[] = {
+static const LdStNInstrDesc LdStNInstInfo[] = {
   { AArch64::LD1i8,             "ld1",  ".b",     1, true,  0  },
   { AArch64::LD1i16,            "ld1",  ".h",     1, true,  0  },
   { AArch64::LD1i32,            "ld1",  ".s",     1, true,  0  },
@@ -612,7 +612,7 @@ static LdStNInstrDesc LdStNInstInfo[] = {
   { AArch64::ST4Fourv2s_POST,   "st4",  ".2s",    1, false, 32 },
 };
 
-static LdStNInstrDesc *getLdStNInstrDesc(unsigned Opcode) {
+static const LdStNInstrDesc *getLdStNInstrDesc(unsigned Opcode) {
   unsigned Idx;
   for (Idx = 0; Idx != array_lengthof(LdStNInstInfo); ++Idx)
     if (LdStNInstInfo[Idx].Opcode == Opcode)
@@ -641,7 +641,7 @@ void AArch64AppleInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
     return;
   }
 
-  if (LdStNInstrDesc *LdStDesc = getLdStNInstrDesc(Opcode)) {
+  if (const LdStNInstrDesc *LdStDesc = getLdStNInstrDesc(Opcode)) {
     O << "\t" << LdStDesc->Mnemonic << LdStDesc->Layout << '\t';
 
     // Now onto the operands: first a vector list with possible lane

diff --git a/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp b/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
index 138e1d842b7aa6a406d37cfa880265209aa14e02..a266e711af5b4d9382f42563c864099617e7cf2e 100644 (file)
--- a/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
+++ b/lib/Target/AMDGPU/AMDGPUInstrInfo.cpp
@@ -367,7 +367,7 @@ int AMDGPUInstrInfo::pseudoToMCOpcode(int Opcode) const {
 
 ArrayRef<std::pair<int, const char *>>
 AMDGPUInstrInfo::getSerializableTargetIndices() const {
-  static std::pair<int, const char *> TargetIndices[] = {
+  static const std::pair<int, const char *> TargetIndices[] = {
       {AMDGPU::TI_CONSTDATA_START, "amdgpu-constdata-start"},
       {AMDGPU::TI_SCRATCH_RSRC_DWORD0, "amdgpu-scratch-rsrc-dword0"},
       {AMDGPU::TI_SCRATCH_RSRC_DWORD1, "amdgpu-scratch-rsrc-dword1"},

diff --git a/lib/Target/AMDGPU/SIRegisterInfo.cpp b/lib/Target/AMDGPU/SIRegisterInfo.cpp
index 26cfa203cf7897e5f906b8132217ff7944683eb8..54e6085d4b497cafd2eb7d88667c27fb9e7a972a 100644 (file)
--- a/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ b/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -331,7 +331,7 @@ unsigned SIRegisterInfo::getHWRegIndex(unsigned Reg) const {
 const TargetRegisterClass *SIRegisterInfo::getPhysRegClass(unsigned Reg) const {
   assert(!TargetRegisterInfo::isVirtualRegister(Reg));
 
-  static const TargetRegisterClass *BaseClasses[] = {
+  static const TargetRegisterClass *const BaseClasses[] = {
     &AMDGPU::VGPR_32RegClass,
     &AMDGPU::SReg_32RegClass,
     &AMDGPU::VReg_64RegClass,

diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
index 94f573ce8cdbdec550e2e52d7ea736abaac2aeab..c07ec9fa8d13d875a57f2ac39044e26085e842fb 100644 (file)
--- a/lib/Target/ARM/ARMISelLowering.cpp
+++ b/lib/Target/ARM/ARMISelLowering.cpp
@@ -11926,9 +11926,9 @@ bool ARMTargetLowering::lowerInterleavedStore(StoreInst *SI,
     SubVecTy = VectorType::get(IntTy, NumSubElts);
   }
 
-  static Intrinsic::ID StoreInts[3] = {Intrinsic::arm_neon_vst2,
-                                       Intrinsic::arm_neon_vst3,
-                                       Intrinsic::arm_neon_vst4};
+  static const Intrinsic::ID StoreInts[3] = {Intrinsic::arm_neon_vst2,
+                                             Intrinsic::arm_neon_vst3,
+                                             Intrinsic::arm_neon_vst4};
   SmallVector<Value *, 6> Ops;
 
   Type *Int8Ptr = Builder.getInt8PtrTy(SI->getPointerAddressSpace());

diff --git a/lib/Target/Hexagon/HexagonISelLowering.cpp b/lib/Target/Hexagon/HexagonISelLowering.cpp
index 90b46efdf730ede47afa0433c63238d4bbbc6841..c6c44ab76daa9bd617e812d43a785d2ecdfa67a9 100644 (file)
--- a/lib/Target/Hexagon/HexagonISelLowering.cpp
+++ b/lib/Target/Hexagon/HexagonISelLowering.cpp
@@ -1476,7 +1476,7 @@ HexagonTargetLowering::HexagonTargetLowering(const TargetMachine &TM,
 
   // Set the action for vector operations to "expand", then override it with
   // either "custom" or "legal" for specific cases.
-  static unsigned VectExpOps[] = {
+  static const unsigned VectExpOps[] = {
     // Integer arithmetic:
     ISD::ADD,     ISD::SUB,     ISD::MUL,     ISD::SDIV,    ISD::UDIV,
     ISD::SREM,    ISD::UREM,    ISD::SDIVREM, ISD::UDIVREM, ISD::ADDC,

diff --git a/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp b/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp
index 7e9247cef6adcda59974d1e71886dfdb0a99cfc1..716165ffb74607055b5edace5cb9b65dc2370b63 100644 (file)
--- a/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp
+++ b/lib/Target/Hexagon/MCTargetDesc/HexagonMCDuplexInfo.cpp
@@ -26,7 +26,7 @@ using namespace Hexagon;
 #define DEBUG_TYPE "hexagon-mcduplex-info"
 
 // pair table of subInstructions with opcodes
-static std::pair<unsigned, unsigned> opcodeData[] = {
+static const std::pair<unsigned, unsigned> opcodeData[] = {
     std::make_pair((unsigned)V4_SA1_addi, 0),
     std::make_pair((unsigned)V4_SA1_addrx, 6144),
     std::make_pair((unsigned)V4_SA1_addsp, 3072),

diff --git a/lib/Target/Mips/Mips16HardFloat.cpp b/lib/Target/Mips/Mips16HardFloat.cpp
index 6a5fb0521eebb8deacc9c13bfdeec5419913fd4d..2ead56e758cef95cfbbe79dd2d35714a8c4d788a 100644 (file)
--- a/lib/Target/Mips/Mips16HardFloat.cpp
+++ b/lib/Target/Mips/Mips16HardFloat.cpp
@@ -343,7 +343,7 @@ static void assureFPCallStub(Function &F, Module *M,
 //
 // Functions that are llvm intrinsics and don't need helpers.
 //
-static const char *IntrinsicInline[] = {
+static const char *const IntrinsicInline[] = {
   "fabs", "fabsf",
   "llvm.ceil.f32", "llvm.ceil.f64",
   "llvm.copysign.f32", "llvm.copysign.f64",
@@ -395,7 +395,7 @@ static bool fixupFPReturnAndCall(Function &F, Module *M,
         Type *T = RVal->getType();
         FPReturnVariant RV = whichFPReturnVariant(T);
         if (RV == NoFPRet) continue;
-        static const char* Helper[NoFPRet] = {
+        static const char *const Helper[NoFPRet] = {
           "__mips16_ret_sf", "__mips16_ret_df", "__mips16_ret_sc",
           "__mips16_ret_dc"
         };

diff --git a/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp b/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
index d90911a423e708c6893fd86f7a9a0f96226893b6..bbbe15643353721c99acf808f99ddf7040be8fd3 100644 (file)
--- a/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
+++ b/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
@@ -98,7 +98,7 @@ public:
 
 };
 
-  static unsigned IntRegs[32] = {
+  static const unsigned IntRegs[32] = {
     Sparc::G0, Sparc::G1, Sparc::G2, Sparc::G3,
     Sparc::G4, Sparc::G5, Sparc::G6, Sparc::G7,
     Sparc::O0, Sparc::O1, Sparc::O2, Sparc::O3,
@@ -108,7 +108,7 @@ public:
     Sparc::I0, Sparc::I1, Sparc::I2, Sparc::I3,
     Sparc::I4, Sparc::I5, Sparc::I6, Sparc::I7 };
 
-  static unsigned FloatRegs[32] = {
+  static const unsigned FloatRegs[32] = {
     Sparc::F0,  Sparc::F1,  Sparc::F2,  Sparc::F3,
     Sparc::F4,  Sparc::F5,  Sparc::F6,  Sparc::F7,
     Sparc::F8,  Sparc::F9,  Sparc::F10, Sparc::F11,
@@ -118,7 +118,7 @@ public:
     Sparc::F24, Sparc::F25, Sparc::F26, Sparc::F27,
     Sparc::F28, Sparc::F29, Sparc::F30, Sparc::F31 };
 
-  static unsigned DoubleRegs[32] = {
+  static const unsigned DoubleRegs[32] = {
     Sparc::D0,  Sparc::D1,  Sparc::D2,  Sparc::D3,
     Sparc::D4,  Sparc::D5,  Sparc::D6,  Sparc::D7,
     Sparc::D8,  Sparc::D7,  Sparc::D8,  Sparc::D9,
@@ -128,13 +128,13 @@ public:
     Sparc::D24, Sparc::D25, Sparc::D26, Sparc::D27,
     Sparc::D28, Sparc::D29, Sparc::D30, Sparc::D31 };
 
-  static unsigned QuadFPRegs[32] = {
+  static const unsigned QuadFPRegs[32] = {
     Sparc::Q0,  Sparc::Q1,  Sparc::Q2,  Sparc::Q3,
     Sparc::Q4,  Sparc::Q5,  Sparc::Q6,  Sparc::Q7,
     Sparc::Q8,  Sparc::Q9,  Sparc::Q10, Sparc::Q11,
     Sparc::Q12, Sparc::Q13, Sparc::Q14, Sparc::Q15 };
 
-  static unsigned ASRRegs[32] = {
+  static const unsigned ASRRegs[32] = {
     SP::Y,     SP::ASR1,  SP::ASR2,  SP::ASR3,
     SP::ASR4,  SP::ASR5,  SP::ASR6, SP::ASR7,
     SP::ASR8,  SP::ASR9,  SP::ASR10, SP::ASR11,
@@ -144,7 +144,7 @@ public:
     SP::ASR24, SP::ASR25, SP::ASR26, SP::ASR27,
     SP::ASR28, SP::ASR29, SP::ASR30, SP::ASR31};
 
-  static unsigned IntPairRegs[] = {
+  static const unsigned IntPairRegs[] = {
     Sparc::G0_G1, Sparc::G2_G3, Sparc::G4_G5, Sparc::G6_G7,
     Sparc::O0_O1, Sparc::O2_O3, Sparc::O4_O5, Sparc::O6_O7,
     Sparc::L0_L1, Sparc::L2_L3, Sparc::L4_L5, Sparc::L6_L7,

diff --git a/lib/Target/TargetRecip.cpp b/lib/Target/TargetRecip.cpp
index 4f68f36ff36c42befcfc7906801a0899e960b289..d41b6436928b678c397c5d25ac58ec9008989ce8 100644 (file)
--- a/lib/Target/TargetRecip.cpp
+++ b/lib/Target/TargetRecip.cpp
@@ -26,7 +26,7 @@ using namespace llvm;
 // the key strings for queries and command-line inputs.
 // In addition, the command-line interface recognizes the global parameters
 // "all", "none", and "default".
-static const char *RecipOps[] = {
+static const char *const RecipOps[] = {
   "divd",
   "divf",
   "vec-divd",

diff --git a/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp b/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
index 2e44ac949b2cff4736280fb651c4e55492229b9b..aaf267af5311df5154cc2bdb825c98e6300ac10c 100644 (file)
--- a/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
+++ b/lib/Target/XCore/Disassembler/XCoreDisassembler.cpp
@@ -224,7 +224,7 @@ static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val,
                                       uint64_t Address, const void *Decoder) {
   if (Val > 11)
     return MCDisassembler::Fail;
-  static unsigned Values[] = {
+  static const unsigned Values[] = {
     32 /*bpw*/, 1, 2, 3, 4, 5, 6, 7, 8, 16, 24, 32
   };
   Inst.addOperand(MCOperand::createImm(Values[Val]));

diff --git a/tools/llvm-readobj/ARMAttributeParser.cpp b/tools/llvm-readobj/ARMAttributeParser.cpp
index 20598871a32bc352a6d380cd3939a240ead724f2..688d349d7ec03be7a369906d4d35eac740c8f68b 100644 (file)
--- a/tools/llvm-readobj/ARMAttributeParser.cpp
+++ b/tools/llvm-readobj/ARMAttributeParser.cpp
@@ -118,7 +118,7 @@ void ARMAttributeParser::PrintAttribute(unsigned Tag, unsigned Value,
 
 void ARMAttributeParser::CPU_arch(AttrType Tag, const uint8_t *Data,
                                   uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "Pre-v4", "ARM v4", "ARM v4T", "ARM v5T", "ARM v5TE", "ARM v5TEJ", "ARM v6",
     "ARM v6KZ", "ARM v6T2", "ARM v6K", "ARM v7", "ARM v6-M", "ARM v6S-M",
     "ARM v7E-M", "ARM v8"
@@ -149,7 +149,7 @@ void ARMAttributeParser::CPU_arch_profile(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ARM_ISA_use(AttrType Tag, const uint8_t *Data,
                                      uint32_t &Offset) {
-  static const char *Strings[] = { "Not Permitted", "Permitted" };
+  static const char *const Strings[] = { "Not Permitted", "Permitted" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -159,7 +159,7 @@ void ARMAttributeParser::ARM_ISA_use(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::THUMB_ISA_use(AttrType Tag, const uint8_t *Data,
                                        uint32_t &Offset) {
-  static const char *Strings[] = { "Not Permitted", "Thumb-1", "Thumb-2" };
+  static const char *const Strings[] = { "Not Permitted", "Thumb-1", "Thumb-2" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -169,7 +169,7 @@ void ARMAttributeParser::THUMB_ISA_use(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::FP_arch(AttrType Tag, const uint8_t *Data,
                                  uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "Not Permitted", "VFPv1", "VFPv2", "VFPv3", "VFPv3-D16", "VFPv4",
     "VFPv4-D16", "ARMv8-a FP", "ARMv8-a FP-D16"
   };
@@ -182,7 +182,7 @@ void ARMAttributeParser::FP_arch(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::WMMX_arch(AttrType Tag, const uint8_t *Data,
                                    uint32_t &Offset) {
-  static const char *Strings[] = { "Not Permitted", "WMMXv1", "WMMXv2" };
+  static const char *const Strings[] = { "Not Permitted", "WMMXv1", "WMMXv2" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -192,7 +192,7 @@ void ARMAttributeParser::WMMX_arch(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::Advanced_SIMD_arch(AttrType Tag, const uint8_t *Data,
                                             uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "Not Permitted", "NEONv1", "NEONv2+FMA", "ARMv8-a NEON", "ARMv8.1-a NEON"
   };
 
@@ -204,7 +204,7 @@ void ARMAttributeParser::Advanced_SIMD_arch(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::PCS_config(AttrType Tag, const uint8_t *Data,
                                     uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "None", "Bare Platform", "Linux Application", "Linux DSO", "Palm OS 2004",
     "Reserved (Palm OS)", "Symbian OS 2004", "Reserved (Symbian OS)"
   };
@@ -217,7 +217,7 @@ void ARMAttributeParser::PCS_config(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_PCS_R9_use(AttrType Tag, const uint8_t *Data,
                                         uint32_t &Offset) {
-  static const char *Strings[] = { "v6", "Static Base", "TLS", "Unused" };
+  static const char *const Strings[] = { "v6", "Static Base", "TLS", "Unused" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -227,7 +227,7 @@ void ARMAttributeParser::ABI_PCS_R9_use(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_PCS_RW_data(AttrType Tag, const uint8_t *Data,
                                          uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "Absolute", "PC-relative", "SB-relative", "Not Permitted"
   };
 
@@ -239,7 +239,9 @@ void ARMAttributeParser::ABI_PCS_RW_data(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_PCS_RO_data(AttrType Tag, const uint8_t *Data,
                                          uint32_t &Offset) {
-  static const char *Strings[] = { "Absolute", "PC-relative", "Not Permitted" };
+  static const char *const Strings[] = {
+    "Absolute", "PC-relative", "Not Permitted"
+  };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -249,7 +251,9 @@ void ARMAttributeParser::ABI_PCS_RO_data(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_PCS_GOT_use(AttrType Tag, const uint8_t *Data,
                                          uint32_t &Offset) {
-  static const char *Strings[] = { "Not Permitted", "Direct", "GOT-Indirect" };
+  static const char *const Strings[] = {
+    "Not Permitted", "Direct", "GOT-Indirect"
+  };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -259,7 +263,7 @@ void ARMAttributeParser::ABI_PCS_GOT_use(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_PCS_wchar_t(AttrType Tag, const uint8_t *Data,
                                          uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "Not Permitted", "Unknown", "2-byte", "Unknown", "4-byte"
   };
 
@@ -271,7 +275,7 @@ void ARMAttributeParser::ABI_PCS_wchar_t(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_FP_rounding(AttrType Tag, const uint8_t *Data,
                                          uint32_t &Offset) {
-  static const char *Strings[] = { "IEEE-754", "Runtime" };
+  static const char *const Strings[] = { "IEEE-754", "Runtime" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -281,7 +285,9 @@ void ARMAttributeParser::ABI_FP_rounding(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_FP_denormal(AttrType Tag, const uint8_t *Data,
                                          uint32_t &Offset) {
-  static const char *Strings[] = { "Unsupported", "IEEE-754", "Sign Only" };
+  static const char *const Strings[] = {
+    "Unsupported", "IEEE-754", "Sign Only"
+  };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -291,7 +297,7 @@ void ARMAttributeParser::ABI_FP_denormal(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_FP_exceptions(AttrType Tag, const uint8_t *Data,
                                            uint32_t &Offset) {
-  static const char *Strings[] = { "Not Permitted", "IEEE-754" };
+  static const char *const Strings[] = { "Not Permitted", "IEEE-754" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -302,7 +308,7 @@ void ARMAttributeParser::ABI_FP_exceptions(AttrType Tag, const uint8_t *Data,
 void ARMAttributeParser::ABI_FP_user_exceptions(AttrType Tag,
                                                 const uint8_t *Data,
                                                 uint32_t &Offset) {
-  static const char *Strings[] = { "Not Permitted", "IEEE-754" };
+  static const char *const Strings[] = { "Not Permitted", "IEEE-754" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -312,7 +318,7 @@ void ARMAttributeParser::ABI_FP_user_exceptions(AttrType Tag,
 
 void ARMAttributeParser::ABI_FP_number_model(AttrType Tag, const uint8_t *Data,
                                              uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "Not Permitted", "Finite Only", "RTABI", "IEEE-754"
   };
 
@@ -324,7 +330,7 @@ void ARMAttributeParser::ABI_FP_number_model(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_align_needed(AttrType Tag, const uint8_t *Data,
                                           uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "Not Permitted", "8-byte alignment", "4-byte alignment", "Reserved"
   };
 
@@ -344,7 +350,7 @@ void ARMAttributeParser::ABI_align_needed(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_align_preserved(AttrType Tag, const uint8_t *Data,
                                              uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "Not Required", "8-byte data alignment", "8-byte data and code alignment",
     "Reserved"
   };
@@ -365,7 +371,7 @@ void ARMAttributeParser::ABI_align_preserved(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_enum_size(AttrType Tag, const uint8_t *Data,
                                        uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "Not Permitted", "Packed", "Int32", "External Int32"
   };
 
@@ -377,7 +383,7 @@ void ARMAttributeParser::ABI_enum_size(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_HardFP_use(AttrType Tag, const uint8_t *Data,
                                         uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "Tag_FP_arch", "Single-Precision", "Reserved", "Tag_FP_arch (deprecated)"
   };
 
@@ -389,7 +395,7 @@ void ARMAttributeParser::ABI_HardFP_use(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_VFP_args(AttrType Tag, const uint8_t *Data,
                                       uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "AAPCS", "AAPCS VFP", "Custom", "Not Permitted"
   };
 
@@ -401,7 +407,7 @@ void ARMAttributeParser::ABI_VFP_args(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_WMMX_args(AttrType Tag, const uint8_t *Data,
                                        uint32_t &Offset) {
-  static const char *Strings[] = { "AAPCS", "iWMMX", "Custom" };
+  static const char *const Strings[] = { "AAPCS", "iWMMX", "Custom" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -412,7 +418,7 @@ void ARMAttributeParser::ABI_WMMX_args(AttrType Tag, const uint8_t *Data,
 void ARMAttributeParser::ABI_optimization_goals(AttrType Tag,
                                                 const uint8_t *Data,
                                                 uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "None", "Speed", "Aggressive Speed", "Size", "Aggressive Size", "Debugging",
     "Best Debugging"
   };
@@ -426,7 +432,7 @@ void ARMAttributeParser::ABI_optimization_goals(AttrType Tag,
 void ARMAttributeParser::ABI_FP_optimization_goals(AttrType Tag,
                                                    const uint8_t *Data,
                                                    uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "None", "Speed", "Aggressive Speed", "Size", "Aggressive Size", "Accuracy",
     "Best Accuracy"
   };
@@ -461,7 +467,7 @@ void ARMAttributeParser::compatibility(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::CPU_unaligned_access(AttrType Tag, const uint8_t *Data,
                                               uint32_t &Offset) {
-  static const char *Strings[] = { "Not Permitted", "v6-style" };
+  static const char *const Strings[] = { "Not Permitted", "v6-style" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -471,7 +477,7 @@ void ARMAttributeParser::CPU_unaligned_access(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::FP_HP_extension(AttrType Tag, const uint8_t *Data,
                                          uint32_t &Offset) {
-  static const char *Strings[] = { "If Available", "Permitted" };
+  static const char *const Strings[] = { "If Available", "Permitted" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -481,7 +487,7 @@ void ARMAttributeParser::FP_HP_extension(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::ABI_FP_16bit_format(AttrType Tag, const uint8_t *Data,
                                              uint32_t &Offset) {
-  static const char *Strings[] = { "Not Permitted", "IEEE-754", "VFPv3" };
+  static const char *const Strings[] = { "Not Permitted", "IEEE-754", "VFPv3" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -491,7 +497,7 @@ void ARMAttributeParser::ABI_FP_16bit_format(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::MPextension_use(AttrType Tag, const uint8_t *Data,
                                          uint32_t &Offset) {
-  static const char *Strings[] = { "Not Permitted", "Permitted" };
+  static const char *const Strings[] = { "Not Permitted", "Permitted" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -501,7 +507,7 @@ void ARMAttributeParser::MPextension_use(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::DIV_use(AttrType Tag, const uint8_t *Data,
                                  uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "If Available", "Not Permitted", "Permitted"
   };
 
@@ -513,7 +519,7 @@ void ARMAttributeParser::DIV_use(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::T2EE_use(AttrType Tag, const uint8_t *Data,
                                   uint32_t &Offset) {
-  static const char *Strings[] = { "Not Permitted", "Permitted" };
+  static const char *const Strings[] = { "Not Permitted", "Permitted" };
 
   uint64_t Value = ParseInteger(Data, Offset);
   StringRef ValueDesc =
@@ -523,7 +529,7 @@ void ARMAttributeParser::T2EE_use(AttrType Tag, const uint8_t *Data,
 
 void ARMAttributeParser::Virtualization_use(AttrType Tag, const uint8_t *Data,
                                             uint32_t &Offset) {
-  static const char *Strings[] = {
+  static const char *const Strings[] = {
     "Not Permitted", "TrustZone", "Virtualization Extensions",
     "TrustZone + Virtualization Extensions"
   };