generalize this code so that fast isel handles integer truncates to i1, which

codegen to the same thing as integer truncates to i8 (the top bits are
just undefined).  This implements rdar://6667338

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@66902 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index 61ca24e2b231bcd79653cd7f6ce3ed1977ac1c3d..d6cdc3fb64a45302bcb8614958edbfe0b976d88a 100644 (file)
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -1002,7 +1002,9 @@ bool X86FastISel::X86SelectTrunc(Instruction *I) {
     return false;
   MVT SrcVT = TLI.getValueType(I->getOperand(0)->getType());
   MVT DstVT = TLI.getValueType(I->getType());
-  if (DstVT != MVT::i8)
+  
+  // This code only handles truncation to byte right now.
+  if (DstVT != MVT::i8 && DstVT != MVT::i1)
     // All other cases should be handled by the tblgen generated code.
     return false;
   if (SrcVT != MVT::i16 && SrcVT != MVT::i32)
@@ -1022,7 +1024,7 @@ bool X86FastISel::X86SelectTrunc(Instruction *I) {
   BuildMI(MBB, DL, TII.get(CopyOpc), CopyReg).addReg(InputReg);
 
   // Then issue an extract_subreg.
-  unsigned ResultReg = FastEmitInst_extractsubreg(DstVT.getSimpleVT(),
+  unsigned ResultReg = FastEmitInst_extractsubreg(MVT::i8,
                                                   CopyReg, X86::SUBREG_8BIT);
   if (!ResultReg)
     return false;