ARM: shmobile: Remove legacy SoC code for R-Mobile A1
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 17 Jun 2015 09:31:24 +0000 (11:31 +0200)
committerSimon Horman <horms+renesas@verge.net.au>
Mon, 6 Jul 2015 00:29:10 +0000 (09:29 +0900)
The last user of the R-Mobile A1 (r8a7740) legacy SoC code was the
Armadillo-800 EVA legacy board code, which has been removed.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
[horms: resolved trivial conflicts with v4.2-rc1]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/Makefile
arch/arm/mach-shmobile/clock-r8a7740.c [deleted file]
arch/arm/mach-shmobile/pm-r8a7740.c [deleted file]
arch/arm/mach-shmobile/r8a7740.h [deleted file]
arch/arm/mach-shmobile/setup-r8a7740.c

index 49d455c0c39e6ef854678b53a264a1109d99676b..bfe92bc96a47eed0a534411f24db28e7c1f048a6 100644 (file)
@@ -103,13 +103,6 @@ if ARCH_SHMOBILE_LEGACY
 
 comment "Renesas ARM SoCs System Type"
 
-config ARCH_R8A7740
-       bool "R-Mobile A1 (R8A77400)"
-       select ARCH_RMOBILE
-       select ARCH_WANT_OPTIONAL_GPIOLIB
-       select ARM_GIC
-       select RENESAS_INTC_IRQPIN
-
 config ARCH_R8A7778
        bool "R-Car M1A (R8A77781)"
        select ARCH_RCAR_GEN1
index 548536fcb3b1b1eb44a819db115adce9470e2952..726c219e5b138547cfdc72f78cfcb81865c3e241 100644 (file)
@@ -8,7 +8,7 @@ obj-y                           := timer.o console.o
 # CPU objects
 obj-$(CONFIG_ARCH_SH73A0)      += setup-sh73a0.o
 obj-$(CONFIG_ARCH_R8A73A4)     += setup-r8a73a4.o
-obj-$(CONFIG_ARCH_R8A7740)     += setup-r8a7740.o pm-r8a7740.o
+obj-$(CONFIG_ARCH_R8A7740)     += setup-r8a7740.o
 obj-$(CONFIG_ARCH_R8A7778)     += setup-r8a7778.o
 obj-$(CONFIG_ARCH_R8A7779)     += setup-r8a7779.o pm-r8a7779.o
 obj-$(CONFIG_ARCH_R8A7790)     += setup-r8a7790.o
@@ -20,7 +20,6 @@ obj-$(CONFIG_ARCH_R7S72100)   += setup-r7s72100.o
 # Clock objects
 ifndef CONFIG_COMMON_CLK
 obj-y                          += clock.o
-obj-$(CONFIG_ARCH_R8A7740)     += clock-r8a7740.o
 obj-$(CONFIG_ARCH_R8A7778)     += clock-r8a7778.o
 obj-$(CONFIG_ARCH_R8A7779)     += clock-r8a7779.o
 endif
diff --git a/arch/arm/mach-shmobile/clock-r8a7740.c b/arch/arm/mach-shmobile/clock-r8a7740.c
deleted file mode 100644 (file)
index 9cac824..0000000
+++ /dev/null
@@ -1,675 +0,0 @@
-/*
- * R8A7740 processor support
- *
- * Copyright (C) 2011  Renesas Solutions Corp.
- * Copyright (C) 2011  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#include <linux/init.h>
-#include <linux/kernel.h>
-#include <linux/io.h>
-#include <linux/sh_clk.h>
-#include <linux/clkdev.h>
-
-#include "clock.h"
-#include "common.h"
-#include "r8a7740.h"
-
-/*
- *        |  MDx  |  XTAL1/EXTAL1   |  System   | EXTALR |
- *  Clock |-------+-----------------+  clock    | 32.768 |   RCLK
- *  Mode  | 2/1/0 | src         MHz |  source   |  KHz   |  source
- * -------+-------+-----------------+-----------+--------+----------
- *    0   | 0 0 0 | External  20~50 | XTAL1     |    O   |  EXTALR
- *    1   | 0 0 1 | Crystal   20~30 | XTAL1     |    O   |  EXTALR
- *    2   | 0 1 0 | External  40~50 | XTAL1 / 2 |    O   |  EXTALR
- *    3   | 0 1 1 | Crystal   40~50 | XTAL1 / 2 |    O   |  EXTALR
- *    4   | 1 0 0 | External  20~50 | XTAL1     |    x   |  XTAL1 / 1024
- *    5   | 1 0 1 | Crystal   20~30 | XTAL1     |    x   |  XTAL1 / 1024
- *    6   | 1 1 0 | External  40~50 | XTAL1 / 2 |    x   |  XTAL1 / 2048
- *    7   | 1 1 1 | Crystal   40~50 | XTAL1 / 2 |    x   |  XTAL1 / 2048
- */
-
-/* CPG registers */
-#define FRQCRA         IOMEM(0xe6150000)
-#define FRQCRB         IOMEM(0xe6150004)
-#define VCLKCR1                IOMEM(0xE6150008)
-#define VCLKCR2                IOMEM(0xE615000c)
-#define FRQCRC         IOMEM(0xe61500e0)
-#define FSIACKCR       IOMEM(0xe6150018)
-#define PLLC01CR       IOMEM(0xe6150028)
-
-#define SUBCKCR                IOMEM(0xe6150080)
-#define USBCKCR                IOMEM(0xe615008c)
-
-#define MSTPSR0                IOMEM(0xe6150030)
-#define MSTPSR1                IOMEM(0xe6150038)
-#define MSTPSR2                IOMEM(0xe6150040)
-#define MSTPSR3                IOMEM(0xe6150048)
-#define MSTPSR4                IOMEM(0xe615004c)
-#define FSIBCKCR       IOMEM(0xe6150090)
-#define HDMICKCR       IOMEM(0xe6150094)
-#define SMSTPCR0       IOMEM(0xe6150130)
-#define SMSTPCR1       IOMEM(0xe6150134)
-#define SMSTPCR2       IOMEM(0xe6150138)
-#define SMSTPCR3       IOMEM(0xe615013c)
-#define SMSTPCR4       IOMEM(0xe6150140)
-
-#define FSIDIVA                IOMEM(0xFE1F8000)
-#define FSIDIVB                IOMEM(0xFE1F8008)
-
-/* Fixed 32 KHz root clock from EXTALR pin */
-static struct clk extalr_clk = {
-       .rate   = 32768,
-};
-
-/*
- * 25MHz default rate for the EXTAL1 root input clock.
- * If needed, reset this with clk_set_rate() from the platform code.
- */
-static struct clk extal1_clk = {
-       .rate   = 25000000,
-};
-
-/*
- * 48MHz default rate for the EXTAL2 root input clock.
- * If needed, reset this with clk_set_rate() from the platform code.
- */
-static struct clk extal2_clk = {
-       .rate   = 48000000,
-};
-
-/*
- * 27MHz default rate for the DV_CLKI root input clock.
- * If needed, reset this with clk_set_rate() from the platform code.
- */
-static struct clk dv_clk = {
-       .rate   = 27000000,
-};
-
-SH_CLK_RATIO(div2,     1, 2);
-SH_CLK_RATIO(div1k,    1, 1024);
-
-SH_FIXED_RATIO_CLK(extal1_div2_clk,    extal1_clk,             div2);
-SH_FIXED_RATIO_CLK(extal1_div1024_clk, extal1_clk,             div1k);
-SH_FIXED_RATIO_CLK(extal1_div2048_clk, extal1_div2_clk,        div1k);
-SH_FIXED_RATIO_CLK(extal2_div2_clk,    extal2_clk,             div2);
-
-static struct sh_clk_ops followparent_clk_ops = {
-       .recalc = followparent_recalc,
-};
-
-/* Main clock */
-static struct clk system_clk = {
-       .ops    = &followparent_clk_ops,
-};
-
-SH_FIXED_RATIO_CLK(system_div2_clk, system_clk,        div2);
-
-/* r_clk */
-static struct clk r_clk = {
-       .ops    = &followparent_clk_ops,
-};
-
-/* PLLC0/PLLC1 */
-static unsigned long pllc01_recalc(struct clk *clk)
-{
-       unsigned long mult = 1;
-
-       if (__raw_readl(PLLC01CR) & (1 << 14))
-               mult = ((__raw_readl(clk->enable_reg) >> 24) & 0x7f) + 1;
-
-       return clk->parent->rate * mult;
-}
-
-static struct sh_clk_ops pllc01_clk_ops = {
-       .recalc         = pllc01_recalc,
-};
-
-static struct clk pllc0_clk = {
-       .ops            = &pllc01_clk_ops,
-       .flags          = CLK_ENABLE_ON_INIT,
-       .parent         = &system_clk,
-       .enable_reg     = (void __iomem *)FRQCRC,
-};
-
-static struct clk pllc1_clk = {
-       .ops            = &pllc01_clk_ops,
-       .flags          = CLK_ENABLE_ON_INIT,
-       .parent         = &system_div2_clk,
-       .enable_reg     = (void __iomem *)FRQCRA,
-};
-
-/* PLLC1 / 2 */
-SH_FIXED_RATIO_CLK(pllc1_div2_clk, pllc1_clk, div2);
-
-/* USB clock */
-/*
- * USBCKCR is controlling usb24 clock
- * bit[7] : parent clock
- * bit[6] : clock divide rate
- * And this bit[7] is used as a "usb24s" from other devices.
- * (Video clock / Sub clock / SPU clock)
- * You can controll this clock as a below.
- *
- * struct clk *usb24   = clk_get(dev,  "usb24");
- * struct clk *usb24s  = clk_get(NULL, "usb24s");
- * struct clk *system  = clk_get(NULL, "system_clk");
- * int rate = clk_get_rate(system);
- *
- * clk_set_parent(usb24s, system);  // for bit[7]
- * clk_set_rate(usb24, rate / 2);   // for bit[6]
- */
-static struct clk *usb24s_parents[] = {
-       [0] = &system_clk,
-       [1] = &extal2_clk
-};
-
-static int usb24s_enable(struct clk *clk)
-{
-       __raw_writel(__raw_readl(USBCKCR) & ~(1 << 8), USBCKCR);
-
-       return 0;
-}
-
-static void usb24s_disable(struct clk *clk)
-{
-       __raw_writel(__raw_readl(USBCKCR) | (1 << 8), USBCKCR);
-}
-
-static int usb24s_set_parent(struct clk *clk, struct clk *parent)
-{
-       int i, ret;
-       u32 val;
-
-       if (!clk->parent_table || !clk->parent_num)
-               return -EINVAL;
-
-       /* Search the parent */
-       for (i = 0; i < clk->parent_num; i++)
-               if (clk->parent_table[i] == parent)
-                       break;
-
-       if (i == clk->parent_num)
-               return -ENODEV;
-
-       ret = clk_reparent(clk, parent);
-       if (ret < 0)
-               return ret;
-
-       val = __raw_readl(USBCKCR);
-       val &= ~(1 << 7);
-       val |= i << 7;
-       __raw_writel(val, USBCKCR);
-
-       return 0;
-}
-
-static struct sh_clk_ops usb24s_clk_ops = {
-       .recalc         = followparent_recalc,
-       .enable         = usb24s_enable,
-       .disable        = usb24s_disable,
-       .set_parent     = usb24s_set_parent,
-};
-
-static struct clk usb24s_clk = {
-       .ops            = &usb24s_clk_ops,
-       .parent_table   = usb24s_parents,
-       .parent_num     = ARRAY_SIZE(usb24s_parents),
-       .parent         = &system_clk,
-};
-
-static unsigned long usb24_recalc(struct clk *clk)
-{
-       return clk->parent->rate /
-               ((__raw_readl(USBCKCR) & (1 << 6)) ? 1 : 2);
-};
-
-static int usb24_set_rate(struct clk *clk, unsigned long rate)
-{
-       u32 val;
-
-       /* closer to which ? parent->rate or parent->rate/2 */
-       val = __raw_readl(USBCKCR);
-       val &= ~(1 << 6);
-       val |= (rate > (clk->parent->rate / 4) * 3) << 6;
-       __raw_writel(val, USBCKCR);
-
-       return 0;
-}
-
-static struct sh_clk_ops usb24_clk_ops = {
-       .recalc         = usb24_recalc,
-       .set_rate       = usb24_set_rate,
-};
-
-static struct clk usb24_clk = {
-       .ops            = &usb24_clk_ops,
-       .parent         = &usb24s_clk,
-};
-
-/* External FSIACK/FSIBCK clock */
-static struct clk fsiack_clk = {
-};
-
-static struct clk fsibck_clk = {
-};
-
-static struct clk *main_clks[] = {
-       &extalr_clk,
-       &extal1_clk,
-       &extal2_clk,
-       &extal1_div2_clk,
-       &extal1_div1024_clk,
-       &extal1_div2048_clk,
-       &extal2_div2_clk,
-       &dv_clk,
-       &system_clk,
-       &system_div2_clk,
-       &r_clk,
-       &pllc0_clk,
-       &pllc1_clk,
-       &pllc1_div2_clk,
-       &usb24s_clk,
-       &usb24_clk,
-       &fsiack_clk,
-       &fsibck_clk,
-};
-
-/* DIV4 clocks */
-static void div4_kick(struct clk *clk)
-{
-       unsigned long value;
-
-       /* set KICK bit in FRQCRB to update hardware setting */
-       value = __raw_readl(FRQCRB);
-       value |= (1 << 31);
-       __raw_writel(value, FRQCRB);
-}
-
-static int divisors[] = { 2, 3, 4, 6, 8, 12, 16, 18,
-                         24, 32, 36, 48, 0, 72, 96, 0 };
-
-static struct clk_div_mult_table div4_div_mult_table = {
-       .divisors = divisors,
-       .nr_divisors = ARRAY_SIZE(divisors),
-};
-
-static struct clk_div4_table div4_table = {
-       .div_mult_table = &div4_div_mult_table,
-       .kick = div4_kick,
-};
-
-enum {
-       DIV4_I, DIV4_ZG, DIV4_B, DIV4_M1, DIV4_HP,
-       DIV4_HPP, DIV4_USBP, DIV4_S, DIV4_ZB, DIV4_M3, DIV4_CP,
-       DIV4_NR
-};
-
-static struct clk div4_clks[DIV4_NR] = {
-       [DIV4_I]        = SH_CLK_DIV4(&pllc1_clk, FRQCRA, 20, 0x6fff, CLK_ENABLE_ON_INIT),
-       [DIV4_ZG]       = SH_CLK_DIV4(&pllc1_clk, FRQCRA, 16, 0x6fff, CLK_ENABLE_ON_INIT),
-       [DIV4_B]        = SH_CLK_DIV4(&pllc1_clk, FRQCRA,  8, 0x6fff, CLK_ENABLE_ON_INIT),
-       [DIV4_M1]       = SH_CLK_DIV4(&pllc1_clk, FRQCRA,  4, 0x6fff, CLK_ENABLE_ON_INIT),
-       [DIV4_HP]       = SH_CLK_DIV4(&pllc1_clk, FRQCRB,  4, 0x6fff, 0),
-       [DIV4_HPP]      = SH_CLK_DIV4(&pllc1_clk, FRQCRC, 20, 0x6fff, 0),
-       [DIV4_USBP]     = SH_CLK_DIV4(&pllc1_clk, FRQCRC, 16, 0x6fff, 0),
-       [DIV4_S]        = SH_CLK_DIV4(&pllc1_clk, FRQCRC, 12, 0x6fff, 0),
-       [DIV4_ZB]       = SH_CLK_DIV4(&pllc1_clk, FRQCRC,  8, 0x6fff, 0),
-       [DIV4_M3]       = SH_CLK_DIV4(&pllc1_clk, FRQCRC,  4, 0x6fff, 0),
-       [DIV4_CP]       = SH_CLK_DIV4(&pllc1_clk, FRQCRC,  0, 0x6fff, 0),
-};
-
-/* DIV6 reparent */
-enum {
-       DIV6_HDMI,
-       DIV6_VCLK1, DIV6_VCLK2,
-       DIV6_FSIA, DIV6_FSIB,
-       DIV6_REPARENT_NR,
-};
-
-static struct clk *hdmi_parent[] = {
-       [0] = &pllc1_div2_clk,
-       [1] = &system_clk,
-       [2] = &dv_clk
-};
-
-static struct clk *vclk_parents[8] = {
-       [0] = &pllc1_div2_clk,
-       [2] = &dv_clk,
-       [3] = &usb24s_clk,
-       [4] = &extal1_div2_clk,
-       [5] = &extalr_clk,
-};
-
-static struct clk *fsia_parents[] = {
-       [0] = &pllc1_div2_clk,
-       [1] = &fsiack_clk, /* external clock */
-};
-
-static struct clk *fsib_parents[] = {
-       [0] = &pllc1_div2_clk,
-       [1] = &fsibck_clk, /* external clock */
-};
-
-static struct clk div6_reparent_clks[DIV6_REPARENT_NR] = {
-       [DIV6_HDMI] = SH_CLK_DIV6_EXT(HDMICKCR, 0,
-                                     hdmi_parent, ARRAY_SIZE(hdmi_parent), 6, 2),
-       [DIV6_VCLK1] = SH_CLK_DIV6_EXT(VCLKCR1, 0,
-                                      vclk_parents, ARRAY_SIZE(vclk_parents), 12, 3),
-       [DIV6_VCLK2] = SH_CLK_DIV6_EXT(VCLKCR2, 0,
-                                      vclk_parents, ARRAY_SIZE(vclk_parents), 12, 3),
-       [DIV6_FSIA] = SH_CLK_DIV6_EXT(FSIACKCR, 0,
-                                     fsia_parents, ARRAY_SIZE(fsia_parents), 6, 2),
-       [DIV6_FSIB] = SH_CLK_DIV6_EXT(FSIBCKCR, 0,
-                                     fsib_parents, ARRAY_SIZE(fsib_parents), 6, 2),
-};
-
-/* DIV6 clocks */
-enum {
-       DIV6_SUB,
-       DIV6_NR
-};
-
-static struct clk div6_clks[DIV6_NR] = {
-       [DIV6_SUB]      = SH_CLK_DIV6(&pllc1_div2_clk, SUBCKCR, 0),
-};
-
-/* HDMI1/2 clock */
-static unsigned long hdmi12_recalc(struct clk *clk)
-{
-       u32 val = __raw_readl(HDMICKCR);
-       int shift = (int)clk->priv;
-
-       val >>= shift;
-       val &= 0x3;
-
-       return clk->parent->rate / (1 << val);
-};
-
-static int hdmi12_set_rate(struct clk *clk, unsigned long rate)
-{
-       u32 val, mask;
-       int i, shift;
-
-       for (i = 0; i < 3; i++)
-               if (rate == clk->parent->rate / (1 << i))
-                       goto find;
-       return -ENODEV;
-
-find:
-       shift = (int)clk->priv;
-
-       val = __raw_readl(HDMICKCR);
-       mask = ~(0x3 << shift);
-       val = (val & mask) | i << shift;
-       __raw_writel(val, HDMICKCR);
-
-       return 0;
-};
-
-static struct sh_clk_ops hdmi12_clk_ops = {
-       .recalc         = hdmi12_recalc,
-       .set_rate       = hdmi12_set_rate,
-};
-
-static struct clk hdmi1_clk = {
-       .ops            = &hdmi12_clk_ops,
-       .priv           = (void *)9,
-       .parent         = &div6_reparent_clks[DIV6_HDMI],  /* late install */
-};
-
-static struct clk hdmi2_clk = {
-       .ops            = &hdmi12_clk_ops,
-       .priv           = (void *)11,
-       .parent         = &div6_reparent_clks[DIV6_HDMI], /* late install */
-};
-
-static struct clk *late_main_clks[] = {
-       &hdmi1_clk,
-       &hdmi2_clk,
-};
-
-/* FSI DIV */
-enum { FSIDIV_A, FSIDIV_B, FSIDIV_REPARENT_NR };
-
-static struct clk fsidivs[] = {
-       [FSIDIV_A] = SH_CLK_FSIDIV(FSIDIVA, &div6_reparent_clks[DIV6_FSIA]),
-       [FSIDIV_B] = SH_CLK_FSIDIV(FSIDIVB, &div6_reparent_clks[DIV6_FSIB]),
-};
-
-/* MSTP */
-enum {
-       MSTP128, MSTP127, MSTP125,
-       MSTP116, MSTP111, MSTP100, MSTP117,
-
-       MSTP230, MSTP229,
-       MSTP222,
-       MSTP218, MSTP217, MSTP216, MSTP214,
-       MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
-
-       MSTP329, MSTP328, MSTP323, MSTP320,
-       MSTP314, MSTP313, MSTP312,
-       MSTP309, MSTP304,
-
-       MSTP416, MSTP415, MSTP407, MSTP406,
-
-       MSTP_NR
-};
-
-static struct clk mstp_clks[MSTP_NR] = {
-       [MSTP128] = SH_CLK_MSTP32(&div4_clks[DIV4_S],   SMSTPCR1, 28, 0), /* CEU21 */
-       [MSTP127] = SH_CLK_MSTP32(&div4_clks[DIV4_S],   SMSTPCR1, 27, 0), /* CEU20 */
-       [MSTP125] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
-       [MSTP117] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   SMSTPCR1, 17, 0), /* LCDC1 */
-       [MSTP116] = SH_CLK_MSTP32(&div4_clks[DIV4_HPP], SMSTPCR1, 16, 0), /* IIC0 */
-       [MSTP111] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR1, 11, 0), /* TMU1 */
-       [MSTP100] = SH_CLK_MSTP32(&div4_clks[DIV4_B],   SMSTPCR1,  0, 0), /* LCDC0 */
-
-       [MSTP230] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 30, 0), /* SCIFA6 */
-       [MSTP229] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 29, 0), /* INTCA */
-       [MSTP222] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2, 22, 0), /* SCIFA7 */
-       [MSTP218] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 18, 0), /* DMAC1 */
-       [MSTP217] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 17, 0), /* DMAC2 */
-       [MSTP216] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 16, 0), /* DMAC3 */
-       [MSTP214] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR2, 14, 0), /* USBDMAC */
-       [MSTP207] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  7, 0), /* SCIFA5 */
-       [MSTP206] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  6, 0), /* SCIFB */
-       [MSTP204] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  4, 0), /* SCIFA0 */
-       [MSTP203] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  3, 0), /* SCIFA1 */
-       [MSTP202] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  2, 0), /* SCIFA2 */
-       [MSTP201] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  1, 0), /* SCIFA3 */
-       [MSTP200] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR2,  0, 0), /* SCIFA4 */
-
-       [MSTP329] = SH_CLK_MSTP32(&r_clk,               SMSTPCR3, 29, 0), /* CMT10 */
-       [MSTP328] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR3, 28, 0), /* FSI */
-       [MSTP323] = SH_CLK_MSTP32(&div6_clks[DIV6_SUB], SMSTPCR3, 23, 0), /* IIC1 */
-       [MSTP320] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR3, 20, 0), /* USBF */
-       [MSTP314] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR3, 14, 0), /* SDHI0 */
-       [MSTP313] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR3, 13, 0), /* SDHI1 */
-       [MSTP312] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR3, 12, 0), /* MMC */
-       [MSTP309] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR3,  9, 0), /* GEther */
-       [MSTP304] = SH_CLK_MSTP32(&div4_clks[DIV4_CP],  SMSTPCR3,  4, 0), /* TPU0 */
-
-       [MSTP416] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR4, 16, 0), /* USBHOST */
-       [MSTP415] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR4, 15, 0), /* SDHI2 */
-       [MSTP407] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR4,  7, 0), /* USB-Func */
-       [MSTP406] = SH_CLK_MSTP32(&div4_clks[DIV4_HP],  SMSTPCR4,  6, 0), /* USB Phy */
-};
-
-static struct clk_lookup lookups[] = {
-       /* main clocks */
-       CLKDEV_CON_ID("extalr",                 &extalr_clk),
-       CLKDEV_CON_ID("extal1",                 &extal1_clk),
-       CLKDEV_CON_ID("extal2",                 &extal2_clk),
-       CLKDEV_CON_ID("extal1_div2",            &extal1_div2_clk),
-       CLKDEV_CON_ID("extal1_div1024",         &extal1_div1024_clk),
-       CLKDEV_CON_ID("extal1_div2048",         &extal1_div2048_clk),
-       CLKDEV_CON_ID("extal2_div2",            &extal2_div2_clk),
-       CLKDEV_CON_ID("dv_clk",                 &dv_clk),
-       CLKDEV_CON_ID("system_clk",             &system_clk),
-       CLKDEV_CON_ID("system_div2_clk",        &system_div2_clk),
-       CLKDEV_CON_ID("r_clk",                  &r_clk),
-       CLKDEV_CON_ID("pllc0_clk",              &pllc0_clk),
-       CLKDEV_CON_ID("pllc1_clk",              &pllc1_clk),
-       CLKDEV_CON_ID("pllc1_div2_clk",         &pllc1_div2_clk),
-       CLKDEV_CON_ID("usb24s",                 &usb24s_clk),
-       CLKDEV_CON_ID("hdmi1",                  &hdmi1_clk),
-       CLKDEV_CON_ID("hdmi2",                  &hdmi2_clk),
-       CLKDEV_CON_ID("video1",                 &div6_reparent_clks[DIV6_VCLK1]),
-       CLKDEV_CON_ID("video2",                 &div6_reparent_clks[DIV6_VCLK2]),
-       CLKDEV_CON_ID("fsiack",                 &fsiack_clk),
-       CLKDEV_CON_ID("fsibck",                 &fsibck_clk),
-
-       /* DIV4 clocks */
-       CLKDEV_CON_ID("i_clk",                  &div4_clks[DIV4_I]),
-       CLKDEV_CON_ID("zg_clk",                 &div4_clks[DIV4_ZG]),
-       CLKDEV_CON_ID("b_clk",                  &div4_clks[DIV4_B]),
-       CLKDEV_CON_ID("m1_clk",                 &div4_clks[DIV4_M1]),
-       CLKDEV_CON_ID("hp_clk",                 &div4_clks[DIV4_HP]),
-       CLKDEV_CON_ID("hpp_clk",                &div4_clks[DIV4_HPP]),
-       CLKDEV_CON_ID("s_clk",                  &div4_clks[DIV4_S]),
-       CLKDEV_CON_ID("zb_clk",                 &div4_clks[DIV4_ZB]),
-       CLKDEV_CON_ID("m3_clk",                 &div4_clks[DIV4_M3]),
-       CLKDEV_CON_ID("cp_clk",                 &div4_clks[DIV4_CP]),
-
-       /* DIV6 clocks */
-       CLKDEV_CON_ID("sub_clk",                &div6_clks[DIV6_SUB]),
-
-       /* MSTP32 clocks */
-       CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0",    &mstp_clks[MSTP100]),
-       CLKDEV_DEV_ID("i2c-sh_mobile.0",        &mstp_clks[MSTP116]),
-       CLKDEV_DEV_ID("fff20000.i2c",           &mstp_clks[MSTP116]),
-       CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1",    &mstp_clks[MSTP117]),
-       CLKDEV_DEV_ID("sh_mobile_ceu.0",        &mstp_clks[MSTP127]),
-       CLKDEV_DEV_ID("sh_mobile_ceu.1",        &mstp_clks[MSTP128]),
-
-       CLKDEV_DEV_ID("sh-sci.4",               &mstp_clks[MSTP200]),
-       CLKDEV_DEV_ID("e6c80000.serial",        &mstp_clks[MSTP200]),
-       CLKDEV_DEV_ID("sh-sci.3",               &mstp_clks[MSTP201]),
-       CLKDEV_DEV_ID("e6c70000.serial",        &mstp_clks[MSTP201]),
-       CLKDEV_DEV_ID("sh-sci.2",               &mstp_clks[MSTP202]),
-       CLKDEV_DEV_ID("e6c60000.serial",        &mstp_clks[MSTP202]),
-       CLKDEV_DEV_ID("sh-sci.1",               &mstp_clks[MSTP203]),
-       CLKDEV_DEV_ID("e6c50000.serial",        &mstp_clks[MSTP203]),
-       CLKDEV_DEV_ID("sh-sci.0",               &mstp_clks[MSTP204]),
-       CLKDEV_DEV_ID("e6c40000.serial",        &mstp_clks[MSTP204]),
-       CLKDEV_DEV_ID("sh-sci.8",               &mstp_clks[MSTP206]),
-       CLKDEV_DEV_ID("e6c30000.serial",        &mstp_clks[MSTP206]),
-       CLKDEV_DEV_ID("sh-sci.5",               &mstp_clks[MSTP207]),
-       CLKDEV_DEV_ID("e6cb0000.serial",        &mstp_clks[MSTP207]),
-       CLKDEV_DEV_ID("sh-dma-engine.3",        &mstp_clks[MSTP214]),
-       CLKDEV_DEV_ID("sh-dma-engine.2",        &mstp_clks[MSTP216]),
-       CLKDEV_DEV_ID("sh-dma-engine.1",        &mstp_clks[MSTP217]),
-       CLKDEV_DEV_ID("sh-dma-engine.0",        &mstp_clks[MSTP218]),
-       CLKDEV_DEV_ID("sh-sci.7",               &mstp_clks[MSTP222]),
-       CLKDEV_DEV_ID("e6cd0000.serial",        &mstp_clks[MSTP222]),
-       CLKDEV_DEV_ID("renesas_intc_irqpin.0",  &mstp_clks[MSTP229]),
-       CLKDEV_DEV_ID("renesas_intc_irqpin.1",  &mstp_clks[MSTP229]),
-       CLKDEV_DEV_ID("renesas_intc_irqpin.2",  &mstp_clks[MSTP229]),
-       CLKDEV_DEV_ID("renesas_intc_irqpin.3",  &mstp_clks[MSTP229]),
-       CLKDEV_DEV_ID("sh-sci.6",               &mstp_clks[MSTP230]),
-       CLKDEV_DEV_ID("e6cc0000.serial",        &mstp_clks[MSTP230]),
-
-       CLKDEV_DEV_ID("sh_fsi2",                &mstp_clks[MSTP328]),
-       CLKDEV_DEV_ID("fe1f0000.sound",         &mstp_clks[MSTP328]),
-       CLKDEV_DEV_ID("i2c-sh_mobile.1",        &mstp_clks[MSTP323]),
-       CLKDEV_DEV_ID("e6c20000.i2c",           &mstp_clks[MSTP323]),
-       CLKDEV_DEV_ID("renesas_usbhs",          &mstp_clks[MSTP320]),
-       CLKDEV_DEV_ID("sh_mobile_sdhi.0",       &mstp_clks[MSTP314]),
-       CLKDEV_DEV_ID("e6850000.sd",            &mstp_clks[MSTP314]),
-       CLKDEV_DEV_ID("sh_mobile_sdhi.1",       &mstp_clks[MSTP313]),
-       CLKDEV_DEV_ID("e6860000.sd",            &mstp_clks[MSTP313]),
-       CLKDEV_DEV_ID("sh_mmcif",               &mstp_clks[MSTP312]),
-       CLKDEV_DEV_ID("e6bd0000.mmc",           &mstp_clks[MSTP312]),
-       CLKDEV_DEV_ID("r8a7740-gether",         &mstp_clks[MSTP309]),
-       CLKDEV_DEV_ID("e9a00000.ethernet",      &mstp_clks[MSTP309]),
-       CLKDEV_DEV_ID("renesas-tpu-pwm",        &mstp_clks[MSTP304]),
-       CLKDEV_DEV_ID("e6600000.pwm",           &mstp_clks[MSTP304]),
-
-       CLKDEV_DEV_ID("sh_mobile_sdhi.2",       &mstp_clks[MSTP415]),
-       CLKDEV_DEV_ID("e6870000.sd",            &mstp_clks[MSTP415]),
-
-       /* ICK */
-       CLKDEV_ICK_ID("fck",    "sh-tmu.1",             &mstp_clks[MSTP111]),
-       CLKDEV_ICK_ID("fck",    "fff90000.timer",       &mstp_clks[MSTP111]),
-       CLKDEV_ICK_ID("fck",    "sh-tmu.0",             &mstp_clks[MSTP125]),
-       CLKDEV_ICK_ID("fck",    "fff80000.timer",       &mstp_clks[MSTP125]),
-       CLKDEV_ICK_ID("fck",    "sh-cmt-48.1",          &mstp_clks[MSTP329]),
-       CLKDEV_ICK_ID("fck",    "e6138000.timer",       &mstp_clks[MSTP329]),
-       CLKDEV_ICK_ID("host",   "renesas_usbhs",        &mstp_clks[MSTP416]),
-       CLKDEV_ICK_ID("func",   "renesas_usbhs",        &mstp_clks[MSTP407]),
-       CLKDEV_ICK_ID("phy",    "renesas_usbhs",        &mstp_clks[MSTP406]),
-       CLKDEV_ICK_ID("pci",    "renesas_usbhs",        &div4_clks[DIV4_USBP]),
-       CLKDEV_ICK_ID("usb24",  "renesas_usbhs",        &usb24_clk),
-       CLKDEV_ICK_ID("ick",    "sh-mobile-hdmi",       &div6_reparent_clks[DIV6_HDMI]),
-
-       CLKDEV_ICK_ID("icka", "sh_fsi2",        &div6_reparent_clks[DIV6_FSIA]),
-       CLKDEV_ICK_ID("ickb", "sh_fsi2",        &div6_reparent_clks[DIV6_FSIB]),
-       CLKDEV_ICK_ID("diva", "sh_fsi2",        &fsidivs[FSIDIV_A]),
-       CLKDEV_ICK_ID("divb", "sh_fsi2",        &fsidivs[FSIDIV_B]),
-       CLKDEV_ICK_ID("xcka", "sh_fsi2",        &fsiack_clk),
-       CLKDEV_ICK_ID("xckb", "sh_fsi2",        &fsibck_clk),
-};
-
-void __init r8a7740_clock_init(u8 md_ck)
-{
-       int k, ret = 0;
-
-       /* detect system clock parent */
-       if (md_ck & MD_CK1)
-               system_clk.parent = &extal1_div2_clk;
-       else
-               system_clk.parent = &extal1_clk;
-
-       /* detect RCLK parent */
-       switch (md_ck & (MD_CK2 | MD_CK1)) {
-       case MD_CK2 | MD_CK1:
-               r_clk.parent = &extal1_div2048_clk;
-               break;
-       case MD_CK2:
-               r_clk.parent = &extal1_div1024_clk;
-               break;
-       case MD_CK1:
-       default:
-               r_clk.parent = &extalr_clk;
-               break;
-       }
-
-       for (k = 0; !ret && (k < ARRAY_SIZE(main_clks)); k++)
-               ret = clk_register(main_clks[k]);
-
-       if (!ret)
-               ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table);
-
-       if (!ret)
-               ret = sh_clk_div6_register(div6_clks, DIV6_NR);
-
-       if (!ret)
-               ret = sh_clk_div6_reparent_register(div6_reparent_clks,
-                                                   DIV6_REPARENT_NR);
-
-       if (!ret)
-               ret = sh_clk_mstp_register(mstp_clks, MSTP_NR);
-
-       for (k = 0; !ret && (k < ARRAY_SIZE(late_main_clks)); k++)
-               ret = clk_register(late_main_clks[k]);
-
-       if (!ret)
-               ret = sh_clk_fsidiv_register(fsidivs, FSIDIV_REPARENT_NR);
-
-       clkdev_add_table(lookups, ARRAY_SIZE(lookups));
-
-       if (!ret)
-               shmobile_clk_init();
-       else
-               panic("failed to setup r8a7740 clocks\n");
-}
diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c
deleted file mode 100644 (file)
index 34608fc..0000000
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * r8a7740 power management support
- *
- * Copyright (C) 2012  Renesas Solutions Corp.
- * Copyright (C) 2012  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-#include <linux/console.h>
-#include <linux/io.h>
-#include <linux/suspend.h>
-
-#include "common.h"
-#include "pm-rmobile.h"
-
-#define SYSC_BASE      IOMEM(0xe6180000)
-
-#if defined(CONFIG_PM) && !defined(CONFIG_ARCH_MULTIPLATFORM)
-static int r8a7740_pd_a3sm_suspend(void)
-{
-       /*
-        * The A3SM domain contains the CPU core and therefore it should
-        * only be turned off if the CPU is not in use.
-        */
-       return -EBUSY;
-}
-
-static int r8a7740_pd_a3sp_suspend(void)
-{
-       /*
-        * Serial consoles make use of SCIF hardware located in A3SP,
-        * keep such power domain on if "no_console_suspend" is set.
-        */
-       return console_suspend_enabled ? 0 : -EBUSY;
-}
-
-static int r8a7740_pd_d4_suspend(void)
-{
-       /*
-        * The D4 domain contains the Coresight-ETM hardware block and
-        * therefore it should only be turned off if the debug module is
-        * not in use.
-        */
-       return -EBUSY;
-}
-
-static struct rmobile_pm_domain r8a7740_pm_domains[] = {
-       {
-               .genpd.name     = "A4LC",
-               .base           = SYSC_BASE,
-               .bit_shift      = 1,
-       }, {
-               .genpd.name     = "A4MP",
-               .base           = SYSC_BASE,
-               .bit_shift      = 2,
-       }, {
-               .genpd.name     = "D4",
-               .base           = SYSC_BASE,
-               .bit_shift      = 3,
-               .gov            = &pm_domain_always_on_gov,
-               .suspend        = r8a7740_pd_d4_suspend,
-       }, {
-               .genpd.name     = "A4R",
-               .base           = SYSC_BASE,
-               .bit_shift      = 5,
-       }, {
-               .genpd.name     = "A3RV",
-               .base           = SYSC_BASE,
-               .bit_shift      = 6,
-       }, {
-               .genpd.name     = "A4S",
-               .base           = SYSC_BASE,
-               .bit_shift      = 10,
-               .no_debug       = true,
-       }, {
-               .genpd.name     = "A3SP",
-               .base           = SYSC_BASE,
-               .bit_shift      = 11,
-               .gov            = &pm_domain_always_on_gov,
-               .no_debug       = true,
-               .suspend        = r8a7740_pd_a3sp_suspend,
-       }, {
-               .genpd.name     = "A3SM",
-               .base           = SYSC_BASE,
-               .bit_shift      = 12,
-               .gov            = &pm_domain_always_on_gov,
-               .suspend        = r8a7740_pd_a3sm_suspend,
-       }, {
-               .genpd.name     = "A3SG",
-               .base           = SYSC_BASE,
-               .bit_shift      = 13,
-       }, {
-               .genpd.name     = "A4SU",
-               .base           = SYSC_BASE,
-               .bit_shift      = 20,
-       },
-};
-
-void __init r8a7740_init_pm_domains(void)
-{
-       rmobile_init_domains(r8a7740_pm_domains, ARRAY_SIZE(r8a7740_pm_domains));
-       pm_genpd_add_subdomain_names("A4R", "A3RV");
-       pm_genpd_add_subdomain_names("A4S", "A3SP");
-       pm_genpd_add_subdomain_names("A4S", "A3SM");
-       pm_genpd_add_subdomain_names("A4S", "A3SG");
-}
-#endif /* CONFIG_PM && !CONFIG_ARCH_MULTIPLATFORM */
-
-#ifdef CONFIG_SUSPEND
-static int r8a7740_enter_suspend(suspend_state_t suspend_state)
-{
-       cpu_do_idle();
-       return 0;
-}
-
-static void r8a7740_suspend_init(void)
-{
-       shmobile_suspend_ops.enter = r8a7740_enter_suspend;
-}
-#else
-static void r8a7740_suspend_init(void) {}
-#endif
-
-void __init r8a7740_pm_init(void)
-{
-       r8a7740_suspend_init();
-}
diff --git a/arch/arm/mach-shmobile/r8a7740.h b/arch/arm/mach-shmobile/r8a7740.h
deleted file mode 100644 (file)
index ca7805a..0000000
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright (C) 2011  Renesas Solutions Corp.
- * Copyright (C) 2011  Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __ASM_R8A7740_H__
-#define __ASM_R8A7740_H__
-
-/*
- * MD_CKx pin
- */
-#define MD_CK2 (1 << 2)
-#define MD_CK1 (1 << 1)
-#define MD_CK0 (1 << 0)
-
-/* DMA slave IDs */
-enum {
-       SHDMA_SLAVE_INVALID,
-       SHDMA_SLAVE_SDHI0_RX,
-       SHDMA_SLAVE_SDHI0_TX,
-       SHDMA_SLAVE_SDHI1_RX,
-       SHDMA_SLAVE_SDHI1_TX,
-       SHDMA_SLAVE_SDHI2_RX,
-       SHDMA_SLAVE_SDHI2_TX,
-       SHDMA_SLAVE_FSIA_RX,
-       SHDMA_SLAVE_FSIA_TX,
-       SHDMA_SLAVE_FSIB_TX,
-       SHDMA_SLAVE_USBHS_TX,
-       SHDMA_SLAVE_USBHS_RX,
-       SHDMA_SLAVE_MMCIF_TX,
-       SHDMA_SLAVE_MMCIF_RX,
-};
-
-extern void r8a7740_meram_workaround(void);
-extern void r8a7740_init_irq_of(void);
-extern void r8a7740_map_io(void);
-extern void r8a7740_add_early_devices(void);
-extern void r8a7740_add_standard_devices(void);
-extern void r8a7740_clock_init(u8 md_ck);
-extern void r8a7740_pinmux_init(void);
-extern void r8a7740_pm_init(void);
-
-#if defined(CONFIG_PM) && !defined(CONFIG_ARCH_MULTIPLATFORM)
-extern void __init r8a7740_init_pm_domains(void);
-#else
-static inline void r8a7740_init_pm_domains(void) {}
-#endif /* CONFIG_PM && !CONFIG_ARCH_MULTIPLATFORM */
-
-#endif /* __ASM_R8A7740_H__ */
index 00291cc1772df9c5419ffa06ce27fa6b52c9bfd5..a158b0bf77626f536ff2d84648119916acbfe0aa 100644 (file)
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
-#include <linux/dma-mapping.h>
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/io.h>
 #include <linux/irqchip.h>
 #include <linux/irqchip/arm-gic.h>
-#include <linux/platform_data/irq-renesas-intc-irqpin.h>
-#include <linux/platform_device.h>
 #include <linux/of_platform.h>
-#include <linux/serial_sci.h>
-#include <linux/sh_dma.h>
-#include <linux/sh_timer.h>
-#include <linux/platform_data/sh_ipmmu.h>
 
-#include <asm/mach-types.h>
 #include <asm/mach/map.h>
 #include <asm/mach/arch.h>
 #include <asm/mach/time.h>
 #include <asm/hardware/cache-l2x0.h>
 
 #include "common.h"
-#include "dma-register.h"
-#include "irqs.h"
-#include "pm-rmobile.h"
-#include "r8a7740.h"
 
 static struct map_desc r8a7740_io_desc[] __initdata = {
         /*
@@ -64,613 +52,12 @@ static struct map_desc r8a7740_io_desc[] __initdata = {
 #endif
 };
 
-void __init r8a7740_map_io(void)
+static void __init r8a7740_map_io(void)
 {
        debug_ll_io_init();
        iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc));
 }
 
-/* PFC */
-static const struct resource pfc_resources[] = {
-       DEFINE_RES_MEM(0xe6050000, 0x8000),
-       DEFINE_RES_MEM(0xe605800c, 0x0020),
-};
-
-void __init r8a7740_pinmux_init(void)
-{
-       platform_device_register_simple("pfc-r8a7740", -1, pfc_resources,
-                                       ARRAY_SIZE(pfc_resources));
-}
-
-static struct renesas_intc_irqpin_config irqpin0_platform_data = {
-       .irq_base = irq_pin(0), /* IRQ0 -> IRQ7 */
-};
-
-static struct resource irqpin0_resources[] = {
-       DEFINE_RES_MEM(0xe6900000, 4), /* ICR1A */
-       DEFINE_RES_MEM(0xe6900010, 4), /* INTPRI00A */
-       DEFINE_RES_MEM(0xe6900020, 1), /* INTREQ00A */
-       DEFINE_RES_MEM(0xe6900040, 1), /* INTMSK00A */
-       DEFINE_RES_MEM(0xe6900060, 1), /* INTMSKCLR00A */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ0 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ1 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ2 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ3 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ4 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ5 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ6 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ7 */
-};
-
-static struct platform_device irqpin0_device = {
-       .name           = "renesas_intc_irqpin",
-       .id             = 0,
-       .resource       = irqpin0_resources,
-       .num_resources  = ARRAY_SIZE(irqpin0_resources),
-       .dev            = {
-               .platform_data  = &irqpin0_platform_data,
-       },
-};
-
-static struct renesas_intc_irqpin_config irqpin1_platform_data = {
-       .irq_base = irq_pin(8), /* IRQ8 -> IRQ15 */
-};
-
-static struct resource irqpin1_resources[] = {
-       DEFINE_RES_MEM(0xe6900004, 4), /* ICR2A */
-       DEFINE_RES_MEM(0xe6900014, 4), /* INTPRI10A */
-       DEFINE_RES_MEM(0xe6900024, 1), /* INTREQ10A */
-       DEFINE_RES_MEM(0xe6900044, 1), /* INTMSK10A */
-       DEFINE_RES_MEM(0xe6900064, 1), /* INTMSKCLR10A */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ8 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ9 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ10 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ11 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ12 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ13 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ14 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ15 */
-};
-
-static struct platform_device irqpin1_device = {
-       .name           = "renesas_intc_irqpin",
-       .id             = 1,
-       .resource       = irqpin1_resources,
-       .num_resources  = ARRAY_SIZE(irqpin1_resources),
-       .dev            = {
-               .platform_data  = &irqpin1_platform_data,
-       },
-};
-
-static struct renesas_intc_irqpin_config irqpin2_platform_data = {
-       .irq_base = irq_pin(16), /* IRQ16 -> IRQ23 */
-};
-
-static struct resource irqpin2_resources[] = {
-       DEFINE_RES_MEM(0xe6900008, 4), /* ICR3A */
-       DEFINE_RES_MEM(0xe6900018, 4), /* INTPRI30A */
-       DEFINE_RES_MEM(0xe6900028, 1), /* INTREQ30A */
-       DEFINE_RES_MEM(0xe6900048, 1), /* INTMSK30A */
-       DEFINE_RES_MEM(0xe6900068, 1), /* INTMSKCLR30A */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ16 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ17 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ18 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ19 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ20 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ21 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ22 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ23 */
-};
-
-static struct platform_device irqpin2_device = {
-       .name           = "renesas_intc_irqpin",
-       .id             = 2,
-       .resource       = irqpin2_resources,
-       .num_resources  = ARRAY_SIZE(irqpin2_resources),
-       .dev            = {
-               .platform_data  = &irqpin2_platform_data,
-       },
-};
-
-static struct renesas_intc_irqpin_config irqpin3_platform_data = {
-       .irq_base = irq_pin(24), /* IRQ24 -> IRQ31 */
-};
-
-static struct resource irqpin3_resources[] = {
-       DEFINE_RES_MEM(0xe690000c, 4), /* ICR3A */
-       DEFINE_RES_MEM(0xe690001c, 4), /* INTPRI30A */
-       DEFINE_RES_MEM(0xe690002c, 1), /* INTREQ30A */
-       DEFINE_RES_MEM(0xe690004c, 1), /* INTMSK30A */
-       DEFINE_RES_MEM(0xe690006c, 1), /* INTMSKCLR30A */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ24 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ25 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ26 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ27 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ28 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ29 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ30 */
-       DEFINE_RES_IRQ(gic_spi(149)), /* IRQ31 */
-};
-
-static struct platform_device irqpin3_device = {
-       .name           = "renesas_intc_irqpin",
-       .id             = 3,
-       .resource       = irqpin3_resources,
-       .num_resources  = ARRAY_SIZE(irqpin3_resources),
-       .dev            = {
-               .platform_data  = &irqpin3_platform_data,
-       },
-};
-
-/* SCIF */
-#define R8A7740_SCIF(scif_type, index, baseaddr, irq)          \
-static struct plat_sci_port scif##index##_platform_data = {    \
-       .type           = scif_type,                            \
-       .flags          = UPF_BOOT_AUTOCONF,                    \
-       .scscr          = SCSCR_RE | SCSCR_TE,                  \
-};                                                             \
-                                                               \
-static struct resource scif##index##_resources[] = {           \
-       DEFINE_RES_MEM(baseaddr, 0x100),                        \
-       DEFINE_RES_IRQ(irq),                                    \
-};                                                             \
-                                                               \
-static struct platform_device scif##index##_device = {         \
-       .name           = "sh-sci",                             \
-       .id             = index,                                \
-       .resource       = scif##index##_resources,              \
-       .num_resources  = ARRAY_SIZE(scif##index##_resources),  \
-       .dev            = {                                     \
-               .platform_data  = &scif##index##_platform_data, \
-       },                                                      \
-}
-
-R8A7740_SCIF(PORT_SCIFA, 0, 0xe6c40000, gic_spi(100));
-R8A7740_SCIF(PORT_SCIFA, 1, 0xe6c50000, gic_spi(101));
-R8A7740_SCIF(PORT_SCIFA, 2, 0xe6c60000, gic_spi(102));
-R8A7740_SCIF(PORT_SCIFA, 3, 0xe6c70000, gic_spi(103));
-R8A7740_SCIF(PORT_SCIFA, 4, 0xe6c80000, gic_spi(104));
-R8A7740_SCIF(PORT_SCIFA, 5, 0xe6cb0000, gic_spi(105));
-R8A7740_SCIF(PORT_SCIFA, 6, 0xe6cc0000, gic_spi(106));
-R8A7740_SCIF(PORT_SCIFA, 7, 0xe6cd0000, gic_spi(107));
-R8A7740_SCIF(PORT_SCIFB, 8, 0xe6c30000, gic_spi(108));
-
-/* CMT */
-static struct sh_timer_config cmt1_platform_data = {
-       .channels_mask = 0x3f,
-};
-
-static struct resource cmt1_resources[] = {
-       DEFINE_RES_MEM(0xe6138000, 0x170),
-       DEFINE_RES_IRQ(gic_spi(58)),
-};
-
-static struct platform_device cmt1_device = {
-       .name           = "sh-cmt-48",
-       .id             = 1,
-       .dev = {
-               .platform_data  = &cmt1_platform_data,
-       },
-       .resource       = cmt1_resources,
-       .num_resources  = ARRAY_SIZE(cmt1_resources),
-};
-
-/* TMU */
-static struct sh_timer_config tmu0_platform_data = {
-       .channels_mask = 7,
-};
-
-static struct resource tmu0_resources[] = {
-       DEFINE_RES_MEM(0xfff80000, 0x2c),
-       DEFINE_RES_IRQ(gic_spi(198)),
-       DEFINE_RES_IRQ(gic_spi(199)),
-       DEFINE_RES_IRQ(gic_spi(200)),
-};
-
-static struct platform_device tmu0_device = {
-       .name           = "sh-tmu",
-       .id             = 0,
-       .dev = {
-               .platform_data  = &tmu0_platform_data,
-       },
-       .resource       = tmu0_resources,
-       .num_resources  = ARRAY_SIZE(tmu0_resources),
-};
-
-/* IPMMUI (an IPMMU module for ICB/LMB) */
-static struct resource ipmmu_resources[] = {
-       [0] = {
-               .name   = "IPMMUI",
-               .start  = 0xfe951000,
-               .end    = 0xfe9510ff,
-               .flags  = IORESOURCE_MEM,
-       },
-};
-
-static const char * const ipmmu_dev_names[] = {
-       "sh_mobile_lcdc_fb.0",
-       "sh_mobile_lcdc_fb.1",
-       "sh_mobile_ceu.0",
-};
-
-static struct shmobile_ipmmu_platform_data ipmmu_platform_data = {
-       .dev_names = ipmmu_dev_names,
-       .num_dev_names = ARRAY_SIZE(ipmmu_dev_names),
-};
-
-static struct platform_device ipmmu_device = {
-       .name           = "ipmmu",
-       .id             = -1,
-       .dev = {
-               .platform_data = &ipmmu_platform_data,
-       },
-       .resource       = ipmmu_resources,
-       .num_resources  = ARRAY_SIZE(ipmmu_resources),
-};
-
-static struct platform_device *r8a7740_early_devices[] __initdata = {
-       &scif0_device,
-       &scif1_device,
-       &scif2_device,
-       &scif3_device,
-       &scif4_device,
-       &scif5_device,
-       &scif6_device,
-       &scif7_device,
-       &scif8_device,
-       &irqpin0_device,
-       &irqpin1_device,
-       &irqpin2_device,
-       &irqpin3_device,
-       &tmu0_device,
-       &ipmmu_device,
-       &cmt1_device,
-};
-
-/* DMA */
-static const struct sh_dmae_slave_config r8a7740_dmae_slaves[] = {
-       {
-               .slave_id       = SHDMA_SLAVE_SDHI0_TX,
-               .addr           = 0xe6850030,
-               .chcr           = CHCR_TX(XMIT_SZ_16BIT),
-               .mid_rid        = 0xc1,
-       }, {
-               .slave_id       = SHDMA_SLAVE_SDHI0_RX,
-               .addr           = 0xe6850030,
-               .chcr           = CHCR_RX(XMIT_SZ_16BIT),
-               .mid_rid        = 0xc2,
-       }, {
-               .slave_id       = SHDMA_SLAVE_SDHI1_TX,
-               .addr           = 0xe6860030,
-               .chcr           = CHCR_TX(XMIT_SZ_16BIT),
-               .mid_rid        = 0xc9,
-       }, {
-               .slave_id       = SHDMA_SLAVE_SDHI1_RX,
-               .addr           = 0xe6860030,
-               .chcr           = CHCR_RX(XMIT_SZ_16BIT),
-               .mid_rid        = 0xca,
-       }, {
-               .slave_id       = SHDMA_SLAVE_SDHI2_TX,
-               .addr           = 0xe6870030,
-               .chcr           = CHCR_TX(XMIT_SZ_16BIT),
-               .mid_rid        = 0xcd,
-       }, {
-               .slave_id       = SHDMA_SLAVE_SDHI2_RX,
-               .addr           = 0xe6870030,
-               .chcr           = CHCR_RX(XMIT_SZ_16BIT),
-               .mid_rid        = 0xce,
-       }, {
-               .slave_id       = SHDMA_SLAVE_FSIA_TX,
-               .addr           = 0xfe1f0024,
-               .chcr           = CHCR_TX(XMIT_SZ_32BIT),
-               .mid_rid        = 0xb1,
-       }, {
-               .slave_id       = SHDMA_SLAVE_FSIA_RX,
-               .addr           = 0xfe1f0020,
-               .chcr           = CHCR_RX(XMIT_SZ_32BIT),
-               .mid_rid        = 0xb2,
-       }, {
-               .slave_id       = SHDMA_SLAVE_FSIB_TX,
-               .addr           = 0xfe1f0064,
-               .chcr           = CHCR_TX(XMIT_SZ_32BIT),
-               .mid_rid        = 0xb5,
-       }, {
-               .slave_id       = SHDMA_SLAVE_MMCIF_TX,
-               .addr           = 0xe6bd0034,
-               .chcr           = CHCR_TX(XMIT_SZ_32BIT),
-               .mid_rid        = 0xd1,
-       }, {
-               .slave_id       = SHDMA_SLAVE_MMCIF_RX,
-               .addr           = 0xe6bd0034,
-               .chcr           = CHCR_RX(XMIT_SZ_32BIT),
-               .mid_rid        = 0xd2,
-       },
-};
-
-#define DMA_CHANNEL(a, b, c)                   \
-{                                              \
-       .offset         = a,                    \
-       .dmars          = b,                    \
-       .dmars_bit      = c,                    \
-       .chclr_offset   = (0x220 - 0x20) + a    \
-}
-
-static const struct sh_dmae_channel r8a7740_dmae_channels[] = {
-       DMA_CHANNEL(0x00, 0, 0),
-       DMA_CHANNEL(0x10, 0, 8),
-       DMA_CHANNEL(0x20, 4, 0),
-       DMA_CHANNEL(0x30, 4, 8),
-       DMA_CHANNEL(0x50, 8, 0),
-       DMA_CHANNEL(0x60, 8, 8),
-};
-
-static struct sh_dmae_pdata dma_platform_data = {
-       .slave          = r8a7740_dmae_slaves,
-       .slave_num      = ARRAY_SIZE(r8a7740_dmae_slaves),
-       .channel        = r8a7740_dmae_channels,
-       .channel_num    = ARRAY_SIZE(r8a7740_dmae_channels),
-       .ts_low_shift   = TS_LOW_SHIFT,
-       .ts_low_mask    = TS_LOW_BIT << TS_LOW_SHIFT,
-       .ts_high_shift  = TS_HI_SHIFT,
-       .ts_high_mask   = TS_HI_BIT << TS_HI_SHIFT,
-       .ts_shift       = dma_ts_shift,
-       .ts_shift_num   = ARRAY_SIZE(dma_ts_shift),
-       .dmaor_init     = DMAOR_DME,
-       .chclr_present  = 1,
-};
-
-/* Resource order important! */
-static struct resource r8a7740_dmae0_resources[] = {
-       {
-               /* Channel registers and DMAOR */
-               .start  = 0xfe008020,
-               .end    = 0xfe00828f,
-               .flags  = IORESOURCE_MEM,
-       },
-       {
-               /* DMARSx */
-               .start  = 0xfe009000,
-               .end    = 0xfe00900b,
-               .flags  = IORESOURCE_MEM,
-       },
-       {
-               .name   = "error_irq",
-               .start  = gic_spi(34),
-               .end    = gic_spi(34),
-               .flags  = IORESOURCE_IRQ,
-       },
-       {
-               /* IRQ for channels 0-5 */
-               .start  = gic_spi(28),
-               .end    = gic_spi(33),
-               .flags  = IORESOURCE_IRQ,
-       },
-};
-
-/* Resource order important! */
-static struct resource r8a7740_dmae1_resources[] = {
-       {
-               /* Channel registers and DMAOR */
-               .start  = 0xfe018020,
-               .end    = 0xfe01828f,
-               .flags  = IORESOURCE_MEM,
-       },
-       {
-               /* DMARSx */
-               .start  = 0xfe019000,
-               .end    = 0xfe01900b,
-               .flags  = IORESOURCE_MEM,
-       },
-       {
-               .name   = "error_irq",
-               .start  = gic_spi(41),
-               .end    = gic_spi(41),
-               .flags  = IORESOURCE_IRQ,
-       },
-       {
-               /* IRQ for channels 0-5 */
-               .start  = gic_spi(35),
-               .end    = gic_spi(40),
-               .flags  = IORESOURCE_IRQ,
-       },
-};
-
-/* Resource order important! */
-static struct resource r8a7740_dmae2_resources[] = {
-       {
-               /* Channel registers and DMAOR */
-               .start  = 0xfe028020,
-               .end    = 0xfe02828f,
-               .flags  = IORESOURCE_MEM,
-       },
-       {
-               /* DMARSx */
-               .start  = 0xfe029000,
-               .end    = 0xfe02900b,
-               .flags  = IORESOURCE_MEM,
-       },
-       {
-               .name   = "error_irq",
-               .start  = gic_spi(48),
-               .end    = gic_spi(48),
-               .flags  = IORESOURCE_IRQ,
-       },
-       {
-               /* IRQ for channels 0-5 */
-               .start  = gic_spi(42),
-               .end    = gic_spi(47),
-               .flags  = IORESOURCE_IRQ,
-       },
-};
-
-static struct platform_device dma0_device = {
-       .name           = "sh-dma-engine",
-       .id             = 0,
-       .resource       = r8a7740_dmae0_resources,
-       .num_resources  = ARRAY_SIZE(r8a7740_dmae0_resources),
-       .dev            = {
-               .platform_data  = &dma_platform_data,
-       },
-};
-
-static struct platform_device dma1_device = {
-       .name           = "sh-dma-engine",
-       .id             = 1,
-       .resource       = r8a7740_dmae1_resources,
-       .num_resources  = ARRAY_SIZE(r8a7740_dmae1_resources),
-       .dev            = {
-               .platform_data  = &dma_platform_data,
-       },
-};
-
-static struct platform_device dma2_device = {
-       .name           = "sh-dma-engine",
-       .id             = 2,
-       .resource       = r8a7740_dmae2_resources,
-       .num_resources  = ARRAY_SIZE(r8a7740_dmae2_resources),
-       .dev            = {
-               .platform_data  = &dma_platform_data,
-       },
-};
-
-/* USB-DMAC */
-static const struct sh_dmae_channel r8a7740_usb_dma_channels[] = {
-       {
-               .offset = 0,
-       }, {
-               .offset = 0x20,
-       },
-};
-
-static const struct sh_dmae_slave_config r8a7740_usb_dma_slaves[] = {
-       {
-               .slave_id       = SHDMA_SLAVE_USBHS_TX,
-               .chcr           = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
-       }, {
-               .slave_id       = SHDMA_SLAVE_USBHS_RX,
-               .chcr           = USBTS_INDEX2VAL(USBTS_XMIT_SZ_8BYTE),
-       },
-};
-
-static struct sh_dmae_pdata usb_dma_platform_data = {
-       .slave          = r8a7740_usb_dma_slaves,
-       .slave_num      = ARRAY_SIZE(r8a7740_usb_dma_slaves),
-       .channel        = r8a7740_usb_dma_channels,
-       .channel_num    = ARRAY_SIZE(r8a7740_usb_dma_channels),
-       .ts_low_shift   = USBTS_LOW_SHIFT,
-       .ts_low_mask    = USBTS_LOW_BIT << USBTS_LOW_SHIFT,
-       .ts_high_shift  = USBTS_HI_SHIFT,
-       .ts_high_mask   = USBTS_HI_BIT << USBTS_HI_SHIFT,
-       .ts_shift       = dma_usbts_shift,
-       .ts_shift_num   = ARRAY_SIZE(dma_usbts_shift),
-       .dmaor_init     = DMAOR_DME,
-       .chcr_offset    = 0x14,
-       .chcr_ie_bit    = 1 << 5,
-       .dmaor_is_32bit = 1,
-       .needs_tend_set = 1,
-       .no_dmars       = 1,
-       .slave_only     = 1,
-};
-
-static struct resource r8a7740_usb_dma_resources[] = {
-       {
-               /* Channel registers and DMAOR */
-               .start  = 0xe68a0020,
-               .end    = 0xe68a0064 - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       {
-               /* VCR/SWR/DMICR */
-               .start  = 0xe68a0000,
-               .end    = 0xe68a0014 - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       {
-               /* IRQ for channels */
-               .start  = gic_spi(49),
-               .end    = gic_spi(49),
-               .flags  = IORESOURCE_IRQ,
-       },
-};
-
-static struct platform_device usb_dma_device = {
-       .name           = "sh-dma-engine",
-       .id             = 3,
-       .resource       = r8a7740_usb_dma_resources,
-       .num_resources  = ARRAY_SIZE(r8a7740_usb_dma_resources),
-       .dev            = {
-               .platform_data  = &usb_dma_platform_data,
-       },
-};
-
-/* I2C */
-static struct resource i2c0_resources[] = {
-       [0] = {
-               .name   = "IIC0",
-               .start  = 0xfff20000,
-               .end    = 0xfff20425 - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start  = gic_spi(201),
-               .end    = gic_spi(204),
-               .flags  = IORESOURCE_IRQ,
-       },
-};
-
-static struct resource i2c1_resources[] = {
-       [0] = {
-               .name   = "IIC1",
-               .start  = 0xe6c20000,
-               .end    = 0xe6c20425 - 1,
-               .flags  = IORESOURCE_MEM,
-       },
-       [1] = {
-               .start  = gic_spi(70), /* IIC1_ALI1 */
-               .end    = gic_spi(73), /* IIC1_DTEI1 */
-               .flags  = IORESOURCE_IRQ,
-       },
-};
-
-static struct platform_device i2c0_device = {
-       .name           = "i2c-sh_mobile",
-       .id             = 0,
-       .resource       = i2c0_resources,
-       .num_resources  = ARRAY_SIZE(i2c0_resources),
-};
-
-static struct platform_device i2c1_device = {
-       .name           = "i2c-sh_mobile",
-       .id             = 1,
-       .resource       = i2c1_resources,
-       .num_resources  = ARRAY_SIZE(i2c1_resources),
-};
-
-static struct resource pmu_resources[] = {
-       [0] = {
-               .start  = gic_spi(83),
-               .end    = gic_spi(83),
-               .flags  = IORESOURCE_IRQ,
-       },
-};
-
-static struct platform_device pmu_device = {
-       .name   = "armv7-pmu",
-       .id     = -1,
-       .num_resources = ARRAY_SIZE(pmu_resources),
-       .resource = pmu_resources,
-};
-
-static struct platform_device *r8a7740_late_devices[] __initdata = {
-       &i2c0_device,
-       &i2c1_device,
-       &dma0_device,
-       &dma1_device,
-       &dma2_device,
-       &usb_dma_device,
-       &pmu_device,
-};
-
 /*
  * r8a7740 chip has lasting errata on MERAM buffer.
  * this is work-around for it.
@@ -678,7 +65,7 @@ static struct platform_device *r8a7740_late_devices[] __initdata = {
  *     "Media RAM (MERAM)" on r8a7740 documentation
  */
 #define MEBUFCNTR      0xFE950098
-void __init r8a7740_meram_workaround(void)
+static void __init r8a7740_meram_workaround(void)
 {
        void __iomem *reg;
 
@@ -689,70 +76,13 @@ void __init r8a7740_meram_workaround(void)
        }
 }
 
-void __init r8a7740_add_standard_devices(void)
-{
-       static struct pm_domain_device domain_devices[] __initdata = {
-               { "A4R",  &tmu0_device },
-               { "A4R",  &i2c0_device },
-               { "A4S",  &irqpin0_device },
-               { "A4S",  &irqpin1_device },
-               { "A4S",  &irqpin2_device },
-               { "A4S",  &irqpin3_device },
-               { "A3SP", &scif0_device },
-               { "A3SP", &scif1_device },
-               { "A3SP", &scif2_device },
-               { "A3SP", &scif3_device },
-               { "A3SP", &scif4_device },
-               { "A3SP", &scif5_device },
-               { "A3SP", &scif6_device },
-               { "A3SP", &scif7_device },
-               { "A3SP", &scif8_device },
-               { "A3SP", &i2c1_device },
-               { "A3SP", &ipmmu_device },
-               { "A3SP", &dma0_device },
-               { "A3SP", &dma1_device },
-               { "A3SP", &dma2_device },
-               { "A3SP", &usb_dma_device },
-       };
-
-       r8a7740_init_pm_domains();
-
-       /* add devices */
-       platform_add_devices(r8a7740_early_devices,
-                           ARRAY_SIZE(r8a7740_early_devices));
-       platform_add_devices(r8a7740_late_devices,
-                            ARRAY_SIZE(r8a7740_late_devices));
-
-       /* add devices to PM domain  */
-       rmobile_add_devices_to_domains(domain_devices,
-                                      ARRAY_SIZE(domain_devices));
-}
-
-void __init r8a7740_add_early_devices(void)
-{
-       early_platform_add_devices(r8a7740_early_devices,
-                                  ARRAY_SIZE(r8a7740_early_devices));
-
-       /* setup early console here as well */
-       shmobile_setup_console();
-}
-
-#ifdef CONFIG_USE_OF
-
-void __init r8a7740_init_irq_of(void)
+static void __init r8a7740_init_irq_of(void)
 {
        void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
        void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);
        void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);
 
-#ifdef CONFIG_ARCH_SHMOBILE_LEGACY
-       void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);
-       void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);
-
-       gic_init(0, 29, gic_dist_base, gic_cpu_base);
-#else
        irqchip_init();
-#endif
 
        /* route signals to GIC */
        iowrite32(0x0, pfc_inta_ctrl);
@@ -800,5 +130,3 @@ DT_MACHINE_START(R8A7740_DT, "Generic R8A7740 (Flattened Device Tree)")
        .init_late      = shmobile_init_late,
        .dt_compat      = r8a7740_boards_compat_dt,
 MACHINE_END
-
-#endif /* CONFIG_USE_OF */