Hide cpu name checking in ARMSubtarget.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@144154 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
index a871ed7d44922059fbe6996905e8e9e5aa2d16b2..4c3be89b3ec968093e5967fb913f9d2322ec551f 100644 (file)
--- a/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
+++ b/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
@@ -1080,7 +1080,7 @@ bool ARMLoadStoreOpt::FixInvalidRegPairOp(MachineBasicBlock &MBB,
     unsigned OddRegNum  = TRI->getDwarfRegNum(OddReg, false);
     // ARM errata 602117: LDRD with base in list may result in incorrect base
     // register when interrupted or faulted.
-    bool Errata602117 = EvenReg == BaseReg && STI->getCPUString() == "cortex-m3";
+    bool Errata602117 = EvenReg == BaseReg && STI->isCortexM3();
     if (!Errata602117 &&
         ((EvenRegNum & 1) == 0 && (EvenRegNum + 1) == OddRegNum))
       return false;

diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h
index 5e884e009910daa77837083754fdd203fd0282af..a35f4505507194fd62dfad012f696bfd47483d6d 100644 (file)
--- a/lib/Target/ARM/ARMSubtarget.h
+++ b/lib/Target/ARM/ARMSubtarget.h
@@ -191,6 +191,7 @@ protected:
 
   bool isCortexA8() const { return ARMProcFamily == CortexA8; }
   bool isCortexA9() const { return ARMProcFamily == CortexA9; }
+  bool isCortexM3() const { return CPUString == "cortex-m3"; }
 
   bool hasARMOps() const { return !NoARM; }