ARM: mediatek: Add basic support for mt6592
authorHoward Chen <ibanezchen@gmail.com>
Fri, 14 Nov 2014 05:14:52 +0000 (13:14 +0800)
committerMatthias Brugger <matthias.bgg@gmail.com>
Fri, 14 Nov 2014 12:50:46 +0000 (13:50 +0100)
* A dtsi for boards based on Mediatek MT6592 SoCs
* Compatible string in arch/arm/mach-mediatek/mediatek.c

Signed-off-by: Howard Chen <ibanezchen@gmail.com>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm/boot/dts/mt6592.dtsi [new file with mode: 0644]
arch/arm/mach-mediatek/mediatek.c

diff --git a/arch/arm/boot/dts/mt6592.dtsi b/arch/arm/boot/dts/mt6592.dtsi
new file mode 100644 (file)
index 0000000..31e5a09
--- /dev/null
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Howard Chen <ibanezchen@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include "skeleton.dtsi"
+
+/ {
+       compatible = "mediatek,mt6592";
+       interrupt-parent = <&gic>;
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               cpu@0 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x0>;
+               };
+               cpu@1 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x1>;
+               };
+               cpu@2 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x2>;
+               };
+               cpu@3 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x3>;
+               };
+               cpu@4 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x4>;
+               };
+               cpu@5 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x5>;
+               };
+               cpu@6 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x6>;
+               };
+               cpu@7 {
+                       device_type = "cpu";
+                       compatible = "arm,cortex-a7";
+                       reg = <0x7>;
+               };
+       };
+
+       system_clk: dummy13m {
+               compatible = "fixed-clock";
+               clock-frequency = <13000000>;
+               #clock-cells = <0>;
+       };
+
+       rtc_clk: dummy32k {
+               compatible = "fixed-clock";
+               clock-frequency = <32000>;
+               #clock-cells = <0>;
+       };
+
+       timer: timer@10008000 {
+               compatible = "mediatek,mt6577-timer";
+               reg = <0x10008000 0x80>;
+               interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&system_clk>, <&rtc_clk>;
+               clock-names = "system-clk", "rtc-clk";
+       };
+
+       gic: interrupt-controller@10211000 {
+               compatible = "arm,cortex-a7-gic";
+               interrupt-controller;
+               #interrupt-cells = <3>;
+               reg = <0x10211000 0x1000>,
+                     <0x10212000 0x1000>;
+       };
+
+};
+
index 48051a205414160c11e154cc65be98724077a4ff..a9549005097e035271ca34fae7a6a71caffdf956 100644 (file)
@@ -19,6 +19,7 @@
 
 static const char * const mediatek_board_dt_compat[] = {
        "mediatek,mt6589",
+       "mediatek,mt6592",
        "mediatek,mt8127",
        "mediatek,mt8135",
        NULL,