#define VPU_REG_DEC_PP_GATE 61\r
#define VPU_REG_DEC_PP_GATE_BIT (1<<8)\r
\r
+static u8 addr_tbl_vpu_dec[] = {\r
+ 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 40, 41\r
+};\r
+\r
+static u8 addr_tbl_vpu_enc[] = {\r
+ 5, 6, 7, 8, 9, 10, 11, 12, 13, 51\r
+};\r
+\r
+static u8 addr_tbl_hevc_dec[] = {\r
+ 4, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 42, 43\r
+};\r
+\r
/**\r
* struct for process session which connect to vpu\r
*\r
return 0;\r
}\r
\r
-static u8 table_vpu_dec[] = {\r
- 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 40, 41\r
-};\r
-\r
-static u8 table_vpu_enc[] = {\r
- 5, 6, 7, 8, 9, 10, 11, 12, 13, 51\r
-};\r
-\r
-static u8 table_hevc_dec[1] = {\r
-\r
-};\r
-\r
static int vcodec_reg_address_translate(struct vpu_service_info *pservice, vpu_reg *reg)\r
{\r
VPU_HW_ID hw_id;\r
\r
} else {\r
if (reg->type == VPU_DEC) {\r
- for (i=0; i<sizeof(table_vpu_dec); i++) {\r
+ for (i=0; i<sizeof(addr_tbl_vpu_dec); i++) {\r
int usr_fd;\r
struct ion_handle *hdl;\r
//ion_phys_addr_t phy_addr;\r
int offset;\r
\r
#if 0\r
- if (copy_from_user(&usr_fd, ®->reg[table_vpu_dec[i]], sizeof(usr_fd)))\r
+ if (copy_from_user(&usr_fd, ®->reg[addr_tbl_vpu_dec[i]], sizeof(usr_fd)))\r
return -EFAULT;\r
#else\r
- usr_fd = reg->reg[table_vpu_dec[i]] & 0xFF;\r
- offset = reg->reg[table_vpu_dec[i]] >> 8;\r
+ usr_fd = reg->reg[addr_tbl_vpu_dec[i]] & 0xFF;\r
+ offset = reg->reg[addr_tbl_vpu_dec[i]] >> 8;\r
#endif\r
if (usr_fd != 0) {\r
\r
#if 0\r
ion_phys(pservice->ion_client, hdl, &phy_addr, &len);\r
\r
- reg->reg[table_vpu_dec[i]] = phy_addr + offset;\r
+ reg->reg[addr_tbl_vpu_dec[i]] = phy_addr + offset;\r
\r
ion_free(pservice->ion_client, hdl);\r
#else \r
return PTR_ERR(buf);\r
}\r
\r
- reg->reg[table_vpu_dec[i]] = vcodec_map_ion_handle(pservice, reg, hdl, buf, offset);\r
+ reg->reg[addr_tbl_vpu_dec[i]] = vcodec_map_ion_handle(pservice, reg, hdl, buf, offset);\r
#endif\r
\r
}\r
int i;\r
u32 *dst = (u32 *)®->reg[0];\r
for (i = 0; i < count; i++)\r
- *dst++ = *src++;\r
+ *dst++ = *src++;\r
}\r
\r
static void reg_from_run_to_done(struct vpu_service_info *pservice, vpu_reg *reg)\r
} else {\r
dst[VPU_REG_EN_DEC] = src[VPU_REG_EN_DEC];\r
}\r
+\r
dsb();\r
dmb();\r
\r
(enc_end.tv_sec - enc_start.tv_sec) * 1000 +\r
(enc_end.tv_usec - enc_start.tv_usec) / 1000);\r
#endif\r
-\r
+ \r
if (likely(irq_status & ENC_INTERRUPT_BIT)) {\r
/* clear enc IRQ */\r
writel(irq_status & (~ENC_INTERRUPT_BIT), dev->hwregs + ENC_INTERRUPT_REGISTER);\r
atomic_add(1, &dev->irq_count_codec);\r
}\r
+ \r
+ pservice->irq_status = irq_status;\r
\r
return IRQ_WAKE_THREAD;\r
}\r