dts: rk312x: add i2s_2ch, i2s_8ch, spdif.
authorsugar <sugar.zhang@rock-chips.com>
Fri, 25 Jul 2014 09:57:14 +0000 (17:57 +0800)
committersugar <sugar.zhang@rock-chips.com>
Fri, 25 Jul 2014 09:57:14 +0000 (17:57 +0800)
Signed-off-by: sugar <sugar.zhang@rock-chips.com>
Documentation/devicetree/bindings/sound/rockchip-i2s.txt [new file with mode: 0644]
Documentation/devicetree/bindings/sound/rockchip-spdif.txt [new file with mode: 0644]
arch/arm/boot/dts/rk312x.dtsi

diff --git a/Documentation/devicetree/bindings/sound/rockchip-i2s.txt b/Documentation/devicetree/bindings/sound/rockchip-i2s.txt
new file mode 100644 (file)
index 0000000..6915841
--- /dev/null
@@ -0,0 +1,35 @@
+* Rockchip I2S controller
+
+Required SoC Specific Properties:
+
+- compatible : "rockchip-i2s"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- i2s-id: i2s controller id,
+- clocks: must include clock specifiers corresponding to entries in the
+  clock-names property.
+- clocks-names: list of clock names sorted in the same order as the clocks
+  property. Must contain "i2s_clk" and "i2s_hclk".
+- interrupts: interrupt number to the cpu.
+- dmas: list of DMA controller phandle and DMA request line ordered pairs.
+- dma-names: identifier string for each DMA request line in the dmas property.
+  These strings correspond 1:1 with the ordered pairs in dmas.
+- pinctrl-names: must contain a "default" entry.
+- pinctrl-0: pin control group to be used for this controller.
+- pinctrl-1: pin control group to be used for gpio.
+
+Example:
+
+i2s0: i2s@10220000 {
+       compatible = "rockchip-i2s";
+       reg = <0x10220000 0x1000>;
+       i2s-id = <0>;
+       clocks = <&clk_i2s_2ch>, <&clk_i2s_2ch_out>, <&clk_gates7 2>;
+       clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk";
+       interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+       dmas = <&pdma 0>, <&pdma 1>;
+       dma-names = "tx", "rx";
+       pinctrl-names = "default", "sleep";
+       pinctrl-0 = <&i2s0_mclk &i2s0_sclk &i2s0_lrckrx &i2s0_lrcktx &i2s0_sdi &i2s0_sdo>;
+       pinctrl-1 = <&i2s0_gpio>;
+};
diff --git a/Documentation/devicetree/bindings/sound/rockchip-spdif.txt b/Documentation/devicetree/bindings/sound/rockchip-spdif.txt
new file mode 100644 (file)
index 0000000..cef4f5e
--- /dev/null
@@ -0,0 +1,32 @@
+* Rockchip SPDIF controller
+
+Required SoC Specific Properties:
+
+- compatible : "rockchip-spdif"
+- reg: physical base address of the controller and length of memory mapped
+  region.
+- clocks: must include clock specifiers corresponding to entries in the
+  clock-names property.
+- clocks-names: list of clock names sorted in the same order as the clocks
+  property. Must contain "spdif_mclk" and "spdif_hclk".
+- interrupts: interrupt number to the cpu.
+- dmas: list of DMA controller phandle and DMA request line ordered pairs.
+- dma-names: identifier string for each DMA request line in the dmas property.
+  These strings correspond 1:1 with the ordered pairs in dmas.
+- pinctrl-names: must contain a "default" entry.
+- pinctrl-0: pin control group to be used for this controller.
+- pinctrl-1: pin control group to be used for gpio.
+
+Example:
+
+spdif: spdif@10204000 {
+       compatible = "rockchip-spdif";
+       reg = <0x10204000 0x1000>;
+       clocks = <&clk_spdif>, <&clk_gates10 8>;
+       clock-names = "spdif_mclk", "spdif_hclk";
+       interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+       dmas = <&pdma 13>;
+       dma-names = "tx";
+       pinctrl-names = "default";
+       pinctrl-0 = <&spdif_tx>;
+};
index c0c2aff155c44c8f3a055845825a0579be5c2399..64e0c08a0c50594b0627fadf7fd7901988ba1ed0 100755 (executable)
                status = "disabled";
        };
 
+       i2s0: i2s@10220000 {
+               compatible = "rockchip-i2s";
+               reg = <0x10220000 0x1000>;
+               i2s-id = <0>;
+               clocks = <&clk_i2s_2ch>, <&clk_i2s_2ch_out>, <&clk_gates7 2>;
+               clock-names = "i2s_clk", "i2s_mclk", "i2s_hclk";
+               interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+               dmas = <&pdma 0>, <&pdma 1>;
+               //#dma-cells = <2>;
+               dma-names = "tx", "rx";
+               //pinctrl-names = "default", "sleep";
+               //pinctrl-0 = <&i2s0_mclk &i2s0_sclk &i2s0_lrckrx &i2s0_lrcktx &i2s0_sdi &i2s0_sdo>;
+               //pinctrl-1 = <&i2s0_gpio>;
+       };
+
+       i2s1: i2s@10200000 {
+               compatible = "rockchip-i2s";
+               reg = <0x10200000 0x1000>;
+               i2s-id = <1>;
+               clocks = <&clk_i2s_8ch>, <&clk_gates7 4>;
+               clock-names = "i2s_clk", "i2s_hclk";
+               interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
+               dmas = <&pdma 14>, <&pdma 15>;
+               //#dma-cells = <2>;
+               dma-names = "tx", "rx";
+       };
+
+       spdif: spdif@10204000 {
+               compatible = "rockchip-spdif";
+               reg = <0x10204000 0x1000>;
+               clocks = <&clk_spdif>, <&clk_gates10 8>;
+               clock-names = "spdif_8ch_mclk", "spdif_hclk";
+               interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
+               dmas = <&pdma 13>;
+               //#dma-cells = <1>;
+               dma-names = "tx";
+               //pinctrl-names = "default";
+               //pinctrl-0 = <&spdif_tx>;
+       };
 
        dsihost0: mipi@10110000{
                compatible = "rockchip,rk32-dsi";