/* PHY CHIP Address */
#define PHY1_ADDR 1 /* For MAC1 */
-#define PHY2_ADDR 2 /* For MAC2 */
+#define PHY2_ADDR 3 /* For MAC2 */
#define PHY_MODE 0x3100 /* PHY CHIP Register 0 */
#define PHY_CAP 0x01E1 /* PHY CHIP Register 4 */
/* Wait for the read bit to be cleared */
while (limit--) {
cmd = ioread16(ioaddr + MMDIO);
- if (cmd & MDIO_READ)
+ if (!(cmd & MDIO_READ))
break;
}
/* Wait for the write bit to be cleared */
while (limit--) {
cmd = ioread16(ioaddr + MMDIO);
- if (cmd & MDIO_WRITE)
+ if (!(cmd & MDIO_WRITE))
break;
}
if (limit <= 0)