usb: dwc2: gadget: use reset detect interrupt
authorGregory Herrero <gregory.herrero@intel.com>
Wed, 29 Apr 2015 20:09:06 +0000 (22:09 +0200)
committerFelipe Balbi <balbi@ti.com>
Wed, 29 Apr 2015 20:19:08 +0000 (15:19 -0500)
ResetDet interrupt is used to detect a reset of the bus
while the controller is suspended.
This may happens for example when using Command Verifier.

Acked-by: John Youn <johnyoun@synopsys.com>
Signed-off-by: Gregory Herrero <gregory.herrero@intel.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
drivers/usb/dwc2/gadget.c

index bed56dc27fdcd29c0562dfd93429054a9125f2c7..f867e954764fbc3b0540f7e76fb9c8dc17fe45f8 100644 (file)
@@ -2308,8 +2308,9 @@ void s3c_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg,
        writel(GINTSTS_ERLYSUSP | GINTSTS_SESSREQINT |
                GINTSTS_GOUTNAKEFF | GINTSTS_GINNAKEFF |
                GINTSTS_CONIDSTSCHNG | GINTSTS_USBRST |
-               GINTSTS_ENUMDONE | GINTSTS_OTGINT |
-               GINTSTS_USBSUSP | GINTSTS_WKUPINT,
+               GINTSTS_RESETDET | GINTSTS_ENUMDONE |
+               GINTSTS_OTGINT | GINTSTS_USBSUSP |
+               GINTSTS_WKUPINT,
                hsotg->regs + GINTMSK);
 
        if (using_dma(hsotg))
@@ -2475,7 +2476,19 @@ irq_retry:
                }
        }
 
-       if (gintsts & GINTSTS_USBRST) {
+       if (gintsts & GINTSTS_RESETDET) {
+               dev_dbg(hsotg->dev, "%s: USBRstDet\n", __func__);
+
+               writel(GINTSTS_RESETDET, hsotg->regs + GINTSTS);
+
+               /* This event must be used only if controller is suspended */
+               if (hsotg->lx_state == DWC2_L2) {
+                       dwc2_exit_hibernation(hsotg, true);
+                       hsotg->lx_state = DWC2_L0;
+               }
+       }
+
+       if (gintsts & (GINTSTS_USBRST | GINTSTS_RESETDET)) {
 
                u32 usb_status = readl(hsotg->regs + GOTGCTL);