[TwoAddressInstructionPass] When looking for a 3 addr conversion after commuting...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249378 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp
index 717b07ca0591c8290f217b7466d8eff594eae026..1b4fe705eb85a35eef5763873ac4ab0c32d113a4 100644 (file)
--- a/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -1265,6 +1265,13 @@ tryInstructionTransform(MachineBasicBlock::iterator &mi,
     return true;
   }
 
+  // If we commuted, regB may have changed so we should re-sample it to avoid
+  // confusing the three address conversion below.
+  if (Commuted) {
+    regB = MI.getOperand(SrcIdx).getReg();
+    regBKilled = isKilled(MI, regB, MRI, TII, LIS, true);
+  }
+
   if (MI.isConvertibleTo3Addr()) {
     // This instruction is potentially convertible to a true
     // three-address instruction.  Check if it is profitable.

diff --git a/test/CodeGen/X86/atomic_mi.ll b/test/CodeGen/X86/atomic_mi.ll
index 631c5fbb89abd9d41bd3e028361c79d22599c839..7be791136205e500ab4756b68cf2f836cd7254f6 100644 (file)
--- a/test/CodeGen/X86/atomic_mi.ll
+++ b/test/CodeGen/X86/atomic_mi.ll
@@ -210,8 +210,8 @@ define i32 @add_32r_ret_load(i32* %p, i32 %v) {
 ; X64-LABEL: add_32r_ret_load:
 ; X64-NOT: lock
 ; X64:      movl (%rdi), %eax
-; X64-NEXT: leal (%rsi,%rax), %ecx
-; X64-NEXT: movl %ecx, (%rdi)
+; X64-NEXT: addl %eax, %esi
+; X64-NEXT: movl %esi, (%rdi)
 ; X64-NEXT: retq
 ; X32-LABEL: add_32r_ret_load:
 ; X32-NOT: lock

diff --git a/test/CodeGen/X86/commute-two-addr.ll b/test/CodeGen/X86/commute-two-addr.ll
index 5b01e2f4e90d52b80156b9972ed7d4d863be89ec..656c385e2bc7d6ace081da6dbed5808c09e9cc83 100644 (file)
--- a/test/CodeGen/X86/commute-two-addr.ll
+++ b/test/CodeGen/X86/commute-two-addr.ll
@@ -39,7 +39,7 @@ define %0 @t3(i32 %lb, i8 zeroext %has_lb, i8 zeroext %lb_inclusive, i32 %ub, i8
 entry:
 ; DARWIN-LABEL: t3:
 ; DARWIN: shlq $32, %rcx
-; DARWIN-NEXT: leaq (%rax,%rcx), %rax
+; DARWIN-NEXT: orq %rcx, %rax
 ; DARWIN-NEXT: shll $8
 ; DARWIN-NOT: leaq
   %tmp21 = zext i32 %lb to i64

diff --git a/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll b/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll
index 24be0dc42d6d4415ec0b0224f02c819d7220ea40..7925bf01020e8951231bc5fb8df2daa2f066d5dd 100644 (file)
--- a/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll
+++ b/test/Transforms/LoopStrengthReduce/X86/ivchain-stress-X86.ll
@@ -23,7 +23,7 @@
 ; X32: add
 ; X32: add
 ; X32: add
-; X32: leal
+; X32: add
 ; X32: %for.body.3
 define void @sharedidx(i8* nocapture %a, i8* nocapture %b, i8* nocapture %c, i32 %s, i32 %len) nounwind ssp {
 entry: