fix rga2 soft reset may cause rga status uncorrect

Signed-off-by: Shengqin.Zhang <zsq@rock-chips.com>

diff --git a/drivers/video/rockchip/rga2/rga2.h b/drivers/video/rockchip/rga2/rga2.h
index 467ef13683ddecb85c07e2896742a040958a0966..a6d0c3e2b66037f7d4c9b5c5c1a378553c17045c 100755 (executable)
--- a/drivers/video/rockchip/rga2/rga2.h
+++ b/drivers/video/rockchip/rga2/rga2.h
@@ -131,10 +131,10 @@ mdp_img_vir;
 \r
 typedef struct MMU_INFO\r
 {\r
-    uint64_t src0_base_addr;\r
-    uint64_t src1_base_addr;\r
-    uint64_t dst_base_addr;\r
-    uint64_t els_base_addr;\r
+    unsigned long src0_base_addr;\r
+    unsigned long src1_base_addr;\r
+    unsigned long dst_base_addr;\r
+    unsigned long els_base_addr;\r
 \r
     u8 src0_mmu_flag;     /* [0] src0 mmu enable [1] src0_flush [2] src0_prefetch_en [3] src0_prefetch dir */\r
     u8 src1_mmu_flag;     /* [0] src1 mmu enable [1] src1_flush [2] src1_prefetch_en [3] src1_prefetch dir */\r
@@ -219,7 +219,7 @@ FADING;
 typedef struct MMU\r
 {\r
     unsigned char mmu_en;\r
-    uint64_t base_addr;\r
+    unsigned long base_addr;\r
     uint32_t mmu_flag;     /* [0] mmu enable [1] src_flush [2] dst_flush [3] CMD_flush [4~5] page size*/\r
 } MMU;\r
 \r
@@ -257,9 +257,9 @@ line_draw_t;
 \r
 typedef struct rga_img_info_t\r
 {\r
-    uint64_t yrgb_addr;      /* yrgb    mem addr         */\r
-    uint64_t uv_addr;        /* cb/cr   mem addr         */\r
-    uint64_t v_addr;         /* cr      mem addr         */\r
+    unsigned long yrgb_addr;      /* yrgb    mem addr         */\r
+    unsigned long uv_addr;        /* cb/cr   mem addr         */\r
+    unsigned long v_addr;         /* cr      mem addr         */\r
     unsigned int format;         //definition by RK_FORMAT\r
 \r
     unsigned short act_w;\r
@@ -298,8 +298,8 @@ struct rga_req {
     rga_img_info_t dst;             /* dst image info */\r
     rga_img_info_t pat;             /* patten image info */\r
 \r
-    uint64_t rop_mask_addr;         /* rop4 mask addr */\r
-    uint64_t LUT_addr;              /* LUT addr */\r
+    unsigned long rop_mask_addr;         /* rop4 mask addr */\r
+    unsigned long LUT_addr;              /* LUT addr */\r
 \r
     RECT clip;                      /* dst clip window default value is dst_vir */\r
                                     /* value from [0, w-1] / [0, h-1]*/\r
@@ -425,8 +425,8 @@ struct rga2_req
     rga_img_info_t dst;    // dst  active window\r
     rga_img_info_t pat;    // patten active window\r
 \r
-    uint64_t rop_mask_addr;       // rop4 mask addr\r
-    uint64_t LUT_addr;            // LUT addr\r
+    unsigned long rop_mask_addr;       // rop4 mask addr\r
+    unsigned long LUT_addr;            // LUT addr\r
 \r
     u32 rop_mask_stride;\r
 \r

diff --git a/drivers/video/rockchip/rga2/rga2_drv.c b/drivers/video/rockchip/rga2/rga2_drv.c
index 08fcc9cb573c595ec19e8fc5ba9357dcedb509aa..e4b5bc60bdd225b962f2503e672ec3459343878d 100755 (executable)
--- a/drivers/video/rockchip/rga2/rga2_drv.c
+++ b/drivers/video/rockchip/rga2/rga2_drv.c
@@ -510,7 +510,7 @@ static void rga2_try_set_reg(void)
             __dma_flush_range(&rga2_service.cmd_buff[0], &rga2_service.cmd_buff[32]);\r
             #endif\r
 \r
-            rga2_soft_reset();\r
+            //rga2_soft_reset();\r
 \r
             rga2_write(0x0, RGA2_SYS_CTRL);\r
 \r