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clk: rockchip: rk3366: modify the parent's name of usbphy480m
author
Finley Xiao
<finley.xiao@rock-chips.com>
Thu, 21 Apr 2016 11:54:53 +0000
(19:54 +0800)
committer
Finley Xiao
<finley.xiao@rock-chips.com>
Thu, 21 Apr 2016 11:54:53 +0000
(19:54 +0800)
Change-Id: I6a628a96acba4e73405ffc58fbd9a8f6e4544e4f
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
drivers/clk/rockchip/clk-rk3366.c
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diff --git
a/drivers/clk/rockchip/clk-rk3366.c
b/drivers/clk/rockchip/clk-rk3366.c
index 6997403770ac5c8aa69a5a6e0aea19373a4cc762..1bb09e4dc5433c4b5e8be4cd1b5a747fbce931e8 100644
(file)
--- a/
drivers/clk/rockchip/clk-rk3366.c
+++ b/
drivers/clk/rockchip/clk-rk3366.c
@@
-104,7
+104,7
@@
PNAME(mux_spdif_8ch_p) = { "spdif_8ch_pre", "spdif_8ch_frac",
"ext_i2s", "xin12m" };
PNAME(mux_vip_out_p) = { "vip_src", "xin24m" };
PNAME(mux_usb3_suspend_p) = { "clk_32k", "xin24m" };
-PNAME(mux_usbphy480m_p) = { "xin24m", "
usbotg_out
" };
+PNAME(mux_usbphy480m_p) = { "xin24m", "
sclk_otgphy0_480m
" };
PNAME(mux_uart0_p) = { "uart0_src", "uart0_frac", "xin24m", "xin24m" };
PNAME(mux_uart2_p) = { "uart2_src", "xin24m" };
PNAME(mux_uart3_p) = { "uart3_src", "uart3_frac", "xin24m", "xin24m" };