[ARM] tegra: stingray: change UARTC clock source to PLL_P

Bluetooth requires 3Mpbs baud rate. Change UART clock source from
clk_m (26000000) to pll_p (216000000).

Signed-off-by: Jay Cheng <jacheng@nvidia.com>

diff --git a/arch/arm/mach-tegra/board-stingray.c b/arch/arm/mach-tegra/board-stingray.c
index 4312cbbcd0ad7b3ec6d7132e356440011a92328f..e68f54c77307257b889dc4a395192b00b2430fcc 100644 (file)
--- a/arch/arm/mach-tegra/board-stingray.c
+++ b/arch/arm/mach-tegra/board-stingray.c
@@ -587,6 +587,7 @@ static struct tegra_i2c_platform_data stingray_i2c4_platform_data = {
 static __initdata struct tegra_clk_init_table stingray_clk_init_table[] = {
        /* name         parent          rate            enabled */
        { "uartb",      "clk_m",        26000000,       true},
+       { "uartc",      "pll_p",        216000000,      false},
        /*{ "emc",      "pll_p",        0,              true},
        { "pll_m",      NULL,           600000000,      true},
        { "emc",        "pll_m",        600000000,      false},*/