[x86] enable machine combiner reassociations for scalar 'and' insts

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@246300 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.cpp b/lib/Target/X86/X86InstrInfo.cpp
index 17980e6a80531ec5f132a9464284bbcd6e030c31..44c16a2b2f7f22e74d457d71c4d286be6a29c6c7 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.cpp
+++ b/lib/Target/X86/X86InstrInfo.cpp
@@ -6389,10 +6389,14 @@ static bool hasReassociableSibling(const MachineInstr &Inst, bool &Commuted) {
 
 // TODO: There are many more machine instruction opcodes to match:
 //       1. Other data types (integer, vectors)
-//       2. Other math / logic operations (and, or)
+//       2. Other math / logic operations (xor, or)
 //       3. Other forms of the same operation (intrinsics and other variants)
 static bool isAssociativeAndCommutative(const MachineInstr &Inst) {
   switch (Inst.getOpcode()) {
+  case X86::AND8rr:
+  case X86::AND16rr:
+  case X86::AND32rr:
+  case X86::AND64rr:
   case X86::IMUL16rr:
   case X86::IMUL32rr:
   case X86::IMUL64rr:

diff --git a/test/CodeGen/X86/machine-combiner-int.ll b/test/CodeGen/X86/machine-combiner-int.ll
index 367c9958126006d97959d74256e61cabb219654b..918c61d17953b83d5d3ed9a65ce285485624342c 100644 (file)
--- a/test/CodeGen/X86/machine-combiner-int.ll
+++ b/test/CodeGen/X86/machine-combiner-int.ll
@@ -4,6 +4,9 @@
 ; Verify that integer multiplies are reassociated. The first multiply in 
 ; each test should be independent of the result of the preceding add (lea).
 
+; TODO: This test does not actually test i16 machine instruction reassociation 
+; because the operands are being promoted to i32 types.
+
 define i16 @reassociate_muls_i16(i16 %x0, i16 %x1, i16 %x2, i16 %x3) {
 ; CHECK-LABEL: reassociate_muls_i16:
 ; CHECK:       # BB#0:
@@ -47,3 +50,51 @@ define i64 @reassociate_muls_i64(i64 %x0, i64 %x1, i64 %x2, i64 %x3) {
   %t2 = mul i64 %x3, %t1
   ret i64 %t2
 }
+
+; Verify that integer 'ands' are reassociated. The first 'and' in 
+; each test should be independent of the result of the preceding sub.
+
+define i8 @reassociate_ands_i8(i8 %x0, i8 %x1, i8 %x2, i8 %x3) {
+; CHECK-LABEL: reassociate_ands_i8:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    subb  %sil, %dil
+; CHECK-NEXT:    andb  %cl, %dl
+; CHECK-NEXT:    andb  %dil, %dl
+; CHECK_NEXT:    movb  %dx, %ax
+; CHECK_NEXT:    retq
+  %t0 = sub i8 %x0, %x1
+  %t1 = and i8 %x2, %t0
+  %t2 = and i8 %x3, %t1
+  ret i8 %t2
+}
+
+; TODO: No way to test i16? These appear to always get promoted to i32.
+
+define i32 @reassociate_ands_i32(i32 %x0, i32 %x1, i32 %x2, i32 %x3) {
+; CHECK-LABEL: reassociate_ands_i32:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    subl  %esi, %edi
+; CHECK-NEXT:    andl  %ecx, %edx
+; CHECK-NEXT:    andl  %edi, %edx
+; CHECK_NEXT:    movl  %edx, %eax
+; CHECK_NEXT:    retq
+  %t0 = sub i32 %x0, %x1
+  %t1 = and i32 %x2, %t0
+  %t2 = and i32 %x3, %t1
+  ret i32 %t2
+}
+
+define i64 @reassociate_ands_i64(i64 %x0, i64 %x1, i64 %x2, i64 %x3) {
+; CHECK-LABEL: reassociate_ands_i64:
+; CHECK:       # BB#0:
+; CHECK-NEXT:    subq  %rsi, %rdi
+; CHECK-NEXT:    andq  %rcx, %rdx
+; CHECK-NEXT:    andq  %rdi, %rdx
+; CHECK-NEXT:    movq  %rdx, %rax
+; CHECK_NEXT:    retq
+  %t0 = sub i64 %x0, %x1
+  %t1 = and i64 %x2, %t0
+  %t2 = and i64 %x3, %t1
+  ret i64 %t2
+}
+