Minor fixes: renamed target machine files; fold sched info into TargetMachine.
authorVikram S. Adve <vadve@cs.uiuc.edu>
Tue, 18 Sep 2001 12:41:43 +0000 (12:41 +0000)
committerVikram S. Adve <vadve@cs.uiuc.edu>
Tue, 18 Sep 2001 12:41:43 +0000 (12:41 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@603 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/CodeGen/InstrForest.h
include/llvm/CodeGen/InstrScheduling.h
include/llvm/CodeGen/MachineInstr.h
include/llvm/CodeGen/RegClass.h
lib/CodeGen/RegAlloc/RegClass.h
lib/Target/SparcV9/RegAlloc/RegClass.h

index 47a12ace6b7ebd40bc11ecb787219c62c89eed1f..6fe622d9fc3f0771dec8bf193a3c374da70f7044 100644 (file)
@@ -1,25 +1,25 @@
-/* $Id$ -*-c++-*-
- ****************************************************************************
- * File:
- *     InstrForest.h
- * 
- * Purpose:
- *     Convert SSA graph to instruction trees for instruction selection.
- * 
- * Strategy:
- *  The basic idea is that we would like to group instructions into a single
- *  tree if one or more of them might be potentially combined into a single
- *  complex instruction in the target machine.
- *  Since this grouping is completely machine-independent, it is as
- *  aggressive as possible.  In particular, we group two instructions
- *  O and I if:
- *  (1) Instruction O computes an operand of instruction I, and
- *  (2) O and I are part of the same basic block, and
- *  (3) O has only a single use, viz., I.
- * 
- * History:
- *     6/28/01  -  Vikram Adve  -  Created
- ***************************************************************************/
+// $Id$ -*-c++-*-
+//***************************************************************************
+// File:
+//     InstrForest.h
+// 
+// Purpose:
+//     Convert SSA graph to instruction trees for instruction selection.
+// 
+// Strategy:
+//  The basic idea is that we would like to group instructions into a single
+//  tree if one or more of them might be potentially combined into a single
+//  complex instruction in the target machine.
+//  Since this grouping is completely machine-independent, it is as
+//  aggressive as possible.  In particular, we group two instructions
+//  O and I if:
+//  (1) Instruction O computes an operand of instruction I, and
+//  (2) O and I are part of the same basic block, and
+//  (3) O has only a single use, viz., I.
+// 
+// History:
+//     6/28/01  -  Vikram Adve  -  Created
+//**************************************************************************/
 
 #ifndef LLVM_CODEGEN_INSTRFOREST_H
 #define LLVM_CODEGEN_INSTRFOREST_H
@@ -235,11 +235,13 @@ protected:
 //------------------------------------------------------------------------ 
 
 class InstrForest : private hash_map<const Instruction*, InstructionNode*> {
+private:
   hash_set<InstructionNode*> treeRoots;
   
 public:
-  InstrForest(Method *M);
-                                   
+  /*ctor*/     InstrForest     (Method *M);
+  /*dtor*/     ~InstrForest    ();
+  
   inline InstructionNode *getTreeNodeForInstr(Instruction* instr) {
     return (*this)[instr];
   }
index cfaa8b05ef42c960102dc96c6eb6b40a5dfd9960..8f88a61590a14dbdb9cf9e8c06f3692cd6acae0f 100644 (file)
@@ -42,8 +42,8 @@ extern cl::Enum<SchedDebugLevel_t> SchedDebugLevel;
 //   are still in SSA form.
 //---------------------------------------------------------------------------
 
-bool ScheduleInstructionsWithSSA(Method* method, const TargetMachine &Target,
-                                const MachineSchedInfo &schedInfo);
+bool ScheduleInstructionsWithSSA(Method* method, const TargetMachine &Target);
+
 
 //---------------------------------------------------------------------------
 // Function: ScheduleInstructions
index 339371227d2ff36938a7545167f792b51da7a10d..66e91b28e42c9a870a5e99cf35328413c641edde 100644 (file)
@@ -19,7 +19,7 @@
 #include "llvm/CodeGen/InstrForest.h"
 #include "llvm/Support/DataTypes.h"
 #include "llvm/Support/NonCopyable.h"
-#include "llvm/Target/InstInfo.h"
+#include "llvm/Target/MachineInstrInfo.h"
 
 template<class _MI, class _V> class ValOpIterator;
 
@@ -86,7 +86,6 @@ private:
   unsigned int regNum;         // register number for an explicit register
                                 // will be set for a value after reg allocation
   bool isDef;                   // is this a defition for the value
-                                // made public for faster access
   
 public:
   /*ctor*/             MachineOperand  ();
index 723443da9ad634f185f9efe0d2e96ba51ca42f00..d08ed3a6594cd2bba6366b5898a3ce6272a8bd41 100644 (file)
@@ -21,8 +21,8 @@
 
 #include "llvm/CodeGen/IGNode.h"
 #include "llvm/CodeGen/InterferenceGraph.h"
-#include "llvm/Target/Machine.h"
-#include "llvm/Target/RegInfo.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/MachineRegInfo.h"
 #include <stack>
 
 typedef vector<unsigned int> ReservedColorListType;
index 723443da9ad634f185f9efe0d2e96ba51ca42f00..d08ed3a6594cd2bba6366b5898a3ce6272a8bd41 100644 (file)
@@ -21,8 +21,8 @@
 
 #include "llvm/CodeGen/IGNode.h"
 #include "llvm/CodeGen/InterferenceGraph.h"
-#include "llvm/Target/Machine.h"
-#include "llvm/Target/RegInfo.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/MachineRegInfo.h"
 #include <stack>
 
 typedef vector<unsigned int> ReservedColorListType;
index 723443da9ad634f185f9efe0d2e96ba51ca42f00..d08ed3a6594cd2bba6366b5898a3ce6272a8bd41 100644 (file)
@@ -21,8 +21,8 @@
 
 #include "llvm/CodeGen/IGNode.h"
 #include "llvm/CodeGen/InterferenceGraph.h"
-#include "llvm/Target/Machine.h"
-#include "llvm/Target/RegInfo.h"
+#include "llvm/Target/TargetMachine.h"
+#include "llvm/Target/MachineRegInfo.h"
 #include <stack>
 
 typedef vector<unsigned int> ReservedColorListType;