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rk32 pm dpll power dn
author
xxx
<xxx@rock-chips.com>
Wed, 16 Apr 2014 09:41:14 +0000
(17:41 +0800)
committer
xxx
<xxx@rock-chips.com>
Wed, 16 Apr 2014 09:41:14 +0000
(17:41 +0800)
arch/arm/mach-rockchip/pm-rk3288.c
[changed mode: 0644->0755]
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diff --git
a/arch/arm/mach-rockchip/pm-rk3288.c
b/arch/arm/mach-rockchip/pm-rk3288.c
old mode 100644
(file)
new mode 100755
(executable)
index
a871a0a
..
704419c
--- a/
arch/arm/mach-rockchip/pm-rk3288.c
+++ b/
arch/arm/mach-rockchip/pm-rk3288.c
@@
-941,7
+941,7
@@
static u32 rkpm_slp_mode_set(u32 ctrbits)
|BIT(pmu_sref0_enter_en)|BIT(pmu_sref1_enter_en)
|BIT(pmu_ddr0_gating_en)|BIT(pmu_ddr1_gating_en)
|BIT(pmu_ddr1io_ret_en)|BIT(pmu_ddr0io_ret_en)
- |BIT(pmu_osc_24m_dis)|BIT(pmu_pmu_use_lf)|BIT(pmu_alive_use_lf)
+ |BIT(pmu_osc_24m_dis)|BIT(pmu_pmu_use_lf)|BIT(pmu_alive_use_lf)
|BIT(pmu_pll_pd_en)
;
mode_set1=BIT(pmu_clr_core)|BIT(pmu_clr_cpup)
|BIT(pmu_clr_alive)