Thumb parsing and encoding for STR.

Not including tSTRspi.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138347 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/MC/ARM/basic-thumb-instructions.s b/test/MC/ARM/basic-thumb-instructions.s
index 741fe85f10dcf617518da0c743b0e6dc496f5cad..a8d13cf1a57e585f2ae132a57c468dbeaebd7784 100644 (file)
--- a/test/MC/ARM/basic-thumb-instructions.s
+++ b/test/MC/ARM/basic-thumb-instructions.s
@@ -435,3 +435,25 @@ _func:
 
 @ CHECK: stm   r1!, {r2, r6}           @ encoding: [0x44,0xc1]
 @ CHECK: stm   r1!, {r1, r2, r3, r7}   @ encoding: [0x8e,0xc1]
+
+
+@------------------------------------------------------------------------------
+@ STR (immediate)
+@------------------------------------------------------------------------------
+        str r2, [r7]
+        str r2, [r7, #0]
+        str r5, [r1, #4]
+        str r3, [r7, #124]
+
+@ CHECK: str   r2, [r7]                @ encoding: [0x3a,0x60]
+@ CHECK: str   r2, [r7]                @ encoding: [0x3a,0x60]
+@ CHECK: str   r5, [r1, #4]            @ encoding: [0x4d,0x60]
+@ CHECK: str   r3, [r7, #124]          @ encoding: [0xfb,0x67]
+
+
+@------------------------------------------------------------------------------
+@ STR (register)
+@------------------------------------------------------------------------------
+        str r2, [r7, r3]
+
+@ CHECK: str   r2, [r7, r3]            @ encoding: [0xfa,0x50]

diff --git a/test/MC/ARM/thumb-diagnostics.s b/test/MC/ARM/thumb-diagnostics.s
index 604127a64294b15927e7ceb6239a2b56913ffdde..9a4ddf1d9c84dd381455f45e3bacac23e3502748 100644 (file)
--- a/test/MC/ARM/thumb-diagnostics.s
+++ b/test/MC/ARM/thumb-diagnostics.s
@@ -93,3 +93,18 @@ error: invalid operand for instruction
 @ CHECK-ERRORS: error: destination register must match source register
 @ CHECK-ERRORS:         muls r1, r2, r3
 @ CHECK-ERRORS:              ^
+
+
+@ Out of range immediates for STR instruction.
+        str r2, [r7, #-1]
+        str r5, [r1, #3]
+        str r3, [r7, #128]
+@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
+@ CHECK-ERRORS:         str r2, [r7, #-1]
+@ CHECK-ERRORS:         ^
+@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
+@ CHECK-ERRORS:         str r5, [r1, #3]
+@ CHECK-ERRORS:         ^
+@ CHECK-ERRORS: error: instruction requires a CPU feature not currently enabled
+@ CHECK-ERRORS:         str r3, [r7, #128]
+@ CHECK-ERRORS:         ^