bool needReg0Op = false;
switch (VT.getSimpleVT().SimpleTy) {
default: return false;
- case MVT::i1:
+ case MVT::i1: {
+ unsigned Res = createResultReg(isThumb ? ARM::tGPRRegisterClass :
+ ARM::GPRRegisterClass);
+ unsigned Opc = isThumb ? ARM::t2ANDri : ARM::ANDri;
+ AddOptionalDefs(BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL,
+ TII.get(Opc), Res)
+ .addReg(SrcReg).addImm(1));
+ SrcReg = Res;
+ } // Fallthrough here.
case MVT::i8:
StrOpc = isThumb ? ARM::t2STRBi12 : ARM::STRBi12;
break;
if (isFloat)
Offset /= 4;
-
// FIXME: The 'needReg0Op' bit goes away once STRH is converted to
// not use the mega-addrmode stuff.
if (!needReg0Op)