ARM: clk-imx6q: refine sata's parent
authorSebastien Szymanski <sebastien.szymanski@armadeus.com>
Wed, 20 May 2015 14:30:37 +0000 (16:30 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Sat, 4 Jul 2015 02:48:09 +0000 (19:48 -0700)
commit da946aeaeadcd24ff0cda9984c6fb8ed2bfd462a upstream.

According to IMX6D/Q RM, table 18-3, sata clock's parent is ahb, not ipg.

Signed-off-by: Sebastien Szymanski <sebastien.szymanski@armadeus.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
[dirk.behme: Adjust moved file]
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/mach-imx/clk-imx6q.c

index 2acaded8025d1487b94dd22eaf30e1158d0360cf..ed00c9e3bfc65e89f13b85a1b9b0fa013ce2c65e 100644 (file)
@@ -515,7 +515,7 @@ int __init mx6q_clocks_init(void)
        clk[gpmi_io]      = imx_clk_gate2("gpmi_io",       "enfc",              base + 0x78, 28);
        clk[gpmi_apb]     = imx_clk_gate2("gpmi_apb",      "usdhc3",            base + 0x78, 30);
        clk[rom]          = imx_clk_gate2("rom",           "ahb",               base + 0x7c, 0);
-       clk[sata]         = imx_clk_gate2("sata",          "ipg",               base + 0x7c, 4);
+       clk[sata]         = imx_clk_gate2("sata",          "ahb",               base + 0x7c, 4);
        clk[sdma]         = imx_clk_gate2("sdma",          "ahb",               base + 0x7c, 6);
        clk[spba]         = imx_clk_gate2("spba",          "ipg",               base + 0x7c, 12);
        clk[ssi1_ipg]     = imx_clk_gate2("ssi1_ipg",      "ipg",               base + 0x7c, 18);