ARM: at91/dt: add i2c1 declaration to sama5d4
authorPhilip Attfield <phil.attfield@seqlabs.com>
Fri, 6 Feb 2015 13:52:56 +0000 (14:52 +0100)
committerNicolas Ferre <nicolas.ferre@atmel.com>
Wed, 4 Mar 2015 17:36:11 +0000 (18:36 +0100)
Add alias, node declaration and pinctrl for i2c1 (aka: twi1).

Signed-off-by: Philip Attfield <phil.attfield@seqlabs.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
arch/arm/boot/dts/sama5d4.dtsi

index 97d5b9759c070b84dcf9f30ce2d51690664d433a..2f4cf5af2405e53ae2921a977f006ec9aa6e7dcf 100644 (file)
@@ -67,6 +67,7 @@
                tcb0 = &tcb0;
                tcb1 = &tcb1;
                i2c0 = &i2c0;
+               i2c1 = &i2c1;
                i2c2 = &i2c2;
        };
        cpus {
                                status = "disabled";
                        };
 
+                       i2c1: i2c@f8018000 {
+                               compatible = "atmel,at91sam9x5-i2c";
+                               reg = <0xf8018000 0x4000>;
+                               interrupts = <33 IRQ_TYPE_LEVEL_HIGH 6>;
+                               dmas = <&dma1
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
+                                       AT91_XDMAC_DT_PERID(4)>,
+                                      <&dma1
+                                       (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1))
+                                       AT91_XDMAC_DT_PERID(5)>;
+                               dma-names = "tx", "rx";
+                               pinctrl-names = "default";
+                               pinctrl-0 = <&pinctrl_i2c1>;
+                               #address-cells = <1>;
+                               #size-cells = <0>;
+                               clocks = <&twi1_clk>;
+                               status = "disabled";
+                       };
+
                        tcb0: timer@f801c000 {
                                compatible = "atmel,at91sam9x5-tcb";
                                reg = <0xf801c000 0x100>;
                                        };
                                };
 
+                               i2c1 {
+                                       pinctrl_i2c1: i2c1-0 {
+                                               atmel,pins =
+                                                       <AT91_PIOE 29 AT91_PERIPH_C AT91_PINCTRL_NONE   /* TWD1, conflicts with UART0 RX and DIBP */
+                                                        AT91_PIOE 30 AT91_PERIPH_C AT91_PINCTRL_NONE>; /* TWCK1, conflicts with UART0 TX and DIBN */
+                                       };
+                               };
+
                                i2c2 {
                                        pinctrl_i2c2: i2c2-0 {
                                                atmel,pins =