Revert "FROMLIST: arm64: Introduce uaccess_{disable,enable} functionality based on...

This reverts commit 1911d36b27ba58ee18592df25b7ee636d4d4c41d.

Bug: 31432001
Change-Id: Iee77eed8454f379b948dbbaf65c105952ea30bef
Signed-off-by: Sami Tolvanen <samitolvanen@google.com>

diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index aeb4554b3af386f215ba9fbe75f0be671b13d8eb..9d3e77a5cf07546fbd024c2f21615ea4a20f0880 100644 (file)
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -53,15 +53,6 @@
        msr     daifclr, #2
        .endm
 
-       .macro  save_and_disable_irq, flags
-       mrs     \flags, daif
-       msr     daifset, #2
-       .endm
-
-       .macro  restore_irq, flags
-       msr     daif, \flags
-       .endm
-
 /*
  * Enable and disable debug exceptions.
  */
@@ -371,13 +362,6 @@ alternative_endif
        movk    \reg, :abs_g0_nc:\val
        .endm
 
-/*
- * Return the current thread_info.
- */
-       .macro  get_thread_info, rd
-       mrs     \rd, sp_el0
-       .endm
-
 /*
  * Errata workaround post TTBR0_EL1 update.
  */

diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h
index 8e1f826caf992966c18ed9c696ea95021a312e63..1695f77d8bf2fa73f3ed464c4cb3f6d9f75da382 100644 (file)
--- a/arch/arm64/include/asm/cpufeature.h
+++ b/arch/arm64/include/asm/cpufeature.h
@@ -189,12 +189,6 @@ static inline bool system_supports_mixed_endian_el0(void)
        return id_aa64mmfr0_mixed_endian_el0(read_system_reg(SYS_ID_AA64MMFR0_EL1));
 }
 
-static inline bool system_uses_ttbr0_pan(void)
-{
-       return IS_ENABLED(CONFIG_ARM64_SW_TTBR0_PAN) &&
-               !cpus_have_cap(ARM64_HAS_PAN);
-}
-
 #endif /* __ASSEMBLY__ */
 
 #endif

diff --git a/arch/arm64/include/asm/kernel-pgtable.h b/arch/arm64/include/asm/kernel-pgtable.h
index 7803343e5881fbd7b2f635b25082d3e91d2583f8..7e51d1b57c0c56461a9be0fb825fa84a9faeea8b 100644 (file)
--- a/arch/arm64/include/asm/kernel-pgtable.h
+++ b/arch/arm64/include/asm/kernel-pgtable.h
@@ -19,7 +19,6 @@
 #ifndef __ASM_KERNEL_PGTABLE_H
 #define __ASM_KERNEL_PGTABLE_H
 
-#include <asm/pgtable.h>
 #include <asm/sparsemem.h>
 
 /*
@@ -55,12 +54,6 @@
 #define SWAPPER_DIR_SIZE       (SWAPPER_PGTABLE_LEVELS * PAGE_SIZE)
 #define IDMAP_DIR_SIZE         (IDMAP_PGTABLE_LEVELS * PAGE_SIZE)
 
-#ifdef CONFIG_ARM64_SW_TTBR0_PAN
-#define RESERVED_TTBR0_SIZE    (PAGE_SIZE)
-#else
-#define RESERVED_TTBR0_SIZE    (0)
-#endif
-
 /* Initial memory map size */
 #if ARM64_SWAPPER_USES_SECTION_MAPS
 #define SWAPPER_BLOCK_SHIFT    SECTION_SHIFT

diff --git a/arch/arm64/include/asm/thread_info.h b/arch/arm64/include/asm/thread_info.h
index b3325a9cb90fda6c9fb052e560a351d469c83fda..abd64bd1f6d9f0160a3122555cf23be1a30f87eb 100644 (file)
--- a/arch/arm64/include/asm/thread_info.h
+++ b/arch/arm64/include/asm/thread_info.h
@@ -47,9 +47,6 @@ typedef unsigned long mm_segment_t;
 struct thread_info {
        unsigned long           flags;          /* low level flags */
        mm_segment_t            addr_limit;     /* address limit */
-#ifdef CONFIG_ARM64_SW_TTBR0_PAN
-       u64                     ttbr0;          /* saved TTBR0_EL1 */
-#endif
        struct task_struct      *task;          /* main task structure */
        int                     preempt_count;  /* 0 => preemptable, <0 => bug */
        int                     cpu;            /* cpu */

diff --git a/arch/arm64/include/asm/uaccess.h b/arch/arm64/include/asm/uaccess.h
index c37c064d7cddd62ab5c3334ff89e3077db3ffa91..c8ef22a9a83bfb7d543c8ae9462e9ca0379db05d 100644 (file)
--- a/arch/arm64/include/asm/uaccess.h
+++ b/arch/arm64/include/asm/uaccess.h
@@ -28,7 +28,6 @@
 
 #include <asm/alternative.h>
 #include <asm/cpufeature.h>
-#include <asm/kernel-pgtable.h>
 #include <asm/ptrace.h>
 #include <asm/sysreg.h>
 #include <asm/errno.h>
@@ -129,57 +128,16 @@ static inline void set_fs(mm_segment_t fs)
 /*
  * User access enabling/disabling.
  */
-#ifdef CONFIG_ARM64_SW_TTBR0_PAN
-static inline void uaccess_ttbr0_disable(void)
-{
-       unsigned long ttbr;
-
-       /* reserved_ttbr0 placed at the end of swapper_pg_dir */
-       ttbr = read_sysreg(ttbr1_el1) + SWAPPER_DIR_SIZE;
-       write_sysreg(ttbr, ttbr0_el1);
-       isb();
-}
-
-static inline void uaccess_ttbr0_enable(void)
-{
-       unsigned long flags;
-
-       /*
-        * Disable interrupts to avoid preemption between reading the 'ttbr0'
-        * variable and the MSR. A context switch could trigger an ASID
-        * roll-over and an update of 'ttbr0'.
-        */
-       local_irq_save(flags);
-       write_sysreg(current_thread_info()->ttbr0, ttbr0_el1);
-       isb();
-       local_irq_restore(flags);
-}
-#else
-static inline void uaccess_ttbr0_disable(void)
-{
-}
-
-static inline void uaccess_ttbr0_enable(void)
-{
-}
-#endif
-
 #define __uaccess_disable(alt)                                         \
 do {                                                                   \
-       if (system_uses_ttbr0_pan())                                    \
-               uaccess_ttbr0_disable();                                \
-       else                                                            \
-               asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), alt,          \
-                               CONFIG_ARM64_PAN));                     \
+       asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), alt,                  \
+                       CONFIG_ARM64_PAN));                             \
 } while (0)
 
 #define __uaccess_enable(alt)                                          \
 do {                                                                   \
-       if (system_uses_ttbr0_pan())                                    \
-               uaccess_ttbr0_enable();                                 \
-       else                                                            \
-               asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), alt,          \
-                               CONFIG_ARM64_PAN));                     \
+       asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), alt,                  \
+                       CONFIG_ARM64_PAN));                             \
 } while (0)
 
 static inline void uaccess_disable(void)
@@ -409,39 +367,12 @@ extern __must_check long strnlen_user(const char __user *str, long n);
 
 #include <asm/alternative.h>
 #include <asm/assembler.h>
-#include <asm/kernel-pgtable.h>
-
-/*
- * User access enabling/disabling macros.
- */
-       .macro  uaccess_ttbr0_disable, tmp1
-       mrs     \tmp1, ttbr1_el1                // swapper_pg_dir
-       add     \tmp1, \tmp1, #SWAPPER_DIR_SIZE // reserved_ttbr0 at the end of swapper_pg_dir
-       msr     ttbr0_el1, \tmp1                // set reserved TTBR0_EL1
-       isb
-       .endm
-
-       .macro  uaccess_ttbr0_enable, tmp1
-       get_thread_info \tmp1
-       ldr     \tmp1, [\tmp1, #TI_TTBR0]       // load saved TTBR0_EL1
-       msr     ttbr0_el1, \tmp1                // set the non-PAN TTBR0_EL1
-       isb
-       .endm
 
 /*
- * These macros are no-ops when UAO is present.
+ * User access enabling/disabling macros. These are no-ops when UAO is
+ * present.
  */
        .macro  uaccess_disable_not_uao, tmp1
-#ifdef CONFIG_ARM64_SW_TTBR0_PAN
-alternative_if_not ARM64_HAS_PAN
-       uaccess_ttbr0_disable \tmp1
-alternative_else
-       nop
-       nop
-       nop
-       nop
-alternative_endif
-#endif
 alternative_if_not ARM64_ALT_PAN_NOT_UAO
        nop
 alternative_else
@@ -450,21 +381,6 @@ alternative_endif
        .endm
 
        .macro  uaccess_enable_not_uao, tmp1, tmp2
-#ifdef CONFIG_ARM64_SW_TTBR0_PAN
-alternative_if_not ARM64_HAS_PAN
-       save_and_disable_irq \tmp2              // avoid preemption
-       uaccess_ttbr0_enable \tmp1
-       restore_irq \tmp2
-alternative_else
-       nop
-       nop
-       nop
-       nop
-       nop
-       nop
-       nop
-alternative_endif
-#endif
 alternative_if_not ARM64_ALT_PAN_NOT_UAO
        nop
 alternative_else

diff --git a/arch/arm64/kernel/asm-offsets.c b/arch/arm64/kernel/asm-offsets.c
index dac70c160289569782878ac82c3525f37afd71b5..2bb17bd556f8dd5114e52b7fec90bf926cd012c7 100644 (file)
--- a/arch/arm64/kernel/asm-offsets.c
+++ b/arch/arm64/kernel/asm-offsets.c
@@ -38,9 +38,6 @@ int main(void)
   DEFINE(TI_FLAGS,             offsetof(struct thread_info, flags));
   DEFINE(TI_PREEMPT,           offsetof(struct thread_info, preempt_count));
   DEFINE(TI_ADDR_LIMIT,                offsetof(struct thread_info, addr_limit));
-#ifdef CONFIG_ARM64_SW_TTBR0_PAN
-  DEFINE(TI_TTBR0,             offsetof(struct thread_info, ttbr0));
-#endif
   DEFINE(TI_TASK,              offsetof(struct thread_info, task));
   DEFINE(TI_CPU,               offsetof(struct thread_info, cpu));
   BLANK();

diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index cdf1dca6413385f7ac2bbaa1faeff8198b8d4d92..eda7d5915fbb209bf4057cd1f621beadd8c02606 100644 (file)
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -46,7 +46,6 @@ unsigned int compat_elf_hwcap2 __read_mostly;
 #endif
 
 DECLARE_BITMAP(cpu_hwcaps, ARM64_NCAPS);
-EXPORT_SYMBOL(cpu_hwcaps);
 
 #define __ARM64_FTR_BITS(SIGNED, STRICT, TYPE, SHIFT, WIDTH, SAFE_VAL) \
        {                                               \

diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
index 8aa564f58b6131a337d673909e46f9f5dbaac51c..367e850ece4d56922b3a517ce1656e7adf547490 100644 (file)
--- a/arch/arm64/kernel/entry.S
+++ b/arch/arm64/kernel/entry.S
@@ -187,6 +187,10 @@ alternative_endif
        eret                                    // return to kernel
        .endm
 
+       .macro  get_thread_info, rd
+       mrs     \rd, sp_el0
+       .endm
+
        .macro  irq_stack_entry
        mov     x19, sp                 // preserve the original sp
 

diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 8cfd5ab377434b2ccafd5b8d7c4701386faf8a95..0ea9a97467a6f606be6ef8618d5ded3a9fbf867e 100644 (file)
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -318,14 +318,14 @@ __create_page_tables:
         * dirty cache lines being evicted.
         */
        mov     x0, x25
-       add     x1, x26, #SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE
+       add     x1, x26, #SWAPPER_DIR_SIZE
        bl      __inval_cache_range
 
        /*
         * Clear the idmap and swapper page tables.
         */
        mov     x0, x25
-       add     x6, x26, #SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE
+       add     x6, x26, #SWAPPER_DIR_SIZE
 1:     stp     xzr, xzr, [x0], #16
        stp     xzr, xzr, [x0], #16
        stp     xzr, xzr, [x0], #16
@@ -404,7 +404,7 @@ __create_page_tables:
         * tables again to remove any speculatively loaded cache lines.
         */
        mov     x0, x25
-       add     x1, x26, #SWAPPER_DIR_SIZE + RESERVED_TTBR0_SIZE
+       add     x1, x26, #SWAPPER_DIR_SIZE
        dmb     sy
        bl      __inval_cache_range
 

diff --git a/arch/arm64/kernel/vmlinux.lds.S b/arch/arm64/kernel/vmlinux.lds.S
index 7a5228c7abdd7cc9c8226df887a2ec9e7b4d053d..9442a51d3540558a363e095bd31c6e3fcf9fb119 100644 (file)
--- a/arch/arm64/kernel/vmlinux.lds.S
+++ b/arch/arm64/kernel/vmlinux.lds.S
@@ -194,11 +194,6 @@ SECTIONS
        swapper_pg_dir = .;
        . += SWAPPER_DIR_SIZE;
 
-#ifdef CONFIG_ARM64_SW_TTBR0_PAN
-       reserved_ttbr0 = .;
-       . += RESERVED_TTBR0_SIZE;
-#endif
-
        _end = .;
 
        STABS_DEBUG