Fix a typo in the dag combiner, so that this can work on i64 targets

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@23856 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 6c1d22c2bab7ec7189d58e7c1ad7de1e759f6154..b523bce339a84437ac5d1cc7dd0a56e87c9d511b 100644 (file)
--- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2607,9 +2607,8 @@ SDOperand DAGCombiner::BuildSDIV(SDNode *N) {
   }
   // Extract the sign bit and add it to the quotient
   SDOperand T =
-    DAG.getNode(ISD::SRL, MVT::i32, Q,
-                DAG.getConstant(MVT::getSizeInBits(VT)-1,
-                                TLI.getShiftAmountTy()));
+    DAG.getNode(ISD::SRL, VT, Q, DAG.getConstant(MVT::getSizeInBits(VT)-1,
+                                                 TLI.getShiftAmountTy()));
   WorkList.push_back(T.Val);
   return DAG.getNode(ISD::ADD, VT, Q, T);
 }