arm64: dts: rk3368-android: revert to use uart2 for debug
authorXu Jianqun <jay.xu@rock-chips.com>
Wed, 10 May 2017 01:21:04 +0000 (09:21 +0800)
committerXu Jianqun <jay.xu@rock-chips.com>
Wed, 10 May 2017 01:21:04 +0000 (09:21 +0800)
Change-Id: I5e6c88e185a2ad39b082ad4b989589cd46ecb874
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3368-android.dtsi

index ac5e8fa1189ff28f098ea5a89036c0b82df4a67b..8339cca08cb0c6bf5e8545a1b65225005527a4a1 100644 (file)
 
 / {
        chosen {
-               bootargs = "earlycon=uart8250,mmio32,0xff1b0000 swiotlb=1 firmware_class.path=/system/vendor/firmware";
+               bootargs = "earlycon=uart8250,mmio32,0xff690000 swiotlb=1 firmware_class.path=/system/vendor/firmware";
        };
 
        fiq_debugger: fiq-debugger {
                compatible = "rockchip,fiq-debugger";
-               rockchip,serial-id = <3>;
+               rockchip,serial-id = <2>;
                rockchip,wake-irq = <0>;
                rockchip,irq-mode-enable = <0>;  /* If enable uart uses irq instead of fiq */
                rockchip,baudrate = <115200>;  /* Only 115200 and 1500000 */
                pinctrl-names = "default";
-               pinctrl-0 = <&uart3_xfer>;
+               pinctrl-0 = <&uart2_xfer>;
                interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH 0>;   /* signal irq */
        };
 
        };
 };
 
-&uart3 {
+&uart2 {
        status = "okay";
 };