sdmmc: prepare for RK2918 and RK31
authorxbw <xbw@rock-chips.com>
Fri, 17 Aug 2012 02:49:17 +0000 (10:49 +0800)
committerxbw <xbw@rock-chips.com>
Fri, 17 Aug 2012 02:49:17 +0000 (10:49 +0800)
drivers/mmc/host/rk29_sdmmc.c
drivers/mmc/host/rk29_sdmmc.h

index fc6e5b28d6b2e54b1e9141a8d716b257c9de27ee..5584f198a924a6223e8b6e0799888fd72fee05fa 100755 (executable)
@@ -70,13 +70,17 @@ int debug_level = 5;
 #endif
 
 #if defined(CONFIG_ARCH_RK29)
-#define RK29_SDMMC0DETECTN_GPIO RK29_PIN2_PA2
-#define RK29_SDMMC0PWREN_GPIO   RK29_PIN5_PD5
-
+    #define RK29_SDMMC0DETECTN_GPIO RK29_PIN2_PA2
+    #define RK29_SDMMC0PWREN_GPIO   RK29_PIN5_PD5
 #elif defined(CONFIG_ARCH_RK30)
-#define RK29_SDMMC0DETECTN_GPIO RK30_PIN3_PB6
-#define RK29_SDMMC0PWREN_GPIO   RK30_PIN3_PA7
-
+    #define RK29_SDMMC0DETECTN_GPIO RK30_PIN3_PB6
+    #define RK29_SDMMC0PWREN_GPIO   RK30_PIN3_PA7
+#elif defined(CONFIG_ARCH_RK2928)
+    #define RK29_SDMMC0DETECTN_GPIO RK2928_PIN1_PC7
+    #define RK29_SDMMC0PWREN_GPIO   RK2928_PIN1_PB6
+#elif defined(CONFIG_ARCH_RK31)
+    #define RK29_SDMMC0DETECTN_GPIO RK30_PIN3_PB0
+    #define RK29_SDMMC0PWREN_GPIO   RK30_PIN3_PA1
 #endif
 
 #define RK29_SDMMC_ERROR_FLAGS         (SDMMC_INT_FRUN | SDMMC_INT_HLE )
@@ -1534,7 +1538,7 @@ int rk29_sdmmc_reset_controller(struct rk29_sdmmc *host)
     /* reset */
 #if defined(CONFIG_ARCH_RK29)     
     rk29_sdmmc_write(host->regs, SDMMC_CTRL,(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET ));
-#elif defined(CONFIG_ARCH_RK30)
+#else
     rk29_sdmmc_write(host->regs, SDMMC_CTRL,(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET));
 #endif
     timeOut = 1000;
@@ -1946,7 +1950,7 @@ static void rk29_sdmmc_INT_CMD_DONE_timeout(unsigned long host_data)
        
        if(STATE_SENDING_CMD == host->state)
        {
-           if((0==host->cmd->retries)&&(12 != host->cmd->opcode))
+           if((0==host->cmd->retries)&&(12 != host->cmd->opcode)/*&&(55 != host->cmd->opcode)*/)
            {
            printk(KERN_WARNING "%d... cmd=%d, INT_CMD_DONE timeout, errorStep=0x%x, host->state=%x [%s]\n",\
                  __LINE__,host->cmd->opcode, host->errorstep,host->state,host->dma_name);
@@ -3551,12 +3555,14 @@ static int rk29_sdmmc_probe(struct platform_device *pdev)
             ret = rk29_dma_config(host->dma_info.chn, 4, 16);
         }
         else
-        {            
-           #if defined(CONFIG_ARCH_RK30)
-            ret = rk29_dma_config(host->dma_info.chn, 4, 16); // a unified set the burst value to 16 in RK30,noted at 2012-07-16
-           #else
-            ret = rk29_dma_config(host->dma_info.chn, 4, 1);  // to maintain set this value to 1 in RK29,noted at 2012-07-16
-           #endif 
+        {
+            #if defined(CONFIG_ARCH_RK29)
+                // to maintain set this value to 1 in RK29,noted at 2012-07-16
+                ret = rk29_dma_config(host->dma_info.chn, 4, 1);  
+            #else
+                // a unified set the burst value to 16 in RK30,noted at 2012-07-16
+                ret = rk29_dma_config(host->dma_info.chn, 4, 16); 
+            #endif 
         }
 #endif
         if(ret < 0)
@@ -3775,6 +3781,10 @@ static int rk29_sdmmc_sdcard_suspend(struct rk29_sdmmc *host)
     rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_GPIO2A2);
 #elif defined(CONFIG_ARCH_RK30)
        rk29_mux_api_set(GPIO3B6_SDMMC0DETECTN_NAME, GPIO3B_GPIO3B6);
+#elif defined(CONFIG_ARCH_RK2928)
+       rk29_mux_api_set(GPIO1C1_MMC0_DETN_NAME, GPIO1C_GPIO1C1);
+#elif defined(CONFIG_ARCH_RK31)
+       rk29_mux_api_set(GPIO3B0_SDMMC0DETECTN_NAME, GPIO3B_GPIO3B0);   
 #endif
 
        gpio_request(RK29_SDMMC0DETECTN_GPIO, "sd_detect");
@@ -3800,6 +3810,10 @@ static void rk29_sdmmc_sdcard_resume(struct rk29_sdmmc *host)
     rk29_mux_api_set(GPIO2A2_SDMMC0DETECTN_NAME, GPIO2L_SDMMC0_DETECT_N);
 #elif defined(CONFIG_ARCH_RK30)
        rk29_mux_api_set(GPIO3B6_SDMMC0DETECTN_NAME, GPIO3B_SDMMC0_DETECT_N);
+#elif defined(CONFIG_ARCH_RK2928)
+       rk29_mux_api_set(GPIO1C1_MMC0_DETN_NAME, GPIO1C_MMC0_DETN);
+#elif defined(CONFIG_ARCH_RK31)
+       rk29_mux_api_set(GPIO3B0_SDMMC0DETECTN_NAME, GPIO3B_SDMMC0DETECTN);     
 #endif 
 }
 
index 60bb6c7ef23f53fde8c1fac3fd3d586d621ac939..17b6d2b209b81c89d2725735c8b8f2be86ebd663 100755 (executable)
@@ -48,7 +48,7 @@
 
 #if defined(CONFIG_ARCH_RK29)
 #define SDMMC_DATA            (0x100)
-#elif defined(CONFIG_ARCH_RK30)
+#elif defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31) || defined(CONFIG_ARCH_RK2928)
 #define SDMMC_VERID           (0x06c)   //Version ID register
 #define SDMMC_UHS_REG         (0x074)   //UHS-I register
 #define SDMMC_RST_n           (0x078)   //Hardware reset register
 /* Interrupt status & mask register defines(base+0x24) */
 #if defined(CONFIG_ARCH_RK29)
 #define SDMMC_INT_SDIO          RK2818_BIT(16)      //SDIO interrupt
-#elif defined(CONFIG_ARCH_RK30)
+#elif defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31)  || defined(CONFIG_ARCH_RK2928)
 #define SDMMC_INT_SDIO          RK2818_BIT(24)      //SDIO interrupt
 #define SDMMC_INT_UNBUSY        RK2818_BIT(16)      //data no busy interrupt
 #endif
 #define RX_WMARK          (0xF)        //RX watermark level set to 15
 #define TX_WMARK          (0x10)       //TX watermark level set to 16
 
-#elif defined(CONFIG_ARCH_RK30)
+#elif defined(CONFIG_ARCH_RK30) || defined(CONFIG_ARCH_RK31)  || defined(CONFIG_ARCH_RK2928)
 #define FIFO_DEPTH        (0x100)       //FIFO depth = 256 word
 #define RX_WMARK_SHIFT    (16)
 #define TX_WMARK_SHIFT    (0)