ARM64: dts: rockchip: add node for rga2

Change-Id: Icd6fd0917671a1f39e1c75d09387fdb30a8b3292
Signed-off-by: Xu Jianqun <jay.xu@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-tb.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-tb.dtsi
index c5582ede11ec05133350a44048026329ca23dc93..08f676a8b101a4ab8a665340a50c7c207fed214d 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368-tb.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368-tb.dtsi
@@ -571,6 +571,10 @@
        status = "disabled";
 };
 
+&rga {
+       status = "okay";
+};
+
 &saradc {
        status = "okay";
 };

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 7a1e33415fbaafd4cd52ad5fb7846295848546be..681c13c468f40674282da257e78d11a684f5d013 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -798,6 +798,16 @@
                status = "disabled";
        };
 
+       rga: rga@ff920000 {
+               compatible = "rockchip,rga2";
+               dev_mode = <1>;
+               reg = <0x0 0xff920000 0x0 0x1000>;
+               interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru ACLK_RGA>, <&cru HCLK_RGA>, <&cru SCLK_RGA>;
+               clock-names = "aclk_rga", "hclk_rga", "clk_rga";
+               status = "disabled";
+       };
+
        pinctrl: pinctrl {
                compatible = "rockchip,rk3368-pinctrl";
                rockchip,grf = <&grf>;