let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_ssse3_phadd_w : GCCBuiltin<"__builtin_ia32_phaddw">,
Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
- llvm_v4i16_ty], [IntrNoMem, Commutative]>;
+ llvm_v4i16_ty], [IntrNoMem]>;
def int_x86_ssse3_phadd_w_128 : GCCBuiltin<"__builtin_ia32_phaddw128">,
Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
- llvm_v8i16_ty], [IntrNoMem, Commutative]>;
+ llvm_v8i16_ty], [IntrNoMem]>;
def int_x86_ssse3_phadd_d : GCCBuiltin<"__builtin_ia32_phaddd">,
Intrinsic<[llvm_v2i32_ty, llvm_v2i32_ty,
- llvm_v2i32_ty], [IntrNoMem, Commutative]>;
+ llvm_v2i32_ty], [IntrNoMem]>;
def int_x86_ssse3_phadd_d_128 : GCCBuiltin<"__builtin_ia32_phaddd128">,
Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
- llvm_v4i32_ty], [IntrNoMem, Commutative]>;
+ llvm_v4i32_ty], [IntrNoMem]>;
def int_x86_ssse3_phadd_sw : GCCBuiltin<"__builtin_ia32_phaddsw">,
Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
- llvm_v4i16_ty], [IntrNoMem, Commutative]>;
+ llvm_v4i16_ty], [IntrNoMem]>;
def int_x86_ssse3_phadd_sw_128 : GCCBuiltin<"__builtin_ia32_phaddsw128">,
Intrinsic<[llvm_v4i32_ty, llvm_v4i32_ty,
- llvm_v4i32_ty], [IntrNoMem, Commutative]>;
+ llvm_v4i32_ty], [IntrNoMem]>;
def int_x86_ssse3_phsub_w : GCCBuiltin<"__builtin_ia32_phsubw">,
Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
def int_x86_ssse3_pmadd_ub_sw : GCCBuiltin<"__builtin_ia32_pmaddubsw">,
Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
- llvm_v4i16_ty], [IntrNoMem, Commutative]>;
+ llvm_v4i16_ty], [IntrNoMem]>;
def int_x86_ssse3_pmadd_ub_sw_128 : GCCBuiltin<"__builtin_ia32_pmaddubsw128">,
Intrinsic<[llvm_v8i16_ty, llvm_v8i16_ty,
- llvm_v8i16_ty], [IntrNoMem, Commutative]>;
+ llvm_v8i16_ty], [IntrNoMem]>;
+}
+// Packed multiply high with round and scale
+let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.".
def int_x86_ssse3_pmul_hr_sw : GCCBuiltin<"__builtin_ia32_pmulhrsw">,
Intrinsic<[llvm_v4i16_ty, llvm_v4i16_ty,
llvm_v4i16_ty], [IntrNoMem, Commutative]>;
defm PHADDW : SS3I_binop_rm_int_16<0x01, "phaddw",
int_x86_ssse3_phadd_w,
- int_x86_ssse3_phadd_w_128, 1>;
+ int_x86_ssse3_phadd_w_128>;
defm PHADDD : SS3I_binop_rm_int_32<0x02, "phaddd",
int_x86_ssse3_phadd_d,
- int_x86_ssse3_phadd_d_128, 1>;
+ int_x86_ssse3_phadd_d_128>;
defm PHADDSW : SS3I_binop_rm_int_16<0x03, "phaddsw",
int_x86_ssse3_phadd_sw,
- int_x86_ssse3_phadd_sw_128, 1>;
+ int_x86_ssse3_phadd_sw_128>;
defm PHSUBW : SS3I_binop_rm_int_16<0x05, "phsubw",
int_x86_ssse3_phsub_w,
int_x86_ssse3_phsub_w_128>;
int_x86_ssse3_phsub_sw_128>;
defm PMADDUBSW : SS3I_binop_rm_int_8 <0x04, "pmaddubsw",
int_x86_ssse3_pmadd_ub_sw,
- int_x86_ssse3_pmadd_ub_sw_128, 1>;
+ int_x86_ssse3_pmadd_ub_sw_128>;
defm PMULHRSW : SS3I_binop_rm_int_16<0x0B, "pmulhrsw",
int_x86_ssse3_pmul_hr_sw,
int_x86_ssse3_pmul_hr_sw_128, 1>;