ARM: exynos4: convert to CONFIG_MULTI_IRQ_HANDLER
authorMarc Zyngier <marc.zyngier@arm.com>
Mon, 30 May 2011 10:04:53 +0000 (11:04 +0100)
committerMarc Zyngier <marc.zyngier@arm.com>
Tue, 15 Nov 2011 18:14:00 +0000 (18:14 +0000)
Convert the Exynos4 platforms to be using the gic_handle_irq
function as their primary interrupt handler.

Cc: Ben Dooks <ben-linux@fluff.org>
Cc: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arch/arm/Kconfig
arch/arm/mach-exynos/cpu.c
arch/arm/mach-exynos/include/mach/entry-macro.S
arch/arm/mach-exynos/mach-armlex4210.c
arch/arm/mach-exynos/mach-nuri.c
arch/arm/mach-exynos/mach-origen.c
arch/arm/mach-exynos/mach-smdk4x12.c
arch/arm/mach-exynos/mach-smdkv310.c
arch/arm/mach-exynos/mach-universal_c210.c

index 8f39263c0768e0b14de31793f126691d731f947a..d897255bcdf5e774027fcb532a2b659e8769482d 100644 (file)
@@ -854,6 +854,7 @@ config ARCH_EXYNOS
        select HAVE_S3C2410_I2C if I2C
        select HAVE_S3C2410_WATCHDOG if WATCHDOG
        select NEED_MACH_MEMORY_H
+       select MULTI_IRQ_HANDLER
        help
          Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
 
index e92e464bdbba7d8d0e7302ccb58660742b3cad6d..6e34485caa3624be8c96af604c2db343e38cae31 100644 (file)
@@ -15,6 +15,7 @@
 #include <asm/mach/irq.h>
 
 #include <asm/proc-fns.h>
+#include <asm/exception.h>
 #include <asm/hardware/cache-l2x0.h>
 #include <asm/hardware/gic.h>
 
@@ -33,8 +34,6 @@
 #include <mach/regs-irq.h>
 #include <mach/regs-pmu.h>
 
-unsigned int gic_bank_offset __read_mostly;
-
 extern int combiner_init(unsigned int combiner_nr, void __iomem *base,
                         unsigned int irq_start);
 extern void combiner_cascade_irq(unsigned int combiner_nr, unsigned int irq);
@@ -210,6 +209,7 @@ void __init exynos4_init_clocks(int xtal)
 void __init exynos4_init_irq(void)
 {
        int irq;
+       unsigned int bank_offset;
 
        gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000;
 
index f5e9fd8e37b4fc0d4e2657ba3739ea2d78aa7151..3ba4f547534b0715ab1f1cb8c00a14bbe952d248 100644 (file)
@@ -9,83 +9,8 @@
  * warranty of any kind, whether express or implied.
 */
 
-#include <mach/hardware.h>
-#include <mach/map.h>
-#include <asm/hardware/gic.h>
-
                .macro  disable_fiq
                .endm
 
-               .macro  get_irqnr_preamble, base, tmp
-               mov     \tmp, #0
-
-               mrc     p15, 0, \base, c0, c0, 5
-               and     \base, \base, #3
-               cmp     \base, #0
-               beq     1f
-
-               ldr     \tmp, =gic_bank_offset
-               ldr     \tmp, [\tmp]
-               cmp     \base, #1
-               beq     1f
-
-               cmp     \base, #2
-               addeq   \tmp, \tmp, \tmp
-               addne   \tmp, \tmp, \tmp, LSL #1
-
-1:             ldr     \base, =gic_cpu_base_addr
-               ldr     \base, [\base]
-               add     \base, \base, \tmp
-               .endm
-
                .macro  arch_ret_to_user, tmp1, tmp2
                .endm
-
-               /*
-                * The interrupt numbering scheme is defined in the
-                * interrupt controller spec.  To wit:
-                *
-                * Interrupts 0-15 are IPI
-                * 16-28 are reserved
-                * 29-31 are local.  We allow 30 to be used for the watchdog.
-                * 32-1020 are global
-                * 1021-1022 are reserved
-                * 1023 is "spurious" (no interrupt)
-                *
-                * For now, we ignore all local interrupts so only return an interrupt if it's
-                * between 30 and 1020.  The test_for_ipi routine below will pick up on IPIs.
-                *
-                * A simple read from the controller will tell us the number of the highest
-                 * priority enabled interrupt.  We then just need to check whether it is in the
-                * valid range for an IRQ (30-1020 inclusive).
-                */
-
-               .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
-
-               ldr     \irqstat, [\base, #GIC_CPU_INTACK] /* bits 12-10 = src CPU, 9-0 = int # */
-
-               ldr     \tmp, =1021
-
-               bic     \irqnr, \irqstat, #0x1c00
-
-               cmp     \irqnr, #15
-               cmpcc   \irqnr, \irqnr
-               cmpne   \irqnr, \tmp
-               cmpcs   \irqnr, \irqnr
-               addne   \irqnr, \irqnr, #32
-
-               .endm
-
-               /* We assume that irqstat (the raw value of the IRQ acknowledge
-                * register) is preserved from the macro above.
-                * If there is an IPI, we immediately signal end of interrupt on the
-                * controller, since this requires the original irqstat value which
-                * we won't easily be able to recreate later.
-                */
-
-               .macro test_for_ipi, irqnr, irqstat, base, tmp
-               bic     \irqnr, \irqstat, #0x1c00
-               cmp     \irqnr, #16
-               strcc   \irqstat, [\base, #GIC_CPU_EOI]
-               cmpcs   \irqnr, \irqnr
-               .endm
index f0ca6c157d292d4ac2358ada85de4cd6c1949c18..49da3089249a04244f4df5e592ded614a694ee65 100644 (file)
@@ -16,6 +16,7 @@
 #include <linux/smsc911x.h>
 
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
 #include <plat/cpu.h>
@@ -210,6 +211,7 @@ MACHINE_START(ARMLEX4210, "ARMLEX4210")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = armlex4210_map_io,
+       .handle_irq     = gic_handle_irq,
        .init_machine   = armlex4210_machine_init,
        .timer          = &exynos4_timer,
 MACHINE_END
index 236bbe187163257665e70ea02c1be15d7814d53d..5acec11821a4a059d226d27b91b565c3d7cc6fdc 100644 (file)
@@ -32,6 +32,7 @@
 #include <media/v4l2-mediabus.h>
 
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
 #include <plat/adc.h>
@@ -1333,6 +1334,7 @@ MACHINE_START(NURI, "NURI")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = nuri_map_io,
+       .handle_irq     = gic_handle_irq,
        .init_machine   = nuri_machine_init,
        .timer          = &exynos4_timer,
        .reserve        = &nuri_reserve,
index f80b563f2be7841d3fc2bb939d0bb20d513b86ae..5561b06c38ece1db9acb1e5432894cd0aecac83a 100644 (file)
@@ -22,6 +22,7 @@
 #include <linux/lcd.h>
 
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
 #include <video/platform_lcd.h>
@@ -694,6 +695,7 @@ MACHINE_START(ORIGEN, "ORIGEN")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = origen_map_io,
+       .handle_irq     = gic_handle_irq,
        .init_machine   = origen_machine_init,
        .timer          = &exynos4_timer,
        .reserve        = &origen_reserve,
index fcf2e0e23d53f31d98a760e9c11610a62642765e..722d82d7f217dca6c748616ce6e9f735f70a113b 100644 (file)
@@ -21,6 +21,7 @@
 #include <linux/serial_core.h>
 
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
 #include <plat/backlight.h>
@@ -287,6 +288,7 @@ MACHINE_START(SMDK4212, "SMDK4212")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = smdk4x12_map_io,
+       .handle_irq     = gic_handle_irq,
        .init_machine   = smdk4x12_machine_init,
        .timer          = &exynos4_timer,
 MACHINE_END
@@ -297,6 +299,7 @@ MACHINE_START(SMDK4412, "SMDK4412")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = smdk4x12_map_io,
+       .handle_irq     = gic_handle_irq,
        .init_machine   = smdk4x12_machine_init,
        .timer          = &exynos4_timer,
 MACHINE_END
index cec2afabe7b42475e2d1f8585642b048ea7ee34b..edc60b6108ed301c05beff160b81fc5051a22363 100644 (file)
@@ -21,6 +21,7 @@
 #include <linux/pwm_backlight.h>
 
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
 #include <video/platform_lcd.h>
@@ -375,6 +376,7 @@ MACHINE_START(SMDKV310, "SMDKV310")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = smdkv310_map_io,
+       .handle_irq     = gic_handle_irq,
        .init_machine   = smdkv310_machine_init,
        .timer          = &exynos4_timer,
        .reserve        = &smdkv310_reserve,
@@ -385,6 +387,7 @@ MACHINE_START(SMDKC210, "SMDKC210")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = smdkv310_map_io,
+       .handle_irq     = gic_handle_irq,
        .init_machine   = smdkv310_machine_init,
        .timer          = &exynos4_timer,
 MACHINE_END
index a2a177ff4b44fa324f948e61eafbaf7225cb0570..48e85b03cb165eb069965ebd748095105696dc44 100644 (file)
 #include <linux/mmc/host.h>
 #include <linux/i2c-gpio.h>
 #include <linux/i2c/mcs.h>
-#include <linux/i2c/atmel_mxt_ts.h>
+ <linux/i2c/atmel_mxt_ts.h>
 
 #include <asm/mach/arch.h>
+#include <asm/hardware/gic.h>
 #include <asm/mach-types.h>
 
 #include <plat/regs-serial.h>
@@ -1058,6 +1059,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
        .atag_offset    = 0x100,
        .init_irq       = exynos4_init_irq,
        .map_io         = universal_map_io,
+       .handle_irq     = gic_handle_irq,
        .init_machine   = universal_machine_init,
        .timer          = &exynos4_timer,
        .reserve        = &universal_reserve,