ARM64: dts: add mipi node for rk3368 tb

Change-Id: I0f53afd902f216ee94d6870385c98e5987253d15
Signed-off-by: Xubilv <xbl@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts b/arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts
index d66474875f80e2d40808aa0bf03b61144f475422..b6d33bcb63f05faede51c6ada46b982e37cd744f 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3368-tb-sheep.dts
@@ -51,3 +51,12 @@
 &syr827 {
        status = "okay";
 };
+
+&mipi {
+       status = "okay";
+};
+
+&rk_screen {
+       status = "okay";
+       #include <dt-bindings/display/screen-timing/lcd-tv080wum-mipi.dtsi>
+};

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index a433fbd0feac3916957e195a91c9525688af5c84..b12858c7a1b35bd0180254061afd1e114b75132c 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -1118,6 +1118,18 @@
                status = "disabled";
        };
 
+       mipi: mipi@ff960000 {
+               compatible = "rockchip,rk3368-dsi";
+               rockchip,prop = <0>;
+               reg = <0x0 0xff960000 0x0 0x4000>, <0x0 0xff968000 0x0 0x4000>;
+               reg-names = "mipi_dsi_host" ,"mipi_dsi_phy";
+               interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_DPHYTX0>, <&cru PCLK_MIPI_DSI0>;
+               clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "pclk_mipi_dsi_host";
+               /*power-domains = <&power PD_VIO>;*/
+               status = "disabled";
+       };
+
        lvds: lvds@ff968000 {
                compatible = "rockchip,rk3368-lvds";
                rockchip,grf = <&grf>;