video: rockchip: lcdc: 3366: 480i and 576i need sel dclk div2

Change-Id: Ibc27be643ae33a81d181d9398b362af0ce0c6f03
Signed-off-by: Huang Jiachai <hjc@rock-chips.com>

diff --git a/drivers/video/rockchip/lcdc/rk3368_lcdc.c b/drivers/video/rockchip/lcdc/rk3368_lcdc.c
index 7814dfa53dd6d27b006656509fce1497aaf55820..77196ab89d21eace3158a5c3d3bc3492fa14fe14 100644 (file)
--- a/drivers/video/rockchip/lcdc/rk3368_lcdc.c
+++ b/drivers/video/rockchip/lcdc/rk3368_lcdc.c
@@ -1686,6 +1686,16 @@ static int rk3368_config_timing(struct rk_lcdc_driver *dev_drv)
                lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
                             m_DSP_INTERLACE | m_DSP_FIELD_POL,
                             v_DSP_INTERLACE(1) | v_DSP_FIELD_POL(0));
+               if (lcdc_dev->soc_type == VOP_FULL_RK3366) {
+                       if (y_res <= 576)
+                               lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
+                                            m_SW_CORE_DCLK_SEL,
+                                            v_SW_CORE_DCLK_SEL(1));
+                       else
+                               lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
+                                            m_SW_CORE_DCLK_SEL,
+                                            v_SW_CORE_DCLK_SEL(0));
+               }
                mask =
                    m_WIN0_INTERLACE_READ | m_WIN0_YRGB_DEFLICK |
                    m_WIN0_CBR_DEFLICK;
@@ -1733,7 +1743,11 @@ static int rk3368_config_timing(struct rk_lcdc_driver *dev_drv)
                lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
                             m_DSP_INTERLACE | m_DSP_FIELD_POL,
                             v_DSP_INTERLACE(0) | v_DSP_FIELD_POL(0));
-
+               if (lcdc_dev->soc_type == VOP_FULL_RK3366) {
+                       lcdc_msk_reg(lcdc_dev, DSP_CTRL0,
+                                    m_SW_CORE_DCLK_SEL,
+                                    v_SW_CORE_DCLK_SEL(0));
+               }
                mask =
                    m_WIN0_INTERLACE_READ | m_WIN0_YRGB_DEFLICK |
                    m_WIN0_CBR_DEFLICK;

diff --git a/drivers/video/rockchip/lcdc/rk3368_lcdc.h b/drivers/video/rockchip/lcdc/rk3368_lcdc.h
index 4826d1486321944199e09e47a74c0d5acbc84550..e8d47202565c5125a055d194998b9b750707829e 100755 (executable)
--- a/drivers/video/rockchip/lcdc/rk3368_lcdc.h
+++ b/drivers/video/rockchip/lcdc/rk3368_lcdc.h
@@ -110,6 +110,7 @@
 
 #define DSP_CTRL0                      (0x0010)
 #define v_DSP_OUT_MODE(x)                      (((x)&0x0f)<<0)
+#define v_SW_CORE_DCLK_SEL(x)                  (((x)&1)<<4)
 #define v_DSP_DCLK_DDR(x)                      (((x)&1)<<8)
 #define v_DSP_DDR_PHASE(x)                     (((x)&1)<<9)
 #define v_DSP_INTERLACE(x)                     (((x)&1)<<10)
@@ -127,6 +128,7 @@
 #define v_DSP_X_MIR_EN(x)                      (((x)&1)<<22)
 #define v_DSP_Y_MIR_EN(x)                      (((x)&1)<<23)
 #define m_DSP_OUT_MODE                         (0x0f<<0)
+#define m_SW_CORE_DCLK_SEL                     (1<<4)
 #define m_DSP_DCLK_DDR                         (1<<8)
 #define m_DSP_DDR_PHASE                                (1<<9)
 #define m_DSP_INTERLACE                                (1<<10)