+++ /dev/null
-/*
- * hdmi_i2s.c -- HDMI i2s audio for rockchip
- *
- * Copyright (C) 2015 Fuzhou Rockchip Electronics Co., Ltd
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- */
-
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/slab.h>
-#include <linux/of.h>
-#include <linux/of_gpio.h>
-#include <sound/soc.h>
-#include <sound/pcm.h>
-#include <sound/initval.h>
-
-struct snd_soc_dai_driver hdmi_i2s_dai = {
- .name = "rk-hdmi-i2s-hifi",
- .playback = {
- .stream_name = "HiFi Playback",
- .channels_min = 2,
- .channels_max = 8,
- .rates = (SNDRV_PCM_RATE_32000 |
- SNDRV_PCM_RATE_44100 |
- SNDRV_PCM_RATE_48000 |
- SNDRV_PCM_RATE_96000 |
- SNDRV_PCM_RATE_192000),
- .formats = (SNDRV_PCM_FMTBIT_S16_LE |
- SNDRV_PCM_FMTBIT_S20_3LE |
- SNDRV_PCM_FMTBIT_S24_LE),
- },
-};
-
-static struct snd_soc_codec_driver soc_codec_dev_hdmi_i2s;
-
-static int rockchip_hdmi_i2s_audio_probe(struct platform_device *pdev)
-{
- int ret;
-
- ret = snd_soc_register_codec(&pdev->dev,
- &soc_codec_dev_hdmi_i2s,
- &hdmi_i2s_dai, 1);
-
- if (ret)
- dev_err(&pdev->dev, "register card failed: %d\n", ret);
-
- return ret;
-}
-
-static int rockchip_hdmi_i2s_audio_remove(struct platform_device *pdev)
-{
- snd_soc_unregister_codec(&pdev->dev);
-
- return 0;
-}
-
-#ifdef CONFIG_OF
-static const struct of_device_id rockchip_hdmi_i2s_of_match[] = {
- { .compatible = "hdmi-i2s", },
- {},
-};
-MODULE_DEVICE_TABLE(of, rockchip_hdmi_i2s_of_match);
-#endif /* CONFIG_OF */
-
-static struct platform_driver rockchip_hdmi_i2s_audio_driver = {
- .driver = {
- .name = "hdmi-i2s",
- .of_match_table = of_match_ptr(rockchip_hdmi_i2s_of_match),
- },
- .probe = rockchip_hdmi_i2s_audio_probe,
- .remove = rockchip_hdmi_i2s_audio_remove,
-};
-
-module_platform_driver(rockchip_hdmi_i2s_audio_driver);
-
-MODULE_DESCRIPTION("Rockchip HDMI I2S Dummy Driver");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:hdmi-i2s");
+++ /dev/null
-/*
- * ALSA SoC SPDIF DIT driver
- *
- * This driver is used by controllers which can operate in DIT (SPDI/F) where
- * no codec is needed. This file provides stub codec that can be used
- * in these configurations. TI DaVinci Audio controller uses this driver.
- *
- * Author: Steve Chen, <schen@mvista.com>
- * Copyright: (C) 2009 MontaVista Software, Inc., <source@mvista.com>
- * Copyright: (C) 2009 Texas Instruments, India
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/slab.h>
-#include <linux/of.h>
-#include <linux/of_gpio.h>
-#include <sound/soc.h>
-#include <sound/pcm.h>
-#include <sound/initval.h>
-
-#define DRV_NAME "spdif-dit"
-
-#define STUB_RATES SNDRV_PCM_RATE_8000_192000
-#define STUB_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
-
-
-static struct snd_soc_codec_driver soc_codec_spdif_dit;
-
-static struct snd_soc_dai_driver dit_stub_dai = {
- .name = "rk-hdmi-spdif-hifi",
- .playback = {
- .stream_name = "Playback",
- .channels_min = 1,
- .channels_max = 384,
- .rates = STUB_RATES,
- .formats = STUB_FORMATS,
- },
-};
-
-static int hdmi_spdif_audio_probe(struct platform_device *pdev)
-{
- int ret;
-
- ret = snd_soc_register_codec(&pdev->dev, &soc_codec_spdif_dit,
- &dit_stub_dai, 1);
-
- if (ret)
- dev_err(&pdev->dev, "%s register failed: %d\n",
- __func__, ret);
-
- return ret;
-}
-
-static int hdmi_spdif_audio_remove(struct platform_device *pdev)
-{
- snd_soc_unregister_codec(&pdev->dev);
-
- return 0;
-}
-
-#ifdef CONFIG_OF
-static const struct of_device_id hdmi_spdif_of_match[] = {
- { .compatible = "hdmi-spdif", },
- {},
-};
-MODULE_DEVICE_TABLE(of, hdmi_spdif_of_match);
-#endif /* CONFIG_OF */
-
-static struct platform_driver hdmi_spdif_audio_driver = {
- .driver = {
- .name = "hdmi-spdif",
- .of_match_table = of_match_ptr(hdmi_spdif_of_match),
- },
- .probe = hdmi_spdif_audio_probe,
- .remove = hdmi_spdif_audio_remove,
-};
-
-module_platform_driver(hdmi_spdif_audio_driver);
-
-MODULE_AUTHOR("Steve Chen <schen@mvista.com>");
-MODULE_DESCRIPTION("SPDIF dummy codec driver");
-MODULE_LICENSE("GPL");
-MODULE_ALIAS("platform:" DRV_NAME);
+++ /dev/null
-/*
- * rt5631.c -- RT5631 ALSA Soc Audio driver
- *
- * Copyright 2011 Realtek Microelectronics
- *
- * Author: flove <flove@realtek.com>
- *
- * Based on WM8753.c
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- *
- */
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/pm.h>
-#include <linux/i2c.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <sound/core.h>
-#include <sound/pcm.h>
-#include <sound/pcm_params.h>
-#include <sound/soc.h>
-#include <sound/soc-dapm.h>
-#include <sound/initval.h>
-#include <sound/tlv.h>
-
-#include "rt5631_phone.h"
-
-static struct snd_soc_codec *rt5631_codec;
-
-struct rt5631_init_reg {
- u8 reg;
- u16 val;
-};
-
-static struct rt5631_init_reg init_list[] = {
- {RT5631_SPK_OUT_VOL , 0xc8c8},
- {RT5631_HP_OUT_VOL , 0xc0c0},
- {RT5631_MONO_AXO_1_2_VOL , 0xa080},
- {RT5631_ADC_REC_MIXER , 0xb0b0},
- {RT5631_MIC_CTRL_2 , 0x5588},
-
- {RT5631_OUTMIXER_L_CTRL , 0xdfC0},
- {RT5631_OUTMIXER_R_CTRL , 0xdfC0},
- {RT5631_SPK_MIXER_CTRL , 0xd8d8},
- {RT5631_SPK_MONO_OUT_CTRL , 0x6c00},
- {RT5631_GEN_PUR_CTRL_REG , 0x4e00},
- //{RT5631_SPK_MONO_HP_OUT_CTRL , 0x0000},
- {RT5631_SPK_MONO_HP_OUT_CTRL , 0x000c},//HP from DAC,speaker out from SpeakerOut Mixer
- {RT5631_INT_ST_IRQ_CTRL_2 , 0x0f18},
- {RT5631_MIC_CTRL_1 , 0x8080},
- {RT5631_INDEX_ADD , 0x0048},
- {RT5631_INDEX_DATA , 0xf73c},
-};
-#define RT5631_INIT_REG_LEN ARRAY_SIZE(init_list)
-
-static int rt5631_reg_init(struct snd_soc_codec *codec)
-{
- int i;
-
- for (i = 0; i < RT5631_INIT_REG_LEN; i++)
- snd_soc_write(codec, init_list[i].reg, init_list[i].val);
-
- return 0;
-}
-
-static int rt5631_index_sync(struct snd_soc_codec *codec)
-{
- int i;
-
- for (i = 0; i < RT5631_INIT_REG_LEN; i++)
- if (RT5631_INDEX_ADD == init_list[i].reg ||
- RT5631_INDEX_DATA == init_list[i].reg)
- snd_soc_write(codec, init_list[i].reg,
- init_list[i].val);
-
- return 0;
-}
-
-struct rt5631_priv {
- struct snd_soc_codec *codec;
- int codec_version;
- int master[RT5631_AIFS];
- int sysclk[RT5631_SCLKS];
- int rate;
- int rx_rate;
- int bclk_rate;
- int dmic_used_flag;
-};
-
-static const u16 rt5631_reg[RT5631_VENDOR_ID2 + 1] = {
- [RT5631_SPK_OUT_VOL] = 0x8888,
- [RT5631_HP_OUT_VOL] = 0x8080,
- [RT5631_MONO_AXO_1_2_VOL] = 0xa080,
- [RT5631_AUX_IN_VOL] = 0x0808,
- [RT5631_ADC_REC_MIXER] = 0xf0f0,
- [RT5631_VDAC_DIG_VOL] = 0x0010,
- [RT5631_OUTMIXER_L_CTRL] = 0xffc0,
- [RT5631_OUTMIXER_R_CTRL] = 0xffc0,
- [RT5631_AXO1MIXER_CTRL] = 0x88c0,
- [RT5631_AXO2MIXER_CTRL] = 0x88c0,
- [RT5631_DIG_MIC_CTRL] = 0x3000,
- [RT5631_MONO_INPUT_VOL] = 0x8808,
- [RT5631_SPK_MIXER_CTRL] = 0xf8f8,
- [RT5631_SPK_MONO_OUT_CTRL] = 0xfc00,
- [RT5631_SPK_MONO_HP_OUT_CTRL] = 0x4440,
- [RT5631_SDP_CTRL] = 0x8000,
- [RT5631_MONO_SDP_CTRL] = 0x8000,
- [RT5631_STEREO_AD_DA_CLK_CTRL] = 0x2010,
- [RT5631_GEN_PUR_CTRL_REG] = 0x0e00,
- [RT5631_INT_ST_IRQ_CTRL_2] = 0x0710,
- [RT5631_MISC_CTRL] = 0x2040,
- [RT5631_DEPOP_FUN_CTRL_2] = 0x8000,
- [RT5631_SOFT_VOL_CTRL] = 0x07e0,
- [RT5631_ALC_CTRL_1] = 0x0206,
- [RT5631_ALC_CTRL_3] = 0x2000,
- [RT5631_PSEUDO_SPATL_CTRL] = 0x0553,
-};
-
-void rt5631_phone_set_spk(bool on)
-{
- struct snd_soc_codec *codec = rt5631_codec;
-
- printk("%s: %d\n", __func__, on);
-
- if(!codec)
- return;
-
- mutex_lock(&codec->mutex);
- if(on){
- printk("snd_soc_dapm_enable_pin\n");
- snd_soc_dapm_enable_pin(&codec->dapm, "Headphone Jack");
- snd_soc_dapm_enable_pin(&codec->dapm, "Ext Spk");
- }
- else{
- printk("snd_soc_dapm_disable_pin\n");
- snd_soc_dapm_disable_pin(&codec->dapm, "Headphone Jack");
- snd_soc_dapm_disable_pin(&codec->dapm, "Ext Spk");
- }
-
- snd_soc_dapm_sync(&codec->dapm);
- mutex_unlock(&codec->mutex);
- return;
-}
-
-/**
- * rt5631_index_write - Write private register.
- * @codec: SoC audio codec device.
- * @reg: Private register index.
- * @value: Private register Data.
- *
- * Modify private register for advanced setting. It can be written through
- * private index (0x6a) and data (0x6c) register.
- *
- * Returns 0 for success or negative error code.
- */
-static int rt5631_index_write(struct snd_soc_codec *codec,
- unsigned int reg, unsigned int value)
-{
- int ret;
-
- ret = snd_soc_write(codec, RT5631_INDEX_ADD, reg);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
- goto err;
- }
- ret = snd_soc_write(codec, RT5631_INDEX_DATA, value);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to set private value: %d\n", ret);
- goto err;
- }
- return 0;
-
-err:
- return ret;
-}
-
-/**
- * rt5631_index_read - Read private register.
- * @codec: SoC audio codec device.
- * @reg: Private register index.
- *
- * Read advanced setting from private register. It can be read through
- * private index (0x6a) and data (0x6c) register.
- *
- * Returns private register value or negative error code.
- */
-static unsigned int rt5631_index_read(
- struct snd_soc_codec *codec, unsigned int reg)
-{
- int ret;
-
- ret = snd_soc_write(codec, RT5631_INDEX_ADD, reg);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
- return ret;
- }
- return snd_soc_read(codec, RT5631_INDEX_DATA);
-}
-
-/**
- * rt5631_index_update_bits - update private register bits
- * @codec: audio codec
- * @reg: Private register index.
- * @mask: register mask
- * @value: new value
- *
- * Writes new register value.
- *
- * Returns 1 for change, 0 for no change, or negative error code.
- */
-static int rt5631_index_update_bits(struct snd_soc_codec *codec,
- unsigned int reg, unsigned int mask, unsigned int value)
-{
- unsigned int old, new;
- int change, ret;
-
- ret = rt5631_index_read(codec, reg);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
- goto err;
- }
-
- old = ret;
- new = (old & ~mask) | (value & mask);
- change = old != new;
- if (change) {
- ret = rt5631_index_write(codec, reg, new);
- if (ret < 0) {
- dev_err(codec->dev,
- "Failed to write private reg: %d\n", ret);
- goto err;
- }
- }
- return change;
-
-err:
- return ret;
-}
-
-static int rt5631_reset(struct snd_soc_codec *codec)
-{
- return snd_soc_write(codec, RT5631_RESET, 0);
-}
-
-static int rt5631_volatile_register(struct snd_soc_codec *codec,
- unsigned int reg)
-{
- switch (reg) {
- case RT5631_RESET:
- case RT5631_INT_ST_IRQ_CTRL_2:
- case RT5631_INDEX_ADD:
- case RT5631_INDEX_DATA:
- case RT5631_EQ_CTRL:
- case RT5631_VENDOR_ID:
- case RT5631_VENDOR_ID1:
- case RT5631_VENDOR_ID2:
- return 1;
- default:
- return 0;
- }
-}
-
-static int rt5631_readable_register(struct snd_soc_codec *codec,
- unsigned int reg)
-{
- switch (reg) {
- case RT5631_RESET:
- case RT5631_SPK_OUT_VOL:
- case RT5631_HP_OUT_VOL:
- case RT5631_MONO_AXO_1_2_VOL:
- case RT5631_AUX_IN_VOL:
- case RT5631_STEREO_DAC_VOL_1:
- case RT5631_MIC_CTRL_1:
- case RT5631_STEREO_DAC_VOL_2:
- case RT5631_ADC_CTRL_1:
- case RT5631_ADC_REC_MIXER:
- case RT5631_ADC_CTRL_2:
- case RT5631_VDAC_DIG_VOL:
- case RT5631_OUTMIXER_L_CTRL:
- case RT5631_OUTMIXER_R_CTRL:
- case RT5631_AXO1MIXER_CTRL:
- case RT5631_AXO2MIXER_CTRL:
- case RT5631_MIC_CTRL_2:
- case RT5631_DIG_MIC_CTRL:
- case RT5631_MONO_INPUT_VOL:
- case RT5631_SPK_MIXER_CTRL:
- case RT5631_SPK_MONO_OUT_CTRL:
- case RT5631_SPK_MONO_HP_OUT_CTRL:
- case RT5631_SDP_CTRL:
- case RT5631_MONO_SDP_CTRL:
- case RT5631_STEREO_AD_DA_CLK_CTRL:
- case RT5631_PWR_MANAG_ADD1:
- case RT5631_PWR_MANAG_ADD2:
- case RT5631_PWR_MANAG_ADD3:
- case RT5631_PWR_MANAG_ADD4:
- case RT5631_GEN_PUR_CTRL_REG:
- case RT5631_GLOBAL_CLK_CTRL:
- case RT5631_PLL_CTRL:
- case RT5631_INT_ST_IRQ_CTRL_1:
- case RT5631_INT_ST_IRQ_CTRL_2:
- case RT5631_GPIO_CTRL:
- case RT5631_MISC_CTRL:
- case RT5631_DEPOP_FUN_CTRL_1:
- case RT5631_DEPOP_FUN_CTRL_2:
- case RT5631_JACK_DET_CTRL:
- case RT5631_SOFT_VOL_CTRL:
- case RT5631_ALC_CTRL_1:
- case RT5631_ALC_CTRL_2:
- case RT5631_ALC_CTRL_3:
- case RT5631_PSEUDO_SPATL_CTRL:
- case RT5631_INDEX_ADD:
- case RT5631_INDEX_DATA:
- case RT5631_EQ_CTRL:
- case RT5631_VENDOR_ID:
- case RT5631_VENDOR_ID1:
- case RT5631_VENDOR_ID2:
- return 1;
- default:
- return 0;
- }
-}
-
-/**
- * rt5631_headset_detect - Detect headset.
- * @codec: SoC audio codec device.
- * @jack_insert: Jack insert or not.
- *
- * Detect whether is headset or not when jack inserted.
- *
- * Returns detect status.
- */
-int rt5631_headset_detect(struct snd_soc_codec *codec, int jack_insert)
-{
- int jack_type;
-
- if(jack_insert) {
- snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_MICBIAS1_VOL, RT5631_PWR_MICBIAS1_VOL);
- snd_soc_update_bits(codec, RT5631_MIC_CTRL_2,
- RT5631_MICBIAS1_S_C_DET_MASK |
- RT5631_MICBIAS1_SHORT_CURR_DET_MASK,
- RT5631_MICBIAS1_S_C_DET_ENA |
- RT5631_MICBIAS1_SHORT_CURR_DET_600UA);
- msleep(50);
- if (rt5631_index_read(codec, 0x4a) & 0x2)
- jack_type = RT5631_HEADPHO_DET;
- else
- jack_type = RT5631_HEADSET_DET;
- } else {
- snd_soc_update_bits(codec, RT5631_MIC_CTRL_2,
- RT5631_MICBIAS1_S_C_DET_MASK,
- RT5631_MICBIAS1_S_C_DET_DIS);
- jack_type = RT5631_NO_JACK;
- }
-
- return jack_type;
-}
-EXPORT_SYMBOL(rt5631_headset_detect);
-
-int rt5631_headset_mic_detect(bool headset_status)
-{
- struct rt5631_priv *rt5631 = NULL;
- int jack_type = 0;
- printk("%s::%d headset_status=%d\n",__FUNCTION__,__LINE__,headset_status);
-
- if(rt5631_codec == NULL)
- return -1;
- rt5631 = snd_soc_codec_get_drvdata(rt5631_codec);
- if(rt5631 == NULL)
- return -1;
- if(headset_status)
- {
- while(rt5631_codec->dapm.bias_level == SND_SOC_BIAS_OFF)
- {
- printk("----------rt5631 unnot standby-----------------\n");
- msleep(300);
- }
- snd_soc_update_bits(rt5631_codec, RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_VREF|RT5631_PWR_MAIN_BIAS ,
- RT5631_PWR_VREF|RT5631_PWR_MAIN_BIAS);
- msleep(10);
- snd_soc_update_bits(rt5631_codec, RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_MICBIAS2_VOL ,
- RT5631_PWR_MICBIAS2_VOL);
- msleep(400);
- }
- else
- {// headset is out,disable MIC2 Bias
- printk("headset is out,disable Mic2 Bias\n");
- snd_soc_update_bits(rt5631_codec, RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_MICBIAS2_VOL ,
- 0);
- }
- return jack_type;
-}
-EXPORT_SYMBOL(rt5631_headset_mic_detect);
-
-static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
-static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -95625, 375, 0);
-static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
-/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
-static unsigned int mic_bst_tlv[] = {
- TLV_DB_RANGE_HEAD(7),
- 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
- 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
- 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
- 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
- 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
- 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
- 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
-};
-
-static int rt5631_dmic_get(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
-
- ucontrol->value.integer.value[0] = rt5631->dmic_used_flag;
-
- return 0;
-}
-
-static int rt5631_dmic_put(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
-
- rt5631->dmic_used_flag = ucontrol->value.integer.value[0];
- return 0;
-}
-
-/* MIC Input Type */
-static const char *rt5631_input_mode[] = {
- "Single ended", "Differential"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_mic1_mode_enum, RT5631_MIC_CTRL_1,
- RT5631_MIC1_DIFF_INPUT_SHIFT, rt5631_input_mode);
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_mic2_mode_enum, RT5631_MIC_CTRL_1,
- RT5631_MIC2_DIFF_INPUT_SHIFT, rt5631_input_mode);
-
-/* MONO Input Type */
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_monoin_mode_enum, RT5631_MONO_INPUT_VOL,
- RT5631_MONO_DIFF_INPUT_SHIFT, rt5631_input_mode);
-
-/* SPK Ratio Gain Control */
-static const char *rt5631_spk_ratio[] = {"1.00x", "1.09x", "1.27x", "1.44x",
- "1.56x", "1.68x", "1.99x", "2.34x"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_spk_ratio_enum, RT5631_GEN_PUR_CTRL_REG,
- RT5631_SPK_AMP_RATIO_CTRL_SHIFT, rt5631_spk_ratio);
-
-/* ADC Data Select Control */
-static const char *rt5631_adc_data_sel[] = {"Stereo", "Left ADC", "Right ADC"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_adc_data_enum, RT5631_INT_ST_IRQ_CTRL_2,
- RT5631_ADC_DATA_SEL_SHIFT, rt5631_adc_data_sel);
-
-/* ADCR Function Select Control */
-static const char *rt5631_adcr_fun_sel[] = {"Stereo ADC", "Voice ADC"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_adcr_fun_enum, RT5631_GLOBAL_CLK_CTRL,
- RT5631_ADCR_FUN_SFT, rt5631_adcr_fun_sel);
-
-/* VDAC Clock Select Control */
-static const char *rt5631_vdac_clk_sel[] = {"SYSCLK1", "SYSCLK2"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_vdac_clk_enum, RT5631_GLOBAL_CLK_CTRL,
- RT5631_VDAC_CLK_SOUR_SFT, rt5631_vdac_clk_sel);
-
-static const struct snd_kcontrol_new rt5631_snd_controls[] = {
- /* MIC */
- SOC_ENUM("MIC1 Mode Control", rt5631_mic1_mode_enum),
- SOC_SINGLE_TLV("MIC1 Boost", RT5631_MIC_CTRL_2,
- RT5631_MIC1_BOOST_SHIFT, 8, 0, mic_bst_tlv),
- SOC_ENUM("MIC2 Mode Control", rt5631_mic2_mode_enum),
- SOC_SINGLE_TLV("MIC2 Boost", RT5631_MIC_CTRL_2,
- RT5631_MIC2_BOOST_SHIFT, 8, 0, mic_bst_tlv),
- /* MONO IN */
- SOC_ENUM("MONOIN Mode Control", rt5631_monoin_mode_enum),
- SOC_DOUBLE_TLV("MONOIN_RX Capture Volume", RT5631_MONO_INPUT_VOL,
- RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
- RT5631_VOL_MASK, 1, in_vol_tlv),
- /* AXI */
- SOC_DOUBLE_TLV("AXI Capture Volume", RT5631_AUX_IN_VOL,
- RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
- RT5631_VOL_MASK, 1, in_vol_tlv),
- /* ADC */
- SOC_DOUBLE_TLV("PCM Record Volume", RT5631_ADC_CTRL_2,
- RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
- RT5631_DAC_VOL_MASK, 1, dac_vol_tlv),
- SOC_DOUBLE("PCM Record Switch", RT5631_ADC_CTRL_1,
- RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
- /* DAC */
- SOC_DOUBLE_TLV("PCM Playback Volume", RT5631_STEREO_DAC_VOL_2,
- RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
- RT5631_DAC_VOL_MASK, 1, dac_vol_tlv),
- SOC_DOUBLE("PCM Playback Switch", RT5631_STEREO_DAC_VOL_1,
- RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
- /* AXO */
- SOC_SINGLE("AXO1 Playback Switch", RT5631_MONO_AXO_1_2_VOL,
- RT5631_L_MUTE_SHIFT, 1, 1),
- SOC_SINGLE("AXO2 Playback Switch", RT5631_MONO_AXO_1_2_VOL,
- RT5631_R_VOL_SHIFT, 1, 1),
- SOC_SINGLE("AXO Playback Switch", RT5631_MONO_AXO_1_2_VOL,
- RT5631_L_MUTE_SHIFT, 1, 1),
- /* OUTVOL */
- SOC_DOUBLE("OUTVOL Channel Switch", RT5631_SPK_OUT_VOL,
- RT5631_L_EN_SHIFT, RT5631_R_EN_SHIFT, 1, 0),
-
- /* SPK */
- SOC_DOUBLE("Speaker Playback Switch", RT5631_SPK_OUT_VOL,
- RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
- SOC_DOUBLE_TLV("Speaker Playback Volume", RT5631_SPK_OUT_VOL,
- RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, 39, 1, out_vol_tlv),
- /* MONO OUT */
- SOC_SINGLE("MONO Playback Switch", RT5631_MONO_AXO_1_2_VOL,
- RT5631_MUTE_MONO_SHIFT, 1, 1),
- /* HP */
- SOC_DOUBLE("HP Playback Switch", RT5631_HP_OUT_VOL,
- RT5631_L_MUTE_SHIFT, RT5631_R_MUTE_SHIFT, 1, 1),
- SOC_DOUBLE_TLV("HP Playback Volume", RT5631_HP_OUT_VOL,
- RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
- RT5631_VOL_MASK, 1, out_vol_tlv),
- //add
- SOC_DOUBLE_TLV("Speaker Volume", RT5631_SPK_OUT_VOL,
- RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, 39, 1, out_vol_tlv),
- SOC_DOUBLE_TLV("Earpiece Volume", RT5631_SPK_OUT_VOL,
- RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT, 39, 1, out_vol_tlv),
- SOC_DOUBLE_TLV("Headphone Volume", RT5631_HP_OUT_VOL,
- RT5631_L_VOL_SHIFT, RT5631_R_VOL_SHIFT,
- RT5631_VOL_MASK, 1, out_vol_tlv),
-
- /* DMIC */
- SOC_SINGLE_EXT("DMIC Switch", 0, 0, 1, 0,
- rt5631_dmic_get, rt5631_dmic_put),
- SOC_DOUBLE("DMIC Capture Switch", RT5631_DIG_MIC_CTRL,
- RT5631_DMIC_L_CH_MUTE_SHIFT,
- RT5631_DMIC_R_CH_MUTE_SHIFT, 1, 1),
- /* SPK Ratio Gain Control */
- SOC_ENUM("SPK Ratio Control", rt5631_spk_ratio_enum),
- /* ADC Data Select Control */
- SOC_ENUM("ADC Data Select", rt5631_adc_data_enum),
- /* ADCR Function Select Control */
- SOC_ENUM("ADCR Function Select", rt5631_adcr_fun_enum),
- /* VDAC Function Select Control */
- SOC_ENUM("Voice DAC Clock Select", rt5631_vdac_clk_enum),
-};
-
-static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg;
-
- reg = snd_soc_read(source->codec, RT5631_GLOBAL_CLK_CTRL);
- return (reg & RT5631_SYSCLK_SOUR_SEL_PLL);
-}
-
-static int check_adcr_pll1(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg = snd_soc_read(source->codec, RT5631_GLOBAL_CLK_CTRL);
-
- if (reg & RT5631_ADCR_FUN_VADC) {
- if (reg & RT5631_VDAC_CLK_SOUR_SCLK2)
- return 0;
- else
- return (reg & RT5631_SYSCLK_SOUR_SEL_PLL);
- } else
- return (reg & RT5631_SYSCLK_SOUR_SEL_PLL);
-}
-
-static int check_adcr_stereo(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg = snd_soc_read(source->codec, RT5631_GLOBAL_CLK_CTRL);
- return (RT5631_ADCR_FUN_ADC == (reg & RT5631_ADCR_FUN_MASK));
-}
-
-static int check_adcr_voice(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg = snd_soc_read(source->codec, RT5631_GLOBAL_CLK_CTRL);
- return (RT5631_ADCR_FUN_VADC == (reg & RT5631_ADCR_FUN_MASK));
-}
-
-static int check_adcr_pll2(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg = snd_soc_read(source->codec, RT5631_GLOBAL_CLK_CTRL);
-
- if (reg & RT5631_ADCR_FUN_VADC) {
- if (reg & RT5631_VDAC_CLK_SOUR_SCLK2)
- return (reg & RT5631_SYSCLK2_SOUR_SEL_PLL2);
- else
- return 0;
- } else
- return 0;
-}
-
-static int check_vdac_pll1(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg = snd_soc_read(source->codec, RT5631_GLOBAL_CLK_CTRL);
-
- if (reg & RT5631_VDAC_CLK_SOUR_SCLK2)
- return 0;
- else
- return (reg & RT5631_SYSCLK_SOUR_SEL_PLL);
-}
-
-static int check_vdac_pll2(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg = snd_soc_read(source->codec, RT5631_GLOBAL_CLK_CTRL);
-
- if (reg & RT5631_VDAC_CLK_SOUR_SCLK2)
- return (reg & RT5631_SYSCLK2_SOUR_SEL_PLL2);
- else
- return 0;
-}
-
-static int check_dmic_used(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(source->codec);
- return rt5631->dmic_used_flag;
-}
-
-static int check_dacl_to_outmixl(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg;
-
- reg = snd_soc_read(source->codec, RT5631_OUTMIXER_L_CTRL);
- return !(reg & RT5631_M_DAC_L_TO_OUTMIXER_L);
-}
-
-static int check_dacr_to_outmixr(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg;
-
- reg = snd_soc_read(source->codec, RT5631_OUTMIXER_R_CTRL);
- return !(reg & RT5631_M_DAC_R_TO_OUTMIXER_R);
-}
-
-static int check_dacl_to_spkmixl(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg;
-
- reg = snd_soc_read(source->codec, RT5631_SPK_MIXER_CTRL);
- return !(reg & RT5631_M_DAC_L_TO_SPKMIXER_L);
-}
-
-static int check_dacr_to_spkmixr(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg;
-
- reg = snd_soc_read(source->codec, RT5631_SPK_MIXER_CTRL);
- return !(reg & RT5631_M_DAC_R_TO_SPKMIXER_R);
-}
-
-static int check_vdac_to_outmix(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg, ret = 1;
-
- reg = snd_soc_read(source->codec, RT5631_OUTMIXER_L_CTRL);
- if (reg & RT5631_M_VDAC_TO_OUTMIXER_L) {
- reg = snd_soc_read(source->codec, RT5631_OUTMIXER_R_CTRL);
- if (reg & RT5631_M_VDAC_TO_OUTMIXER_R)
- ret = 0;
- }
- return ret;
-}
-
-static int check_adcl_select(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg, ret = 0;
-
- reg = snd_soc_read(source->codec, RT5631_ADC_REC_MIXER);
- if (reg & RT5631_M_MIC2_TO_RECMIXER_R)
- if (!(reg & RT5631_M_MIC1_TO_RECMIXER_L))
- ret = 1;
- return ret;
-}
-
-static int check_adcr_select(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int reg, ret = 0;
-
- reg = snd_soc_read(source->codec, RT5631_ADC_REC_MIXER);
- if (reg & RT5631_M_MIC1_TO_RECMIXER_L)
- if (!(reg & RT5631_M_MIC2_TO_RECMIXER_R))
- ret = 1;
- return ret;
-}
-
-/**
- * onebit_depop_power_stage - auto depop in power stage.
- * @enable: power on/off
- *
- * When power on/off headphone, the depop sequence is done by hardware.
- */
-static void onebit_depop_power_stage(struct snd_soc_codec *codec, int enable)
-{
- unsigned int soft_vol, hp_zc;
-
- /* enable one-bit depop function */
- snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
- RT5631_EN_ONE_BIT_DEPOP, 0);
-
- /* keep soft volume and zero crossing setting */
- soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
- snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
- hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
- snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
- if (enable) {
- /* config one-bit depop parameter */
- rt5631_index_write(codec, RT5631_TEST_MODE_CTRL, 0x84c0);
- rt5631_index_write(codec, RT5631_SPK_INTL_CTRL, 0x309f);
- rt5631_index_write(codec, RT5631_CP_INTL_REG2, 0x6530);
- /* power on capless block */
- snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_2,
- RT5631_EN_CAP_FREE_DEPOP);
- } else {
- /* power off capless block */
- snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_2, 0);
- msleep(100);
- }
-
- /* recover soft volume and zero crossing setting */
- snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
- snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
-}
-
-/**
- * onebit_depop_mute_stage - auto depop in mute stage.
- * @enable: mute/unmute
- *
- * When mute/unmute headphone, the depop sequence is done by hardware.
- */
-static void onebit_depop_mute_stage(struct snd_soc_codec *codec, int enable)
-{
- unsigned int soft_vol, hp_zc;
-
- /* enable one-bit depop function */
- snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
- RT5631_EN_ONE_BIT_DEPOP, 0);
-
- /* keep soft volume and zero crossing setting */
- soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
- snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
- hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
- snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
- if (enable) {
- schedule_timeout_uninterruptible(msecs_to_jiffies(10));
- /* config one-bit depop parameter */
- rt5631_index_write(codec, RT5631_SPK_INTL_CTRL, 0x307f);
- snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
- RT5631_L_MUTE | RT5631_R_MUTE, 0);
- msleep(300);
- } else {
- snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
- RT5631_L_MUTE | RT5631_R_MUTE,
- RT5631_L_MUTE | RT5631_R_MUTE);
- msleep(100);
- }
-
- /* recover soft volume and zero crossing setting */
- snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
- snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
-}
-
-/**
- * onebit_depop_power_stage - step by step depop sequence in power stage.
- * @enable: power on/off
- *
- * When power on/off headphone, the depop sequence is done in step by step.
- */
-static void depop_seq_power_stage(struct snd_soc_codec *codec, int enable)
-{
- unsigned int soft_vol, hp_zc;
-
- /* depop control by register */
- snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
- RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP);
-
- /* keep soft volume and zero crossing setting */
- soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
- snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
- hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
- snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
- if (enable) {
- /* config depop sequence parameter */
- rt5631_index_write(codec, RT5631_SPK_INTL_CTRL, 0x303e);
-
- /* power on headphone and charge pump */
- snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
- RT5631_PWR_HP_R_AMP,
- RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
- RT5631_PWR_HP_R_AMP);
-
- /* power on soft generator and depop mode2 */
- snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
- RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP);
- msleep(100);
-
- /* stop depop mode */
- snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_HP_DEPOP_DIS, RT5631_PWR_HP_DEPOP_DIS);
- } else {
- /* config depop sequence parameter */
- rt5631_index_write(codec, RT5631_SPK_INTL_CTRL, 0x303F);
- snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
- RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
- RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP);
- msleep(75);
- snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
- RT5631_POW_ON_SOFT_GEN | RT5631_PD_HPAMP_L_ST_UP |
- RT5631_PD_HPAMP_R_ST_UP);
-
- /* start depop mode */
- snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_HP_DEPOP_DIS, 0);
-
- /* config depop sequence parameter */
- snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
- RT5631_POW_ON_SOFT_GEN | RT5631_EN_DEPOP2_FOR_HP |
- RT5631_PD_HPAMP_L_ST_UP | RT5631_PD_HPAMP_R_ST_UP);
- msleep(80);
- snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
- RT5631_POW_ON_SOFT_GEN);
-
- /* power down headphone and charge pump */
- snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_CHARGE_PUMP | RT5631_PWR_HP_L_AMP |
- RT5631_PWR_HP_R_AMP, 0);
- }
-
- /* recover soft volume and zero crossing setting */
- snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
- snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
-}
-
-/**
- * depop_seq_mute_stage - step by step depop sequence in mute stage.
- * @enable: mute/unmute
- *
- * When mute/unmute headphone, the depop sequence is done in step by step.
- */
-static void depop_seq_mute_stage(struct snd_soc_codec *codec, int enable)
-{
- unsigned int soft_vol, hp_zc;
-
- /* depop control by register */
- snd_soc_update_bits(codec, RT5631_DEPOP_FUN_CTRL_2,
- RT5631_EN_ONE_BIT_DEPOP, RT5631_EN_ONE_BIT_DEPOP);
-
- /* keep soft volume and zero crossing setting */
- soft_vol = snd_soc_read(codec, RT5631_SOFT_VOL_CTRL);
- snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, 0);
- hp_zc = snd_soc_read(codec, RT5631_INT_ST_IRQ_CTRL_2);
- snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc & 0xf7ff);
- if (enable) {
- schedule_timeout_uninterruptible(msecs_to_jiffies(10));
-
- /* config depop sequence parameter */
- rt5631_index_write(codec, RT5631_SPK_INTL_CTRL, 0x302f);
- snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
- RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
- RT5631_EN_HP_R_M_UN_MUTE_DEPOP |
- RT5631_EN_HP_L_M_UN_MUTE_DEPOP);
-
- snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
- RT5631_L_MUTE | RT5631_R_MUTE, 0);
- msleep(160);
- } else {
- /* config depop sequence parameter */
- rt5631_index_write(codec, RT5631_SPK_INTL_CTRL, 0x302f);
- snd_soc_write(codec, RT5631_DEPOP_FUN_CTRL_1,
- RT5631_POW_ON_SOFT_GEN | RT5631_EN_MUTE_UNMUTE_DEPOP |
- RT5631_EN_HP_R_M_UN_MUTE_DEPOP |
- RT5631_EN_HP_L_M_UN_MUTE_DEPOP);
-
- snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
- RT5631_L_MUTE | RT5631_R_MUTE,
- RT5631_L_MUTE | RT5631_R_MUTE);
- msleep(150);
- }
-
- /* recover soft volume and zero crossing setting */
- snd_soc_write(codec, RT5631_SOFT_VOL_CTRL, soft_vol);
- snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, hp_zc);
-}
-
-static int hp_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
- struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
-
- switch (event) {
- case SND_SOC_DAPM_PRE_PMD:
- // printk("hp_event before widget power down\n");
- if (rt5631->codec_version) {
- onebit_depop_mute_stage(codec, 0);
- onebit_depop_power_stage(codec, 0);
- } else {
- depop_seq_mute_stage(codec, 0);
- depop_seq_power_stage(codec, 0);
- }
- break;
-
- case SND_SOC_DAPM_POST_PMU:
- if (rt5631->codec_version) {
- onebit_depop_power_stage(codec, 1);
- onebit_depop_mute_stage(codec, 1);
- } else {
- depop_seq_power_stage(codec, 1);
- depop_seq_mute_stage(codec, 1);
- }
- break;
-
- default:
- break;
- }
-
- return 0;
-}
-
-static int spk_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
- printk("Enter %s::%s---%d\n",__FILE__,__FUNCTION__,__LINE__);
-
- switch (event) {
- case SND_SOC_DAPM_POST_PMU:
-
- break;
-
- case SND_SOC_DAPM_POST_PMD:
-
- break;
- default:
- return 0;
- }
- return 0;
-}
-
-static int auxo_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *control, int event)
-{
-// struct snd_soc_codec *codec = w->codec;
-// struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
- printk("Enter %s::%s---%d\n",__FILE__,__FUNCTION__,__LINE__);
-#ifdef CONFIG_PHONE_INCALL_IS_SUSPEND
-
- switch (event) {
- case SND_SOC_DAPM_POST_PMU:
- printk("rt5631v is incall status\n");
- snd_soc_incall_status(1,1);
- break;
-
- case SND_SOC_DAPM_PRE_PMD:
- printk("rt5631v exit incall status\n");
- snd_soc_incall_status(1,0);
- break;
-
- default:
- BUG();
- break;
- }
-#endif
- return 0;
-}
-
-static int set_dmic_params(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
- struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
-
- switch (rt5631->rx_rate) {
- case 44100:
- case 48000:
- snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
- RT5631_DMIC_CLK_CTRL_MASK,
- RT5631_DMIC_CLK_CTRL_TO_32FS);
- break;
-
- case 32000:
- case 22050:
- snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
- RT5631_DMIC_CLK_CTRL_MASK,
- RT5631_DMIC_CLK_CTRL_TO_64FS);
- break;
-
- case 16000:
- case 11025:
- case 8000:
- snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
- RT5631_DMIC_CLK_CTRL_MASK,
- RT5631_DMIC_CLK_CTRL_TO_128FS);
- break;
-
- default:
- return -EINVAL;
- }
-
- return 0;
-}
-
-static const struct snd_kcontrol_new rt5631_recmixl_mixer_controls[] = {
- SOC_DAPM_SINGLE("OUTMIXL Capture Switch", RT5631_ADC_REC_MIXER,
- RT5631_M_OUTMIXL_RECMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("MIC1_BST1 Capture Switch", RT5631_ADC_REC_MIXER,
- RT5631_M_MIC1_RECMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("AXILVOL Capture Switch", RT5631_ADC_REC_MIXER,
- RT5631_M_AXIL_RECMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER,
- RT5631_M_MONO_IN_RECMIXL_BIT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5631_recmixr_mixer_controls[] = {
- SOC_DAPM_SINGLE("MONOIN_RX Capture Switch", RT5631_ADC_REC_MIXER,
- RT5631_M_MONO_IN_RECMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("AXIRVOL Capture Switch", RT5631_ADC_REC_MIXER,
- RT5631_M_AXIR_RECMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("MIC2_BST2 Capture Switch", RT5631_ADC_REC_MIXER,
- RT5631_M_MIC2_RECMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("OUTMIXR Capture Switch", RT5631_ADC_REC_MIXER,
- RT5631_M_OUTMIXR_RECMIXR_BIT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5631_spkmixl_mixer_controls[] = {
- SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_SPK_MIXER_CTRL,
- RT5631_M_RECMIXL_SPKMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("MIC1_P Playback Switch", RT5631_SPK_MIXER_CTRL,
- RT5631_M_MIC1P_SPKMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_SPK_MIXER_CTRL,
- RT5631_M_DACL_SPKMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("OUTMIXL Playback Switch", RT5631_SPK_MIXER_CTRL,
- RT5631_M_OUTMIXL_SPKMIXL_BIT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5631_spkmixr_mixer_controls[] = {
- SOC_DAPM_SINGLE("OUTMIXR Playback Switch", RT5631_SPK_MIXER_CTRL,
- RT5631_M_OUTMIXR_SPKMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_SPK_MIXER_CTRL,
- RT5631_M_DACR_SPKMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("MIC2_P Playback Switch", RT5631_SPK_MIXER_CTRL,
- RT5631_M_MIC2P_SPKMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_SPK_MIXER_CTRL,
- RT5631_M_RECMIXR_SPKMIXR_BIT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5631_outmixl_mixer_controls[] = {
- SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_L_CTRL,
- RT5631_M_RECMIXL_OUTMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_L_CTRL,
- RT5631_M_RECMIXR_OUTMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("DACL Playback Switch", RT5631_OUTMIXER_L_CTRL,
- RT5631_M_DACL_OUTMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_L_CTRL,
- RT5631_M_MIC1_OUTMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_L_CTRL,
- RT5631_M_MIC2_OUTMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("MONOIN_RXP Playback Switch", RT5631_OUTMIXER_L_CTRL,
- RT5631_M_MONO_INP_OUTMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_L_CTRL,
- RT5631_M_AXIL_OUTMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_L_CTRL,
- RT5631_M_AXIR_OUTMIXL_BIT, 1, 1),
- SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_L_CTRL,
- RT5631_M_VDAC_OUTMIXL_BIT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5631_outmixr_mixer_controls[] = {
- SOC_DAPM_SINGLE("VDAC Playback Switch", RT5631_OUTMIXER_R_CTRL,
- RT5631_M_VDAC_OUTMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("AXIRVOL Playback Switch", RT5631_OUTMIXER_R_CTRL,
- RT5631_M_AXIR_OUTMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("AXILVOL Playback Switch", RT5631_OUTMIXER_R_CTRL,
- RT5631_M_AXIL_OUTMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("MONOIN_RXN Playback Switch", RT5631_OUTMIXER_R_CTRL,
- RT5631_M_MONO_INN_OUTMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_OUTMIXER_R_CTRL,
- RT5631_M_MIC2_OUTMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_OUTMIXER_R_CTRL,
- RT5631_M_MIC1_OUTMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("DACR Playback Switch", RT5631_OUTMIXER_R_CTRL,
- RT5631_M_DACR_OUTMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("RECMIXR Playback Switch", RT5631_OUTMIXER_R_CTRL,
- RT5631_M_RECMIXR_OUTMIXR_BIT, 1, 1),
- SOC_DAPM_SINGLE("RECMIXL Playback Switch", RT5631_OUTMIXER_R_CTRL,
- RT5631_M_RECMIXL_OUTMIXR_BIT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5631_AXO1MIX_mixer_controls[] = {
- SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO1MIXER_CTRL,
- RT5631_M_MIC1_AXO1MIX_BIT , 1, 1),
- SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO1MIXER_CTRL,
- RT5631_M_MIC2_AXO1MIX_BIT, 1, 1),
- SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO1MIXER_CTRL,
- RT5631_M_OUTMIXL_AXO1MIX_BIT , 1 , 1),
- SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO1MIXER_CTRL,
- RT5631_M_OUTMIXR_AXO1MIX_BIT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5631_AXO2MIX_mixer_controls[] = {
- SOC_DAPM_SINGLE("MIC1_BST1 Playback Switch", RT5631_AXO2MIXER_CTRL,
- RT5631_M_MIC1_AXO2MIX_BIT, 1, 1),
- SOC_DAPM_SINGLE("MIC2_BST2 Playback Switch", RT5631_AXO2MIXER_CTRL,
- RT5631_M_MIC2_AXO2MIX_BIT, 1, 1),
- SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_AXO2MIXER_CTRL,
- RT5631_M_OUTMIXL_AXO2MIX_BIT, 1, 1),
- SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_AXO2MIXER_CTRL,
- RT5631_M_OUTMIXR_AXO2MIX_BIT, 1 , 1),
-};
-
-static const struct snd_kcontrol_new rt5631_spolmix_mixer_controls[] = {
- SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
- RT5631_M_SPKVOLL_SPOLMIX_BIT, 1, 1),
- SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
- RT5631_M_SPKVOLR_SPOLMIX_BIT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5631_spormix_mixer_controls[] = {
- SOC_DAPM_SINGLE("SPKVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
- RT5631_M_SPKVOLL_SPORMIX_BIT, 1, 1),
- SOC_DAPM_SINGLE("SPKVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
- RT5631_M_SPKVOLR_SPORMIX_BIT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5631_monomix_mixer_controls[] = {
- SOC_DAPM_SINGLE("OUTVOLL Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
- RT5631_M_OUTVOLL_MONOMIX_BIT, 1, 1),
- SOC_DAPM_SINGLE("OUTVOLR Playback Switch", RT5631_SPK_MONO_OUT_CTRL,
- RT5631_M_OUTVOLR_MONOMIX_BIT, 1, 1),
-};
-
-/* Left SPK Volume Input */
-static const char *rt5631_spkvoll_sel[] = {"Vmid", "SPKMIXL"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_spkvoll_enum, RT5631_SPK_OUT_VOL,
- RT5631_L_EN_SHIFT, rt5631_spkvoll_sel);
-
-static const struct snd_kcontrol_new rt5631_spkvoll_mux_control =
- SOC_DAPM_ENUM("Left SPKVOL SRC", rt5631_spkvoll_enum);
-
-/* Left HP Volume Input */
-static const char *rt5631_hpvoll_sel[] = {"Vmid", "OUTMIXL"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_hpvoll_enum, RT5631_HP_OUT_VOL,
- RT5631_L_EN_SHIFT, rt5631_hpvoll_sel);
-
-static const struct snd_kcontrol_new rt5631_hpvoll_mux_control =
- SOC_DAPM_ENUM("Left HPVOL SRC", rt5631_hpvoll_enum);
-
-/* Left Out Volume Input */
-static const char *rt5631_outvoll_sel[] = {"Vmid", "OUTMIXL"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_outvoll_enum, RT5631_MONO_AXO_1_2_VOL,
- RT5631_L_EN_SHIFT, rt5631_outvoll_sel);
-
-static const struct snd_kcontrol_new rt5631_outvoll_mux_control =
- SOC_DAPM_ENUM("Left OUTVOL SRC", rt5631_outvoll_enum);
-
-/* Right Out Volume Input */
-static const char *rt5631_outvolr_sel[] = {"Vmid", "OUTMIXR"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_outvolr_enum, RT5631_MONO_AXO_1_2_VOL,
- RT5631_R_EN_SHIFT, rt5631_outvolr_sel);
-
-static const struct snd_kcontrol_new rt5631_outvolr_mux_control =
- SOC_DAPM_ENUM("Right OUTVOL SRC", rt5631_outvolr_enum);
-
-/* Right HP Volume Input */
-static const char *rt5631_hpvolr_sel[] = {"Vmid", "OUTMIXR"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_hpvolr_enum, RT5631_HP_OUT_VOL,
- RT5631_R_EN_SHIFT, rt5631_hpvolr_sel);
-
-static const struct snd_kcontrol_new rt5631_hpvolr_mux_control =
- SOC_DAPM_ENUM("Right HPVOL SRC", rt5631_hpvolr_enum);
-
-/* Right SPK Volume Input */
-static const char *rt5631_spkvolr_sel[] = {"Vmid", "SPKMIXR"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_spkvolr_enum, RT5631_SPK_OUT_VOL,
- RT5631_R_EN_SHIFT, rt5631_spkvolr_sel);
-
-static const struct snd_kcontrol_new rt5631_spkvolr_mux_control =
- SOC_DAPM_ENUM("Right SPKVOL SRC", rt5631_spkvolr_enum);
-
-/* SPO Left Channel Input */
-static const char *rt5631_spol_src_sel[] = {
- "SPOLMIX", "MONOIN_RX", "VDAC", "DACL"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_spol_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
- RT5631_SPK_L_MUX_SEL_SHIFT, rt5631_spol_src_sel);
-
-static const struct snd_kcontrol_new rt5631_spol_mux_control =
- SOC_DAPM_ENUM("SPOL SRC", rt5631_spol_src_enum);
-
-/* SPO Right Channel Input */
-static const char *rt5631_spor_src_sel[] = {
- "SPORMIX", "MONOIN_RX", "VDAC", "DACR"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_spor_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
- RT5631_SPK_R_MUX_SEL_SHIFT, rt5631_spor_src_sel);
-
-static const struct snd_kcontrol_new rt5631_spor_mux_control =
- SOC_DAPM_ENUM("SPOR SRC", rt5631_spor_src_enum);
-
-/* MONO Input */
-static const char *rt5631_mono_src_sel[] = {"MONOMIX", "MONOIN_RX", "VDAC"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_mono_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
- RT5631_MONO_MUX_SEL_SHIFT, rt5631_mono_src_sel);
-
-static const struct snd_kcontrol_new rt5631_mono_mux_control =
- SOC_DAPM_ENUM("MONO SRC", rt5631_mono_src_enum);
-
-/* Left HPO Input */
-static const char *rt5631_hpl_src_sel[] = {"Left HPVOL", "Left DAC"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_hpl_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
- RT5631_HP_L_MUX_SEL_SHIFT, rt5631_hpl_src_sel);
-
-static const struct snd_kcontrol_new rt5631_hpl_mux_control =
- SOC_DAPM_ENUM("HPL SRC", rt5631_hpl_src_enum);
-
-/* Right HPO Input */
-static const char *rt5631_hpr_src_sel[] = {"Right HPVOL", "Right DAC"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5631_hpr_src_enum, RT5631_SPK_MONO_HP_OUT_CTRL,
- RT5631_HP_R_MUX_SEL_SHIFT, rt5631_hpr_src_sel);
-
-static const struct snd_kcontrol_new rt5631_hpr_mux_control =
- SOC_DAPM_ENUM("HPR SRC", rt5631_hpr_src_enum);
-
-static const struct snd_soc_dapm_widget rt5631_dapm_widgets[] = {
- /* Vmid */
- SND_SOC_DAPM_VMID("Vmid"),
- /* PLL */
- SND_SOC_DAPM_SUPPLY("PLL1", RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_PLL1_BIT, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("PLL2", RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_PLL2_BIT, 0, NULL, 0),
-
- /* Input Side */
- /* Input Lines */
- SND_SOC_DAPM_INPUT("MIC1"),
- SND_SOC_DAPM_INPUT("MIC2"),
- SND_SOC_DAPM_INPUT("AXIL"),
- SND_SOC_DAPM_INPUT("AXIR"),
- SND_SOC_DAPM_INPUT("MONOIN_RXN"),
- SND_SOC_DAPM_INPUT("MONOIN_RXP"),
- SND_SOC_DAPM_INPUT("DMIC"),
-
- /* MICBIAS */
- SND_SOC_DAPM_MICBIAS("MIC Bias1", RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_MICBIAS1_VOL_BIT, 0),
- SND_SOC_DAPM_MICBIAS("MIC Bias2", RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_MICBIAS2_VOL_BIT, 0),
-
- /* Boost */
- SND_SOC_DAPM_PGA("MIC1 Boost", RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_MIC1_BOOT_GAIN_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("MIC2 Boost", RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_MIC2_BOOT_GAIN_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("MONOIN_RXP Boost", RT5631_PWR_MANAG_ADD4,
- RT5631_PWR_MONO_IN_P_VOL_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("MONOIN_RXN Boost", RT5631_PWR_MANAG_ADD4,
- RT5631_PWR_MONO_IN_N_VOL_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("AXIL Boost", RT5631_PWR_MANAG_ADD4,
- RT5631_PWR_AXIL_IN_VOL_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("AXIR Boost", RT5631_PWR_MANAG_ADD4,
- RT5631_PWR_AXIR_IN_VOL_BIT, 0, NULL, 0),
-
- /* MONO In */
- SND_SOC_DAPM_MIXER("MONO_IN", SND_SOC_NOPM, 0, 0, NULL, 0),
-
- /* REC Mixer */
- SND_SOC_DAPM_MIXER("RECMIXL Mixer", RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_RECMIXER_L_BIT, 0,
- &rt5631_recmixl_mixer_controls[0],
- ARRAY_SIZE(rt5631_recmixl_mixer_controls)),
- SND_SOC_DAPM_MIXER("RECMIXR Mixer", RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_RECMIXER_R_BIT, 0,
- &rt5631_recmixr_mixer_controls[0],
- ARRAY_SIZE(rt5631_recmixr_mixer_controls)),
- /* Because of record duplication for L/R channel,
- * L/R ADCs need power up at the same time */
- SND_SOC_DAPM_MIXER("ADC Mixer", SND_SOC_NOPM, 0, 0, NULL, 0),
-
- /* DMIC */
- SND_SOC_DAPM_SUPPLY("DMIC Supply", RT5631_DIG_MIC_CTRL,
- RT5631_DMIC_ENA_SHIFT, 0,
- set_dmic_params, SND_SOC_DAPM_PRE_PMU),
- /* ADC Data Srouce */
- SND_SOC_DAPM_SUPPLY("Left ADC Select", RT5631_INT_ST_IRQ_CTRL_2,
- RT5631_ADC_DATA_SEL_MIC1_SHIFT, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("Right ADC Select", RT5631_INT_ST_IRQ_CTRL_2,
- RT5631_ADC_DATA_SEL_MIC2_SHIFT, 0, NULL, 0),
-
- /* ADCs */
- SND_SOC_DAPM_ADC("Left ADC", "HIFI Capture",
- RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_L_CLK_BIT, 0),
- SND_SOC_DAPM_ADC("Right ADC", "Voice HIFI Capture",
- RT5631_PWR_MANAG_ADD1, RT5631_PWR_ADC_R_CLK_BIT, 0),
-
- /* DAC and ADC supply power */
- SND_SOC_DAPM_SUPPLY("I2S", RT5631_PWR_MANAG_ADD1,
- RT5631_PWR_MAIN_I2S_BIT, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("VI2S", RT5631_PWR_MANAG_ADD1,
- RT5631_PWR_VOICE_I2S_BIT, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("DAC REF", RT5631_PWR_MANAG_ADD1,
- RT5631_PWR_DAC_REF_BIT, 0, NULL, 0),
-
- /* Output Side */
- /* DACs */
- SND_SOC_DAPM_DAC("Left DAC", "HIFI Playback",
- RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_L_CLK_BIT, 0),
- SND_SOC_DAPM_DAC("Right DAC", "HIFI Playback",
- RT5631_PWR_MANAG_ADD1, RT5631_PWR_DAC_R_CLK_BIT, 0),
- SND_SOC_DAPM_DAC("Voice DAC", "Voice DAC Mono Playback",
- RT5631_PWR_MANAG_ADD1, RT5631_PWR_VDAC_CLK_BIT, 0),
- SND_SOC_DAPM_PGA("Voice DAC Boost", SND_SOC_NOPM, 0, 0, NULL, 0),
- /* DAC supply power */
- SND_SOC_DAPM_SUPPLY("Left DAC To Mixer", RT5631_PWR_MANAG_ADD1,
- RT5631_PWR_DAC_L_TO_MIXER_BIT, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("Right DAC To Mixer", RT5631_PWR_MANAG_ADD1,
- RT5631_PWR_DAC_R_TO_MIXER_BIT, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("Voice DAC To Mixer", RT5631_PWR_MANAG_ADD1,
- RT5631_PWR_VDAC_TO_MIXER_BIT, 0, NULL, 0),
-
- /* Left SPK Mixer */
- SND_SOC_DAPM_MIXER("SPKMIXL Mixer", RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_SPKMIXER_L_BIT, 0,
- &rt5631_spkmixl_mixer_controls[0],
- ARRAY_SIZE(rt5631_spkmixl_mixer_controls)),
- /* Left Out Mixer */
- SND_SOC_DAPM_MIXER("OUTMIXL Mixer", RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_OUTMIXER_L_BIT, 0,
- &rt5631_outmixl_mixer_controls[0],
- ARRAY_SIZE(rt5631_outmixl_mixer_controls)),
- /* Right Out Mixer */
- SND_SOC_DAPM_MIXER("OUTMIXR Mixer", RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_OUTMIXER_R_BIT, 0,
- &rt5631_outmixr_mixer_controls[0],
- ARRAY_SIZE(rt5631_outmixr_mixer_controls)),
- /* Right SPK Mixer */
- SND_SOC_DAPM_MIXER("SPKMIXR Mixer", RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_SPKMIXER_R_BIT, 0,
- &rt5631_spkmixr_mixer_controls[0],
- ARRAY_SIZE(rt5631_spkmixr_mixer_controls)),
-
- /* Volume Mux */
- SND_SOC_DAPM_MUX("Left SPKVOL Mux", RT5631_PWR_MANAG_ADD4,
- RT5631_PWR_SPK_L_VOL_BIT, 0,
- &rt5631_spkvoll_mux_control),
- SND_SOC_DAPM_MUX("Left HPVOL Mux", RT5631_PWR_MANAG_ADD4,
- RT5631_PWR_HP_L_OUT_VOL_BIT, 0,
- &rt5631_hpvoll_mux_control),
- SND_SOC_DAPM_MUX("Left OUTVOL Mux", RT5631_PWR_MANAG_ADD4,
- RT5631_PWR_LOUT_VOL_BIT, 0,
- &rt5631_outvoll_mux_control),
- SND_SOC_DAPM_MUX("Right OUTVOL Mux", RT5631_PWR_MANAG_ADD4,
- RT5631_PWR_ROUT_VOL_BIT, 0,
- &rt5631_outvolr_mux_control),
- SND_SOC_DAPM_MUX("Right HPVOL Mux", RT5631_PWR_MANAG_ADD4,
- RT5631_PWR_HP_R_OUT_VOL_BIT, 0,
- &rt5631_hpvolr_mux_control),
- SND_SOC_DAPM_MUX("Right SPKVOL Mux", RT5631_PWR_MANAG_ADD4,
- RT5631_PWR_SPK_R_VOL_BIT, 0,
- &rt5631_spkvolr_mux_control),
-
- /* DAC To HP */
- SND_SOC_DAPM_PGA_S("Left DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA_S("Right DAC_HP", 0, SND_SOC_NOPM, 0, 0, NULL, 0),
-
- /* HP Depop */
- SND_SOC_DAPM_PGA_S("HP Depop", 1, SND_SOC_NOPM, 0, 0,
- hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
-
- /* AUXO Depop */
- SND_SOC_DAPM_PGA_S("AUXO Depop", 1, SND_SOC_NOPM, 0, 0,
- auxo_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
-
-//bard 7-5 s
- /* SPK */
- SND_SOC_DAPM_PGA_S("SPOL PGA", 2,RT5631_SPK_OUT_VOL,
- RT5631_L_MUTE_SHIFT, 1,
- spk_event,SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
- SND_SOC_DAPM_PGA_S("SPOR PGA", 2,RT5631_SPK_OUT_VOL,
- RT5631_R_MUTE_SHIFT, 1,
- spk_event,SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
-//bard 7-5 e
- /* AXO1 Mixer */
- SND_SOC_DAPM_MIXER("AXO1MIX Mixer", RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_AXO1MIXER_BIT, 0,
- &rt5631_AXO1MIX_mixer_controls[0],
- ARRAY_SIZE(rt5631_AXO1MIX_mixer_controls)),
- /* SPOL Mixer */
- SND_SOC_DAPM_MIXER("SPOLMIX Mixer", SND_SOC_NOPM, 0, 0,
- &rt5631_spolmix_mixer_controls[0],
- ARRAY_SIZE(rt5631_spolmix_mixer_controls)),
- /* MONO Mixer */
- SND_SOC_DAPM_MIXER("MONOMIX Mixer", RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_MONOMIXER_BIT, 0,
- &rt5631_monomix_mixer_controls[0],
- ARRAY_SIZE(rt5631_monomix_mixer_controls)),
- /* SPOR Mixer */
- SND_SOC_DAPM_MIXER("SPORMIX Mixer", SND_SOC_NOPM, 0, 0,
- &rt5631_spormix_mixer_controls[0],
- ARRAY_SIZE(rt5631_spormix_mixer_controls)),
- /* AXO2 Mixer */
- SND_SOC_DAPM_MIXER("AXO2MIX Mixer", RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_AXO2MIXER_BIT, 0,
- &rt5631_AXO2MIX_mixer_controls[0],
- ARRAY_SIZE(rt5631_AXO2MIX_mixer_controls)),
-
- /* Mux */
- SND_SOC_DAPM_MUX("SPOL Mux", SND_SOC_NOPM, 0, 0,
- &rt5631_spol_mux_control),
- SND_SOC_DAPM_MUX("SPOR Mux", SND_SOC_NOPM, 0, 0,
- &rt5631_spor_mux_control),
- SND_SOC_DAPM_MUX("MONO Mux", SND_SOC_NOPM, 0, 0,
- &rt5631_mono_mux_control),
- SND_SOC_DAPM_MUX("HPL Mux", SND_SOC_NOPM, 0, 0,
- &rt5631_hpl_mux_control),
- SND_SOC_DAPM_MUX("HPR Mux", SND_SOC_NOPM, 0, 0,
- &rt5631_hpr_mux_control),
-
- /* AMP supply */
- SND_SOC_DAPM_SUPPLY("MONO Depop", RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_MONO_DEPOP_DIS_BIT, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("Class D", RT5631_PWR_MANAG_ADD1,
- RT5631_PWR_CLASS_D_BIT, 0, NULL, 0),
-
- /* Output Lines */
- SND_SOC_DAPM_OUTPUT("AUXO1"),
- SND_SOC_DAPM_OUTPUT("AUXO2"),
- SND_SOC_DAPM_OUTPUT("SPOL"),
- SND_SOC_DAPM_OUTPUT("SPOR"),
- SND_SOC_DAPM_OUTPUT("HPOL"),
- SND_SOC_DAPM_OUTPUT("HPOR"),
- SND_SOC_DAPM_OUTPUT("MONO"),
-};
-
-static const struct snd_soc_dapm_route rt5631_dapm_routes[] = {
- {"MIC1 Boost", NULL, "MIC1"},
- {"MIC2 Boost", NULL, "MIC2"},
- {"MONOIN_RXP Boost", NULL, "MONOIN_RXP"},
- {"MONOIN_RXN Boost", NULL, "MONOIN_RXN"},
- {"AXIL Boost", NULL, "AXIL"},
- {"AXIR Boost", NULL, "AXIR"},
-
- {"MONO_IN", NULL, "MONOIN_RXP Boost"},
- {"MONO_IN", NULL, "MONOIN_RXN Boost"},
-
- {"RECMIXL Mixer", "OUTMIXL Capture Switch", "OUTMIXL Mixer"},
- {"RECMIXL Mixer", "MIC1_BST1 Capture Switch", "MIC1 Boost"},
- {"RECMIXL Mixer", "AXILVOL Capture Switch", "AXIL Boost"},
- {"RECMIXL Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
-
- {"RECMIXR Mixer", "OUTMIXR Capture Switch", "OUTMIXR Mixer"},
- {"RECMIXR Mixer", "MIC2_BST2 Capture Switch", "MIC2 Boost"},
- {"RECMIXR Mixer", "AXIRVOL Capture Switch", "AXIR Boost"},
- {"RECMIXR Mixer", "MONOIN_RX Capture Switch", "MONO_IN"},
-
- {"ADC Mixer", NULL, "RECMIXL Mixer"},
- {"ADC Mixer", NULL, "RECMIXR Mixer"},
-
- {"Left ADC", NULL, "ADC Mixer"},
- {"Left ADC", NULL, "Left ADC Select", check_adcl_select},
- {"Left ADC", NULL, "PLL1", check_sysclk1_source},
- {"Left ADC", NULL, "I2S", check_adcr_stereo},
- {"Left ADC", NULL, "VI2S", check_adcr_voice},
- {"Left ADC", NULL, "DAC REF"},
-
- {"Right ADC", NULL, "ADC Mixer"},
- {"Right ADC", NULL, "Right ADC Select", check_adcr_select},
- {"Right ADC", NULL, "PLL1", check_adcr_pll1},
- {"Right ADC", NULL, "PLL2", check_adcr_pll2},
- {"Right ADC", NULL, "I2S", check_adcr_stereo},
- {"Right ADC", NULL, "VI2S", check_adcr_voice},
- {"Right ADC", NULL, "DAC REF"},
-
- {"DMIC", NULL, "DMIC Supply", check_dmic_used},
- {"Left ADC", NULL, "DMIC"},
- {"Right ADC", NULL, "DMIC"},
-
- {"Left DAC", NULL, "PLL1", check_sysclk1_source},
- {"Left DAC", NULL, "I2S"},
- {"Left DAC", NULL, "DAC REF"},
- {"Left DAC", NULL, "Left DAC To Mixer"},
- {"Right DAC", NULL, "PLL1", check_sysclk1_source},
- {"Right DAC", NULL, "I2S"},
- {"Right DAC", NULL, "DAC REF"},
- {"Right DAC", NULL, "Right DAC To Mixer"},
-
- {"Voice DAC", NULL, "PLL1", check_vdac_pll1},
- {"Voice DAC", NULL, "PLL2", check_vdac_pll2},
- {"Voice DAC", NULL, "VI2S"},
- {"Voice DAC", NULL, "DAC REF"},
- {"Voice DAC", NULL, "Voice DAC To Mixer"},
-
- {"Voice DAC Boost", NULL, "Voice DAC"},
-
- {"SPKMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
- {"SPKMIXL Mixer", "MIC1_P Playback Switch", "MIC1"},
- {"SPKMIXL Mixer", "DACL Playback Switch", "Left DAC"},
- {"SPKMIXL Mixer", "OUTMIXL Playback Switch", "OUTMIXL Mixer"},
-
- {"SPKMIXR Mixer", "OUTMIXR Playback Switch", "OUTMIXR Mixer"},
- {"SPKMIXR Mixer", "DACR Playback Switch", "Right DAC"},
- {"SPKMIXR Mixer", "MIC2_P Playback Switch", "MIC2"},
- {"SPKMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
-
- {"OUTMIXL Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
- {"OUTMIXL Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
- {"OUTMIXL Mixer", "DACL Playback Switch", "Left DAC"},
- {"OUTMIXL Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
- {"OUTMIXL Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
- {"OUTMIXL Mixer", "MONOIN_RXP Playback Switch", "MONOIN_RXP Boost"},
- {"OUTMIXL Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
- {"OUTMIXL Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
- {"OUTMIXL Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
-
- {"OUTMIXR Mixer", "RECMIXL Playback Switch", "RECMIXL Mixer"},
- {"OUTMIXR Mixer", "RECMIXR Playback Switch", "RECMIXR Mixer"},
- {"OUTMIXR Mixer", "DACR Playback Switch", "Right DAC"},
- {"OUTMIXR Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
- {"OUTMIXR Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
- {"OUTMIXR Mixer", "MONOIN_RXN Playback Switch", "MONOIN_RXN Boost"},
- {"OUTMIXR Mixer", "AXILVOL Playback Switch", "AXIL Boost"},
- {"OUTMIXR Mixer", "AXIRVOL Playback Switch", "AXIR Boost"},
- {"OUTMIXR Mixer", "VDAC Playback Switch", "Voice DAC Boost"},
-
- {"Left SPKVOL Mux", "SPKMIXL", "SPKMIXL Mixer"},
- {"Left SPKVOL Mux", "Vmid", "Vmid"},
- {"Left HPVOL Mux", "OUTMIXL", "OUTMIXL Mixer"},
- {"Left HPVOL Mux", "Vmid", "Vmid"},
- {"Left OUTVOL Mux", "OUTMIXL", "OUTMIXL Mixer"},
- {"Left OUTVOL Mux", "Vmid", "Vmid"},
- {"Right OUTVOL Mux", "OUTMIXR", "OUTMIXR Mixer"},
- {"Right OUTVOL Mux", "Vmid", "Vmid"},
- {"Right HPVOL Mux", "OUTMIXR", "OUTMIXR Mixer"},
- {"Right HPVOL Mux", "Vmid", "Vmid"},
- {"Right SPKVOL Mux", "SPKMIXR", "SPKMIXR Mixer"},
- {"Right SPKVOL Mux", "Vmid", "Vmid"},
-
- {"AXO1MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
- {"AXO1MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
- {"AXO1MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
- {"AXO1MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
-
- {"AXO2MIX Mixer", "MIC1_BST1 Playback Switch", "MIC1 Boost"},
- {"AXO2MIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
- {"AXO2MIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
- {"AXO2MIX Mixer", "MIC2_BST2 Playback Switch", "MIC2 Boost"},
-
- {"SPOLMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"},
- {"SPOLMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"},
-
- {"SPORMIX Mixer", "SPKVOLL Playback Switch", "Left SPKVOL Mux"},
- {"SPORMIX Mixer", "SPKVOLR Playback Switch", "Right SPKVOL Mux"},
-
- {"MONOMIX Mixer", "OUTVOLL Playback Switch", "Left OUTVOL Mux"},
- {"MONOMIX Mixer", "OUTVOLR Playback Switch", "Right OUTVOL Mux"},
-
- {"SPOL Mux", "SPOLMIX", "SPOLMIX Mixer"},
- {"SPOL Mux", "MONOIN_RX", "MONO_IN"},
- {"SPOL Mux", "VDAC", "Voice DAC Boost"},
- {"SPOL Mux", "DACL", "Left DAC"},
-
- {"SPOR Mux", "SPORMIX", "SPORMIX Mixer"},
- {"SPOR Mux", "MONOIN_RX", "MONO_IN"},
- {"SPOR Mux", "VDAC", "Voice DAC Boost"},
- {"SPOR Mux", "DACR", "Right DAC"},
-
- {"MONO Mux", "MONOMIX", "MONOMIX Mixer"},
- {"MONO Mux", "MONOIN_RX", "MONO_IN"},
- {"MONO Mux", "VDAC", "Voice DAC Boost"},
-
- {"Right DAC_HP", NULL, "Right DAC"},
- {"Left DAC_HP", NULL, "Left DAC"},
-
- {"HPL Mux", "Left HPVOL", "Left HPVOL Mux"},
- {"HPL Mux", "Left DAC", "Left DAC_HP"},
- {"HPR Mux", "Right HPVOL", "Right HPVOL Mux"},
- {"HPR Mux", "Right DAC", "Right DAC_HP"},
-
- {"HP Depop", NULL, "HPL Mux"},
- {"HP Depop", NULL, "HPR Mux"},
-
- {"AUXO1", NULL, "AXO1MIX Mixer"},
- {"AUXO2", NULL, "AXO2MIX Mixer"},
-
- {"AUXO Depop", NULL, "AXO1MIX Mixer"},
- {"AUXO Depop", NULL, "AXO2MIX Mixer"},
-
- {"AUXO1", NULL, "AUXO Depop"},
- {"AUXO2", NULL, "AUXO Depop"},
-
-#if 1 //bard 7-5
- {"SPOL PGA", NULL, "Class D"},
- {"SPOL PGA", NULL, "SPOL Mux"},
- {"SPOR PGA", NULL, "Class D"},
- {"SPOR PGA", NULL, "SPOR Mux"},
- {"SPOL", NULL, "SPOL PGA"},
- {"SPOR", NULL, "SPOR PGA"},
-#else //org
- {"SPOL", NULL, "Class D"},
- {"SPOL", NULL, "SPOL Mux"},
- {"SPOR", NULL, "Class D"},
- {"SPOR", NULL, "SPOR Mux"},
-#endif
- {"HPOL", NULL, "HP Depop"},
- {"HPOR", NULL, "HP Depop"},
-
- {"MONO", NULL, "MONO Depop"},
- {"MONO", NULL, "MONO Mux"},
-};
-
-struct coeff_clk_div {
- u32 mclk;
- u32 bclk;
- u32 rate;
- u16 reg_val;
-};
-
-/* PLL divisors */
-struct pll_div {
- u32 pll_in;
- u32 pll_out;
- u16 reg_val;
-};
-
-static const struct pll_div codec_master_pll_div[] = {
- {2048000, 8192000, 0x0ea0},
- {3686400, 8192000, 0x4e27},
- {12000000, 8192000, 0x456b},
- {13000000, 8192000, 0x495f},
- {13100000, 8192000, 0x0320},
- {2048000, 11289600, 0xf637},
- {3686400, 11289600, 0x2f22},
- {12000000, 11289600, 0x3e2f},
- {13000000, 11289600, 0x4d5b},
- {13100000, 11289600, 0x363b},
- {2048000, 16384000, 0x1ea0},
- {3686400, 16384000, 0x9e27},
- {12000000, 16384000, 0x452b},
- {13000000, 16384000, 0x542f},
- {13100000, 16384000, 0x03a0},
- {2048000, 16934400, 0xe625},
- {3686400, 16934400, 0x9126},
- {12000000, 16934400, 0x4d2c},
- {13000000, 16934400, 0x742f},
- {13100000, 16934400, 0x3c27},
- {2048000, 22579200, 0x2aa0},
- {3686400, 22579200, 0x2f20},
- {12000000, 22579200, 0x7e2f},
- {13000000, 22579200, 0x742f},
- {13100000, 22579200, 0x3c27},
- {2048000, 24576000, 0x2ea0},
- {3686400, 24576000, 0xee27},
- {12000000, 24576000, 0x2915},
- {13000000, 24576000, 0x772e},
- {13100000, 24576000, 0x0d20},
- {26000000, 24576000, 0x2027},
- {26000000, 22579200, 0x392f},
- {24576000, 22579200, 0x0921},
- {24576000, 24576000, 0x02a0},
-};
-
-static const struct pll_div codec_slave_pll_div[] = {
- {256000, 2048000, 0x46f0},
- {256000, 4096000, 0x3ea0},
- {352800, 5644800, 0x3ea0},
- {512000, 8192000, 0x3ea0},
- {1024000, 8192000, 0x46f0},
- {705600, 11289600, 0x3ea0},
- {1024000, 16384000, 0x3ea0},
- {1411200, 22579200, 0x3ea0},
- {1536000, 24576000, 0x3ea0},
- {2048000, 16384000, 0x1ea0},
- {2822400, 22579200, 0x1ea0},
- {2822400, 45158400, 0x5ec0},
- {5644800, 45158400, 0x46f0},
- {3072000, 24576000, 0x1ea0},
- {3072000, 49152000, 0x5ec0},
- {6144000, 49152000, 0x46f0},
- {705600, 11289600, 0x3ea0},
- {705600, 8467200, 0x3ab0},
- {24576000, 24576000, 0x02a0},
- {1411200, 11289600, 0x1690},
- {2822400, 11289600, 0x0a90},
- {1536000, 12288000, 0x1690},
- {3072000, 12288000, 0x0a90},
-};
-
-static struct coeff_clk_div coeff_div[] = {
- /* sysclk is 256fs */
- {2048000, 8000 * 32, 8000, 0x1000},
- {2048000, 8000 * 64, 8000, 0x0000},
- {2822400, 11025 * 32, 11025, 0x1000},
- {2822400, 11025 * 64, 11025, 0x0000},
- {4096000, 16000 * 32, 16000, 0x1000},
- {4096000, 16000 * 64, 16000, 0x0000},
- {5644800, 22050 * 32, 22050, 0x1000},
- {5644800, 22050 * 64, 22050, 0x0000},
- {8192000, 32000 * 32, 32000, 0x1000},
- {8192000, 32000 * 64, 32000, 0x0000},
- {11289600, 44100 * 32, 44100, 0x1000},
- {11289600, 44100 * 64, 44100, 0x0000},
- {12288000, 48000 * 32, 48000, 0x1000},
- {12288000, 48000 * 64, 48000, 0x0000},
- {22579200, 88200 * 32, 88200, 0x1000},
- {22579200, 88200 * 64, 88200, 0x0000},
- {24576000, 96000 * 32, 96000, 0x1000},
- {24576000, 96000 * 64, 96000, 0x0000},
- /* sysclk is 512fs */
- {4096000, 8000 * 32, 8000, 0x3000},
- {4096000, 8000 * 64, 8000, 0x2000},
- {5644800, 11025 * 32, 11025, 0x3000},
- {5644800, 11025 * 64, 11025, 0x2000},
- {8192000, 16000 * 32, 16000, 0x3000},
- {8192000, 16000 * 64, 16000, 0x2000},
- {11289600, 22050 * 32, 22050, 0x3000},
- {11289600, 22050 * 64, 22050, 0x2000},
- {16384000, 32000 * 32, 32000, 0x3000},
- {16384000, 32000 * 64, 32000, 0x2000},
- {22579200, 44100 * 32, 44100, 0x3000},
- {22579200, 44100 * 64, 44100, 0x2000},
- {24576000, 48000 * 32, 48000, 0x3000},
- {24576000, 48000 * 64, 48000, 0x2000},
- {45158400, 88200 * 32, 88200, 0x3000},
- {45158400, 88200 * 64, 88200, 0x2000},
- {49152000, 96000 * 32, 96000, 0x3000},
- {49152000, 96000 * 64, 96000, 0x2000},
- /* sysclk is 24.576Mhz or 22.5792Mhz */
- {24576000, 8000 * 32, 8000, 0x7080},
- {24576000, 8000 * 64, 8000, 0x6080},
- {24576000, 16000 * 32, 16000, 0x5080},
- {24576000, 16000 * 64, 16000, 0x4080},
- {24576000, 24000 * 32, 24000, 0x5000},
- {24576000, 24000 * 64, 24000, 0x4000},
- {24576000, 32000 * 32, 32000, 0x3080},
- {24576000, 32000 * 64, 32000, 0x2080},
- {22579200, 11025 * 32, 11025, 0x7000},
- {22579200, 11025 * 64, 11025, 0x6000},
- {22579200, 22050 * 32, 22050, 0x5000},
- {22579200, 22050 * 64, 22050, 0x4000},
-};
-
-struct coeff_clk_div coeff_div_voice[] = {
- /* sysclk is 256fs */
- {2048000, 8000 * 32, 8000, 0x0008},
- {2048000, 8000 * 64, 8000, 0x0000},
- {2822400, 11025 * 32, 11025, 0x0008},
- {2822400, 11025 * 64, 11025, 0x0000},
- {4096000, 16000 * 32, 16000, 0x0008},
- {4096000, 16000 * 64, 16000, 0x0000},
- /* sysclk is 512fs */
- {4096000, 8000 * 32, 8000, 0x0018},
- {4096000, 8000 * 64, 8000, 0x0010},
- {5644800, 11025 * 32, 11025, 0x0018},
- {5644800, 11025 * 64, 11025, 0x0010},
- {8192000, 16000 * 32, 16000, 0x0018},
- {8192000, 16000 * 64, 16000, 0x0010},
- /* sysclk is 24.576Mhz or 22.5792Mhz */
- {24576000, 8000 * 32, 8000, 0x003c},
- {24576000, 8000 * 64, 8000, 0x0034},
- {24576000, 16000 * 32, 16000, 0x002c},
- {24576000, 16000 * 64, 16000, 0x0024},
- {22579200, 11025 * 32, 11025, 0x0038},
- {22579200, 11025 * 64, 11025, 0x0030},
-};
-
-static int get_coeff(int dai_id, int mclk, int rate, int timesofbclk)
-{
- struct coeff_clk_div *tabp;
- int i, tab_num;
-
- if (dai_id == RT5631_AIF1) {
- tabp = coeff_div;
- tab_num = ARRAY_SIZE(coeff_div);
- } else if (dai_id == RT5631_AIF2) {
- tabp = coeff_div_voice;
- tab_num = ARRAY_SIZE(coeff_div_voice);
- } else
- return -EINVAL;
-
- for (i = 0; i < tab_num; i++) {
- if (tabp[i].mclk == mclk && tabp[i].rate == rate &&
- (tabp[i].bclk / tabp[i].rate) == timesofbclk)
- return i;
- }
- return -EINVAL;
-}
-
-static int rt5631_hifi_pcm_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
-{
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_codec *codec = rtd->codec;
- struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
- int timesofbclk = 32, coeff, sysclk=0;
- unsigned int iface = 0, val;
-
- dev_dbg(codec->dev, "enter %s\n", __func__);
-
- if (RT5631_AIF1 == dai->id) {
- snd_soc_update_bits(codec, RT5631_GLOBAL_CLK_CTRL,
- RT5631_ADCR_FUN_MASK, RT5631_ADCR_FUN_ADC);
- sysclk = rt5631->sysclk[RT5631_SCLK1];
- } else if (RT5631_AIF2 == dai->id) {
- snd_soc_update_bits(codec, RT5631_GLOBAL_CLK_CTRL,
- RT5631_ADCR_FUN_MASK, RT5631_ADCR_FUN_VADC);
- val = snd_soc_read(codec, RT5631_GLOBAL_CLK_CTRL);
- if (val & RT5631_VDAC_CLK_SOUR_SCLK2)
- sysclk = rt5631->sysclk[RT5631_SCLK2];
- else
- sysclk = rt5631->sysclk[RT5631_SCLK1];
- }
-
- rt5631->bclk_rate = snd_soc_params_to_bclk(params);
- if (rt5631->bclk_rate < 0) {
- dev_err(codec->dev, "Fail to get BCLK rate\n");
- return rt5631->bclk_rate;
- }
- rt5631->rate = params_rate(params);
- if (SNDRV_PCM_STREAM_CAPTURE == substream->stream)
- rt5631->rx_rate = rt5631->rate;
-
- if (rt5631->master[dai->id])
- coeff = get_coeff(dai->id, sysclk, rt5631->rate,
- rt5631->bclk_rate / rt5631->rate);
- else
- coeff = get_coeff(dai->id, sysclk, rt5631->rate, timesofbclk);
- if (coeff < 0) {
- dev_err(codec->dev, "Fail to get coeff\n");
- return -EINVAL;
- }
-
- switch (params_format(params)) {
- case SNDRV_PCM_FORMAT_S16_LE:
- break;
- case SNDRV_PCM_FORMAT_S20_3LE:
- iface |= RT5631_SDP_I2S_DL_20;
- break;
- case SNDRV_PCM_FORMAT_S24_LE:
- iface |= RT5631_SDP_I2S_DL_24;
- break;
- case SNDRV_PCM_FORMAT_S8:
- iface |= RT5631_SDP_I2S_DL_8;
- break;
- default:
- return -EINVAL;
- }
-
- if (RT5631_AIF1 == dai->id) {
- snd_soc_update_bits(codec, RT5631_SDP_CTRL,
- RT5631_SDP_I2S_DL_MASK, iface);
- snd_soc_update_bits(codec, RT5631_STEREO_AD_DA_CLK_CTRL,
- RT5631_I2S_PRE_DIV_MASK |
- RT5631_I2S_LRCK_SEL_N_BCLK_MASK |
- RT5631_ADDA_FILTER_CLK_SEL_MASK,
- coeff_div[coeff].reg_val);
- } else if (RT5631_AIF2 == dai->id) {
- snd_soc_update_bits(codec, RT5631_MONO_SDP_CTRL,
- RT5631_SDP_I2S_DL_MASK, iface);
- snd_soc_update_bits(codec, RT5631_STEREO_AD_DA_CLK_CTRL,
- RT5631_I2S_PRE_DIV2_MASK |
- RT5631_I2S_LRCK_SEL_N_BCLK2_MASK |
- RT5631_ADDA_FILTER_CLK2_SEL_MASK,
- coeff_div_voice[coeff].reg_val);
- }
-
- return 0;
-}
-
-static int rt5631_hifi_codec_set_dai_fmt(
- struct snd_soc_dai *dai, unsigned int fmt)
-{
- struct snd_soc_codec *codec = dai->codec;
- struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
- unsigned int iface = 0;
-
- dev_dbg(codec->dev, "enter %s\n", __func__);
-
- switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
- case SND_SOC_DAIFMT_CBM_CFM:
- rt5631->master[dai->id] = 1;
- break;
- case SND_SOC_DAIFMT_CBS_CFS:
- iface |= RT5631_SDP_MODE_SEL_SLAVE;
- rt5631->master[dai->id] = 0;
- break;
- default:
- return -EINVAL;
- }
-
- switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
- case SND_SOC_DAIFMT_I2S:
- break;
- case SND_SOC_DAIFMT_LEFT_J:
- iface |= RT5631_SDP_I2S_DF_LEFT;
- break;
- case SND_SOC_DAIFMT_DSP_A:
- iface |= RT5631_SDP_I2S_DF_PCM_A;
- break;
- case SND_SOC_DAIFMT_DSP_B:
- iface |= RT5631_SDP_I2S_DF_PCM_B;
- break;
- default:
- return -EINVAL;
- }
-
- switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
- case SND_SOC_DAIFMT_NB_NF:
- break;
- case SND_SOC_DAIFMT_IB_NF:
- iface |= RT5631_SDP_I2S_BCLK_POL_CTRL;
- break;
- default:
- return -EINVAL;
- }
-
- if (RT5631_AIF1 == dai->id)
- snd_soc_write(codec, RT5631_SDP_CTRL, iface);
- else if (RT5631_AIF2 == dai->id)
- snd_soc_write(codec, RT5631_MONO_SDP_CTRL, iface);
-
- return 0;
-}
-
-static int rt5631_hifi_codec_set_dai_sysclk(struct snd_soc_dai *dai,
- int clk_id, unsigned int freq, int dir)
-{
- struct snd_soc_codec *codec = dai->codec;
- struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
-
- dev_dbg(codec->dev, "syclk[%d]: %d\n", clk_id, freq);
-
- if (clk_id != RT5631_SCLK1 && clk_id != RT5631_SCLK2)
- return -EINVAL;
-
- if ((freq >= (256 * 8000)) && (freq <= (512 * 96000))) {
- rt5631->sysclk[clk_id] = freq;
- return 0;
- }
-
- return -EINVAL;
-}
-
-static int rt5631_codec_set_dai_pll(struct snd_soc_dai *dai, int pll_id,
- int source, unsigned int freq_in, unsigned int freq_out)
-{
- struct snd_soc_codec *codec = dai->codec;
- struct pll_div *pll_tab;
- unsigned int pll_reg, clk_val, clk_mask;
- int i, tab_num, ret = -EINVAL;
-
- if (!freq_in || !freq_out) {
- dev_dbg(codec->dev, "PLL disabled\n");
- if (RT5631_PLL1 == pll_id)
- snd_soc_update_bits(codec, RT5631_GLOBAL_CLK_CTRL,
- RT5631_SYSCLK_SOUR_SEL_MASK,
- RT5631_SYSCLK_SOUR_SEL_MCLK);
- else if (RT5631_PLL2 == pll_id)
- snd_soc_update_bits(codec, RT5631_GLOBAL_CLK_CTRL,
- RT5631_SYSCLK2_SOUR_SEL_MASK,
- RT5631_SYSCLK2_SOUR_SEL_MCLK);
- return 0;
- }
-
- switch (pll_id) {
- case RT5631_PLL1:
- pll_reg = RT5631_PLL_CTRL;
- clk_mask = RT5631_SYSCLK_SOUR_SEL_MASK |
- RT5631_PLLCLK_SOUR_SEL_MASK;
- clk_val = RT5631_SYSCLK_SOUR_SEL_PLL;
- break;
-
- case RT5631_PLL2:
- pll_reg = RT5631_PLL2_CTRL;
- clk_mask = RT5631_SYSCLK2_SOUR_SEL_MASK |
- RT5631_PLLCLK2_SOUR_SEL_MASK;
- clk_val = RT5631_SYSCLK2_SOUR_SEL_PLL2;
- break;
-
- default:
- return -EINVAL;
- }
-
- switch (source) {
- case RT5631_PLL_S_MCLK:
- pll_tab = (struct pll_div *)codec_master_pll_div;
- tab_num = ARRAY_SIZE(codec_master_pll_div);
- clk_val |= (pll_id ? RT5631_PLLCLK2_SOUR_SEL_MCLK :
- RT5631_PLLCLK_SOUR_SEL_MCLK);
- break;
-
- case RT5631_PLL_S_BCLK:
- pll_tab = (struct pll_div *)codec_slave_pll_div;
- tab_num = ARRAY_SIZE(codec_slave_pll_div);
- clk_val |= (pll_id ? RT5631_PLLCLK2_SOUR_SEL_BCLK :
- RT5631_PLLCLK_SOUR_SEL_BCLK);
- break;
-
- case RT5631_PLL_S_VBCLK:
- pll_tab = (struct pll_div *)codec_slave_pll_div;
- tab_num = ARRAY_SIZE(codec_slave_pll_div);
- clk_val |= (pll_id ? RT5631_PLLCLK2_SOUR_SEL_VBCLK :
- RT5631_PLLCLK_SOUR_SEL_VBCLK);
- break;
-
- default:
- return -EINVAL;
- }
-
- for (i = 0; i < tab_num; i++)
- if (freq_in == pll_tab[i].pll_in &&
- freq_out == pll_tab[i].pll_out) {
- snd_soc_write(codec, pll_reg, pll_tab[i].reg_val);
- mdelay(20);
- snd_soc_update_bits(codec, RT5631_GLOBAL_CLK_CTRL,
- clk_mask, clk_val);
- ret = 0;
- break;
- }
-
- return ret;
-}
-
-static int rt5631_set_bias_level(struct snd_soc_codec *codec,
- enum snd_soc_bias_level level)
-{
- switch (level) {
- case SND_SOC_BIAS_ON:
-/* bard 7-5 remove
- snd_soc_update_bits(codec, RT5631_SPK_OUT_VOL,
- RT5631_L_MUTE | RT5631_R_MUTE,0);
- snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
- RT5631_L_MUTE | RT5631_R_MUTE,0);
-*/
- break;
-
- case SND_SOC_BIAS_PREPARE:
-//bard 7-5 s
- snd_soc_update_bits(codec, RT5631_SPK_OUT_VOL,
- RT5631_L_MUTE | RT5631_R_MUTE,
- RT5631_L_MUTE | RT5631_R_MUTE);
- snd_soc_update_bits(codec, RT5631_HP_OUT_VOL,
- RT5631_L_MUTE | RT5631_R_MUTE,
- RT5631_L_MUTE | RT5631_R_MUTE);
-//bard 7-5 e
- snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL,
- RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL);
- break;
-
- case SND_SOC_BIAS_STANDBY:
- if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
- snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS,
- RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS);
- msleep(80);
- snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_FAST_VREF_CTRL,
- RT5631_PWR_FAST_VREF_CTRL);
- msleep(100);
- snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD2,
- RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL,
- RT5631_PWR_MICBIAS1_VOL | RT5631_PWR_MICBIAS2_VOL);
-
- codec->cache_only = false;
- codec->cache_sync = 1;
- snd_soc_cache_sync(codec);
- rt5631_index_sync(codec);
- }
- break;
-
- case SND_SOC_BIAS_OFF:
- snd_soc_write(codec, RT5631_PWR_MANAG_ADD1, 0x0000);
- snd_soc_write(codec, RT5631_PWR_MANAG_ADD2, 0x0000);
- snd_soc_write(codec, RT5631_PWR_MANAG_ADD3, 0x0000);
- snd_soc_write(codec, RT5631_PWR_MANAG_ADD4, 0x0000);
- break;
-
- default:
- break;
- }
- codec->dapm.bias_level = level;
-
- return 0;
-}
-
-/**
- * rt5631_index_show - Dump private registers.
- * @dev: codec device.
- * @attr: device attribute.
- * @buf: buffer for display.
- *
- * To show non-zero values of all private registers.
- *
- * Returns buffer length.
- */
-static ssize_t rt5631_index_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct i2c_client *client = to_i2c_client(dev);
- struct rt5631_priv *rt5631 = i2c_get_clientdata(client);
- struct snd_soc_codec *codec = rt5631->codec;
- unsigned int val;
- int cnt = 0, i;
-
- cnt += sprintf(buf, "RT5631 index register\n");
- for (i = 0; i <= 0x23; i++) {
- if (cnt + 9 >= PAGE_SIZE - 1)
- break;
- val = rt5631_index_read(codec, i);
- if (!val)
- continue;
- cnt += snprintf(buf + cnt, 10, "%02x: %04x\n", i, val);
- }
-
- if (cnt >= PAGE_SIZE)
- cnt = PAGE_SIZE - 1;
-
- return cnt;
-}
-static DEVICE_ATTR(index_reg, 0444, rt5631_index_show, NULL);
-
-static int rt5631_probe(struct snd_soc_codec *codec)
-{
- struct rt5631_priv *rt5631 = snd_soc_codec_get_drvdata(codec);
- unsigned int val;
- int ret;
-
- ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
- if (ret != 0) {
- dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
- return ret;
- }
-
- val = rt5631_index_read(codec, RT5631_ADDA_MIXER_INTL_REG3);
- if (val & 0x0002)
- rt5631->codec_version = 1;
- else
- rt5631->codec_version = 0;
-
- rt5631_reset(codec);
- snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS,
- RT5631_PWR_VREF | RT5631_PWR_MAIN_BIAS);
- msleep(80);
- snd_soc_update_bits(codec, RT5631_PWR_MANAG_ADD3,
- RT5631_PWR_FAST_VREF_CTRL, RT5631_PWR_FAST_VREF_CTRL);
- /* enable HP zero cross */
- snd_soc_write(codec, RT5631_INT_ST_IRQ_CTRL_2, 0x0f18);
- /* power off ClassD auto Recovery */
- if (rt5631->codec_version)
- snd_soc_update_bits(codec, RT5631_INT_ST_IRQ_CTRL_2,
- 0x2000, 0x2000);
- else
- snd_soc_update_bits(codec, RT5631_INT_ST_IRQ_CTRL_2,
- 0x2000, 0);
- /* DMIC */
- if (rt5631->dmic_used_flag) {
- snd_soc_update_bits(codec, RT5631_GPIO_CTRL,
- RT5631_GPIO_PIN_FUN_SEL_MASK |
- RT5631_GPIO_DMIC_FUN_SEL_MASK,
- RT5631_GPIO_PIN_FUN_SEL_GPIO_DIMC |
- RT5631_GPIO_DMIC_FUN_SEL_DIMC);
- snd_soc_update_bits(codec, RT5631_DIG_MIC_CTRL,
- RT5631_DMIC_L_CH_LATCH_MASK |
- RT5631_DMIC_R_CH_LATCH_MASK,
- RT5631_DMIC_L_CH_LATCH_FALLING |
- RT5631_DMIC_R_CH_LATCH_RISING);
- }
- rt5631_reg_init(codec);
-
- codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
- rt5631->codec = codec;
- rt5631_codec = codec;
- snd_soc_add_codec_controls(codec, rt5631_snd_controls,
- ARRAY_SIZE(rt5631_snd_controls));
- snd_soc_dapm_new_controls(&codec->dapm, rt5631_dapm_widgets,
- ARRAY_SIZE(rt5631_dapm_widgets));
- snd_soc_dapm_add_routes(&codec->dapm, rt5631_dapm_routes,
- ARRAY_SIZE(rt5631_dapm_routes));
-
- ret = device_create_file(codec->dev, &dev_attr_index_reg);
- if (ret < 0) {
- dev_err(codec->dev,
- "Failed to create index_reg sysfs files: %d\n", ret);
- return ret;
- }
-
- return 0;
-}
-
-static int rt5631_remove(struct snd_soc_codec *codec)
-{
- rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int rt5631_suspend(struct snd_soc_codec *codec)
-{
- rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
- return 0;
-}
-
-static int rt5631_resume(struct snd_soc_codec *codec)
-{
- rt5631_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
- return 0;
-}
-#else
-#define rt5631_suspend NULL
-#define rt5631_resume NULL
-#endif
-
-#define RT5631_STEREO_RATES SNDRV_PCM_RATE_8000_96000
-#define RT5631_VOICE_RATES SNDRV_PCM_RATE_8000_96000//(SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000)
-#define RT5631_FORMAT (SNDRV_PCM_FMTBIT_S16_LE | \
- SNDRV_PCM_FMTBIT_S20_3LE | \
- SNDRV_PCM_FMTBIT_S24_LE | \
- SNDRV_PCM_FMTBIT_S8)
-
-static struct snd_soc_dai_ops rt5631_ops = {
- .hw_params = rt5631_hifi_pcm_params,
- .set_fmt = rt5631_hifi_codec_set_dai_fmt,
- .set_sysclk = rt5631_hifi_codec_set_dai_sysclk,
- .set_pll = rt5631_codec_set_dai_pll,
-};
-
-static struct snd_soc_dai_driver rt5631_dai[] = {
- {
- .name = "RT5631 HiFi",
- .id = RT5631_AIF1,
- .playback = {
- .stream_name = "HIFI Playback",
- .channels_min = 1,
- .channels_max = 2,
- .rates = RT5631_STEREO_RATES,
- .formats = RT5631_FORMAT,
- },
- .capture = {
- .stream_name = "HIFI Capture",
- .channels_min = 1,
- .channels_max = 2,
- .rates = RT5631_STEREO_RATES,
- .formats = RT5631_FORMAT,
- },
- .ops = &rt5631_ops,
- },
- {
- .name = "rt5631-voice",
- .id = RT5631_AIF2,
- .playback = {
- .stream_name = "Mono Playback",
- .channels_min = 1,
- .channels_max = 2,
- .rates = RT5631_VOICE_RATES,
- .formats = RT5631_FORMAT,
- },
- .capture = {
- .stream_name = "Voice HIFI Capture",
- .channels_min = 1,
- .channels_max = 2,
- .rates = RT5631_VOICE_RATES,
- .formats = RT5631_FORMAT,
- },
- .ops = &rt5631_ops,
- },
-};
-
-static struct snd_soc_codec_driver soc_codec_dev_rt5631 = {
- .probe = rt5631_probe,
- .remove = rt5631_remove,
- .suspend = rt5631_suspend,
- .resume = rt5631_resume,
- .set_bias_level = rt5631_set_bias_level,
- .reg_cache_size = RT5631_VENDOR_ID2 + 1,
- .reg_word_size = sizeof(u16),
- .reg_cache_default = rt5631_reg,
- .volatile_register = rt5631_volatile_register,
- .readable_register = rt5631_readable_register,
- .reg_cache_step = 1,
- /*.controls = rt5631_snd_controls,
- .num_controls = ARRAY_SIZE(rt5631_snd_controls),
- .dapm_widgets = rt5631_dapm_widgets,
- .num_dapm_widgets = ARRAY_SIZE(rt5631_dapm_widgets),
- .dapm_routes = rt5631_dapm_routes,
- .num_dapm_routes = ARRAY_SIZE(rt5631_dapm_routes),*/
-};
-
-static const struct i2c_device_id rt5631_i2c_id[] = {
- { "rt5631", 0 },
- { }
-};
-MODULE_DEVICE_TABLE(i2c, rt5631_i2c_id);
-
-static int rt5631_i2c_probe(struct i2c_client *i2c,
- const struct i2c_device_id *id)
-{
- struct rt5631_priv *rt5631;
- struct device_node *rt5631_np = i2c->dev.of_node;
- int ret;
- int val = 0;
-
- rt5631 = kzalloc(sizeof(struct rt5631_priv), GFP_KERNEL);
- if (NULL == rt5631)
- return -ENOMEM;
- if(!of_property_read_u32(rt5631_np, "rt5631-phone", &val)){
- if(val)
- {
- printk("rt5631 use for phone\n");
- }
- else
- return -1;
- }
- else
- return -1;
- i2c_set_clientdata(i2c, rt5631);
-
- ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5631,
- rt5631_dai, ARRAY_SIZE(rt5631_dai));
- if (ret < 0)
- kfree(rt5631);
-
- return ret;
-}
-
-static int rt5631_i2c_remove(struct i2c_client *client)
-{
- snd_soc_unregister_codec(&client->dev);
- kfree(i2c_get_clientdata(client));
- return 0;
-}
-
-static void rt5631_i2c_shutdown(struct i2c_client *client)
-{
- struct rt5631_priv *rt5631 = i2c_get_clientdata(client);
- struct snd_soc_codec *codec = rt5631->codec;
-
- if (codec != NULL)
- rt5631_set_bias_level(codec, SND_SOC_BIAS_OFF);
-
-// return 0;
-}
-
-static struct i2c_driver rt5631_i2c_driver = {
- .driver = {
- .name = "RT5631",
- .owner = THIS_MODULE,
- },
- .probe = rt5631_i2c_probe,
- .remove = rt5631_i2c_remove,
- .shutdown = rt5631_i2c_shutdown,
- .id_table = rt5631_i2c_id,
-};
-
-static int __init rt5631_modinit(void)
-{
- return i2c_add_driver(&rt5631_i2c_driver);
-}
-module_init(rt5631_modinit);
-
-static void __exit rt5631_modexit(void)
-{
- i2c_del_driver(&rt5631_i2c_driver);
-}
-module_exit(rt5631_modexit);
-
-MODULE_DESCRIPTION("ASoC RT5631 driver");
-MODULE_AUTHOR("flove <flove@realtek.com>");
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * rt5631.h -- RT5631 ALSA SoC audio driver
- *
- * Copyright 2011 Realtek Microelectronics
- * Author: flove <flove@realtek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __RT5631_H__
-#define __RT5631_H__
-
-
-#define RT5631_RESET 0x00
-#define RT5631_SPK_OUT_VOL 0x02
-#define RT5631_HP_OUT_VOL 0x04
-#define RT5631_MONO_AXO_1_2_VOL 0x06
-#define RT5631_AUX_IN_VOL 0x0A
-#define RT5631_STEREO_DAC_VOL_1 0x0C
-#define RT5631_MIC_CTRL_1 0x0E
-#define RT5631_STEREO_DAC_VOL_2 0x10
-#define RT5631_ADC_CTRL_1 0x12
-#define RT5631_ADC_REC_MIXER 0x14
-#define RT5631_ADC_CTRL_2 0x16
-#define RT5631_VDAC_DIG_VOL 0x18
-#define RT5631_OUTMIXER_L_CTRL 0x1A
-#define RT5631_OUTMIXER_R_CTRL 0x1C
-#define RT5631_AXO1MIXER_CTRL 0x1E
-#define RT5631_AXO2MIXER_CTRL 0x20
-#define RT5631_MIC_CTRL_2 0x22
-#define RT5631_DIG_MIC_CTRL 0x24
-#define RT5631_MONO_INPUT_VOL 0x26
-#define RT5631_SPK_MIXER_CTRL 0x28
-#define RT5631_SPK_MONO_OUT_CTRL 0x2A
-#define RT5631_SPK_MONO_HP_OUT_CTRL 0x2C
-#define RT5631_SDP_CTRL 0x34
-#define RT5631_MONO_SDP_CTRL 0x36
-#define RT5631_STEREO_AD_DA_CLK_CTRL 0x38
-#define RT5631_PWR_MANAG_ADD1 0x3A
-#define RT5631_PWR_MANAG_ADD2 0x3B
-#define RT5631_PWR_MANAG_ADD3 0x3C
-#define RT5631_PWR_MANAG_ADD4 0x3E
-#define RT5631_GEN_PUR_CTRL_REG 0x40
-#define RT5631_GLOBAL_CLK_CTRL 0x42
-#define RT5631_PLL_CTRL 0x44
-#define RT5631_PLL2_CTRL 0x46
-#define RT5631_INT_ST_IRQ_CTRL_1 0x48
-#define RT5631_INT_ST_IRQ_CTRL_2 0x4A
-#define RT5631_GPIO_CTRL 0x4C
-#define RT5631_MISC_CTRL 0x52
-#define RT5631_DEPOP_FUN_CTRL_1 0x54
-#define RT5631_DEPOP_FUN_CTRL_2 0x56
-#define RT5631_JACK_DET_CTRL 0x5A
-#define RT5631_SOFT_VOL_CTRL 0x5C
-#define RT5631_ALC_CTRL_1 0x64
-#define RT5631_ALC_CTRL_2 0x65
-#define RT5631_ALC_CTRL_3 0x66
-#define RT5631_PSEUDO_SPATL_CTRL 0x68
-#define RT5631_INDEX_ADD 0x6A
-#define RT5631_INDEX_DATA 0x6C
-#define RT5631_EQ_CTRL 0x6E
-#define RT5631_VENDOR_ID 0x7A
-#define RT5631_VENDOR_ID1 0x7C
-#define RT5631_VENDOR_ID2 0x7E
-
-/* Index of Codec Private Register definition */
-#define RT5631_EQ_BW_LOP 0x00
-#define RT5631_EQ_GAIN_LOP 0x01
-#define RT5631_EQ_FC_BP1 0x02
-#define RT5631_EQ_BW_BP1 0x03
-#define RT5631_EQ_GAIN_BP1 0x04
-#define RT5631_EQ_FC_BP2 0x05
-#define RT5631_EQ_BW_BP2 0x06
-#define RT5631_EQ_GAIN_BP2 0x07
-#define RT5631_EQ_FC_BP3 0x08
-#define RT5631_EQ_BW_BP3 0x09
-#define RT5631_EQ_GAIN_BP3 0x0a
-#define RT5631_EQ_BW_HIP 0x0b
-#define RT5631_EQ_GAIN_HIP 0x0c
-#define RT5631_EQ_HPF_A1 0x0d
-#define RT5631_EQ_HPF_A2 0x0e
-#define RT5631_EQ_HPF_GAIN 0x0f
-#define RT5631_EQ_PRE_VOL_CTRL 0x11
-#define RT5631_EQ_POST_VOL_CTRL 0x12
-#define RT5631_AVC_REG1 0x21
-#define RT5631_AVC_REG2 0x22
-#define RT5631_ALC_REG3 0x23
-#define RT5631_TEST_MODE_CTRL 0x39
-#define RT5631_CP_INTL_REG2 0x45
-#define RT5631_ADDA_MIXER_INTL_REG3 0x52
-#define RT5631_SPK_INTL_CTRL 0x56
-
-
-/* global definition */
-#define RT5631_L_MUTE (0x1 << 15)
-#define RT5631_L_MUTE_SHIFT 15
-#define RT5631_L_EN (0x1 << 14)
-#define RT5631_L_EN_SHIFT 14
-#define RT5631_R_MUTE (0x1 << 7)
-#define RT5631_R_MUTE_SHIFT 7
-#define RT5631_R_EN (0x1 << 6)
-#define RT5631_R_EN_SHIFT 6
-#define RT5631_VOL_MASK 0x1f
-#define RT5631_L_VOL_SHIFT 8
-#define RT5631_R_VOL_SHIFT 0
-
-/* Speaker Output Control(0x02) */
-#define RT5631_SPK_L_VOL_SEL_MASK (0x1 << 14)
-#define RT5631_SPK_L_VOL_SEL_VMID (0x0 << 14)
-#define RT5631_SPK_L_VOL_SEL_SPKMIX_L (0x1 << 14)
-#define RT5631_SPK_R_VOL_SEL_MASK (0x1 << 6)
-#define RT5631_SPK_R_VOL_SEL_VMID (0x0 << 6)
-#define RT5631_SPK_R_VOL_SEL_SPKMIX_R (0x1 << 6)
-
-/* Headphone Output Control(0x04) */
-#define RT5631_HP_L_VOL_SEL_MASK (0x1 << 14)
-#define RT5631_HP_L_VOL_SEL_VMID (0x0 << 14)
-#define RT5631_HP_L_VOL_SEL_OUTMIX_L (0x1 << 14)
-#define RT5631_HP_R_VOL_SEL_MASK (0x1 << 6)
-#define RT5631_HP_R_VOL_SEL_VMID (0x0 << 6)
-#define RT5631_HP_R_VOL_SEL_OUTMIX_R (0x1 << 6)
-
-/* Output Control for AUXOUT/MONO(0x06) */
-#define RT5631_AUXOUT_1_VOL_SEL_MASK (0x1 << 14)
-#define RT5631_AUXOUT_1_VOL_SEL_VMID (0x0 << 14)
-#define RT5631_AUXOUT_1_VOL_SEL_OUTMIX_L (0x1 << 14)
-#define RT5631_MUTE_MONO (0x1 << 13)
-#define RT5631_MUTE_MONO_SHIFT 13
-#define RT5631_AUXOUT_2_VOL_SEL_MASK (0x1 << 6)
-#define RT5631_AUXOUT_2_VOL_SEL_VMID (0x0 << 6)
-#define RT5631_AUXOUT_2_VOL_SEL_OUTMIX_R (0x1 << 6)
-
-/* Microphone Input Control 1(0x0E) */
-#define RT5631_MIC1_DIFF_INPUT_CTRL (0x1 << 15)
-#define RT5631_MIC1_DIFF_INPUT_SHIFT 15
-#define RT5631_MIC2_DIFF_INPUT_CTRL (0x1 << 7)
-#define RT5631_MIC2_DIFF_INPUT_SHIFT 7
-
-/* Stereo DAC Digital Volume2(0x10) */
-#define RT5631_DAC_VOL_MASK 0xff
-
-/* ADC Recording Mixer Control(0x14) */
-#define RT5631_M_OUTMIXER_L_TO_RECMIXER_L (0x1 << 15)
-#define RT5631_M_OUTMIXL_RECMIXL_BIT 15
-#define RT5631_M_MIC1_TO_RECMIXER_L (0x1 << 14)
-#define RT5631_M_MIC1_RECMIXL_BIT 14
-#define RT5631_M_AXIL_TO_RECMIXER_L (0x1 << 13)
-#define RT5631_M_AXIL_RECMIXL_BIT 13
-#define RT5631_M_MONO_IN_TO_RECMIXER_L (0x1 << 12)
-#define RT5631_M_MONO_IN_RECMIXL_BIT 12
-#define RT5631_M_OUTMIXER_R_TO_RECMIXER_R (0x1 << 7)
-#define RT5631_M_OUTMIXR_RECMIXR_BIT 7
-#define RT5631_M_MIC2_TO_RECMIXER_R (0x1 << 6)
-#define RT5631_M_MIC2_RECMIXR_BIT 6
-#define RT5631_M_AXIR_TO_RECMIXER_R (0x1 << 5)
-#define RT5631_M_AXIR_RECMIXR_BIT 5
-#define RT5631_M_MONO_IN_TO_RECMIXER_R (0x1 << 4)
-#define RT5631_M_MONO_IN_RECMIXR_BIT 4
-
-/* Left Output Mixer Control(0x1A) */
-#define RT5631_M_RECMIXER_L_TO_OUTMIXER_L (0x1 << 15)
-#define RT5631_M_RECMIXL_OUTMIXL_BIT 15
-#define RT5631_M_RECMIXER_R_TO_OUTMIXER_L (0x1 << 14)
-#define RT5631_M_RECMIXR_OUTMIXL_BIT 14
-#define RT5631_M_DAC_L_TO_OUTMIXER_L (0x1 << 13)
-#define RT5631_M_DACL_OUTMIXL_BIT 13
-#define RT5631_M_MIC1_TO_OUTMIXER_L (0x1 << 12)
-#define RT5631_M_MIC1_OUTMIXL_BIT 12
-#define RT5631_M_MIC2_TO_OUTMIXER_L (0x1 << 11)
-#define RT5631_M_MIC2_OUTMIXL_BIT 11
-#define RT5631_M_MONO_IN_P_TO_OUTMIXER_L (0x1 << 10)
-#define RT5631_M_MONO_INP_OUTMIXL_BIT 10
-#define RT5631_M_AXIL_TO_OUTMIXER_L (0x1 << 9)
-#define RT5631_M_AXIL_OUTMIXL_BIT 9
-#define RT5631_M_AXIR_TO_OUTMIXER_L (0x1 << 8)
-#define RT5631_M_AXIR_OUTMIXL_BIT 8
-#define RT5631_M_VDAC_TO_OUTMIXER_L (0x1 << 7)
-#define RT5631_M_VDAC_OUTMIXL_BIT 7
-
-/* Right Output Mixer Control(0x1C) */
-#define RT5631_M_RECMIXER_L_TO_OUTMIXER_R (0x1 << 15)
-#define RT5631_M_RECMIXL_OUTMIXR_BIT 15
-#define RT5631_M_RECMIXER_R_TO_OUTMIXER_R (0x1 << 14)
-#define RT5631_M_RECMIXR_OUTMIXR_BIT 14
-#define RT5631_M_DAC_R_TO_OUTMIXER_R (0x1 << 13)
-#define RT5631_M_DACR_OUTMIXR_BIT 13
-#define RT5631_M_MIC1_TO_OUTMIXER_R (0x1 << 12)
-#define RT5631_M_MIC1_OUTMIXR_BIT 12
-#define RT5631_M_MIC2_TO_OUTMIXER_R (0x1 << 11)
-#define RT5631_M_MIC2_OUTMIXR_BIT 11
-#define RT5631_M_MONO_IN_N_TO_OUTMIXER_R (0x1 << 10)
-#define RT5631_M_MONO_INN_OUTMIXR_BIT 10
-#define RT5631_M_AXIL_TO_OUTMIXER_R (0x1 << 9)
-#define RT5631_M_AXIL_OUTMIXR_BIT 9
-#define RT5631_M_AXIR_TO_OUTMIXER_R (0x1 << 8)
-#define RT5631_M_AXIR_OUTMIXR_BIT 8
-#define RT5631_M_VDAC_TO_OUTMIXER_R (0x1 << 7)
-#define RT5631_M_VDAC_OUTMIXR_BIT 7
-
-/* Lout Mixer Control(0x1E) */
-#define RT5631_M_MIC1_TO_AXO1MIXER (0x1 << 15)
-#define RT5631_M_MIC1_AXO1MIX_BIT 15
-#define RT5631_M_MIC2_TO_AXO1MIXER (0x1 << 11)
-#define RT5631_M_MIC2_AXO1MIX_BIT 11
-#define RT5631_M_OUTMIXER_L_TO_AXO1MIXER (0x1 << 7)
-#define RT5631_M_OUTMIXL_AXO1MIX_BIT 7
-#define RT5631_M_OUTMIXER_R_TO_AXO1MIXER (0x1 << 6)
-#define RT5631_M_OUTMIXR_AXO1MIX_BIT 6
-
-/* Rout Mixer Control(0x20) */
-#define RT5631_M_MIC1_TO_AXO2MIXER (0x1 << 15)
-#define RT5631_M_MIC1_AXO2MIX_BIT 15
-#define RT5631_M_MIC2_TO_AXO2MIXER (0x1 << 11)
-#define RT5631_M_MIC2_AXO2MIX_BIT 11
-#define RT5631_M_OUTMIXER_L_TO_AXO2MIXER (0x1 << 7)
-#define RT5631_M_OUTMIXL_AXO2MIX_BIT 7
-#define RT5631_M_OUTMIXER_R_TO_AXO2MIXER (0x1 << 6)
-#define RT5631_M_OUTMIXR_AXO2MIX_BIT 6
-
-/* Micphone Input Control 2(0x22) */
-#define RT5631_MIC_BIAS_90_PRECNET_AVDD 1
-#define RT5631_MIC_BIAS_75_PRECNET_AVDD 2
-
-#define RT5631_MIC1_BOOST_CTRL_MASK (0xf << 12)
-#define RT5631_MIC1_BOOST_CTRL_BYPASS (0x0 << 12)
-#define RT5631_MIC1_BOOST_CTRL_20DB (0x1 << 12)
-#define RT5631_MIC1_BOOST_CTRL_24DB (0x2 << 12)
-#define RT5631_MIC1_BOOST_CTRL_30DB (0x3 << 12)
-#define RT5631_MIC1_BOOST_CTRL_35DB (0x4 << 12)
-#define RT5631_MIC1_BOOST_CTRL_40DB (0x5 << 12)
-#define RT5631_MIC1_BOOST_CTRL_34DB (0x6 << 12)
-#define RT5631_MIC1_BOOST_CTRL_50DB (0x7 << 12)
-#define RT5631_MIC1_BOOST_CTRL_52DB (0x8 << 12)
-#define RT5631_MIC1_BOOST_SHIFT 12
-
-#define RT5631_MIC2_BOOST_CTRL_MASK (0xf << 8)
-#define RT5631_MIC2_BOOST_CTRL_BYPASS (0x0 << 8)
-#define RT5631_MIC2_BOOST_CTRL_20DB (0x1 << 8)
-#define RT5631_MIC2_BOOST_CTRL_24DB (0x2 << 8)
-#define RT5631_MIC2_BOOST_CTRL_30DB (0x3 << 8)
-#define RT5631_MIC2_BOOST_CTRL_35DB (0x4 << 8)
-#define RT5631_MIC2_BOOST_CTRL_40DB (0x5 << 8)
-#define RT5631_MIC2_BOOST_CTRL_34DB (0x6 << 8)
-#define RT5631_MIC2_BOOST_CTRL_50DB (0x7 << 8)
-#define RT5631_MIC2_BOOST_CTRL_52DB (0x8 << 8)
-#define RT5631_MIC2_BOOST_SHIFT 8
-
-#define RT5631_MICBIAS1_VOLT_CTRL_MASK (0x1 << 7)
-#define RT5631_MICBIAS1_VOLT_CTRL_90P (0x0 << 7)
-#define RT5631_MICBIAS1_VOLT_CTRL_75P (0x1 << 7)
-
-#define RT5631_MICBIAS1_S_C_DET_MASK (0x1 << 6)
-#define RT5631_MICBIAS1_S_C_DET_DIS (0x0 << 6)
-#define RT5631_MICBIAS1_S_C_DET_ENA (0x1 << 6)
-
-#define RT5631_MICBIAS1_SHORT_CURR_DET_MASK (0x3 << 4)
-#define RT5631_MICBIAS1_SHORT_CURR_DET_600UA (0x0 << 4)
-#define RT5631_MICBIAS1_SHORT_CURR_DET_1500UA (0x1 << 4)
-#define RT5631_MICBIAS1_SHORT_CURR_DET_2000UA (0x2 << 4)
-
-#define RT5631_MICBIAS2_VOLT_CTRL_MASK (0x1 << 3)
-#define RT5631_MICBIAS2_VOLT_CTRL_90P (0x0 << 3)
-#define RT5631_MICBIAS2_VOLT_CTRL_75P (0x1 << 3)
-
-#define RT5631_MICBIAS2_S_C_DET_MASK (0x1 << 2)
-#define RT5631_MICBIAS2_S_C_DET_DIS (0x0 << 2)
-#define RT5631_MICBIAS2_S_C_DET_ENA (0x1 << 2)
-
-#define RT5631_MICBIAS2_SHORT_CURR_DET_MASK (0x3)
-#define RT5631_MICBIAS2_SHORT_CURR_DET_600UA (0x0)
-#define RT5631_MICBIAS2_SHORT_CURR_DET_1500UA (0x1)
-#define RT5631_MICBIAS2_SHORT_CURR_DET_2000UA (0x2)
-
-
-/* Digital Microphone Control(0x24) */
-#define RT5631_DMIC_ENA_MASK (0x1 << 15)
-#define RT5631_DMIC_ENA_SHIFT 15
-/* DMIC_ENA: DMIC to ADC Digital filter */
-#define RT5631_DMIC_ENA (0x1 << 15)
-/* DMIC_DIS: ADC mixer to ADC Digital filter */
-#define RT5631_DMIC_DIS (0x0 << 15)
-#define RT5631_DMIC_L_CH_MUTE (0x1 << 13)
-#define RT5631_DMIC_L_CH_MUTE_SHIFT 13
-#define RT5631_DMIC_R_CH_MUTE (0x1 << 12)
-#define RT5631_DMIC_R_CH_MUTE_SHIFT 12
-#define RT5631_DMIC_L_CH_LATCH_MASK (0x1 << 9)
-#define RT5631_DMIC_L_CH_LATCH_RISING (0x1 << 9)
-#define RT5631_DMIC_L_CH_LATCH_FALLING (0x0 << 9)
-#define RT5631_DMIC_R_CH_LATCH_MASK (0x1 << 8)
-#define RT5631_DMIC_R_CH_LATCH_RISING (0x1 << 8)
-#define RT5631_DMIC_R_CH_LATCH_FALLING (0x0 << 8)
-#define RT5631_DMIC_CLK_CTRL_MASK (0x3 << 4)
-#define RT5631_DMIC_CLK_CTRL_TO_128FS (0x0 << 4)
-#define RT5631_DMIC_CLK_CTRL_TO_64FS (0x1 << 4)
-#define RT5631_DMIC_CLK_CTRL_TO_32FS (0x2 << 4)
-
-/* Microphone Input Volume(0x26) */
-#define RT5631_MONO_DIFF_INPUT_SHIFT 15
-
-/* Speaker Mixer Control(0x28) */
-#define RT5631_M_RECMIXER_L_TO_SPKMIXER_L (0x1 << 15)
-#define RT5631_M_RECMIXL_SPKMIXL_BIT 15
-#define RT5631_M_MIC1_P_TO_SPKMIXER_L (0x1 << 14)
-#define RT5631_M_MIC1P_SPKMIXL_BIT 14
-#define RT5631_M_DAC_L_TO_SPKMIXER_L (0x1 << 13)
-#define RT5631_M_DACL_SPKMIXL_BIT 13
-#define RT5631_M_OUTMIXER_L_TO_SPKMIXER_L (0x1 << 12)
-#define RT5631_M_OUTMIXL_SPKMIXL_BIT 12
-
-#define RT5631_M_RECMIXER_R_TO_SPKMIXER_R (0x1 << 7)
-#define RT5631_M_RECMIXR_SPKMIXR_BIT 7
-#define RT5631_M_MIC2_P_TO_SPKMIXER_R (0x1 << 6)
-#define RT5631_M_MIC2P_SPKMIXR_BIT 6
-#define RT5631_M_DAC_R_TO_SPKMIXER_R (0x1 << 5)
-#define RT5631_M_DACR_SPKMIXR_BIT 5
-#define RT5631_M_OUTMIXER_R_TO_SPKMIXER_R (0x1 << 4)
-#define RT5631_M_OUTMIXR_SPKMIXR_BIT 4
-
-/* Speaker/Mono Output Control(0x2A) */
-#define RT5631_M_SPKVOL_L_TO_SPOL_MIXER (0x1 << 15)
-#define RT5631_M_SPKVOLL_SPOLMIX_BIT 15
-#define RT5631_M_SPKVOL_R_TO_SPOL_MIXER (0x1 << 14)
-#define RT5631_M_SPKVOLR_SPOLMIX_BIT 14
-#define RT5631_M_SPKVOL_L_TO_SPOR_MIXER (0x1 << 13)
-#define RT5631_M_SPKVOLL_SPORMIX_BIT 13
-#define RT5631_M_SPKVOL_R_TO_SPOR_MIXER (0x1 << 12)
-#define RT5631_M_SPKVOLR_SPORMIX_BIT 12
-#define RT5631_M_OUTVOL_L_TO_MONOMIXER (0x1 << 11)
-#define RT5631_M_OUTVOLL_MONOMIX_BIT 11
-#define RT5631_M_OUTVOL_R_TO_MONOMIXER (0x1 << 10)
-#define RT5631_M_OUTVOLR_MONOMIX_BIT 10
-
-/* Speaker/Mono/HP Output Control(0x2C) */
-#define RT5631_SPK_L_MUX_SEL_MASK (0x3 << 14)
-#define RT5631_SPK_L_MUX_SEL_SPKMIXER_L (0x0 << 14)
-#define RT5631_SPK_L_MUX_SEL_MONO_IN (0x1 << 14)
-#define RT5631_SPK_L_MUX_SEL_DAC_L (0x3 << 14)
-#define RT5631_SPK_L_MUX_SEL_SHIFT 14
-
-#define RT5631_SPK_R_MUX_SEL_MASK (0x3 << 10)
-#define RT5631_SPK_R_MUX_SEL_SPKMIXER_R (0x0 << 10)
-#define RT5631_SPK_R_MUX_SEL_MONO_IN (0x1 << 10)
-#define RT5631_SPK_R_MUX_SEL_DAC_R (0x3 << 10)
-#define RT5631_SPK_R_MUX_SEL_SHIFT 10
-
-#define RT5631_MONO_MUX_SEL_MASK (0x3 << 6)
-#define RT5631_MONO_MUX_SEL_MONOMIXER (0x0 << 6)
-#define RT5631_MONO_MUX_SEL_MONO_IN (0x1 << 6)
-#define RT5631_MONO_MUX_SEL_SHIFT 6
-
-#define RT5631_HP_L_MUX_SEL_MASK (0x1 << 3)
-#define RT5631_HP_L_MUX_SEL_HPVOL_L (0x0 << 3)
-#define RT5631_HP_L_MUX_SEL_DAC_L (0x1 << 3)
-#define RT5631_HP_L_MUX_SEL_SHIFT 3
-
-#define RT5631_HP_R_MUX_SEL_MASK (0x1 << 2)
-#define RT5631_HP_R_MUX_SEL_HPVOL_R (0x0 << 2)
-#define RT5631_HP_R_MUX_SEL_DAC_R (0x1 << 2)
-#define RT5631_HP_R_MUX_SEL_SHIFT 2
-
-/* Stereo I2S Serial Data Port Control(0x34) */
-#define RT5631_SDP_MODE_SEL_MASK (0x1 << 15)
-#define RT5631_SDP_MODE_SEL_MASTER (0x0 << 15)
-#define RT5631_SDP_MODE_SEL_SLAVE (0x1 << 15)
-
-#define RT5631_SDP_ADC_CPS_SEL_MASK (0x3 << 10)
-#define RT5631_SDP_ADC_CPS_SEL_OFF (0x0 << 10)
-#define RT5631_SDP_ADC_CPS_SEL_U_LAW (0x1 << 10)
-#define RT5631_SDP_ADC_CPS_SEL_A_LAW (0x2 << 10)
-
-#define RT5631_SDP_DAC_CPS_SEL_MASK (0x3 << 8)
-#define RT5631_SDP_DAC_CPS_SEL_OFF (0x0 << 8)
-#define RT5631_SDP_DAC_CPS_SEL_U_LAW (0x1 << 8)
-#define RT5631_SDP_DAC_CPS_SEL_A_LAW (0x2 << 8)
-/* 0:Normal 1:Invert */
-#define RT5631_SDP_I2S_BCLK_POL_CTRL (0x1 << 7)
-/* 0:Normal 1:Invert */
-#define RT5631_SDP_DAC_R_INV (0x1 << 6)
-/* 0:ADC data appear at left phase of LRCK
- * 1:ADC data appear at right phase of LRCK
- */
-#define RT5631_SDP_ADC_DATA_L_R_SWAP (0x1 << 5)
-/* 0:DAC data appear at left phase of LRCK
- * 1:DAC data appear at right phase of LRCK
- */
-#define RT5631_SDP_DAC_DATA_L_R_SWAP (0x1 << 4)
-
-/* Data Length Slection */
-#define RT5631_SDP_I2S_DL_MASK (0x3 << 2)
-#define RT5631_SDP_I2S_DL_16 (0x0 << 2)
-#define RT5631_SDP_I2S_DL_20 (0x1 << 2)
-#define RT5631_SDP_I2S_DL_24 (0x2 << 2)
-#define RT5631_SDP_I2S_DL_8 (0x3 << 2)
-
-/* PCM Data Format Selection */
-#define RT5631_SDP_I2S_DF_MASK (0x3)
-#define RT5631_SDP_I2S_DF_I2S (0x0)
-#define RT5631_SDP_I2S_DF_LEFT (0x1)
-#define RT5631_SDP_I2S_DF_PCM_A (0x2)
-#define RT5631_SDP_I2S_DF_PCM_B (0x3)
-
-/* Stereo AD/DA Clock Control(0x38) */
-#define RT5631_I2S_PRE_DIV_MASK (0x7 << 13)
-#define RT5631_I2S_PRE_DIV_1 (0x0 << 13)
-#define RT5631_I2S_PRE_DIV_2 (0x1 << 13)
-#define RT5631_I2S_PRE_DIV_4 (0x2 << 13)
-#define RT5631_I2S_PRE_DIV_8 (0x3 << 13)
-#define RT5631_I2S_PRE_DIV_16 (0x4 << 13)
-#define RT5631_I2S_PRE_DIV_32 (0x5 << 13)
-/* CLOCK RELATIVE OF BCLK AND LCRK */
-#define RT5631_I2S_LRCK_SEL_N_BCLK_MASK (0x1 << 12)
-#define RT5631_I2S_LRCK_SEL_64_BCLK (0x0 << 12)
-#define RT5631_I2S_LRCK_SEL_32_BCLK (0x1 << 12)
-#define RT5631_DAC_OSR_SEL_MASK (0x3 << 10)
-#define RT5631_DAC_OSR_SEL_128FS (0x3 << 10)
-#define RT5631_DAC_OSR_SEL_64FS (0x3 << 10)
-#define RT5631_DAC_OSR_SEL_32FS (0x3 << 10)
-#define RT5631_DAC_OSR_SEL_16FS (0x3 << 10)
-#define RT5631_ADC_OSR_SEL_MASK (0x3 << 8)
-#define RT5631_ADC_OSR_SEL_128FS (0x3 << 8)
-#define RT5631_ADC_OSR_SEL_64FS (0x3 << 8)
-#define RT5631_ADC_OSR_SEL_32FS (0x3 << 8)
-#define RT5631_ADC_OSR_SEL_16FS (0x3 << 8)
-#define RT5631_ADDA_FILTER_CLK_SEL_MASK (0x1 << 7)
-#define RT5631_ADDA_FILTER_CLK_SEL_256FS (0x0 << 7)
-#define RT5631_ADDA_FILTER_CLK_SEL_384FS (0x1 << 7)
-
-#define RT5631_I2S_PRE_DIV2_MASK (0x7 << 4)
-#define RT5631_I2S_PRE_DIV2_1 (0x0 << 4)
-#define RT5631_I2S_PRE_DIV2_2 (0x1 << 4)
-#define RT5631_I2S_PRE_DIV2_4 (0x2 << 4)
-#define RT5631_I2S_PRE_DIV2_8 (0x3 << 4)
-#define RT5631_I2S_PRE_DIV2_16 (0x4 << 4)
-#define RT5631_I2S_PRE_DIV2_32 (0x5 << 4)
-#define RT5631_I2S_LRCK_SEL_N_BCLK2_MASK (0x1 << 3)
-#define RT5631_I2S_LRCK_SEL_64_BCLK2 (0x0 << 3)
-#define RT5631_I2S_LRCK_SEL_32_BCLK2 (0x1 << 3)
-#define RT5631_ADDA_FILTER_CLK2_SEL_MASK (0x1 << 2)
-#define RT5631_ADDA_FILTER_CLK2_SEL_256FS (0x0 << 2)
-#define RT5631_ADDA_FILTER_CLK2_SEL_384FS (0x1 << 2)
-
-/* Power managment addition 1 (0x3A) */
-#define RT5631_PWR_MAIN_I2S_EN (0x1 << 15)
-#define RT5631_PWR_MAIN_I2S_BIT 15
-#define RT5631_PWR_VOICE_I2S_EN (0x1 << 14)
-#define RT5631_PWR_VOICE_I2S_BIT 14
-#define RT5631_PWR_CLASS_D (0x1 << 12)
-#define RT5631_PWR_CLASS_D_BIT 12
-#define RT5631_PWR_ADC_L_CLK (0x1 << 11)
-#define RT5631_PWR_ADC_L_CLK_BIT 11
-#define RT5631_PWR_ADC_R_CLK (0x1 << 10)
-#define RT5631_PWR_ADC_R_CLK_BIT 10
-#define RT5631_PWR_DAC_L_CLK (0x1 << 9)
-#define RT5631_PWR_DAC_L_CLK_BIT 9
-#define RT5631_PWR_DAC_R_CLK (0x1 << 8)
-#define RT5631_PWR_DAC_R_CLK_BIT 8
-#define RT5631_PWR_DAC_REF (0x1 << 7)
-#define RT5631_PWR_DAC_REF_BIT 7
-#define RT5631_PWR_DAC_L_TO_MIXER (0x1 << 6)
-#define RT5631_PWR_DAC_L_TO_MIXER_BIT 6
-#define RT5631_PWR_DAC_R_TO_MIXER (0x1 << 5)
-#define RT5631_PWR_DAC_R_TO_MIXER_BIT 5
-#define RT5631_PWR_VDAC_CLK (0x1 << 4)
-#define RT5631_PWR_VDAC_CLK_BIT 4
-#define RT5631_PWR_VDAC_TO_MIXER (0x1 << 3)
-#define RT5631_PWR_VDAC_TO_MIXER_BIT 3
-
-/* Power managment addition 2 (0x3B) */
-#define RT5631_PWR_OUTMIXER_L (0x1 << 15)
-#define RT5631_PWR_OUTMIXER_L_BIT 15
-#define RT5631_PWR_OUTMIXER_R (0x1 << 14)
-#define RT5631_PWR_OUTMIXER_R_BIT 14
-#define RT5631_PWR_SPKMIXER_L (0x1 << 13)
-#define RT5631_PWR_SPKMIXER_L_BIT 13
-#define RT5631_PWR_SPKMIXER_R (0x1 << 12)
-#define RT5631_PWR_SPKMIXER_R_BIT 12
-#define RT5631_PWR_RECMIXER_L (0x1 << 11)
-#define RT5631_PWR_RECMIXER_L_BIT 11
-#define RT5631_PWR_RECMIXER_R (0x1 << 10)
-#define RT5631_PWR_RECMIXER_R_BIT 10
-#define RT5631_PWR_MIC1_BOOT_GAIN (0x1 << 5)
-#define RT5631_PWR_MIC1_BOOT_GAIN_BIT 5
-#define RT5631_PWR_MIC2_BOOT_GAIN (0x1 << 4)
-#define RT5631_PWR_MIC2_BOOT_GAIN_BIT 4
-#define RT5631_PWR_MICBIAS1_VOL (0x1 << 3)
-#define RT5631_PWR_MICBIAS1_VOL_BIT 3
-#define RT5631_PWR_MICBIAS2_VOL (0x1 << 2)
-#define RT5631_PWR_MICBIAS2_VOL_BIT 2
-#define RT5631_PWR_PLL1 (0x1 << 1)
-#define RT5631_PWR_PLL1_BIT 1
-#define RT5631_PWR_PLL2 (0x1 << 0)
-#define RT5631_PWR_PLL2_BIT 0
-
-/* Power managment addition 3(0x3C) */
-#define RT5631_PWR_VREF (0x1 << 15)
-#define RT5631_PWR_VREF_BIT 15
-#define RT5631_PWR_FAST_VREF_CTRL (0x1 << 14)
-#define RT5631_PWR_FAST_VREF_CTRL_BIT 14
-#define RT5631_PWR_MAIN_BIAS (0x1 << 13)
-#define RT5631_PWR_MAIN_BIAS_BIT 13
-#define RT5631_PWR_AXO1MIXER (0x1 << 11)
-#define RT5631_PWR_AXO1MIXER_BIT 11
-#define RT5631_PWR_AXO2MIXER (0x1 << 10)
-#define RT5631_PWR_AXO2MIXER_BIT 10
-#define RT5631_PWR_MONOMIXER (0x1 << 9)
-#define RT5631_PWR_MONOMIXER_BIT 9
-#define RT5631_PWR_MONO_DEPOP_DIS (0x1 << 8)
-#define RT5631_PWR_MONO_DEPOP_DIS_BIT 8
-#define RT5631_PWR_MONO_AMP_EN (0x1 << 7)
-#define RT5631_PWR_MONO_AMP_EN_BIT 7
-#define RT5631_PWR_CHARGE_PUMP (0x1 << 4)
-#define RT5631_PWR_CHARGE_PUMP_BIT 4
-#define RT5631_PWR_HP_L_AMP (0x1 << 3)
-#define RT5631_PWR_HP_L_AMP_BIT 3
-#define RT5631_PWR_HP_R_AMP (0x1 << 2)
-#define RT5631_PWR_HP_R_AMP_BIT 2
-#define RT5631_PWR_HP_DEPOP_DIS (0x1 << 1)
-#define RT5631_PWR_HP_DEPOP_DIS_BIT 1
-#define RT5631_PWR_HP_AMP_DRIVING (0x1 << 0)
-#define RT5631_PWR_HP_AMP_DRIVING_BIT 0
-
-/* Power managment addition 4(0x3E) */
-#define RT5631_PWR_SPK_L_VOL (0x1 << 15)
-#define RT5631_PWR_SPK_L_VOL_BIT 15
-#define RT5631_PWR_SPK_R_VOL (0x1 << 14)
-#define RT5631_PWR_SPK_R_VOL_BIT 14
-#define RT5631_PWR_LOUT_VOL (0x1 << 13)
-#define RT5631_PWR_LOUT_VOL_BIT 13
-#define RT5631_PWR_ROUT_VOL (0x1 << 12)
-#define RT5631_PWR_ROUT_VOL_BIT 12
-#define RT5631_PWR_HP_L_OUT_VOL (0x1 << 11)
-#define RT5631_PWR_HP_L_OUT_VOL_BIT 11
-#define RT5631_PWR_HP_R_OUT_VOL (0x1 << 10)
-#define RT5631_PWR_HP_R_OUT_VOL_BIT 10
-#define RT5631_PWR_AXIL_IN_VOL (0x1 << 9)
-#define RT5631_PWR_AXIL_IN_VOL_BIT 9
-#define RT5631_PWR_AXIR_IN_VOL (0x1 << 8)
-#define RT5631_PWR_AXIR_IN_VOL_BIT 8
-#define RT5631_PWR_MONO_IN_P_VOL (0x1 << 7)
-#define RT5631_PWR_MONO_IN_P_VOL_BIT 7
-#define RT5631_PWR_MONO_IN_N_VOL (0x1 << 6)
-#define RT5631_PWR_MONO_IN_N_VOL_BIT 6
-
-/* General Purpose Control Register(0x40) */
-#define RT5631_SPK_AMP_AUTO_RATIO_EN (0x1 << 15)
-
-#define RT5631_SPK_AMP_RATIO_CTRL_MASK (0x7 << 12)
-#define RT5631_SPK_AMP_RATIO_CTRL_2_34 (0x0 << 12) /* 7.40DB */
-#define RT5631_SPK_AMP_RATIO_CTRL_1_99 (0x1 << 12) /* 5.99DB */
-#define RT5631_SPK_AMP_RATIO_CTRL_1_68 (0x2 << 12) /* 4.50DB */
-#define RT5631_SPK_AMP_RATIO_CTRL_1_56 (0x3 << 12) /* 3.86DB */
-#define RT5631_SPK_AMP_RATIO_CTRL_1_44 (0x4 << 12) /* 3.16DB */
-#define RT5631_SPK_AMP_RATIO_CTRL_1_27 (0x5 << 12) /* 2.10DB */
-#define RT5631_SPK_AMP_RATIO_CTRL_1_09 (0x6 << 12) /* 0.80DB */
-#define RT5631_SPK_AMP_RATIO_CTRL_1_00 (0x7 << 12) /* 0.00DB */
-#define RT5631_SPK_AMP_RATIO_CTRL_SHIFT 12
-
-#define RT5631_STEREO_DAC_HI_PASS_FILT_EN (0x1 << 11)
-#define RT5631_STEREO_ADC_HI_PASS_FILT_EN (0x1 << 10)
-/* Select ADC Wind Filter Clock type */
-#define RT5631_ADC_WIND_FILT_MASK (0x3 << 4)
-#define RT5631_ADC_WIND_FILT_8_16_32K (0x0 << 4)
-#define RT5631_ADC_WIND_FILT_11_22_44K (0x1 << 4)
-#define RT5631_ADC_WIND_FILT_12_24_48K (0x2 << 4)
-#define RT5631_ADC_WIND_FILT_EN (0x1 << 3)
-/* SelectADC Wind Filter Corner Frequency */
-#define RT5631_ADC_WIND_CNR_FREQ_MASK (0x7 << 0)
-#define RT5631_ADC_WIND_CNR_FREQ_82_113_122 (0x0 << 0)
-#define RT5631_ADC_WIND_CNR_FREQ_102_141_153 (0x1 << 0)
-#define RT5631_ADC_WIND_CNR_FREQ_131_180_156 (0x2 << 0)
-#define RT5631_ADC_WIND_CNR_FREQ_163_225_245 (0x3 << 0)
-#define RT5631_ADC_WIND_CNR_FREQ_204_281_306 (0x4 << 0)
-#define RT5631_ADC_WIND_CNR_FREQ_261_360_392 (0x5 << 0)
-#define RT5631_ADC_WIND_CNR_FREQ_327_450_490 (0x6 << 0)
-#define RT5631_ADC_WIND_CNR_FREQ_408_563_612 (0x7 << 0)
-
-/* Global Clock Control Register(0x42) */
-#define RT5631_SYSCLK_SOUR_SEL_MASK (0x3 << 14)
-#define RT5631_SYSCLK_SOUR_SEL_MCLK (0x0 << 14)
-#define RT5631_SYSCLK_SOUR_SEL_PLL (0x1 << 14)
-#define RT5631_SYSCLK_SOUR_SEL_PLL_TCK (0x2 << 14)
-#define RT5631_PLLCLK_SOUR_SEL_MASK (0x3 << 12)
-#define RT5631_PLLCLK_SOUR_SEL_MCLK (0x0 << 12)
-#define RT5631_PLLCLK_SOUR_SEL_BCLK (0x1 << 12)
-#define RT5631_PLLCLK_SOUR_SEL_VBCLK (0x2 << 12)
-#define RT5631_PLLCLK_PRE_DIV1 (0x0 << 11)
-#define RT5631_PLLCLK_PRE_DIV2 (0x1 << 11)
-
-#define RT5631_ADCR_FUN_MASK (0x1 << 8)
-#define RT5631_ADCR_FUN_SFT 8
-#define RT5631_ADCR_FUN_ADC (0x0 << 8)
-#define RT5631_ADCR_FUN_VADC (0x1 << 8)
-
-#define RT5631_SYSCLK2_SOUR_SEL_MASK (0x3 << 6)
-#define RT5631_SYSCLK2_SOUR_SEL_MCLK (0x0 << 6)
-#define RT5631_SYSCLK2_SOUR_SEL_PLL2 (0x1 << 6)
-#define RT5631_PLLCLK2_SOUR_SEL_MASK (0x3 << 4)
-#define RT5631_PLLCLK2_SOUR_SEL_MCLK (0x0 << 4)
-#define RT5631_PLLCLK2_SOUR_SEL_BCLK (0x1 << 4)
-#define RT5631_PLLCLK2_SOUR_SEL_VBCLK (0x2 << 4)
-#define RT5631_PLLCLK2_PRE_DIV1 (0x0 << 3)
-#define RT5631_PLLCLK2_PRE_DIV2 (0x1 << 3)
-
-#define RT5631_VDAC_CLK_SOUR_MASK (0x1)
-#define RT5631_VDAC_CLK_SOUR_SFT 0
-#define RT5631_VDAC_CLK_SOUR_SCLK1 (0x0)
-#define RT5631_VDAC_CLK_SOUR_SCLK2 (0x1)
-
-/* PLL Control(0x44) */
-#define RT5631_PLL_CTRL_M_VAL(m) ((m)&0xf)
-#define RT5631_PLL_CTRL_K_VAL(k) (((k)&0x7) << 4)
-#define RT5631_PLL_CTRL_N_VAL(n) (((n)&0xff) << 8)
-
-/* Internal Status and IRQ Control2(0x4A) */
-#define RT5631_ADC_DATA_SEL_MASK (0x3 << 14)
-#define RT5631_ADC_DATA_SEL_SHIFT 14
-#define RT5631_ADC_DATA_SEL_Disable (0x0 << 14)
-#define RT5631_ADC_DATA_SEL_MIC1 (0x1 << 14)
-#define RT5631_ADC_DATA_SEL_MIC1_SHIFT 14
-#define RT5631_ADC_DATA_SEL_MIC2 (0x2 << 14)
-#define RT5631_ADC_DATA_SEL_MIC2_SHIFT 15
-#define RT5631_ADC_DATA_SEL_SWAP (0x3 << 14)
-
-/* GPIO Pin Configuration(0x4C) */
-#define RT5631_GPIO_PIN_FUN_SEL_MASK (0x1 << 15)
-#define RT5631_GPIO_PIN_FUN_SEL_IRQ (0x1 << 15)
-#define RT5631_GPIO_PIN_FUN_SEL_GPIO_DIMC (0x0 << 15)
-
-#define RT5631_GPIO_DMIC_FUN_SEL_MASK (0x1 << 3)
-#define RT5631_GPIO_DMIC_FUN_SEL_DIMC (0x1 << 3)
-#define RT5631_GPIO_DMIC_FUN_SEL_GPIO (0x0 << 3)
-
-#define RT5631_GPIO_PIN_CON_MASK (0x1 << 2)
-#define RT5631_GPIO_PIN_SET_INPUT (0x0 << 2)
-#define RT5631_GPIO_PIN_SET_OUTPUT (0x1 << 2)
-
-/* De-POP function Control 1(0x54) */
-#define RT5631_POW_ON_SOFT_GEN (0x1 << 15)
-#define RT5631_EN_MUTE_UNMUTE_DEPOP (0x1 << 14)
-#define RT5631_EN_DEPOP2_FOR_HP (0x1 << 7)
-/* Power Down HPAMP_L Starts Up Signal */
-#define RT5631_PD_HPAMP_L_ST_UP (0x1 << 5)
-/* Power Down HPAMP_R Starts Up Signal */
-#define RT5631_PD_HPAMP_R_ST_UP (0x1 << 4)
-/* Enable left HP mute/unmute depop */
-#define RT5631_EN_HP_L_M_UN_MUTE_DEPOP (0x1 << 1)
-/* Enable right HP mute/unmute depop */
-#define RT5631_EN_HP_R_M_UN_MUTE_DEPOP (0x1 << 0)
-
-/* De-POP Fnction Control(0x56) */
-#define RT5631_EN_ONE_BIT_DEPOP (0x1 << 15)
-#define RT5631_EN_CAP_FREE_DEPOP (0x1 << 14)
-
-/* Jack Detect Control Register(0x5A) */
-#define RT5631_JD_USE_MASK (0x3 << 14)
-#define RT5631_JD_USE_JD2 (0x3 << 14)
-#define RT5631_JD_USE_JD1 (0x2 << 14)
-#define RT5631_JD_USE_GPIO (0x1 << 14)
-#define RT5631_JD_OFF (0x0 << 14)
-/* JD trigger enable for HP */
-#define RT5631_JD_HP_EN (0x1 << 11)
-#define RT5631_JD_HP_TRI_MASK (0x1 << 10)
-#define RT5631_JD_HP_TRI_HI (0x1 << 10)
-#define RT5631_JD_HP_TRI_LO (0x1 << 10)
-/* JD trigger enable for speaker LP/LN */
-#define RT5631_JD_SPK_L_EN (0x1 << 9)
-#define RT5631_JD_SPK_L_TRI_MASK (0x1 << 8)
-#define RT5631_JD_SPK_L_TRI_HI (0x1 << 8)
-#define RT5631_JD_SPK_L_TRI_LO (0x0 << 8)
-/* JD trigger enable for speaker RP/RN */
-#define RT5631_JD_SPK_R_EN (0x1 << 7)
-#define RT5631_JD_SPK_R_TRI_MASK (0x1 << 6)
-#define RT5631_JD_SPK_R_TRI_HI (0x1 << 6)
-#define RT5631_JD_SPK_R_TRI_LO (0x0 << 6)
-/* JD trigger enable for monoout */
-#define RT5631_JD_MONO_EN (0x1 << 5)
-#define RT5631_JD_MONO_TRI_MASK (0x1 << 4)
-#define RT5631_JD_MONO_TRI_HI (0x1 << 4)
-#define RT5631_JD_MONO_TRI_LO (0x0 << 4)
-/* JD trigger enable for Lout */
-#define RT5631_JD_AUX_1_EN (0x1 << 3)
-#define RT5631_JD_AUX_1_MASK (0x1 << 2)
-#define RT5631_JD_AUX_1_TRI_HI (0x1 << 2)
-#define RT5631_JD_AUX_1_TRI_LO (0x0 << 2)
-/* JD trigger enable for Rout */
-#define RT5631_JD_AUX_2_EN (0x1 << 1)
-#define RT5631_JD_AUX_2_MASK (0x1 << 0)
-#define RT5631_JD_AUX_2_TRI_HI (0x1 << 0)
-#define RT5631_JD_AUX_2_TRI_LO (0x0 << 0)
-
-/* ALC CONTROL 1(0x64) */
-#define RT5631_ALC_ATTACK_RATE_MASK (0x1F << 8)
-#define RT5631_ALC_RECOVERY_RATE_MASK (0x1F << 0)
-
-/* ALC CONTROL 2(0x65) */
-/* select Compensation gain for Noise gate function */
-#define RT5631_ALC_COM_NOISE_GATE_MASK (0xF << 0)
-
-/* ALC CONTROL 3(0x66) */
-#define RT5631_ALC_FUN_MASK (0x3 << 14)
-#define RT5631_ALC_FUN_DIS (0x0 << 14)
-#define RT5631_ALC_ENA_DAC_PATH (0x1 << 14)
-#define RT5631_ALC_ENA_ADC_PATH (0x3 << 14)
-#define RT5631_ALC_PARA_UPDATE (0x1 << 13)
-#define RT5631_ALC_LIMIT_LEVEL_MASK (0x1F << 8)
-#define RT5631_ALC_NOISE_GATE_FUN_MASK (0x1 << 7)
-#define RT5631_ALC_NOISE_GATE_FUN_DIS (0x0 << 7)
-#define RT5631_ALC_NOISE_GATE_FUN_ENA (0x1 << 7)
-/* ALC noise gate hold data function */
-#define RT5631_ALC_NOISE_GATE_H_D_MASK (0x1 << 6)
-#define RT5631_ALC_NOISE_GATE_H_D_DIS (0x0 << 6)
-#define RT5631_ALC_NOISE_GATE_H_D_ENA (0x1 << 6)
-
-/* Psedueo Stereo & Spatial Effect Block Control(0x68) */
-#define RT5631_SPATIAL_CTRL_EN (0x1 << 15)
-#define RT5631_ALL_PASS_FILTER_EN (0x1 << 14)
-#define RT5631_PSEUDO_STEREO_EN (0x1 << 13)
-#define RT5631_STEREO_EXPENSION_EN (0x1 << 12)
-/* 3D gain parameter */
-#define RT5631_GAIN_3D_PARA_MASK (0x3 << 6)
-#define RT5631_GAIN_3D_PARA_1_00 (0x0 << 6)
-#define RT5631_GAIN_3D_PARA_1_50 (0x1 << 6)
-#define RT5631_GAIN_3D_PARA_2_00 (0x2 << 6)
-/* 3D ratio parameter */
-#define RT5631_RATIO_3D_MASK (0x3 << 4)
-#define RT5631_RATIO_3D_0_0 (0x0 << 4)
-#define RT5631_RATIO_3D_0_66 (0x1 << 4)
-#define RT5631_RATIO_3D_1_0 (0x2 << 4)
-/* select samplerate for all pass filter */
-#define RT5631_APF_FUN_SLE_MASK (0x3 << 0)
-#define RT5631_APF_FUN_SEL_48K (0x3 << 0)
-#define RT5631_APF_FUN_SEL_44_1K (0x2 << 0)
-#define RT5631_APF_FUN_SEL_32K (0x1 << 0)
-#define RT5631_APF_FUN_DIS (0x0 << 0)
-
-/* EQ CONTROL 1(0x6E) */
-#define RT5631_HW_EQ_PATH_SEL_MASK (0x1 << 15)
-#define RT5631_HW_EQ_PATH_SEL_DAC (0x0 << 15)
-#define RT5631_HW_EQ_PATH_SEL_ADC (0x1 << 15)
-#define RT5631_HW_EQ_UPDATE_CTRL (0x1 << 14)
-
-#define RT5631_EN_HW_EQ_HPF2 (0x1 << 5)
-#define RT5631_EN_HW_EQ_HPF1 (0x1 << 4)
-#define RT5631_EN_HW_EQ_BP3 (0x1 << 3)
-#define RT5631_EN_HW_EQ_BP2 (0x1 << 2)
-#define RT5631_EN_HW_EQ_BP1 (0x1 << 1)
-#define RT5631_EN_HW_EQ_LPF (0x1 << 0)
-
-enum {
- RT5631_AIF1,
- RT5631_AIF2,
- RT5631_AIFS,
-};
-
-enum {
- RT5631_SCLK1,
- RT5631_SCLK2,
- RT5631_SCLKS,
-};
-
-enum {
- RT5631_PLL1,
- RT5631_PLL2,
- RT5631_PLLS,
-};
-
-enum {
- RT5631_PLL_S_MCLK,
- RT5631_PLL_S_BCLK,
- RT5631_PLL_S_VBCLK,
-};
-
-#define RT5631_NO_JACK BIT(0)
-#define RT5631_HEADSET_DET BIT(1)
-#define RT5631_HEADPHO_DET BIT(2)
-
-int rt5631_headset_detect(struct snd_soc_codec *codec, int jack_insert);
-
-#endif /* __RT5631_H__ */
+++ /dev/null
-/*
- * rt5639.c -- RT5639 ALSA SoC audio codec driver
- *
- * Copyright 2011 Realtek Semiconductor Corp.
- * Author: Johnny Hsu <johnnyhsu@realtek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/module.h>
-#include <linux/moduleparam.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/pm.h>
-#include <linux/i2c.h>
-#include <linux/platform_device.h>
-#include <linux/spi/spi.h>
-#include <sound/core.h>
-#include <sound/pcm.h>
-#include <sound/pcm_params.h>
-#include <sound/soc.h>
-#include <sound/soc-dapm.h>
-#include <sound/initval.h>
-#include <sound/tlv.h>
-
-#define RTK_IOCTL
-#ifdef RTK_IOCTL
-#if defined(CONFIG_SND_HWDEP) || defined(CONFIG_SND_HWDEP_MODULE)
-#include "rt56xx_ioctl.h"
-#include "rt5639_ioctl.h"
-#endif
-#endif
-
-#include "rt5639.h"
-
-#define RT5639_REG_RW 0 /* for debug */
-#define RT5639_DET_EXT_MIC 0
-#define USE_ONEBIT_DEPOP 1 /* for one bit depop */
-//#define USE_EQ
-#define VERSION "0.8.5 alsa 1.0.24"
-
-struct rt5639_init_reg {
- u8 reg;
- u16 val;
-};
-
-static struct rt5639_init_reg init_list[] = {
- {RT5639_GEN_CTRL1 , 0x3f01},//fa[12:13] = 1'b; fa[8~11]=1; fa[0]=1
- {RT5639_ADDA_CLK1 , 0x1114},//73[2] = 1'b
- {RT5639_MICBIAS , 0x3030},//93[5:4] = 11'b
- {RT5639_CLS_D_OUT , 0xa000},//8d[11] = 0'b
- {RT5639_CLS_D_OVCD , 0x0334},//8c[8] = 1'b
- {RT5639_PRIV_INDEX , 0x001d},//PR1d[8] = 1'b;
- {RT5639_PRIV_DATA , 0x0347},
- {RT5639_PRIV_INDEX , 0x003d},//PR3d[12] = 0'b; PR3d[9] = 1'b
- {RT5639_PRIV_DATA , 0x2600},
- {RT5639_PRIV_INDEX , 0x0012},//PR12 = 0aa8'h
- {RT5639_PRIV_DATA , 0x0aa8},
- {RT5639_PRIV_INDEX , 0x0014},//PR14 = 8aaa'h
- {RT5639_PRIV_DATA , 0x8aaa},
- {RT5639_PRIV_INDEX , 0x0020},//PR20 = 6115'h
- {RT5639_PRIV_DATA , 0x6115},
- {RT5639_PRIV_INDEX , 0x0023},//PR23 = 0804'h
- {RT5639_PRIV_DATA , 0x0804},
- /*playback*/
- {RT5639_STO_DAC_MIXER , 0x1414},//Dig inf 1 -> Sto DAC mixer -> DACL
- {RT5639_OUT_L3_MIXER , 0x01fe},//DACL1 -> OUTMIXL
- {RT5639_OUT_R3_MIXER , 0x01fe},//DACR1 -> OUTMIXR
- {RT5639_HP_VOL , 0x8888},//OUTMIX -> HPVOL
- {RT5639_HPO_MIXER , 0xc000},//HPVOL -> HPOLMIX
-// {RT5639_HPO_MIXER , 0xa000},//DAC1 -> HPOLMIX
-// {RT5639_CHARGE_PUMP , 0x0f00},
- {RT5639_PRIV_INDEX , 0x0090},
- {RT5639_PRIV_DATA , 0x2000},
- {RT5639_PRIV_INDEX , 0x0091},
- {RT5639_PRIV_DATA , 0x1000},
-// {RT5639_HP_CALIB_AMP_DET, 0x0420},
- {RT5639_SPK_L_MIXER , 0x0036},//DACL1 -> SPKMIXL
- {RT5639_SPK_R_MIXER , 0x0036},//DACR1 -> SPKMIXR
- {RT5639_SPK_VOL , 0x8b8b},//SPKMIX -> SPKVOL
- {RT5639_SPO_CLSD_RATIO , 0x0001},
- {RT5639_SPO_L_MIXER , 0xe800},//SPKVOLL -> SPOLMIX
- {RT5639_SPO_R_MIXER , 0x2800},//SPKVOLR -> SPORMIX
-// {RT5639_SPO_L_MIXER , 0xb800},//DAC -> SPOLMIX
-// {RT5639_SPO_R_MIXER , 0x1800},//DAC -> SPORMIX
-// {RT5639_I2S1_SDP , 0xD000},//change IIS1 and IIS2
- /*record*/
- {RT5639_IN1_IN2 , 0x5080},//IN1 boost 40db and differential mode
- {RT5639_IN3_IN4 , 0x0500},//IN2 boost 40db and signal ended mode
- {RT5639_REC_L2_MIXER , 0x007d},//Mic1 -> RECMIXL
- {RT5639_REC_R2_MIXER , 0x007d},//Mic1 -> RECMIXR
-// {RT5639_REC_L2_MIXER , 0x006f},//Mic2 -> RECMIXL
-// {RT5639_REC_R2_MIXER , 0x006f},//Mic2 -> RECMIXR
- {RT5639_STO_ADC_MIXER , 0x3020},//ADC -> Sto ADC mixer
-#if RT5639_DET_EXT_MIC
- {RT5639_MICBIAS , 0x3800},/* enable MICBIAS short current */
- {RT5639_GPIO_CTRL1 , 0x8400},/* set GPIO1 to IRQ */
- {RT5639_GPIO_CTRL3 , 0x0004},/* set GPIO1 output */
- {RT5639_IRQ_CTRL2 , 0x8000},/*set MICBIAS short current to IRQ */
- /*( if sticky set regBE : 8800 ) */
-#endif
-};
-#define RT5639_INIT_REG_LEN ARRAY_SIZE(init_list)
-
-static int rt5639_reg_init(struct snd_soc_codec *codec)
-{
- int i;
-
- for (i = 0; i < RT5639_INIT_REG_LEN; i++)
- snd_soc_write(codec, init_list[i].reg, init_list[i].val);
-
- return 0;
-}
-
-static int rt5639_index_sync(struct snd_soc_codec *codec)
-{
- int i;
-
- for (i = 0; i < RT5639_INIT_REG_LEN; i++)
- if (RT5639_PRIV_INDEX == init_list[i].reg ||
- RT5639_PRIV_DATA == init_list[i].reg)
- snd_soc_write(codec, init_list[i].reg,
- init_list[i].val);
- return 0;
-}
-
-static const u16 rt5639_reg[RT5639_VENDOR_ID2 + 1] = {
- [RT5639_RESET] = 0x000c,
- [RT5639_SPK_VOL] = 0xc8c8,
- [RT5639_HP_VOL] = 0xc8c8,
- [RT5639_OUTPUT] = 0xc8c8,
- [RT5639_MONO_OUT] = 0x8000,
- [RT5639_INL_INR_VOL] = 0x0808,
- [RT5639_DAC1_DIG_VOL] = 0xafaf,
- [RT5639_DAC2_DIG_VOL] = 0xafaf,
- [RT5639_ADC_DIG_VOL] = 0x2f2f,
- [RT5639_ADC_DATA] = 0x2f2f,
- [RT5639_STO_ADC_MIXER] = 0x7060,
- [RT5639_MONO_ADC_MIXER] = 0x7070,
- [RT5639_AD_DA_MIXER] = 0x8080,
- [RT5639_STO_DAC_MIXER] = 0x5454,
- [RT5639_MONO_DAC_MIXER] = 0x5454,
- [RT5639_DIG_MIXER] = 0xaa00,
- [RT5639_DSP_PATH2] = 0xa000,
- [RT5639_REC_L2_MIXER] = 0x007f,
- [RT5639_REC_R2_MIXER] = 0x007f,
- [RT5639_HPO_MIXER] = 0xe000,
- [RT5639_SPK_L_MIXER] = 0x003e,
- [RT5639_SPK_R_MIXER] = 0x003e,
- [RT5639_SPO_L_MIXER] = 0xf800,
- [RT5639_SPO_R_MIXER] = 0x3800,
- [RT5639_SPO_CLSD_RATIO] = 0x0004,
- [RT5639_MONO_MIXER] = 0xfc00,
- [RT5639_OUT_L3_MIXER] = 0x01ff,
- [RT5639_OUT_R3_MIXER] = 0x01ff,
- [RT5639_LOUT_MIXER] = 0xf000,
- [RT5639_PWR_ANLG1] = 0x00c0,
- [RT5639_I2S1_SDP] = 0x8000,
- [RT5639_I2S2_SDP] = 0x8000,
- [RT5639_I2S3_SDP] = 0x8000,
- [RT5639_ADDA_CLK1] = 0x1110,
- [RT5639_ADDA_CLK2] = 0x0c00,
- [RT5639_DMIC] = 0x1d00,
- [RT5639_ASRC_3] = 0x0008,
- [RT5639_HP_OVCD] = 0x0600,
- [RT5639_CLS_D_OVCD] = 0x0228,
- [RT5639_CLS_D_OUT] = 0xa800,
- [RT5639_DEPOP_M1] = 0x0004,
- [RT5639_DEPOP_M2] = 0x1100,
- [RT5639_DEPOP_M3] = 0x0646,
- [RT5639_CHARGE_PUMP] = 0x0c00,
- [RT5639_MICBIAS] = 0x3000,
- [RT5639_EQ_CTRL1] = 0x2080,
- [RT5639_DRC_AGC_1] = 0x2206,
- [RT5639_DRC_AGC_2] = 0x1f00,
- [RT5639_ANC_CTRL1] = 0x034b,
- [RT5639_ANC_CTRL2] = 0x0066,
- [RT5639_ANC_CTRL3] = 0x000b,
- [RT5639_GPIO_CTRL1] = 0x0400,
- [RT5639_DSP_CTRL3] = 0x2000,
- [RT5639_BASE_BACK] = 0x0013,
- [RT5639_MP3_PLUS1] = 0x0680,
- [RT5639_MP3_PLUS2] = 0x1c17,
- [RT5639_3D_HP] = 0x8c00,
- [RT5639_ADJ_HPF] = 0xaa20,
- [RT5639_HP_CALIB_AMP_DET] = 0x0400,
- [RT5639_SV_ZCD1] = 0x0809,
- [RT5639_VENDOR_ID1] = 0x10ec,
- [RT5639_VENDOR_ID2] = 0x6231,
-};
-
-static int rt5639_reset(struct snd_soc_codec *codec)
-{
- return snd_soc_write(codec, RT5639_RESET, 0);
-}
-
-/**
- * rt5639_index_write - Write private register.
- * @codec: SoC audio codec device.
- * @reg: Private register index.
- * @value: Private register Data.
- *
- * Modify private register for advanced setting. It can be written through
- * private index (0x6a) and data (0x6c) register.
- *
- * Returns 0 for success or negative error code.
- */
-static int rt5639_index_write(struct snd_soc_codec *codec,
- unsigned int reg, unsigned int value)
-{
- int ret;
-
- ret = snd_soc_write(codec, RT5639_PRIV_INDEX, reg);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
- goto err;
- }
- ret = snd_soc_write(codec, RT5639_PRIV_DATA, value);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to set private value: %d\n", ret);
- goto err;
- }
- return 0;
-
-err:
- return ret;
-}
-
-/**
- * rt5639_index_read - Read private register.
- * @codec: SoC audio codec device.
- * @reg: Private register index.
- *
- * Read advanced setting from private register. It can be read through
- * private index (0x6a) and data (0x6c) register.
- *
- * Returns private register value or negative error code.
- */
-static unsigned int rt5639_index_read(
- struct snd_soc_codec *codec, unsigned int reg)
-{
- int ret;
-
- ret = snd_soc_write(codec, RT5639_PRIV_INDEX, reg);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
- return ret;
- }
- return snd_soc_read(codec, RT5639_PRIV_DATA);
-}
-
-/**
- * rt5639_index_update_bits - update private register bits
- * @codec: audio codec
- * @reg: Private register index.
- * @mask: register mask
- * @value: new value
- *
- * Writes new register value.
- *
- * Returns 1 for change, 0 for no change, or negative error code.
- */
-static int rt5639_index_update_bits(struct snd_soc_codec *codec,
- unsigned int reg, unsigned int mask, unsigned int value)
-{
- unsigned int old, new;
- int change, ret;
-
- ret = rt5639_index_read(codec, reg);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to read private reg: %d\n", ret);
- goto err;
- }
-
- old = ret;
- new = (old & ~mask) | (value & mask);
- change = old != new;
- if (change) {
- ret = rt5639_index_write(codec, reg, new);
- if (ret < 0) {
- dev_err(codec->dev,
- "Failed to write private reg: %d\n", ret);
- goto err;
- }
- }
- return change;
-
-err:
- return ret;
-}
-
-static int rt5639_volatile_register(
- struct snd_soc_codec *codec, unsigned int reg)
-{
- switch (reg) {
- case RT5639_RESET:
- case RT5639_PRIV_DATA:
- case RT5639_ASRC_5:
- case RT5639_EQ_CTRL1:
- case RT5639_DRC_AGC_1:
- case RT5639_ANC_CTRL1:
- case RT5639_IRQ_CTRL2:
- case RT5639_INT_IRQ_ST:
- case RT5639_DSP_CTRL2:
- case RT5639_DSP_CTRL3:
- case RT5639_PGM_REG_ARR1:
- case RT5639_PGM_REG_ARR3:
- case RT5639_VENDOR_ID:
- case RT5639_VENDOR_ID1:
- case RT5639_VENDOR_ID2:
- return 1;
- default:
- return 0;
- }
-}
-
-static int rt5639_readable_register(
- struct snd_soc_codec *codec, unsigned int reg)
-{
- switch (reg) {
- case RT5639_RESET:
- case RT5639_SPK_VOL:
- case RT5639_HP_VOL:
- case RT5639_OUTPUT:
- case RT5639_MONO_OUT:
- case RT5639_IN1_IN2:
- case RT5639_IN3_IN4:
- case RT5639_INL_INR_VOL:
- case RT5639_DAC1_DIG_VOL:
- case RT5639_DAC2_DIG_VOL:
- case RT5639_DAC2_CTRL:
- case RT5639_ADC_DIG_VOL:
- case RT5639_ADC_DATA:
- case RT5639_ADC_BST_VOL:
- case RT5639_STO_ADC_MIXER:
- case RT5639_MONO_ADC_MIXER:
- case RT5639_AD_DA_MIXER:
- case RT5639_STO_DAC_MIXER:
- case RT5639_MONO_DAC_MIXER:
- case RT5639_DIG_MIXER:
- case RT5639_DSP_PATH1:
- case RT5639_DSP_PATH2:
- case RT5639_DIG_INF_DATA:
- case RT5639_REC_L1_MIXER:
- case RT5639_REC_L2_MIXER:
- case RT5639_REC_R1_MIXER:
- case RT5639_REC_R2_MIXER:
- case RT5639_HPO_MIXER:
- case RT5639_SPK_L_MIXER:
- case RT5639_SPK_R_MIXER:
- case RT5639_SPO_L_MIXER:
- case RT5639_SPO_R_MIXER:
- case RT5639_SPO_CLSD_RATIO:
- case RT5639_MONO_MIXER:
- case RT5639_OUT_L1_MIXER:
- case RT5639_OUT_L2_MIXER:
- case RT5639_OUT_L3_MIXER:
- case RT5639_OUT_R1_MIXER:
- case RT5639_OUT_R2_MIXER:
- case RT5639_OUT_R3_MIXER:
- case RT5639_LOUT_MIXER:
- case RT5639_PWR_DIG1:
- case RT5639_PWR_DIG2:
- case RT5639_PWR_ANLG1:
- case RT5639_PWR_ANLG2:
- case RT5639_PWR_MIXER:
- case RT5639_PWR_VOL:
- case RT5639_PRIV_INDEX:
- case RT5639_PRIV_DATA:
- case RT5639_I2S1_SDP:
- case RT5639_I2S2_SDP:
- case RT5639_I2S3_SDP:
- case RT5639_ADDA_CLK1:
- case RT5639_ADDA_CLK2:
- case RT5639_DMIC:
- case RT5639_GLB_CLK:
- case RT5639_PLL_CTRL1:
- case RT5639_PLL_CTRL2:
- case RT5639_ASRC_1:
- case RT5639_ASRC_2:
- case RT5639_ASRC_3:
- case RT5639_ASRC_4:
- case RT5639_ASRC_5:
- case RT5639_HP_OVCD:
- case RT5639_CLS_D_OVCD:
- case RT5639_CLS_D_OUT:
- case RT5639_DEPOP_M1:
- case RT5639_DEPOP_M2:
- case RT5639_DEPOP_M3:
- case RT5639_CHARGE_PUMP:
- case RT5639_PV_DET_SPK_G:
- case RT5639_MICBIAS:
- case RT5639_EQ_CTRL1:
- case RT5639_EQ_CTRL2:
- case RT5639_WIND_FILTER:
- case RT5639_DRC_AGC_1:
- case RT5639_DRC_AGC_2:
- case RT5639_DRC_AGC_3:
- case RT5639_SVOL_ZC:
- case RT5639_ANC_CTRL1:
- case RT5639_ANC_CTRL2:
- case RT5639_ANC_CTRL3:
- case RT5639_JD_CTRL:
- case RT5639_ANC_JD:
- case RT5639_IRQ_CTRL1:
- case RT5639_IRQ_CTRL2:
- case RT5639_INT_IRQ_ST:
- case RT5639_GPIO_CTRL1:
- case RT5639_GPIO_CTRL2:
- case RT5639_GPIO_CTRL3:
- case RT5639_DSP_CTRL1:
- case RT5639_DSP_CTRL2:
- case RT5639_DSP_CTRL3:
- case RT5639_DSP_CTRL4:
- case RT5639_PGM_REG_ARR1:
- case RT5639_PGM_REG_ARR2:
- case RT5639_PGM_REG_ARR3:
- case RT5639_PGM_REG_ARR4:
- case RT5639_PGM_REG_ARR5:
- case RT5639_SCB_FUNC:
- case RT5639_SCB_CTRL:
- case RT5639_BASE_BACK:
- case RT5639_MP3_PLUS1:
- case RT5639_MP3_PLUS2:
- case RT5639_3D_HP:
- case RT5639_ADJ_HPF:
- case RT5639_HP_CALIB_AMP_DET:
- case RT5639_HP_CALIB2:
- case RT5639_SV_ZCD1:
- case RT5639_SV_ZCD2:
- case RT5639_GEN_CTRL1:
- case RT5639_GEN_CTRL2:
- case RT5639_GEN_CTRL3:
- case RT5639_VENDOR_ID:
- case RT5639_VENDOR_ID1:
- case RT5639_VENDOR_ID2:
- case RT5639_DUMMY_PR3F:
- return 1;
- default:
- return 0;
- }
-}
-
-static void DC_Calibrate(struct snd_soc_codec *codec)
-{
- unsigned int sclk_src;
-
- sclk_src = snd_soc_read(codec, RT5639_GLB_CLK) &
- RT5639_SCLK_SRC_MASK;
-
- snd_soc_update_bits(codec, RT5639_PWR_ANLG2,
- RT5639_PWR_MB1, RT5639_PWR_MB1);
- snd_soc_update_bits(codec, RT5639_DEPOP_M2,
- RT5639_DEPOP_MASK, RT5639_DEPOP_MAN);
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_HP_CP_MASK | RT5639_HP_SG_MASK | RT5639_HP_CB_MASK,
- RT5639_HP_CP_PU | RT5639_HP_SG_DIS | RT5639_HP_CB_PU);
-
- snd_soc_update_bits(codec, RT5639_GLB_CLK,
- RT5639_SCLK_SRC_MASK, 0x2 << RT5639_SCLK_SRC_SFT);
-
- rt5639_index_write(codec, RT5639_HP_DCC_INT1, 0x9f00);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG2,
- RT5639_PWR_MB1, 0);
- snd_soc_update_bits(codec, RT5639_GLB_CLK,
- RT5639_SCLK_SRC_MASK, sclk_src);
-}
-
-/**
- * rt5639_headset_detect - Detect headset.
- * @codec: SoC audio codec device.
- * @jack_insert: Jack insert or not.
- *
- * Detect whether is headset or not when jack inserted.
- *
- * Returns detect status.
- */
-int rt5639_headset_detect(struct snd_soc_codec *codec, int jack_insert)
-{
- int jack_type;
- int sclk_src;
- int reg63, reg64;
-
- if(jack_insert) {
- reg63 = snd_soc_read(codec, RT5639_PWR_ANLG1);
- reg64 = snd_soc_read(codec, RT5639_PWR_ANLG2);
- if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
- snd_soc_write(codec, RT5639_PWR_ANLG1, 0xa814);
- snd_soc_write(codec, RT5639_MICBIAS, 0x3830);
- snd_soc_write(codec, RT5639_GEN_CTRL1 , 0x3701);
- }
- sclk_src = snd_soc_read(codec, RT5639_GLB_CLK) &
- RT5639_SCLK_SRC_MASK;
- snd_soc_update_bits(codec, RT5639_GLB_CLK,
- RT5639_SCLK_SRC_MASK, 0x3 << RT5639_SCLK_SRC_SFT);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_LDO2, RT5639_PWR_LDO2);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG2,
- RT5639_PWR_MB1, RT5639_PWR_MB1);
- snd_soc_update_bits(codec, RT5639_MICBIAS,
- RT5639_MIC1_OVCD_MASK | RT5639_MIC1_OVTH_MASK |
- RT5639_PWR_CLK25M_MASK | RT5639_PWR_MB_MASK,
- RT5639_MIC1_OVCD_EN | RT5639_MIC1_OVTH_600UA |
- RT5639_PWR_MB_PU | RT5639_PWR_CLK25M_PU);
- snd_soc_update_bits(codec, RT5639_GEN_CTRL1,
- 0x1, 0x1);
- msleep(100);
- if (snd_soc_read(codec, RT5639_IRQ_CTRL2) & 0x8)
- jack_type = RT5639_HEADPHO_DET;
- else
- jack_type = RT5639_HEADSET_DET;
- snd_soc_update_bits(codec, RT5639_IRQ_CTRL2,
- RT5639_MB1_OC_CLR, 0);
- snd_soc_update_bits(codec, RT5639_GLB_CLK,
- RT5639_SCLK_SRC_MASK, sclk_src);
- snd_soc_write(codec, RT5639_PWR_ANLG1, reg63);
- snd_soc_write(codec, RT5639_PWR_ANLG2, reg64);
- } else {
- snd_soc_update_bits(codec, RT5639_MICBIAS,
- RT5639_MIC1_OVCD_MASK,
- RT5639_MIC1_OVCD_DIS);
-
- jack_type = RT5639_NO_JACK;
- }
-
- return jack_type;
-}
-EXPORT_SYMBOL(rt5639_headset_detect);
-
-/**
- * rt5639_conn_mux_path - connect MUX widget path.
- * @codec: SoC audio codec device.
- * @widget_name: widget name.
- * @path_name: path name.
- *
- * Make MUX path connected and update register.
- *
- * Returns 0 for success or negative error code.
- */
-int rt5639_conn_mux_path(struct snd_soc_codec *codec,
- char *widget_name, char *path_name)
-{
- struct snd_soc_dapm_context *dapm = &codec->dapm;
- struct snd_soc_dapm_widget *w;
- struct snd_soc_dapm_path *path;
- struct snd_kcontrol_new *kcontrol;
- struct soc_enum *em;
- unsigned int val, mask, bitmask;
- int i, update = 0;
-
- if (codec == NULL || widget_name == NULL || path_name == NULL)
- return -EINVAL;
-
- list_for_each_entry(w, &dapm->card->widgets, list)
- {
- if (!w->name || w->dapm != dapm)
- continue;
- if (!(strcmp(w->name, widget_name))) {
- if (w->id != snd_soc_dapm_mux)
- return -EINVAL;
- dev_info(codec->dev, "w->name=%s\n", w->name);
- list_for_each_entry(path, &w->sources, list_sink)
- {
- if (!(strcmp(path->name, path_name)))
- path->connect = 1;
- else
- path->connect = 0;
- dev_info(codec->dev,
- "path->name=%s path->connect=%d\n",
- path->name, path->connect);
- }
- update = 1;
- break;
- }
- }
-
- if (update) {
- snd_soc_dapm_sync(dapm);
-
- kcontrol = &w->kcontrols[0];
- em = (struct soc_enum *)kcontrol->private_value;
- for (i = 0; i < em->max; i++)
- if (!(strcmp(path_name, em->texts[i])))
- break;
- for (bitmask = 1; bitmask < em->max; bitmask <<= 1)
- ;
- val = i << em->shift_l;
- mask = (bitmask - 1) << em->shift_l;
- snd_soc_update_bits(codec, em->reg, mask, val);
- }
-
- return 0;
-}
-EXPORT_SYMBOL(rt5639_conn_mux_path);
-
-static const char *rt5639_dacr2_src[] = { "TxDC_R", "TxDP_R" };
-
-static const SOC_ENUM_SINGLE_DECL(rt5639_dacr2_enum,RT5639_DUMMY_PR3F,
- 14, rt5639_dacr2_src);
-static const struct snd_kcontrol_new rt5639_dacr2_mux =
- SOC_DAPM_ENUM("Mono dacr source", rt5639_dacr2_enum);
-
-static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
-static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
-static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
-static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
-static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
-
-/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
-static unsigned int bst_tlv[] = {
- TLV_DB_RANGE_HEAD(7),
- 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
- 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
- 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
- 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
- 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
- 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
- 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
-};
-
-static int rt5639_dmic_get(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct rt5639_priv *rt5639 = snd_soc_codec_get_drvdata(codec);
-
- ucontrol->value.integer.value[0] = rt5639->dmic_en;
-
- return 0;
-}
-
-static int rt5639_dmic_put(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct rt5639_priv *rt5639 = snd_soc_codec_get_drvdata(codec);
-
- if (rt5639->dmic_en == ucontrol->value.integer.value[0])
- return 0;
-
- rt5639->dmic_en = ucontrol->value.integer.value[0];
- switch (rt5639->dmic_en) {
- case RT5639_DMIC_DIS:
- snd_soc_update_bits(codec, RT5639_GPIO_CTRL1,
- RT5639_GP2_PIN_MASK | RT5639_GP3_PIN_MASK |
- RT5639_GP4_PIN_MASK,
- RT5639_GP2_PIN_GPIO2 | RT5639_GP3_PIN_GPIO3 |
- RT5639_GP4_PIN_GPIO4);
- snd_soc_update_bits(codec, RT5639_DMIC,
- RT5639_DMIC_1_DP_MASK | RT5639_DMIC_2_DP_MASK,
- RT5639_DMIC_1_DP_GPIO3 | RT5639_DMIC_2_DP_GPIO4);
- snd_soc_update_bits(codec, RT5639_DMIC,
- RT5639_DMIC_1_EN_MASK | RT5639_DMIC_2_EN_MASK,
- RT5639_DMIC_1_DIS | RT5639_DMIC_2_DIS);
- break;
-
- case RT5639_DMIC1:
- snd_soc_update_bits(codec, RT5639_GPIO_CTRL1,
- RT5639_GP2_PIN_MASK | RT5639_GP3_PIN_MASK,
- RT5639_GP2_PIN_DMIC1_SCL | RT5639_GP3_PIN_DMIC1_SDA);
- snd_soc_update_bits(codec, RT5639_DMIC,
- RT5639_DMIC_1L_LH_MASK | RT5639_DMIC_1R_LH_MASK |
- RT5639_DMIC_1_DP_MASK,
- RT5639_DMIC_1L_LH_FALLING | RT5639_DMIC_1R_LH_RISING |
- RT5639_DMIC_1_DP_IN1P);
- snd_soc_update_bits(codec, RT5639_DMIC,
- RT5639_DMIC_1_EN_MASK, RT5639_DMIC_1_EN);
- break;
-
- case RT5639_DMIC2:
- snd_soc_update_bits(codec, RT5639_GPIO_CTRL1,
- RT5639_GP2_PIN_MASK | RT5639_GP4_PIN_MASK,
- RT5639_GP2_PIN_DMIC1_SCL | RT5639_GP4_PIN_DMIC2_SDA);
- snd_soc_update_bits(codec, RT5639_DMIC,
- RT5639_DMIC_2L_LH_MASK | RT5639_DMIC_2R_LH_MASK |
- RT5639_DMIC_2_DP_MASK,
- RT5639_DMIC_2L_LH_FALLING | RT5639_DMIC_2R_LH_RISING |
- RT5639_DMIC_2_DP_IN1N);
- snd_soc_update_bits(codec, RT5639_DMIC,
- RT5639_DMIC_2_EN_MASK, RT5639_DMIC_2_EN);
- break;
-
- default:
- return -EINVAL;
- }
-
- return 0;
-}
-
-
-/* IN1/IN2 Input Type */
-static const char *rt5639_input_mode[] = {
- "Single ended", "Differential"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_in1_mode_enum, RT5639_IN1_IN2,
- RT5639_IN_SFT1, rt5639_input_mode);
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_in2_mode_enum, RT5639_IN3_IN4,
- RT5639_IN_SFT2, rt5639_input_mode);
-
-/* Interface data select */
-static const char *rt5639_data_select[] = {
- "Normal", "Swap", "left copy to right", "right copy to left"};
-
-static const SOC_ENUM_SINGLE_DECL(rt5639_if1_dac_enum, RT5639_DIG_INF_DATA,
- RT5639_IF1_DAC_SEL_SFT, rt5639_data_select);
-
-static const SOC_ENUM_SINGLE_DECL(rt5639_if1_adc_enum, RT5639_DIG_INF_DATA,
- RT5639_IF1_ADC_SEL_SFT, rt5639_data_select);
-
-static const SOC_ENUM_SINGLE_DECL(rt5639_if2_dac_enum, RT5639_DIG_INF_DATA,
- RT5639_IF2_DAC_SEL_SFT, rt5639_data_select);
-
-static const SOC_ENUM_SINGLE_DECL(rt5639_if2_adc_enum, RT5639_DIG_INF_DATA,
- RT5639_IF2_ADC_SEL_SFT, rt5639_data_select);
-
-static const SOC_ENUM_SINGLE_DECL(rt5639_if3_dac_enum, RT5639_DIG_INF_DATA,
- RT5639_IF3_DAC_SEL_SFT, rt5639_data_select);
-
-static const SOC_ENUM_SINGLE_DECL(rt5639_if3_adc_enum, RT5639_DIG_INF_DATA,
- RT5639_IF3_ADC_SEL_SFT, rt5639_data_select);
-
-/* Class D speaker gain ratio */
-static const char *rt5639_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x", "2x",
- "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_clsd_spk_ratio_enum, RT5639_CLS_D_OUT,
- RT5639_CLSD_RATIO_SFT, rt5639_clsd_spk_ratio);
-
-/* DMIC */
-static const char *rt5639_dmic_mode[] = {"Disable", "DMIC1", "DMIC2"};
-
-static const SOC_ENUM_SINGLE_DECL(rt5639_dmic_enum, 0, 0, rt5639_dmic_mode);
-
-
-
-#ifdef RT5639_REG_RW
-#define REGVAL_MAX 0xffff
-static unsigned int regctl_addr;
-static int rt5639_regctl_info(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_info *uinfo)
-{
- uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
- uinfo->count = 2;
- uinfo->value.integer.min = 0;
- uinfo->value.integer.max = REGVAL_MAX;
- return 0;
-}
-
-static int rt5639_regctl_get(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- ucontrol->value.integer.value[0] = regctl_addr;
- ucontrol->value.integer.value[1] = snd_soc_read(codec, regctl_addr);
- return 0;
-}
-
-static int rt5639_regctl_put(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- regctl_addr = ucontrol->value.integer.value[0];
- if(ucontrol->value.integer.value[1] <= REGVAL_MAX)
- snd_soc_write(codec, regctl_addr, ucontrol->value.integer.value[1]);
- return 0;
-}
-#endif
-
-
-static int rt5639_vol_rescale_get(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct soc_mixer_control *mc =
- (struct soc_mixer_control *)kcontrol->private_value;
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- unsigned int val = snd_soc_read(codec, mc->reg);
-
- ucontrol->value.integer.value[0] = RT5639_VOL_RSCL_MAX -
- ((val & RT5639_L_VOL_MASK) >> mc->shift);
- ucontrol->value.integer.value[1] = RT5639_VOL_RSCL_MAX -
- (val & RT5639_R_VOL_MASK);
-
- return 0;
-}
-
-static int rt5639_vol_rescale_put(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct soc_mixer_control *mc =
- (struct soc_mixer_control *)kcontrol->private_value;
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- unsigned int val, val2;
-
- val = RT5639_VOL_RSCL_MAX - ucontrol->value.integer.value[0];
- val2 = RT5639_VOL_RSCL_MAX - ucontrol->value.integer.value[1];
- return snd_soc_update_bits_locked(codec, mc->reg, RT5639_L_VOL_MASK |
- RT5639_R_VOL_MASK, val << mc->shift | val2);
-}
-
-
-static const struct snd_kcontrol_new rt5639_snd_controls[] = {
- /* Speaker Output Volume */
- SOC_DOUBLE("Speaker Playback Switch", RT5639_SPK_VOL,
- RT5639_L_MUTE_SFT, RT5639_R_MUTE_SFT, 1, 1),
- SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5639_SPK_VOL,
- RT5639_L_VOL_SFT, RT5639_R_VOL_SFT, RT5639_VOL_RSCL_RANGE, 0,
- rt5639_vol_rescale_get, rt5639_vol_rescale_put, out_vol_tlv),
- /* Headphone Output Volume */
- SOC_DOUBLE("HP Playback Switch", RT5639_HP_VOL,
- RT5639_L_MUTE_SFT, RT5639_R_MUTE_SFT, 1, 1),
- SOC_DOUBLE_EXT_TLV("HP Playback Volume", RT5639_HP_VOL,
- RT5639_L_VOL_SFT, RT5639_R_VOL_SFT, RT5639_VOL_RSCL_RANGE, 0,
- rt5639_vol_rescale_get, rt5639_vol_rescale_put, out_vol_tlv),
- /* OUTPUT Control */
- SOC_DOUBLE("OUT Playback Switch", RT5639_OUTPUT,
- RT5639_L_MUTE_SFT, RT5639_R_MUTE_SFT, 1, 1),
- SOC_DOUBLE("OUT Channel Switch", RT5639_OUTPUT,
- RT5639_VOL_L_SFT, RT5639_VOL_R_SFT, 1, 1),
- SOC_DOUBLE_TLV("OUT Playback Volume", RT5639_OUTPUT,
- RT5639_L_VOL_SFT, RT5639_R_VOL_SFT, 39, 1, out_vol_tlv),
- /* MONO Output Control */
- SOC_SINGLE("Mono Playback Switch", RT5639_MONO_OUT,
- RT5639_L_MUTE_SFT, 1, 1),
- /* DAC Digital Volume */
- SOC_DOUBLE("DAC2 Playback Switch", RT5639_DAC2_CTRL,
- RT5639_M_DAC_L2_VOL_SFT, RT5639_M_DAC_R2_VOL_SFT, 1, 1),
- SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5639_DAC1_DIG_VOL,
- RT5639_L_VOL_SFT, RT5639_R_VOL_SFT,
- 175, 0, dac_vol_tlv),
- SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5639_DAC2_DIG_VOL,
- RT5639_L_VOL_SFT, RT5639_R_VOL_SFT,
- 175, 0, dac_vol_tlv),
- /* IN1/IN2 Control */
- SOC_ENUM("IN1 Mode Control", rt5639_in1_mode_enum),
- SOC_SINGLE_TLV("IN1 Boost", RT5639_IN1_IN2,
- RT5639_BST_SFT1, 8, 0, bst_tlv),
- SOC_ENUM("IN2 Mode Control", rt5639_in2_mode_enum),
- SOC_SINGLE_TLV("IN2 Boost", RT5639_IN3_IN4,
- RT5639_BST_SFT2, 8, 0, bst_tlv),
- /* INL/INR Volume Control */
- SOC_DOUBLE_TLV("IN Capture Volume", RT5639_INL_INR_VOL,
- RT5639_INL_VOL_SFT, RT5639_INR_VOL_SFT,
- 31, 1, in_vol_tlv),
- /* ADC Digital Volume Control */
- SOC_DOUBLE("ADC Capture Switch", RT5639_ADC_DIG_VOL,
- RT5639_L_MUTE_SFT, RT5639_R_MUTE_SFT, 1, 1),
- SOC_DOUBLE_TLV("ADC Capture Volume", RT5639_ADC_DIG_VOL,
- RT5639_L_VOL_SFT, RT5639_R_VOL_SFT,
- 127, 0, adc_vol_tlv),
- SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5639_ADC_DATA,
- RT5639_L_VOL_SFT, RT5639_R_VOL_SFT,
- 127, 0, adc_vol_tlv),
- /* ADC Boost Volume Control */
- SOC_DOUBLE_TLV("ADC Boost Gain", RT5639_ADC_BST_VOL,
- RT5639_ADC_L_BST_SFT, RT5639_ADC_R_BST_SFT,
- 3, 0, adc_bst_tlv),
- /* Class D speaker gain ratio */
- SOC_ENUM("Class D SPK Ratio Control", rt5639_clsd_spk_ratio_enum),
- /* DMIC */
- SOC_ENUM_EXT("DMIC Switch", rt5639_dmic_enum,
- rt5639_dmic_get, rt5639_dmic_put),
-
- SOC_ENUM("ADC IF1 Data Switch", rt5639_if1_adc_enum),
- SOC_ENUM("DAC IF1 Data Switch", rt5639_if1_dac_enum),
- SOC_ENUM("ADC IF2 Data Switch", rt5639_if2_adc_enum),
- SOC_ENUM("DAC IF2 Data Switch", rt5639_if2_dac_enum),
-#ifdef RT5639_REG_RW
- {
- .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
- .name = "Register Control",
- .info = rt5639_regctl_info,
- .get = rt5639_regctl_get,
- .put = rt5639_regctl_put,
- },
-#endif
-};
-
-/**
- * set_dmic_clk - Set parameter of dmic.
- *
- * @w: DAPM widget.
- * @kcontrol: The kcontrol of this widget.
- * @event: Event id.
- *
- * Choose dmic clock between 1MHz and 3MHz.
- * It is better for clock to approximate 3MHz.
- */
-static int set_dmic_clk(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
- struct rt5639_priv *rt5639 = snd_soc_codec_get_drvdata(codec);
- int div[] = {2, 3, 4, 6, 12}, idx = -EINVAL, i, rate, red, bound, temp;
-
- rate = rt5639->lrck[rt5639->aif_pu] << 8;
- red = 3000000 * 12;
- for (i = 0; i < ARRAY_SIZE(div); i++) {
- bound = div[i] * 3000000;
- if (rate > bound)
- continue;
- temp = bound - rate;
- if (temp < red) {
- red = temp;
- idx = i;
- }
- }
- if (idx < 0)
- dev_err(codec->dev, "Failed to set DMIC clock\n");
- else
- snd_soc_update_bits(codec, RT5639_DMIC, RT5639_DMIC_CLK_MASK,
- idx << RT5639_DMIC_CLK_SFT);
- return idx;
-}
-
-static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
- struct snd_soc_dapm_widget *sink)
-{
- unsigned int val;
-
- val = snd_soc_read(source->codec, RT5639_GLB_CLK);
- val &= RT5639_SCLK_SRC_MASK;
- if (val == RT5639_SCLK_SRC_PLL1)
- return 1;
- else
- return 0;
-}
-
-/* Digital Mixer */
-static const struct snd_kcontrol_new rt5639_sto_adc_l_mix[] = {
- SOC_DAPM_SINGLE("ADC1 Switch", RT5639_STO_ADC_MIXER,
- RT5639_M_ADC_L1_SFT, 1, 1),
- SOC_DAPM_SINGLE("ADC2 Switch", RT5639_STO_ADC_MIXER,
- RT5639_M_ADC_L2_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_sto_adc_r_mix[] = {
- SOC_DAPM_SINGLE("ADC1 Switch", RT5639_STO_ADC_MIXER,
- RT5639_M_ADC_R1_SFT, 1, 1),
- SOC_DAPM_SINGLE("ADC2 Switch", RT5639_STO_ADC_MIXER,
- RT5639_M_ADC_R2_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_mono_adc_l_mix[] = {
- SOC_DAPM_SINGLE("ADC1 Switch", RT5639_MONO_ADC_MIXER,
- RT5639_M_MONO_ADC_L1_SFT, 1, 1),
- SOC_DAPM_SINGLE("ADC2 Switch", RT5639_MONO_ADC_MIXER,
- RT5639_M_MONO_ADC_L2_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_mono_adc_r_mix[] = {
- SOC_DAPM_SINGLE("ADC1 Switch", RT5639_MONO_ADC_MIXER,
- RT5639_M_MONO_ADC_R1_SFT, 1, 1),
- SOC_DAPM_SINGLE("ADC2 Switch", RT5639_MONO_ADC_MIXER,
- RT5639_M_MONO_ADC_R2_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_dac_l_mix[] = {
- SOC_DAPM_SINGLE("Stereo ADC Switch", RT5639_AD_DA_MIXER,
- RT5639_M_ADCMIX_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("INF1 Switch", RT5639_AD_DA_MIXER,
- RT5639_M_IF1_DAC_L_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_dac_r_mix[] = {
- SOC_DAPM_SINGLE("Stereo ADC Switch", RT5639_AD_DA_MIXER,
- RT5639_M_ADCMIX_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("INF1 Switch", RT5639_AD_DA_MIXER,
- RT5639_M_IF1_DAC_R_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_sto_dac_l_mix[] = {
- SOC_DAPM_SINGLE("DAC L1 Switch", RT5639_STO_DAC_MIXER,
- RT5639_M_DAC_L1_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC L2 Switch", RT5639_STO_DAC_MIXER,
- RT5639_M_DAC_L2_SFT, 1, 1),
- SOC_DAPM_SINGLE("ANC Switch", RT5639_STO_DAC_MIXER,
- RT5639_M_ANC_DAC_L_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_sto_dac_r_mix[] = {
- SOC_DAPM_SINGLE("DAC R1 Switch", RT5639_STO_DAC_MIXER,
- RT5639_M_DAC_R1_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC R2 Switch", RT5639_STO_DAC_MIXER,
- RT5639_M_DAC_R2_SFT, 1, 1),
- SOC_DAPM_SINGLE("ANC Switch", RT5639_STO_DAC_MIXER,
- RT5639_M_ANC_DAC_R_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_mono_dac_l_mix[] = {
- SOC_DAPM_SINGLE("DAC L1 Switch", RT5639_MONO_DAC_MIXER,
- RT5639_M_DAC_L1_MONO_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC L2 Switch", RT5639_MONO_DAC_MIXER,
- RT5639_M_DAC_L2_MONO_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC R2 Switch", RT5639_MONO_DAC_MIXER,
- RT5639_M_DAC_R2_MONO_L_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_mono_dac_r_mix[] = {
- SOC_DAPM_SINGLE("DAC R1 Switch", RT5639_MONO_DAC_MIXER,
- RT5639_M_DAC_R1_MONO_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC R2 Switch", RT5639_MONO_DAC_MIXER,
- RT5639_M_DAC_R2_MONO_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC L2 Switch", RT5639_MONO_DAC_MIXER,
- RT5639_M_DAC_L2_MONO_R_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_dig_l_mix[] = {
- SOC_DAPM_SINGLE("DAC L1 Switch", RT5639_DIG_MIXER,
- RT5639_M_STO_L_DAC_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC L2 Switch", RT5639_DIG_MIXER,
- RT5639_M_DAC_L2_DAC_L_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_dig_r_mix[] = {
- SOC_DAPM_SINGLE("DAC R1 Switch", RT5639_DIG_MIXER,
- RT5639_M_STO_R_DAC_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC R2 Switch", RT5639_DIG_MIXER,
- RT5639_M_DAC_R2_DAC_R_SFT, 1, 1),
-};
-
-/* Analog Input Mixer */
-static const struct snd_kcontrol_new rt5639_rec_l_mix[] = {
- SOC_DAPM_SINGLE("HPOL Switch", RT5639_REC_L2_MIXER,
- RT5639_M_HP_L_RM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("INL Switch", RT5639_REC_L2_MIXER,
- RT5639_M_IN_L_RM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST3 Switch", RT5639_REC_L2_MIXER,
- RT5639_M_BST2_RM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST2 Switch", RT5639_REC_L2_MIXER,
- RT5639_M_BST4_RM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST1 Switch", RT5639_REC_L2_MIXER,
- RT5639_M_BST1_RM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("OUT MIXL Switch", RT5639_REC_L2_MIXER,
- RT5639_M_OM_L_RM_L_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_rec_r_mix[] = {
- SOC_DAPM_SINGLE("HPOR Switch", RT5639_REC_R2_MIXER,
- RT5639_M_HP_R_RM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("INR Switch", RT5639_REC_R2_MIXER,
- RT5639_M_IN_R_RM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST3 Switch", RT5639_REC_R2_MIXER,
- RT5639_M_BST2_RM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST2 Switch", RT5639_REC_R2_MIXER,
- RT5639_M_BST4_RM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST1 Switch", RT5639_REC_R2_MIXER,
- RT5639_M_BST1_RM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("OUT MIXR Switch", RT5639_REC_R2_MIXER,
- RT5639_M_OM_R_RM_R_SFT, 1, 1),
-};
-
-/* Analog Output Mixer */
-static const struct snd_kcontrol_new rt5639_spk_l_mix[] = {
- SOC_DAPM_SINGLE("REC MIXL Switch", RT5639_SPK_L_MIXER,
- RT5639_M_RM_L_SM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("INL Switch", RT5639_SPK_L_MIXER,
- RT5639_M_IN_L_SM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC L1 Switch", RT5639_SPK_L_MIXER,
- RT5639_M_DAC_L1_SM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("OUT MIXL Switch", RT5639_SPK_L_MIXER,
- RT5639_M_OM_L_SM_L_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_spk_r_mix[] = {
- SOC_DAPM_SINGLE("REC MIXR Switch", RT5639_SPK_R_MIXER,
- RT5639_M_RM_R_SM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("INR Switch", RT5639_SPK_R_MIXER,
- RT5639_M_IN_R_SM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC R1 Switch", RT5639_SPK_R_MIXER,
- RT5639_M_DAC_R1_SM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("OUT MIXR Switch", RT5639_SPK_R_MIXER,
- RT5639_M_OM_R_SM_R_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_out_l_mix[] = {
- SOC_DAPM_SINGLE("SPK MIXL Switch", RT5639_OUT_L3_MIXER,
- RT5639_M_SM_L_OM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST3 Switch", RT5639_OUT_L3_MIXER,
- RT5639_M_BST2_OM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST1 Switch", RT5639_OUT_L3_MIXER,
- RT5639_M_BST1_OM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("INL Switch", RT5639_OUT_L3_MIXER,
- RT5639_M_IN_L_OM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("REC MIXL Switch", RT5639_OUT_L3_MIXER,
- RT5639_M_RM_L_OM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC L1 Switch", RT5639_OUT_L3_MIXER,
- RT5639_M_DAC_L1_OM_L_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_out_r_mix[] = {
- SOC_DAPM_SINGLE("SPK MIXR Switch", RT5639_OUT_R3_MIXER,
- RT5639_M_SM_L_OM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST3 Switch", RT5639_OUT_R3_MIXER,
- RT5639_M_BST2_OM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST2 Switch", RT5639_OUT_R3_MIXER,
- RT5639_M_BST4_OM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST1 Switch", RT5639_OUT_R3_MIXER,
- RT5639_M_BST1_OM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("INR Switch", RT5639_OUT_R3_MIXER,
- RT5639_M_IN_R_OM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("REC MIXR Switch", RT5639_OUT_R3_MIXER,
- RT5639_M_RM_R_OM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC R1 Switch", RT5639_OUT_R3_MIXER,
- RT5639_M_DAC_R1_OM_R_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_spo_l_mix[] = {
- SOC_DAPM_SINGLE("DAC R1 Switch", RT5639_SPO_L_MIXER,
- RT5639_M_DAC_R1_SPM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC L1 Switch", RT5639_SPO_L_MIXER,
- RT5639_M_DAC_L1_SPM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("SPKVOL R Switch", RT5639_SPO_L_MIXER,
- RT5639_M_SV_R_SPM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("SPKVOL L Switch", RT5639_SPO_L_MIXER,
- RT5639_M_SV_L_SPM_L_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST1 Switch", RT5639_SPO_L_MIXER,
- RT5639_M_BST1_SPM_L_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_spo_r_mix[] = {
- SOC_DAPM_SINGLE("DAC R1 Switch", RT5639_SPO_R_MIXER,
- RT5639_M_DAC_R1_SPM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("SPKVOL R Switch", RT5639_SPO_R_MIXER,
- RT5639_M_SV_R_SPM_R_SFT, 1, 1),
- SOC_DAPM_SINGLE("BST1 Switch", RT5639_SPO_R_MIXER,
- RT5639_M_BST1_SPM_R_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_hpo_mix[] = {
- SOC_DAPM_SINGLE("DAC1 Switch", RT5639_HPO_MIXER,
- RT5639_M_DAC1_HM_SFT, 1, 1),
- SOC_DAPM_SINGLE("HPVOL Switch", RT5639_HPO_MIXER,
- RT5639_M_HPVOL_HM_SFT, 1, 1),
-};
-
-static const struct snd_kcontrol_new rt5639_lout_mix[] = {
- SOC_DAPM_SINGLE("DAC L1 Switch", RT5639_LOUT_MIXER,
- RT5639_M_DAC_L1_LM_SFT, 1, 1),
- SOC_DAPM_SINGLE("DAC R1 Switch", RT5639_LOUT_MIXER,
- RT5639_M_DAC_R1_LM_SFT, 1, 1),
- SOC_DAPM_SINGLE("OUTVOL L Switch", RT5639_LOUT_MIXER,
- RT5639_M_OV_L_LM_SFT, 1, 1),
- SOC_DAPM_SINGLE("OUTVOL R Switch", RT5639_LOUT_MIXER,
- RT5639_M_OV_R_LM_SFT, 1, 1),
-};
-
-
-/* INL/R source */
-static const char *rt5639_inl_src[] = {"IN2P", "MonoP"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_inl_enum, RT5639_INL_INR_VOL,
- RT5639_INL_SEL_SFT, rt5639_inl_src);
-
-static const struct snd_kcontrol_new rt5639_inl_mux =
- SOC_DAPM_ENUM("INL source", rt5639_inl_enum);
-
-static const char *rt5639_inr_src[] = {"IN2N", "MonoN"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_inr_enum, RT5639_INL_INR_VOL,
- RT5639_INR_SEL_SFT, rt5639_inr_src);
-
-static const struct snd_kcontrol_new rt5639_inr_mux =
- SOC_DAPM_ENUM("INR source", rt5639_inr_enum);
-
-/* Stereo ADC source */
-static const char *rt5639_stereo_adc1_src[] = {"DIG MIX", "ADC"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_stereo_adc1_enum, RT5639_STO_ADC_MIXER,
- RT5639_ADC_1_SRC_SFT, rt5639_stereo_adc1_src);
-
-static const struct snd_kcontrol_new rt5639_sto_adc_l1_mux =
- SOC_DAPM_ENUM("Stereo ADC L1 source", rt5639_stereo_adc1_enum);
-
-static const struct snd_kcontrol_new rt5639_sto_adc_r1_mux =
- SOC_DAPM_ENUM("Stereo ADC R1 source", rt5639_stereo_adc1_enum);
-
-static const char *rt5639_stereo_adc2_src[] = {"DMIC1", "DMIC2", "DIG MIX"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_stereo_adc2_enum, RT5639_STO_ADC_MIXER,
- RT5639_ADC_2_SRC_SFT, rt5639_stereo_adc2_src);
-
-static const struct snd_kcontrol_new rt5639_sto_adc_l2_mux =
- SOC_DAPM_ENUM("Stereo ADC L2 source", rt5639_stereo_adc2_enum);
-
-static const struct snd_kcontrol_new rt5639_sto_adc_r2_mux =
- SOC_DAPM_ENUM("Stereo ADC R2 source", rt5639_stereo_adc2_enum);
-
-/* Mono ADC source */
-static const char *rt5639_mono_adc_l1_src[] = {"Mono DAC MIXL", "ADCL"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_mono_adc_l1_enum, RT5639_MONO_ADC_MIXER,
- RT5639_MONO_ADC_L1_SRC_SFT, rt5639_mono_adc_l1_src);
-
-static const struct snd_kcontrol_new rt5639_mono_adc_l1_mux =
- SOC_DAPM_ENUM("Mono ADC1 left source", rt5639_mono_adc_l1_enum);
-
-static const char *rt5639_mono_adc_l2_src[] =
- {"DMIC L1", "DMIC L2", "Mono DAC MIXL"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_mono_adc_l2_enum, RT5639_MONO_ADC_MIXER,
- RT5639_MONO_ADC_L2_SRC_SFT, rt5639_mono_adc_l2_src);
-
-static const struct snd_kcontrol_new rt5639_mono_adc_l2_mux =
- SOC_DAPM_ENUM("Mono ADC2 left source", rt5639_mono_adc_l2_enum);
-
-static const char *rt5639_mono_adc_r1_src[] = {"Mono DAC MIXR", "ADCR"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_mono_adc_r1_enum, RT5639_MONO_ADC_MIXER,
- RT5639_MONO_ADC_R1_SRC_SFT, rt5639_mono_adc_r1_src);
-
-static const struct snd_kcontrol_new rt5639_mono_adc_r1_mux =
- SOC_DAPM_ENUM("Mono ADC1 right source", rt5639_mono_adc_r1_enum);
-
-static const char *rt5639_mono_adc_r2_src[] =
- {"DMIC R1", "DMIC R2", "Mono DAC MIXR"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_mono_adc_r2_enum, RT5639_MONO_ADC_MIXER,
- RT5639_MONO_ADC_R2_SRC_SFT, rt5639_mono_adc_r2_src);
-
-static const struct snd_kcontrol_new rt5639_mono_adc_r2_mux =
- SOC_DAPM_ENUM("Mono ADC2 right source", rt5639_mono_adc_r2_enum);
-
-/* DAC2 channel source */
-static const char *rt5639_dac_l2_src[] = {"IF2", "IF3", "TxDC", "Base L/R"};
-
-static const SOC_ENUM_SINGLE_DECL(rt5639_dac_l2_enum, RT5639_DSP_PATH2,
- RT5639_DAC_L2_SEL_SFT, rt5639_dac_l2_src);
-
-static const struct snd_kcontrol_new rt5639_dac_l2_mux =
- SOC_DAPM_ENUM("DAC2 left channel source", rt5639_dac_l2_enum);
-
-static const char *rt5639_dac_r2_src[] = {"IF2", "IF3", "TxDC"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_dac_r2_enum, RT5639_DSP_PATH2,
- RT5639_DAC_R2_SEL_SFT, rt5639_dac_r2_src);
-
-static const struct snd_kcontrol_new rt5639_dac_r2_mux =
- SOC_DAPM_ENUM("DAC2 right channel source", rt5639_dac_r2_enum);
-
-/* Interface 2 ADC channel source */
-static const char *rt5639_if2_adc_l_src[] = {"TxDP", "Mono ADC MIXL"};
-
-static const SOC_ENUM_SINGLE_DECL(rt5639_if2_adc_l_enum, RT5639_DSP_PATH2,
- RT5639_IF2_ADC_L_SEL_SFT, rt5639_if2_adc_l_src);
-
-static const struct snd_kcontrol_new rt5639_if2_adc_l_mux =
- SOC_DAPM_ENUM("IF2 ADC left channel source", rt5639_if2_adc_l_enum);
-
-static const char *rt5639_if2_adc_r_src[] = {"TxDP", "Mono ADC MIXR"};
-
-static const SOC_ENUM_SINGLE_DECL(rt5639_if2_adc_r_enum, RT5639_DSP_PATH2,
- RT5639_IF2_ADC_R_SEL_SFT, rt5639_if2_adc_r_src);
-
-static const struct snd_kcontrol_new rt5639_if2_adc_r_mux =
- SOC_DAPM_ENUM("IF2 ADC right channel source", rt5639_if2_adc_r_enum);
-
-/* digital interface and iis interface map */
-static const char *rt5639_dai_iis_map[] = {"1:1|2:2|3:3", "1:1|2:3|3:2",
- "1:3|2:1|3:2", "1:3|2:2|3:1", "1:2|2:3|3:1",
- "1:2|2:1|3:3", "1:1|2:1|3:3", "1:2|2:2|3:3"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_dai_iis_map_enum, RT5639_I2S1_SDP,
- RT5639_I2S_IF_SFT, rt5639_dai_iis_map);
-
-static const struct snd_kcontrol_new rt5639_dai_mux =
- SOC_DAPM_ENUM("DAI select", rt5639_dai_iis_map_enum);
-
-/* SDI select */
-static const char *rt5639_sdi_sel[] = {"IF1", "IF2"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5639_sdi_sel_enum, RT5639_I2S2_SDP,
- RT5639_I2S2_SDI_SFT, rt5639_sdi_sel);
-
-static const struct snd_kcontrol_new rt5639_sdi_mux =
- SOC_DAPM_ENUM("SDI select", rt5639_sdi_sel_enum);
-
-static int rt5639_adc_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
- unsigned int val, mask;
-
- switch (event) {
- case SND_SOC_DAPM_POST_PMU:
- rt5639_index_update_bits(codec,
- RT5639_CHOP_DAC_ADC, 0x1000, 0x1000);
- break;
-
- case SND_SOC_DAPM_POST_PMD:
- rt5639_index_update_bits(codec,
- RT5639_CHOP_DAC_ADC, 0x1000, 0x0000);
- break;
-
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int rt5639_mono_adcl_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
- unsigned int val, mask;
-
- switch (event) {
- case SND_SOC_DAPM_POST_PMU:
- snd_soc_update_bits(codec, RT5639_GEN_CTRL1,
- RT5639_M_MAMIX_L, 0);
- break;
- case SND_SOC_DAPM_PRE_PMD:
- snd_soc_update_bits(codec, RT5639_GEN_CTRL1,
- RT5639_M_MAMIX_L,
- RT5639_M_MAMIX_L);
- break;
-
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int rt5639_mono_adcr_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
- unsigned int val, mask;
-
- switch (event) {
- case SND_SOC_DAPM_POST_PMU:
- snd_soc_update_bits(codec, RT5639_GEN_CTRL1,
- RT5639_M_MAMIX_R, 0);
- break;
- case SND_SOC_DAPM_PRE_PMD:
- snd_soc_update_bits(codec, RT5639_GEN_CTRL1,
- RT5639_M_MAMIX_R,
- RT5639_M_MAMIX_R);
- break;
-
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int rt5639_spk_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
-
- switch (event) {
- case SND_SOC_DAPM_POST_PMU:
-#ifdef USE_EQ
- rt5639_update_eqmode(codec,SPK);
-#endif
- snd_soc_update_bits(codec, RT5639_PWR_DIG1,
- RT5639_PWR_CLS_D, RT5639_PWR_CLS_D);
- rt5639_index_update_bits(codec,
- RT5639_CLSD_INT_REG1, 0xf000, 0xf000);
- snd_soc_update_bits(codec, RT5639_SPK_VOL,
- RT5639_L_MUTE | RT5639_R_MUTE, 0);
- break;
-
- case SND_SOC_DAPM_PRE_PMD:
- snd_soc_update_bits(codec, RT5639_SPK_VOL,
- RT5639_L_MUTE | RT5639_R_MUTE,
- RT5639_L_MUTE | RT5639_R_MUTE);
- rt5639_index_update_bits(codec,
- RT5639_CLSD_INT_REG1, 0xf000, 0x0000);
- snd_soc_update_bits(codec, RT5639_PWR_DIG1,
- RT5639_PWR_CLS_D, 0);
- break;
-
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int rt5639_set_dmic1_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
- unsigned int val, mask;
-
- switch (event) {
- case SND_SOC_DAPM_PRE_PMU:
- snd_soc_update_bits(codec, RT5639_GPIO_CTRL1,
- RT5639_GP2_PIN_MASK | RT5639_GP3_PIN_MASK,
- RT5639_GP2_PIN_DMIC1_SCL | RT5639_GP3_PIN_DMIC1_SDA);
- snd_soc_update_bits(codec, RT5639_DMIC,
- RT5639_DMIC_1L_LH_MASK | RT5639_DMIC_1R_LH_MASK |
- RT5639_DMIC_1_DP_MASK,
- RT5639_DMIC_1L_LH_FALLING | RT5639_DMIC_1R_LH_RISING |
- RT5639_DMIC_1_DP_IN1P);
- snd_soc_update_bits(codec, RT5639_DMIC,
- RT5639_DMIC_1_EN_MASK, RT5639_DMIC_1_EN);
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int rt5639_set_dmic2_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
- unsigned int val, mask;
-
- switch (event) {
- case SND_SOC_DAPM_PRE_PMU:
- snd_soc_update_bits(codec, RT5639_GPIO_CTRL1,
- RT5639_GP2_PIN_MASK | RT5639_GP4_PIN_MASK,
- RT5639_GP2_PIN_DMIC1_SCL | RT5639_GP4_PIN_DMIC2_SDA);
- snd_soc_update_bits(codec, RT5639_DMIC,
- RT5639_DMIC_2L_LH_MASK | RT5639_DMIC_2R_LH_MASK |
- RT5639_DMIC_2_DP_MASK,
- RT5639_DMIC_2L_LH_FALLING | RT5639_DMIC_2R_LH_RISING |
- RT5639_DMIC_2_DP_IN1N);
- snd_soc_update_bits(codec, RT5639_DMIC,
- RT5639_DMIC_2_EN_MASK, RT5639_DMIC_2_EN);
- default:
- return 0;
- }
-
- return 0;
-}
-
-#if USE_ONEBIT_DEPOP
-void rt5639_hp_amp_power(struct snd_soc_codec *codec, int on)
-{
- static int hp_amp_power_count;
-// printk("one bit rt5639_hp_amp_power on=%d hp_amp_power_count=%d\n",on,hp_amp_power_count);
-
- if(on) {
- if(hp_amp_power_count <= 0) {
- /* depop parameters */
- rt5639_index_update_bits(codec, RT5639_CHPUMP_INT_REG1,0x0700, 0x0200);
- snd_soc_update_bits(codec, RT5639_DEPOP_M2,
- RT5639_DEPOP_MASK, RT5639_DEPOP_MAN);
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_HP_CP_MASK | RT5639_HP_SG_MASK | RT5639_HP_CB_MASK,
- RT5639_HP_CP_PU | RT5639_HP_SG_DIS | RT5639_HP_CB_PU);
- /* headphone amp power on */
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_FV1 | RT5639_PWR_FV2, 0);
- msleep(5);
-
- snd_soc_update_bits(codec, RT5639_PWR_VOL,
- RT5639_PWR_HV_L | RT5639_PWR_HV_R,
- RT5639_PWR_HV_L | RT5639_PWR_HV_R);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_HP_L | RT5639_PWR_HP_R | RT5639_PWR_HA,
- RT5639_PWR_HP_L | RT5639_PWR_HP_R | RT5639_PWR_HA);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_FV1 | RT5639_PWR_FV2 ,
- RT5639_PWR_FV1 | RT5639_PWR_FV2 );
- snd_soc_update_bits(codec, RT5639_DEPOP_M2,
- RT5639_DEPOP_MASK | RT5639_DIG_DP_MASK,
- RT5639_DEPOP_AUTO | RT5639_DIG_DP_EN);
- snd_soc_update_bits(codec, RT5639_CHARGE_PUMP,
- RT5639_PM_HP_MASK, RT5639_PM_HP_HV);
- snd_soc_update_bits(codec, RT5639_DEPOP_M3,
- RT5639_CP_FQ1_MASK | RT5639_CP_FQ2_MASK | RT5639_CP_FQ3_MASK,
- (RT5639_CP_FQ_192_KHZ << RT5639_CP_FQ1_SFT) |
- (RT5639_CP_FQ_24_KHZ << RT5639_CP_FQ2_SFT) |
- (RT5639_CP_FQ_192_KHZ << RT5639_CP_FQ3_SFT));
- rt5639_index_write(codec, RT5639_MAMP_INT_REG2, 0x1c00);
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_HP_CP_MASK | RT5639_HP_SG_MASK,
- RT5639_HP_CP_PD | RT5639_HP_SG_EN);
- rt5639_index_update_bits(codec, RT5639_CHPUMP_INT_REG1,0x0700, 0x0400);
- }
- hp_amp_power_count++;
- } else {
- hp_amp_power_count--;
- if(hp_amp_power_count <= 0) {
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_HP_CB_MASK, RT5639_HP_CB_PD);
- msleep(30);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_HP_L | RT5639_PWR_HP_R | RT5639_PWR_HA,
- 0);
- snd_soc_write(codec, RT5639_DEPOP_M2, 0x3100);
- }
- }
-}
-
-static void rt5639_pmu_depop(struct snd_soc_codec *codec)
-{
- rt5639_hp_amp_power(codec, 1);
- /* headphone unmute sequence */
- msleep(5);
- snd_soc_update_bits(codec, RT5639_HP_VOL,
- RT5639_L_MUTE | RT5639_R_MUTE, 0);
- msleep(65);
- //snd_soc_update_bits(codec, RT5639_HP_CALIB_AMP_DET,
- // RT5639_HPD_PS_MASK, RT5639_HPD_PS_EN);
-}
-
-static void rt5639_pmd_depop(struct snd_soc_codec *codec)
-{
- snd_soc_update_bits(codec, RT5639_DEPOP_M3,
- RT5639_CP_FQ1_MASK | RT5639_CP_FQ2_MASK | RT5639_CP_FQ3_MASK,
- (RT5639_CP_FQ_96_KHZ << RT5639_CP_FQ1_SFT) |
- (RT5639_CP_FQ_12_KHZ << RT5639_CP_FQ2_SFT) |
- (RT5639_CP_FQ_96_KHZ << RT5639_CP_FQ3_SFT));
- rt5639_index_write(codec, RT5639_MAMP_INT_REG2, 0x7c00);
- //snd_soc_update_bits(codec, RT5639_HP_CALIB_AMP_DET,
- // RT5639_HPD_PS_MASK, RT5639_HPD_PS_DIS);
- snd_soc_update_bits(codec, RT5639_HP_VOL,
- RT5639_L_MUTE | RT5639_R_MUTE,
- RT5639_L_MUTE | RT5639_R_MUTE);
- msleep(50);
- rt5639_hp_amp_power(codec, 0);
-
-}
-
-#else //seq
-void rt5639_hp_amp_power(struct snd_soc_codec *codec, int on)
-{
- static int hp_amp_power_count;
-// printk("rt5639_hp_amp_power on=%d hp_amp_power_count=%d\n",on,hp_amp_power_count);
-
- if(on) {
- if(hp_amp_power_count <= 0) {
- /* depop parameters */
- rt5639_index_update_bits(codec, RT5639_CHPUMP_INT_REG1,0x0700, 0x0200);
- snd_soc_update_bits(codec, RT5639_DEPOP_M2,
- RT5639_DEPOP_MASK, RT5639_DEPOP_MAN);
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_HP_CP_MASK | RT5639_HP_SG_MASK | RT5639_HP_CB_MASK,
- RT5639_HP_CP_PU | RT5639_HP_SG_DIS | RT5639_HP_CB_PU);
- /* headphone amp power on */
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_FV1 | RT5639_PWR_FV2 , 0);
- snd_soc_update_bits(codec, RT5639_PWR_VOL,
- RT5639_PWR_HV_L | RT5639_PWR_HV_R,
- RT5639_PWR_HV_L | RT5639_PWR_HV_R);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_HP_L | RT5639_PWR_HP_R | RT5639_PWR_HA,
- RT5639_PWR_HP_L | RT5639_PWR_HP_R | RT5639_PWR_HA);
- msleep(5);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_FV1 | RT5639_PWR_FV2,
- RT5639_PWR_FV1 | RT5639_PWR_FV2);
-
- snd_soc_update_bits(codec, RT5639_CHARGE_PUMP,
- RT5639_PM_HP_MASK, RT5639_PM_HP_HV);
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_HP_CO_MASK | RT5639_HP_SG_MASK,
- RT5639_HP_CO_EN | RT5639_HP_SG_EN);
- rt5639_index_update_bits(codec, RT5639_CHPUMP_INT_REG1,0x0700, 0x0400);
- }
- hp_amp_power_count++;
- } else {
- hp_amp_power_count--;
- if(hp_amp_power_count <= 0) {
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_HP_SG_MASK | RT5639_HP_L_SMT_MASK |
- RT5639_HP_R_SMT_MASK, RT5639_HP_SG_DIS |
- RT5639_HP_L_SMT_DIS | RT5639_HP_R_SMT_DIS);
- /* headphone amp power down */
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_SMT_TRIG_MASK | RT5639_HP_CD_PD_MASK |
- RT5639_HP_CO_MASK | RT5639_HP_CP_MASK |
- RT5639_HP_SG_MASK | RT5639_HP_CB_MASK,
- RT5639_SMT_TRIG_DIS | RT5639_HP_CD_PD_EN |
- RT5639_HP_CO_DIS | RT5639_HP_CP_PD |
- RT5639_HP_SG_EN | RT5639_HP_CB_PD);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_HP_L | RT5639_PWR_HP_R | RT5639_PWR_HA,
- 0);
- }
- }
-}
-
-static void rt5639_pmu_depop(struct snd_soc_codec *codec)
-{
- rt5639_hp_amp_power(codec, 1);
- /* headphone unmute sequence */
- snd_soc_update_bits(codec, RT5639_DEPOP_M3,
- RT5639_CP_FQ1_MASK | RT5639_CP_FQ2_MASK | RT5639_CP_FQ3_MASK,
- (RT5639_CP_FQ_192_KHZ << RT5639_CP_FQ1_SFT) |
- (RT5639_CP_FQ_12_KHZ << RT5639_CP_FQ2_SFT) |
- (RT5639_CP_FQ_192_KHZ << RT5639_CP_FQ3_SFT));
- rt5639_index_write(codec, RT5639_MAMP_INT_REG2, 0xfc00);
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_SMT_TRIG_MASK, RT5639_SMT_TRIG_EN);
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_RSTN_MASK, RT5639_RSTN_EN);
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_RSTN_MASK | RT5639_HP_L_SMT_MASK | RT5639_HP_R_SMT_MASK,
- RT5639_RSTN_DIS | RT5639_HP_L_SMT_EN | RT5639_HP_R_SMT_EN);
- snd_soc_update_bits(codec, RT5639_HP_VOL,
- RT5639_L_MUTE | RT5639_R_MUTE, 0);
- msleep(40);
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_HP_SG_MASK | RT5639_HP_L_SMT_MASK |
- RT5639_HP_R_SMT_MASK, RT5639_HP_SG_DIS |
- RT5639_HP_L_SMT_DIS | RT5639_HP_R_SMT_DIS);
-
-}
-
-static void rt5639_pmd_depop(struct snd_soc_codec *codec)
-{
- /* headphone mute sequence */
- snd_soc_update_bits(codec, RT5639_DEPOP_M3,
- RT5639_CP_FQ1_MASK | RT5639_CP_FQ2_MASK | RT5639_CP_FQ3_MASK,
- (RT5639_CP_FQ_96_KHZ << RT5639_CP_FQ1_SFT) |
- (RT5639_CP_FQ_12_KHZ << RT5639_CP_FQ2_SFT) |
- (RT5639_CP_FQ_96_KHZ << RT5639_CP_FQ3_SFT));
- rt5639_index_write(codec, RT5639_MAMP_INT_REG2, 0xfc00);
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_HP_SG_MASK, RT5639_HP_SG_EN);
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_RSTP_MASK, RT5639_RSTP_EN);
- snd_soc_update_bits(codec, RT5639_DEPOP_M1,
- RT5639_RSTP_MASK | RT5639_HP_L_SMT_MASK |
- RT5639_HP_R_SMT_MASK, RT5639_RSTP_DIS |
- RT5639_HP_L_SMT_EN | RT5639_HP_R_SMT_EN);
-
- snd_soc_update_bits(codec, RT5639_HP_VOL,
- RT5639_L_MUTE | RT5639_R_MUTE, RT5639_L_MUTE | RT5639_R_MUTE);
- msleep(30);
-
- rt5639_hp_amp_power(codec, 0);
-}
-#endif
-
-static int rt5639_hp_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
-
- switch (event) {
- case SND_SOC_DAPM_POST_PMU:
-#ifdef USE_EQ
- rt5639_update_eqmode(codec,HP);
-#endif
- rt5639_pmu_depop(codec);
- break;
-
- case SND_SOC_DAPM_PRE_PMD:
- rt5639_pmd_depop(codec);
- break;
-
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int rt5639_mono_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
-
- switch (event) {
- case SND_SOC_DAPM_POST_PMU:
- snd_soc_update_bits(codec, RT5639_MONO_OUT,
- RT5639_L_MUTE, 0);
- break;
-
- case SND_SOC_DAPM_PRE_PMD:
- snd_soc_update_bits(codec, RT5639_MONO_OUT,
- RT5639_L_MUTE, RT5639_L_MUTE);
- break;
-
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int rt5639_lout_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
-
- switch (event) {
- case SND_SOC_DAPM_POST_PMU:
- rt5639_hp_amp_power(codec,1);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_LM, RT5639_PWR_LM);
- snd_soc_update_bits(codec, RT5639_OUTPUT,
- RT5639_L_MUTE | RT5639_R_MUTE, 0);
- break;
-
- case SND_SOC_DAPM_PRE_PMD:
- snd_soc_update_bits(codec, RT5639_OUTPUT,
- RT5639_L_MUTE | RT5639_R_MUTE,
- RT5639_L_MUTE | RT5639_R_MUTE);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_LM, 0);
- rt5639_hp_amp_power(codec,0);
- break;
-
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int rt5639_index_sync_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
-
- switch (event) {
- case SND_SOC_DAPM_PRE_PMU:
- rt5639_index_write(codec, RT5639_MIXER_INT_REG, snd_soc_read(codec,RT5639_DUMMY_PR3F));
-
- break;
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int rt5639_dac1_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
-
- switch (event) {
- case SND_SOC_DAPM_PRE_PMD:
-#ifdef USE_EQ
- rt5639_update_eqmode(codec,NORMAL);
-#endif
- break;
- default:
- return 0;
- }
-
- return 0;
-}
-
-static const struct snd_soc_dapm_widget rt5639_dapm_widgets[] = {
- SND_SOC_DAPM_SUPPLY("PLL1", RT5639_PWR_ANLG2,
- RT5639_PWR_PLL_BIT, 0, NULL, 0),
- /* Input Side */
- /* micbias */
- SND_SOC_DAPM_SUPPLY("LDO2", RT5639_PWR_ANLG1,
- RT5639_PWR_LDO2_BIT, 0, NULL, 0),
- SND_SOC_DAPM_MICBIAS("micbias1", RT5639_PWR_ANLG2,
- RT5639_PWR_MB1_BIT, 0),
- SND_SOC_DAPM_MICBIAS("micbias2", RT5639_PWR_ANLG2,
- RT5639_PWR_MB2_BIT, 0),
- /* Input Lines */
- SND_SOC_DAPM_INPUT("DMIC1"),
- SND_SOC_DAPM_INPUT("DMIC2"),
-
- SND_SOC_DAPM_INPUT("IN1P"),
- SND_SOC_DAPM_INPUT("IN1N"),
- SND_SOC_DAPM_INPUT("IN2P"),
- SND_SOC_DAPM_INPUT("IN2N"),
- SND_SOC_DAPM_INPUT("IN3P"),
- SND_SOC_DAPM_INPUT("IN3N"),
- SND_SOC_DAPM_PGA_E("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0,
- rt5639_set_dmic1_event, SND_SOC_DAPM_PRE_PMU),
- SND_SOC_DAPM_PGA_E("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0,
- rt5639_set_dmic1_event, SND_SOC_DAPM_PRE_PMU),
- SND_SOC_DAPM_PGA_E("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0,
- rt5639_set_dmic2_event, SND_SOC_DAPM_PRE_PMU),
- SND_SOC_DAPM_PGA_E("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0,
- rt5639_set_dmic2_event, SND_SOC_DAPM_PRE_PMU),
- SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
- set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
- /* Boost */
- SND_SOC_DAPM_PGA("BST1", RT5639_PWR_ANLG2,
- RT5639_PWR_BST1_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("BST2", RT5639_PWR_ANLG2,
- RT5639_PWR_BST4_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("BST3", RT5639_PWR_ANLG2,
- RT5639_PWR_BST2_BIT, 0, NULL, 0),
-
- /* Input Volume */
- SND_SOC_DAPM_PGA("INL VOL", RT5639_PWR_VOL,
- RT5639_PWR_IN_L_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("INR VOL", RT5639_PWR_VOL,
- RT5639_PWR_IN_R_BIT, 0, NULL, 0),
- /* IN Mux */
- SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5639_inl_mux),
- SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5639_inr_mux),
- /* REC Mixer */
- SND_SOC_DAPM_MIXER("RECMIXL", RT5639_PWR_MIXER, RT5639_PWR_RM_L_BIT, 0,
- rt5639_rec_l_mix, ARRAY_SIZE(rt5639_rec_l_mix)),
- SND_SOC_DAPM_MIXER("RECMIXR", RT5639_PWR_MIXER, RT5639_PWR_RM_R_BIT, 0,
- rt5639_rec_r_mix, ARRAY_SIZE(rt5639_rec_r_mix)),
- /* ADCs */
- SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM,
- 0, 0),
- SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM,
- 0, 0),
-
- SND_SOC_DAPM_SUPPLY("ADC L power",RT5639_PWR_DIG1,
- RT5639_PWR_ADC_L_BIT, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("ADC R power",RT5639_PWR_DIG1,
- RT5639_PWR_ADC_R_BIT, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("ADC clock",SND_SOC_NOPM, 0, 0,
- rt5639_adc_event, SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
- /* ADC Mux */
- SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_sto_adc_l2_mux),
- SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_sto_adc_r2_mux),
- SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_sto_adc_l1_mux),
- SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_sto_adc_r1_mux),
- SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_mono_adc_l2_mux),
- SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_mono_adc_l1_mux),
- SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_mono_adc_r1_mux),
- SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_mono_adc_r2_mux),
- /* ADC Mixer */
- SND_SOC_DAPM_SUPPLY("stereo filter", RT5639_PWR_DIG2,
- RT5639_PWR_ADC_SF_BIT, 0, NULL, 0),
- SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
- rt5639_sto_adc_l_mix, ARRAY_SIZE(rt5639_sto_adc_l_mix)),
- SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
- rt5639_sto_adc_r_mix, ARRAY_SIZE(rt5639_sto_adc_r_mix)),
- SND_SOC_DAPM_SUPPLY("mono left filter", RT5639_PWR_DIG2,
- RT5639_PWR_ADC_MF_L_BIT, 0, NULL, 0),
- SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
- rt5639_mono_adc_l_mix, ARRAY_SIZE(rt5639_mono_adc_l_mix),
- rt5639_mono_adcl_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
- SND_SOC_DAPM_SUPPLY("mono right filter", RT5639_PWR_DIG2,
- RT5639_PWR_ADC_MF_R_BIT, 0, NULL, 0),
- SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
- rt5639_mono_adc_r_mix, ARRAY_SIZE(rt5639_mono_adc_r_mix),
- rt5639_mono_adcr_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
-
- /* IF2 Mux */
- SND_SOC_DAPM_MUX("IF2 ADC L Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_if2_adc_l_mux),
- SND_SOC_DAPM_MUX("IF2 ADC R Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_if2_adc_r_mux),
-
- /* Digital Interface */
- SND_SOC_DAPM_SUPPLY("I2S1", RT5639_PWR_DIG1,
- RT5639_PWR_I2S1_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("I2S2", RT5639_PWR_DIG1,
- RT5639_PWR_I2S2_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_SUPPLY("I2S3", RT5639_PWR_DIG1,
- RT5639_PWR_I2S3_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF3 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF3 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF3 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF3 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF3 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("IF3 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
-
- /* Digital Interface Select */
- SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5639_dai_mux),
- SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5639_dai_mux),
- SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5639_dai_mux),
- SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5639_dai_mux),
- SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5639_sdi_mux),
-
- SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5639_dai_mux),
- SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5639_dai_mux),
- SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5639_dai_mux),
- SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5639_dai_mux),
- SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5639_sdi_mux),
-
- SND_SOC_DAPM_MUX("DAI3 RX Mux", SND_SOC_NOPM, 0, 0, &rt5639_dai_mux),
- SND_SOC_DAPM_MUX("DAI3 TX Mux", SND_SOC_NOPM, 0, 0, &rt5639_dai_mux),
-
- /* Audio Interface */
- SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
- SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
- SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
- SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
- SND_SOC_DAPM_AIF_IN("AIF3RX", "AIF3 Playback", 0, SND_SOC_NOPM, 0, 0),
- SND_SOC_DAPM_AIF_OUT("AIF3TX", "AIF3 Capture", 0, SND_SOC_NOPM, 0, 0),
-
- /* Audio DSP */
- SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
-
- /* ANC */
- SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
-
- /* Output Side */
- /* DAC mixer before sound effect */
- SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
- rt5639_dac_l_mix, ARRAY_SIZE(rt5639_dac_l_mix)),
- SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
- rt5639_dac_r_mix, ARRAY_SIZE(rt5639_dac_r_mix)),
-
- /* DAC2 channel Mux */
- SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_dac_l2_mux),
- SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_dac_r2_mux),
- SND_SOC_DAPM_PGA("DAC L2 Volume", RT5639_PWR_DIG1,
- RT5639_PWR_DAC_L2_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("DAC R2 Volume", RT5639_PWR_DIG1,
- RT5639_PWR_DAC_R2_BIT, 0, NULL, 0),
-
- /* DAC Mixer */
- SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
- rt5639_sto_dac_l_mix, ARRAY_SIZE(rt5639_sto_dac_l_mix)),
- SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
- rt5639_sto_dac_r_mix, ARRAY_SIZE(rt5639_sto_dac_r_mix)),
- SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
- rt5639_mono_dac_l_mix, ARRAY_SIZE(rt5639_mono_dac_l_mix)),
- SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
- rt5639_mono_dac_r_mix, ARRAY_SIZE(rt5639_mono_dac_r_mix)),
- SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
- rt5639_dig_l_mix, ARRAY_SIZE(rt5639_dig_l_mix)),
- SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
- rt5639_dig_r_mix, ARRAY_SIZE(rt5639_dig_r_mix)),
- SND_SOC_DAPM_MUX_E("Mono dacr Mux", SND_SOC_NOPM, 0, 0,
- &rt5639_dacr2_mux, rt5639_index_sync_event, SND_SOC_DAPM_PRE_PMU),
-
- /* DACs */
- SND_SOC_DAPM_DAC_E("DAC L1", NULL, RT5639_PWR_DIG1,
- RT5639_PWR_DAC_L1_BIT, 0, rt5639_dac1_event,
- SND_SOC_DAPM_PRE_PMD),
- SND_SOC_DAPM_DAC_E("DAC R1", NULL, RT5639_PWR_DIG1,
- RT5639_PWR_DAC_R1_BIT, 0, rt5639_dac1_event,
- SND_SOC_DAPM_PRE_PMD),
-
- /* SPK/OUT Mixer */
- SND_SOC_DAPM_MIXER("SPK MIXL", RT5639_PWR_MIXER, RT5639_PWR_SM_L_BIT,
- 0, rt5639_spk_l_mix, ARRAY_SIZE(rt5639_spk_l_mix)),
- SND_SOC_DAPM_MIXER("SPK MIXR", RT5639_PWR_MIXER, RT5639_PWR_SM_R_BIT,
- 0, rt5639_spk_r_mix, ARRAY_SIZE(rt5639_spk_r_mix)),
- SND_SOC_DAPM_MIXER("OUT MIXL", RT5639_PWR_MIXER, RT5639_PWR_OM_L_BIT,
- 0, rt5639_out_l_mix, ARRAY_SIZE(rt5639_out_l_mix)),
- SND_SOC_DAPM_MIXER("OUT MIXR", RT5639_PWR_MIXER, RT5639_PWR_OM_R_BIT,
- 0, rt5639_out_r_mix, ARRAY_SIZE(rt5639_out_r_mix)),
- /* Ouput Volume */
- SND_SOC_DAPM_PGA("SPKVOL L", RT5639_PWR_VOL,
- RT5639_PWR_SV_L_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("SPKVOL R", RT5639_PWR_VOL,
- RT5639_PWR_SV_R_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("OUTVOL L", RT5639_PWR_VOL,
- RT5639_PWR_OV_L_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("OUTVOL R", RT5639_PWR_VOL,
- RT5639_PWR_OV_R_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("HPOVOL L", RT5639_PWR_VOL,
- RT5639_PWR_HV_L_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("HPOVOL R", RT5639_PWR_VOL,
- RT5639_PWR_HV_R_BIT, 0, NULL, 0),
- SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM,
- 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM,
- 0, 0, NULL, 0),
- /* SPO/HPO/LOUT/Mono Mixer */
- SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
- 0, rt5639_spo_l_mix, ARRAY_SIZE(rt5639_spo_l_mix)),
- SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
- 0, rt5639_spo_r_mix, ARRAY_SIZE(rt5639_spo_r_mix)),
- SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0,
- rt5639_hpo_mix, ARRAY_SIZE(rt5639_hpo_mix)),
- SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0,
- rt5639_lout_mix, ARRAY_SIZE(rt5639_lout_mix)),
-
- SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0,
- rt5639_hp_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
- SND_SOC_DAPM_PGA_S("SPK amp", 1, SND_SOC_NOPM, 0, 0,
- rt5639_spk_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
- SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0,
- rt5639_lout_event, SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
-
- /* Output Lines */
- SND_SOC_DAPM_OUTPUT("SPOLP"),
- SND_SOC_DAPM_OUTPUT("SPOLN"),
- SND_SOC_DAPM_OUTPUT("SPORP"),
- SND_SOC_DAPM_OUTPUT("SPORN"),
- SND_SOC_DAPM_OUTPUT("HPOL"),
- SND_SOC_DAPM_OUTPUT("HPOR"),
- SND_SOC_DAPM_OUTPUT("LOUTL"),
- SND_SOC_DAPM_OUTPUT("LOUTR"),
-};
-
-static const struct snd_soc_dapm_route rt5639_dapm_routes[] = {
- {"IN1P", NULL, "LDO2"},
- {"IN2P", NULL, "LDO2"},
- {"IN3P", NULL, "LDO2"},
-
- {"DMIC L1", NULL, "DMIC1"},
- {"DMIC R1", NULL, "DMIC1"},
- {"DMIC L2", NULL, "DMIC2"},
- {"DMIC R2", NULL, "DMIC2"},
-
- {"BST1", NULL, "IN1P"},
- {"BST1", NULL, "IN1N"},
- {"BST2", NULL, "IN2P"},
- {"BST2", NULL, "IN2N"},
- {"BST3", NULL, "IN3P"},
- {"BST3", NULL, "IN3N"},
-
- {"INL VOL", NULL, "IN2P"},
- {"INR VOL", NULL, "IN2N"},
-
- {"RECMIXL", "HPOL Switch", "HPOL"},
- {"RECMIXL", "INL Switch", "INL VOL"},
- {"RECMIXL", "BST3 Switch", "BST3"},
- {"RECMIXL", "BST2 Switch", "BST2"},
- {"RECMIXL", "BST1 Switch", "BST1"},
- {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
-
- {"RECMIXR", "HPOR Switch", "HPOR"},
- {"RECMIXR", "INR Switch", "INR VOL"},
- {"RECMIXR", "BST3 Switch", "BST3"},
- {"RECMIXR", "BST2 Switch", "BST2"},
- {"RECMIXR", "BST1 Switch", "BST1"},
- {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
-
- {"ADC L", NULL, "RECMIXL"},
- {"ADC L", NULL, "ADC L power"},
- {"ADC L", NULL, "ADC clock"},
- {"ADC R", NULL, "RECMIXR"},
- {"ADC R", NULL, "ADC R power"},
- {"ADC R", NULL, "ADC clock"},
-
- {"DMIC L1", NULL, "DMIC CLK"},
- {"DMIC R1", NULL, "DMIC CLK"},
- {"DMIC L2", NULL, "DMIC CLK"},
- {"DMIC R2", NULL, "DMIC CLK"},
-
- {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
- {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
- {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
- {"Stereo ADC L1 Mux", "ADC", "ADC L"},
- {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
-
- {"Stereo ADC R1 Mux", "ADC", "ADC R"},
- {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
- {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
- {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
- {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
-
- {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
- {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
- {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
- {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
- {"Mono ADC L1 Mux", "ADCL", "ADC L"},
-
- {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
- {"Mono ADC R1 Mux", "ADCR", "ADC R"},
- {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
- {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
- {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
-
- {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
- {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
- {"Stereo ADC MIXL", NULL, "stereo filter"},
- {"stereo filter", NULL, "PLL1", check_sysclk1_source},
-
- {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
- {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
- {"Stereo ADC MIXR", NULL, "stereo filter"},
- {"stereo filter", NULL, "PLL1", check_sysclk1_source},
-
- {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
- {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
- {"Mono ADC MIXL", NULL, "mono left filter"},
- {"mono left filter", NULL, "PLL1", check_sysclk1_source},
-
- {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
- {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
- {"Mono ADC MIXR", NULL, "mono right filter"},
- {"mono right filter", NULL, "PLL1", check_sysclk1_source},
-
- {"IF2 ADC L Mux", "Mono ADC MIXL", "Mono ADC MIXL"},
- {"IF2 ADC R Mux", "Mono ADC MIXR", "Mono ADC MIXR"},
-
- {"IF2 ADC L", NULL, "IF2 ADC L Mux"},
- {"IF2 ADC R", NULL, "IF2 ADC R Mux"},
- {"IF3 ADC L", NULL, "Mono ADC MIXL"},
- {"IF3 ADC R", NULL, "Mono ADC MIXR"},
- {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
- {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
-
- {"IF1 ADC", NULL, "I2S1"},
- {"IF1 ADC", NULL, "IF1 ADC L"},
- {"IF1 ADC", NULL, "IF1 ADC R"},
- {"IF2 ADC", NULL, "I2S2"},
- {"IF2 ADC", NULL, "IF2 ADC L"},
- {"IF2 ADC", NULL, "IF2 ADC R"},
- {"IF3 ADC", NULL, "I2S3"},
- {"IF3 ADC", NULL, "IF3 ADC L"},
- {"IF3 ADC", NULL, "IF3 ADC R"},
-
- {"DAI1 TX Mux", "1:1|2:2|3:3", "IF1 ADC"},
- {"DAI1 TX Mux", "1:1|2:3|3:2", "IF1 ADC"},
- {"DAI1 TX Mux", "1:3|2:1|3:2", "IF2 ADC"},
- {"DAI1 TX Mux", "1:2|2:1|3:3", "IF2 ADC"},
- {"DAI1 TX Mux", "1:3|2:2|3:1", "IF3 ADC"},
- {"DAI1 TX Mux", "1:2|2:3|3:1", "IF3 ADC"},
- {"DAI1 IF1 Mux", "1:1|2:1|3:3", "IF1 ADC"},
- {"DAI1 IF2 Mux", "1:1|2:1|3:3", "IF2 ADC"},
- {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
- {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
-
- {"DAI2 TX Mux", "1:2|2:3|3:1", "IF1 ADC"},
- {"DAI2 TX Mux", "1:2|2:1|3:3", "IF1 ADC"},
- {"DAI2 TX Mux", "1:1|2:2|3:3", "IF2 ADC"},
- {"DAI2 TX Mux", "1:3|2:2|3:1", "IF2 ADC"},
- {"DAI2 TX Mux", "1:1|2:3|3:2", "IF3 ADC"},
- {"DAI2 TX Mux", "1:3|2:1|3:2", "IF3 ADC"},
- {"DAI2 IF1 Mux", "1:2|2:2|3:3", "IF1 ADC"},
- {"DAI2 IF2 Mux", "1:2|2:2|3:3", "IF2 ADC"},
- {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
- {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
-
- {"DAI3 TX Mux", "1:3|2:1|3:2", "IF1 ADC"},
- {"DAI3 TX Mux", "1:3|2:2|3:1", "IF1 ADC"},
- {"DAI3 TX Mux", "1:1|2:3|3:2", "IF2 ADC"},
- {"DAI3 TX Mux", "1:2|2:3|3:1", "IF2 ADC"},
- {"DAI3 TX Mux", "1:1|2:2|3:3", "IF3 ADC"},
- {"DAI3 TX Mux", "1:2|2:1|3:3", "IF3 ADC"},
- {"DAI3 TX Mux", "1:1|2:1|3:3", "IF3 ADC"},
- {"DAI3 TX Mux", "1:2|2:2|3:3", "IF3 ADC"},
-
- {"AIF1TX", NULL, "DAI1 TX Mux"},
- {"AIF1TX", NULL, "SDI1 TX Mux"},
- {"AIF2TX", NULL, "DAI2 TX Mux"},
- {"AIF2TX", NULL, "SDI2 TX Mux"},
- {"AIF3TX", NULL, "DAI3 TX Mux"},
-
- {"DAI1 RX Mux", "1:1|2:2|3:3", "AIF1RX"},
- {"DAI1 RX Mux", "1:1|2:3|3:2", "AIF1RX"},
- {"DAI1 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
- {"DAI1 RX Mux", "1:2|2:3|3:1", "AIF2RX"},
- {"DAI1 RX Mux", "1:2|2:1|3:3", "AIF2RX"},
- {"DAI1 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
- {"DAI1 RX Mux", "1:3|2:1|3:2", "AIF3RX"},
- {"DAI1 RX Mux", "1:3|2:2|3:1", "AIF3RX"},
-
- {"DAI2 RX Mux", "1:3|2:1|3:2", "AIF1RX"},
- {"DAI2 RX Mux", "1:2|2:1|3:3", "AIF1RX"},
- {"DAI2 RX Mux", "1:1|2:1|3:3", "AIF1RX"},
- {"DAI2 RX Mux", "1:1|2:2|3:3", "AIF2RX"},
- {"DAI2 RX Mux", "1:3|2:2|3:1", "AIF2RX"},
- {"DAI2 RX Mux", "1:2|2:2|3:3", "AIF2RX"},
- {"DAI2 RX Mux", "1:1|2:3|3:2", "AIF3RX"},
- {"DAI2 RX Mux", "1:2|2:3|3:1", "AIF3RX"},
-
- {"DAI3 RX Mux", "1:3|2:2|3:1", "AIF1RX"},
- {"DAI3 RX Mux", "1:2|2:3|3:1", "AIF1RX"},
- {"DAI3 RX Mux", "1:1|2:3|3:2", "AIF2RX"},
- {"DAI3 RX Mux", "1:3|2:1|3:2", "AIF2RX"},
- {"DAI3 RX Mux", "1:1|2:2|3:3", "AIF3RX"},
- {"DAI3 RX Mux", "1:2|2:1|3:3", "AIF3RX"},
- {"DAI3 RX Mux", "1:1|2:1|3:3", "AIF3RX"},
- {"DAI3 RX Mux", "1:2|2:2|3:3", "AIF3RX"},
-
- {"IF1 DAC", NULL, "I2S1"},
- {"IF1 DAC", NULL, "DAI1 RX Mux"},
- {"IF2 DAC", NULL, "I2S2"},
- {"IF2 DAC", NULL, "DAI2 RX Mux"},
- {"IF3 DAC", NULL, "I2S3"},
- {"IF3 DAC", NULL, "DAI3 RX Mux"},
-
- {"IF1 DAC L", NULL, "IF1 DAC"},
- {"IF1 DAC R", NULL, "IF1 DAC"},
- {"IF2 DAC L", NULL, "IF2 DAC"},
- {"IF2 DAC R", NULL, "IF2 DAC"},
- {"IF3 DAC L", NULL, "IF3 DAC"},
- {"IF3 DAC R", NULL, "IF3 DAC"},
-
- {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
- {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
- {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
- {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
-
- {"ANC", NULL, "Stereo ADC MIXL"},
- {"ANC", NULL, "Stereo ADC MIXR"},
-
- {"Audio DSP", NULL, "DAC MIXL"},
- {"Audio DSP", NULL, "DAC MIXR"},
-
- {"DAC L2 Mux", "IF2", "IF2 DAC L"},
- {"DAC L2 Mux", "IF3", "IF3 DAC L"},
- {"DAC L2 Mux", "Base L/R", "Audio DSP"},
- {"DAC L2 Volume", NULL, "DAC L2 Mux"},
-
- {"DAC R2 Mux", "IF2", "IF2 DAC R"},
- {"DAC R2 Mux", "IF3", "IF3 DAC R"},
- {"DAC R2 Volume", NULL, "Mono dacr Mux"},
- {"Mono dacr Mux", "TxDC_R", "DAC R2 Mux"},
- {"Mono dacr Mux", "TxDP_R", "IF2 ADC R Mux"},
-
- {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
- {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"},
- {"Stereo DAC MIXL", "ANC Switch", "ANC"},
- {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
- {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"},
- {"Stereo DAC MIXR", "ANC Switch", "ANC"},
-
- {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
- {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume"},
- {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume"},
- {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
- {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume"},
- {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume"},
-
- {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
- {"DIG MIXL", "DAC L2 Switch", "DAC L2 Volume"},
- {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
- {"DIG MIXR", "DAC R2 Switch", "DAC R2 Volume"},
-
- {"DAC L1", NULL, "Stereo DAC MIXL"},
- {"DAC L1", NULL, "PLL1", check_sysclk1_source},
- {"DAC R1", NULL, "Stereo DAC MIXR"},
- {"DAC R1", NULL, "PLL1", check_sysclk1_source},
-
- {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
- {"SPK MIXL", "INL Switch", "INL VOL"},
- {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
- {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
- {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
- {"SPK MIXR", "INR Switch", "INR VOL"},
- {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
- {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
-
- {"OUT MIXL", "BST3 Switch", "BST3"},
- {"OUT MIXL", "BST1 Switch", "BST1"},
- {"OUT MIXL", "INL Switch", "INL VOL"},
- {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
- {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
-
- {"OUT MIXR", "BST3 Switch", "BST3"},
- {"OUT MIXR", "BST2 Switch", "BST2"},
- {"OUT MIXR", "BST1 Switch", "BST1"},
- {"OUT MIXR", "INR Switch", "INR VOL"},
- {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
- {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
-
- {"SPKVOL L", NULL, "SPK MIXL"},
- {"SPKVOL R", NULL, "SPK MIXR"},
- {"HPOVOL L", NULL, "OUT MIXL"},
- {"HPOVOL R", NULL, "OUT MIXR"},
- {"OUTVOL L", NULL, "OUT MIXL"},
- {"OUTVOL R", NULL, "OUT MIXR"},
-
- {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
- {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
- {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
- {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
- {"SPOL MIX", "BST1 Switch", "BST1"},
- {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
- {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
- {"SPOR MIX", "BST1 Switch", "BST1"},
-
- {"DAC 1", NULL, "DAC L1"},
- {"DAC 1", NULL, "DAC R1"},
- {"HPOVOL", NULL, "HPOVOL L"},
- {"HPOVOL", NULL, "HPOVOL R"},
- {"HPO MIX", "DAC1 Switch", "DAC 1"},
- {"HPO MIX", "HPVOL Switch", "HPOVOL"},
-
- {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
- {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
- {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
- {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
-
- {"SPK amp", NULL, "SPOL MIX"},
- {"SPK amp", NULL, "SPOR MIX"},
- {"SPOLP", NULL, "SPK amp"},
- {"SPOLN", NULL, "SPK amp"},
- {"SPORP", NULL, "SPK amp"},
- {"SPORN", NULL, "SPK amp"},
-
- {"HP amp", NULL, "HPO MIX"},
- {"HPOL", NULL, "HP amp"},
- {"HPOR", NULL, "HP amp"},
-
- {"LOUT amp", NULL, "LOUT MIX"},
- {"LOUTL", NULL, "LOUT amp"},
- {"LOUTR", NULL, "LOUT amp"},
-};
-
-static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
-{
- int ret = 0, val;
-
- if(codec == NULL)
- return -EINVAL;
-
- val = snd_soc_read(codec, RT5639_I2S1_SDP);
- val = (val & RT5639_I2S_IF_MASK) >> RT5639_I2S_IF_SFT;
- switch (dai_id) {
- case RT5639_AIF1:
- if (val == RT5639_IF_123 || val == RT5639_IF_132 ||
- val == RT5639_IF_113)
- ret |= RT5639_U_IF1;
- if (val == RT5639_IF_312 || val == RT5639_IF_213 ||
- val == RT5639_IF_113)
- ret |= RT5639_U_IF2;
- if (val == RT5639_IF_321 || val == RT5639_IF_231)
- ret |= RT5639_U_IF3;
- break;
-
- case RT5639_AIF2:
- if (val == RT5639_IF_231 || val == RT5639_IF_213 ||
- val == RT5639_IF_223)
- ret |= RT5639_U_IF1;
- if (val == RT5639_IF_123 || val == RT5639_IF_321 ||
- val == RT5639_IF_223)
- ret |= RT5639_U_IF2;
- if (val == RT5639_IF_132 || val == RT5639_IF_312)
- ret |= RT5639_U_IF3;
- break;
-
- default:
- ret = -EINVAL;
- break;
- }
-
- return ret;
-}
-
-static int get_clk_info(int sclk, int rate)
-{
- int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
-
- if (sclk <= 0 || rate <= 0)
- return -EINVAL;
-
- rate = rate << 8;
- for (i = 0; i < ARRAY_SIZE(pd); i++)
- if (sclk == rate * pd[i])
- return i;
-
- return -EINVAL;
-}
-
-static int rt5639_hw_params(struct snd_pcm_substream *substream,
- struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
-{
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_codec *codec = rtd->codec;
- struct rt5639_priv *rt5639 = snd_soc_codec_get_drvdata(codec);
- unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
- int pre_div, bclk_ms, frame_size;
-
- rt5639->lrck[dai->id] = params_rate(params);
- pre_div = get_clk_info(rt5639->sysclk, rt5639->lrck[dai->id]);
- if (pre_div < 0) {
- dev_err(codec->dev, "Unsupported clock setting\n");
- return -EINVAL;
- }
- frame_size = snd_soc_params_to_frame_size(params);
- if (frame_size < 0) {
- dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
- return -EINVAL;
- }
- bclk_ms = frame_size > 32 ? 1 : 0;
- rt5639->bclk[dai->id] = rt5639->lrck[dai->id] * (32 << bclk_ms);
-
- dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
- rt5639->bclk[dai->id], rt5639->lrck[dai->id]);
- dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
- bclk_ms, pre_div, dai->id);
-
- switch (params_format(params)) {
- case SNDRV_PCM_FORMAT_S16_LE:
- break;
- case SNDRV_PCM_FORMAT_S20_3LE:
- val_len |= RT5639_I2S_DL_20;
- break;
- case SNDRV_PCM_FORMAT_S24_LE:
- val_len |= RT5639_I2S_DL_24;
- break;
- case SNDRV_PCM_FORMAT_S8:
- val_len |= RT5639_I2S_DL_8;
- break;
- default:
- return -EINVAL;
- }
-
- dai_sel = get_sdp_info(codec, dai->id);
- dai_sel |= (RT5639_U_IF1 | RT5639_U_IF2);
- if (dai_sel < 0) {
- dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
- return -EINVAL;
- }
- if (dai_sel & RT5639_U_IF1) {
- mask_clk = RT5639_I2S_BCLK_MS1_MASK | RT5639_I2S_PD1_MASK;
- val_clk = bclk_ms << RT5639_I2S_BCLK_MS1_SFT |
- pre_div << RT5639_I2S_PD1_SFT;
- snd_soc_update_bits(codec, RT5639_I2S1_SDP,
- RT5639_I2S_DL_MASK, val_len);
- snd_soc_update_bits(codec, RT5639_ADDA_CLK1, mask_clk, val_clk);
- }
- if (dai_sel & RT5639_U_IF2) {
- mask_clk = RT5639_I2S_BCLK_MS2_MASK | RT5639_I2S_PD2_MASK;
- val_clk = bclk_ms << RT5639_I2S_BCLK_MS2_SFT |
- pre_div << RT5639_I2S_PD2_SFT;
- snd_soc_update_bits(codec, RT5639_I2S2_SDP,
- RT5639_I2S_DL_MASK, val_len);
- snd_soc_update_bits(codec, RT5639_ADDA_CLK1, mask_clk, val_clk);
- }
-
- return 0;
-}
-
-static int rt5639_prepare(struct snd_pcm_substream *substream,
- struct snd_soc_dai *dai)
-{
- struct snd_soc_pcm_runtime *rtd = substream->private_data;
- struct snd_soc_codec *codec = rtd->codec;
- struct rt5639_priv *rt5639 = snd_soc_codec_get_drvdata(codec);
-
- rt5639->aif_pu = dai->id;
- return 0;
-}
-
-static int rt5639_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
-{
- struct snd_soc_codec *codec = dai->codec;
- struct rt5639_priv *rt5639 = snd_soc_codec_get_drvdata(codec);
- unsigned int reg_val = 0, dai_sel;
-
- switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
- case SND_SOC_DAIFMT_CBM_CFM:
- rt5639->master[dai->id] = 1;
- break;
- case SND_SOC_DAIFMT_CBS_CFS:
- reg_val |= RT5639_I2S_MS_S;
- rt5639->master[dai->id] = 0;
- break;
- default:
- return -EINVAL;
- }
-
- switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
- case SND_SOC_DAIFMT_NB_NF:
- break;
- case SND_SOC_DAIFMT_IB_NF:
- reg_val |= RT5639_I2S_BP_INV;
- break;
- default:
- return -EINVAL;
- }
-
- switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
- case SND_SOC_DAIFMT_I2S:
- break;
- case SND_SOC_DAIFMT_LEFT_J:
- reg_val |= RT5639_I2S_DF_LEFT;
- break;
- case SND_SOC_DAIFMT_DSP_A:
- reg_val |= RT5639_I2S_DF_PCM_A;
- break;
- case SND_SOC_DAIFMT_DSP_B:
- reg_val |= RT5639_I2S_DF_PCM_B;
- break;
- default:
- return -EINVAL;
- }
-
- dai_sel = get_sdp_info(codec, dai->id);
- if (dai_sel < 0) {
- dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
- return -EINVAL;
- }
- if (dai_sel & RT5639_U_IF1) {
- snd_soc_update_bits(codec, RT5639_I2S1_SDP,
- RT5639_I2S_MS_MASK | RT5639_I2S_BP_MASK |
- RT5639_I2S_DF_MASK, reg_val);
- }
- if (dai_sel & RT5639_U_IF2) {
- snd_soc_update_bits(codec, RT5639_I2S2_SDP,
- RT5639_I2S_MS_MASK | RT5639_I2S_BP_MASK |
- RT5639_I2S_DF_MASK, reg_val);
- }
-
- return 0;
-}
-
-static int rt5639_set_dai_sysclk(struct snd_soc_dai *dai,
- int clk_id, unsigned int freq, int dir)
-{
- struct snd_soc_codec *codec = dai->codec;
- struct rt5639_priv *rt5639 = snd_soc_codec_get_drvdata(codec);
- unsigned int reg_val = 0;
-
- if (freq == rt5639->sysclk && clk_id == rt5639->sysclk_src)
- return 0;
-
- switch (clk_id) {
- case RT5639_SCLK_S_MCLK:
- reg_val |= RT5639_SCLK_SRC_MCLK;
- break;
- case RT5639_SCLK_S_PLL1:
- reg_val |= RT5639_SCLK_SRC_PLL1;
- break;
- case RT5639_SCLK_S_RCCLK:
- reg_val |= RT5639_SCLK_SRC_RCCLK;
- break;
- default:
- dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
- return -EINVAL;
- }
- snd_soc_update_bits(codec, RT5639_GLB_CLK,
- RT5639_SCLK_SRC_MASK, reg_val);
- rt5639->sysclk = freq;
- rt5639->sysclk_src = clk_id;
-
- dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
-
- return 0;
-}
-
-/**
- * rt5639_pll_calc - Calcualte PLL M/N/K code.
- * @freq_in: external clock provided to codec.
- * @freq_out: target clock which codec works on.
- * @pll_code: Pointer to structure with M, N, K and bypass flag.
- *
- * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
- * which make calculation more efficiently.
- *
- * Returns 0 for success or negative error code.
- */
-static int rt5639_pll_calc(const unsigned int freq_in,
- const unsigned int freq_out, struct rt5639_pll_code *pll_code)
-{
- int max_n = RT5639_PLL_N_MAX, max_m = RT5639_PLL_M_MAX;
- int k, n, m, red, n_t, m_t, pll_out, in_t, out_t, red_t = abs(freq_out - freq_in);
- bool bypass = false;
-
- if (RT5639_PLL_INP_MAX < freq_in || RT5639_PLL_INP_MIN > freq_in)
- return -EINVAL;
-
- k = 100000000 / freq_out - 2;
- if (k > RT5639_PLL_K_MAX)
- k = RT5639_PLL_K_MAX;
- for (n_t = 0; n_t <= max_n; n_t++) {
- in_t = freq_in / (k + 2);
- pll_out = freq_out / (n_t + 2);
- if (in_t < 0)
- continue;
- if (in_t == pll_out) {
- bypass = true;
- n = n_t;
- goto code_find;
- }
- red = abs(in_t - pll_out); //m bypass
- if (red < red_t) {
- bypass = true;
- n = n_t;
- m = m_t;
- if (red == 0)
- goto code_find;
- red_t = red;
- }
- for (m_t = 0; m_t <= max_m; m_t++) {
- out_t = in_t / (m_t + 2);
- red = abs(out_t - pll_out);
- if (red < red_t) {
- bypass = false;
- n = n_t;
- m = m_t;
- if (red == 0)
- goto code_find;
- red_t = red;
- }
- }
- }
- pr_debug("Only get approximation about PLL\n");
-
-code_find:
-
- pll_code->m_bp = bypass;
- pll_code->m_code = m;
- pll_code->n_code = n;
- pll_code->k_code = k;
- return 0;
-}
-
-static int rt5639_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
- unsigned int freq_in, unsigned int freq_out)
-{
- struct snd_soc_codec *codec = dai->codec;
- struct rt5639_priv *rt5639 = snd_soc_codec_get_drvdata(codec);
- struct rt5639_pll_code pll_code;
- int ret, dai_sel;
-
- if (source == rt5639->pll_src && freq_in == rt5639->pll_in &&
- freq_out == rt5639->pll_out)
- return 0;
-
- if (!freq_in || !freq_out) {
- dev_dbg(codec->dev, "PLL disabled\n");
-
- rt5639->pll_in = 0;
- rt5639->pll_out = 0;
- snd_soc_update_bits(codec, RT5639_GLB_CLK,
- RT5639_SCLK_SRC_MASK, RT5639_SCLK_SRC_MCLK);
- return 0;
- }
-
- switch (source) {
- case RT5639_PLL1_S_MCLK:
- snd_soc_update_bits(codec, RT5639_GLB_CLK,
- RT5639_PLL1_SRC_MASK, RT5639_PLL1_SRC_MCLK);
- break;
- case RT5639_PLL1_S_BCLK1:
- case RT5639_PLL1_S_BCLK2:
- dai_sel = get_sdp_info(codec, dai->id);
- if (dai_sel < 0) {
- dev_err(codec->dev,
- "Failed to get sdp info: %d\n", dai_sel);
- return -EINVAL;
- }
- if (dai_sel & RT5639_U_IF1) {
- snd_soc_update_bits(codec, RT5639_GLB_CLK,
- RT5639_PLL1_SRC_MASK, RT5639_PLL1_SRC_BCLK1);
- }
- if (dai_sel & RT5639_U_IF2) {
- snd_soc_update_bits(codec, RT5639_GLB_CLK,
- RT5639_PLL1_SRC_MASK, RT5639_PLL1_SRC_BCLK2);
- }
- if (dai_sel & RT5639_U_IF3) {
- snd_soc_update_bits(codec, RT5639_GLB_CLK,
- RT5639_PLL1_SRC_MASK, RT5639_PLL1_SRC_BCLK3);
- }
- break;
- default:
- dev_err(codec->dev, "Unknown PLL source %d\n", source);
- return -EINVAL;
- }
-
- ret = rt5639_pll_calc(freq_in, freq_out, &pll_code);
- if (ret < 0) {
- dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
- return ret;
- }
-
- dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n", pll_code.m_bp,
- (pll_code.m_bp ? 0 : pll_code.m_code), pll_code.n_code, pll_code.k_code);
-
- snd_soc_write(codec, RT5639_PLL_CTRL1,
- pll_code.n_code << RT5639_PLL_N_SFT | pll_code.k_code);
- snd_soc_write(codec, RT5639_PLL_CTRL2,
- (pll_code.m_bp ? 0 : pll_code.m_code) << RT5639_PLL_M_SFT |
- pll_code.m_bp << RT5639_PLL_M_BP_SFT);
-
- rt5639->pll_in = freq_in;
- rt5639->pll_out = freq_out;
- rt5639->pll_src = source;
-
- return 0;
-}
-
-/**
- * rt5639_index_show - Dump private registers.
- * @dev: codec device.
- * @attr: device attribute.
- * @buf: buffer for display.
- *
- * To show non-zero values of all private registers.
- *
- * Returns buffer length.
- */
-static ssize_t rt5639_index_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct i2c_client *client = to_i2c_client(dev);
- struct rt5639_priv *rt5639 = i2c_get_clientdata(client);
- struct snd_soc_codec *codec = rt5639->codec;
- unsigned int val;
- int cnt = 0, i;
-
- cnt += sprintf(buf, "RT5639 index register\n");
- for (i = 0; i < 0xb4; i++) {
- if (cnt + RT5639_REG_DISP_LEN >= PAGE_SIZE)
- break;
- val = rt5639_index_read(codec, i);
- if (!val)
- continue;
- cnt += snprintf(buf + cnt, RT5639_REG_DISP_LEN,
- "%02x: %04x\n", i, val);
- }
-
- if (cnt >= PAGE_SIZE)
- cnt = PAGE_SIZE - 1;
-
- return cnt;
-}
-
-static ssize_t rt5639_index_store(struct device *dev,struct device_attribute *attr, const char *buf, size_t count)
-{
- struct i2c_client *client = to_i2c_client(dev);
- struct rt5639_priv *rt5639 = i2c_get_clientdata(client);
- struct snd_soc_codec *codec = rt5639->codec;
- unsigned int val=0,addr=0;
- int i;
-
- printk("register \"%s\" count=%d\n",buf,count);
- for(i=0;i<count;i++) //address
- {
- if(*(buf+i) <= '9' && *(buf+i)>='0')
- {
- addr = (addr << 4) | (*(buf+i)-'0');
- }
- else if(*(buf+i) <= 'f' && *(buf+i)>='a')
- {
- addr = (addr << 4) | ((*(buf+i)-'a')+0xa);
- }
- else if(*(buf+i) <= 'F' && *(buf+i)>='A')
- {
- addr = (addr << 4) | ((*(buf+i)-'A')+0xa);
- }
- else
- {
- break;
- }
- }
-
- for(i=i+1 ;i<count;i++) //val
- {
- if(*(buf+i) <= '9' && *(buf+i)>='0')
- {
- val = (val << 4) | (*(buf+i)-'0');
- }
- else if(*(buf+i) <= 'f' && *(buf+i)>='a')
- {
- val = (val << 4) | ((*(buf+i)-'a')+0xa);
- }
- else if(*(buf+i) <= 'F' && *(buf+i)>='A')
- {
- val = (val << 4) | ((*(buf+i)-'A')+0xa);
-
- }
- else
- {
- break;
- }
- }
- printk("addr=0x%x val=0x%x\n",addr,val);
- if(addr > RT5639_VENDOR_ID2 || val > 0xffff || val < 0)
- return count;
-
- if(i==count)
- {
- printk("0x%02x = 0x%04x\n",addr,rt5639_index_read(codec, addr));
- }
- else
- {
- rt5639_index_write(codec, addr, val);
- }
-
-
- return count;
-}
-static DEVICE_ATTR(index_reg, 0444, rt5639_index_show, rt5639_index_store);
-
-static ssize_t rt5639_codec_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct i2c_client *client = to_i2c_client(dev);
- struct rt5639_priv *rt5639 = i2c_get_clientdata(client);
- struct snd_soc_codec *codec = rt5639->codec;
- unsigned int val;
- int cnt = 0, i;
-
- cnt += sprintf(buf, "RT5639 codec register\n");
- for (i = 0; i <= RT5639_VENDOR_ID2; i++) {
- if (cnt + RT5639_REG_DISP_LEN >= PAGE_SIZE)
- break;
- val = codec->hw_read(codec, i);
- if (!val)
- continue;
- cnt += snprintf(buf + cnt, RT5639_REG_DISP_LEN,
- "#rng%02x #rv%04x #rd0\n", i, val);
- }
-
- if (cnt >= PAGE_SIZE)
- cnt = PAGE_SIZE - 1;
-
- return cnt;
-}
-
-static ssize_t rt5639_codec_store(struct device *dev,struct device_attribute *attr, const char *buf, size_t count)
-{
- struct i2c_client *client = to_i2c_client(dev);
- struct rt5639_priv *rt5639 = i2c_get_clientdata(client);
- struct snd_soc_codec *codec = rt5639->codec;
- unsigned int val=0,addr=0;
- int i;
-
- printk("register \"%s\" count=%d\n",buf,count);
- for(i=0;i<count;i++) //address
- {
- if(*(buf+i) <= '9' && *(buf+i)>='0')
- {
- addr = (addr << 4) | (*(buf+i)-'0');
- }
- else if(*(buf+i) <= 'f' && *(buf+i)>='a')
- {
- addr = (addr << 4) | ((*(buf+i)-'a')+0xa);
- }
- else if(*(buf+i) <= 'F' && *(buf+i)>='A')
- {
- addr = (addr << 4) | ((*(buf+i)-'A')+0xa);
- }
- else
- {
- break;
- }
- }
-
- for(i=i+1 ;i<count;i++) //val
- {
- if(*(buf+i) <= '9' && *(buf+i)>='0')
- {
- val = (val << 4) | (*(buf+i)-'0');
- }
- else if(*(buf+i) <= 'f' && *(buf+i)>='a')
- {
- val = (val << 4) | ((*(buf+i)-'a')+0xa);
- }
- else if(*(buf+i) <= 'F' && *(buf+i)>='A')
- {
- val = (val << 4) | ((*(buf+i)-'A')+0xa);
-
- }
- else
- {
- break;
- }
- }
- printk("addr=0x%x val=0x%x\n",addr,val);
- if(addr > RT5639_VENDOR_ID2 || val > 0xffff || val < 0)
- return count;
-
- if(i==count)
- {
- printk("0x%02x = 0x%04x\n",addr,codec->hw_read(codec, addr));
- }
- else
- {
- snd_soc_write(codec, addr, val);
- }
-
-
- return count;
-}
-
-static DEVICE_ATTR(codec_reg, 0666, rt5639_codec_show, rt5639_codec_store);
-
-static int rt5639_set_bias_level(struct snd_soc_codec *codec,
- enum snd_soc_bias_level level)
-{
- switch (level) {
- case SND_SOC_BIAS_ON:
- break;
-
- case SND_SOC_BIAS_PREPARE:
- snd_soc_update_bits(codec, RT5639_PWR_ANLG2,
- RT5639_PWR_MB1 | RT5639_PWR_MB2,
- RT5639_PWR_MB1 | RT5639_PWR_MB2);
- break;
-
- case SND_SOC_BIAS_STANDBY:
- snd_soc_update_bits(codec, RT5639_PWR_ANLG2,
- RT5639_PWR_MB1 | RT5639_PWR_MB2, 0);
- if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_VREF1 | RT5639_PWR_MB |
- RT5639_PWR_BG | RT5639_PWR_VREF2,
- RT5639_PWR_VREF1 | RT5639_PWR_MB |
- RT5639_PWR_BG | RT5639_PWR_VREF2);
- msleep(5);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_FV1 | RT5639_PWR_FV2,
- RT5639_PWR_FV1 | RT5639_PWR_FV2);
- snd_soc_write(codec, RT5639_GEN_CTRL1, 0x3701);
- codec->cache_only = false;
- codec->cache_sync = 1;
- snd_soc_cache_sync(codec);
- rt5639_index_sync(codec);
- }
- break;
-
- case SND_SOC_BIAS_OFF:
- snd_soc_write(codec, RT5639_DEPOP_M1, 0x0004);
- snd_soc_write(codec, RT5639_DEPOP_M2, 0x1100);
- snd_soc_write(codec, RT5639_GEN_CTRL1, 0x3700);
- snd_soc_write(codec, RT5639_PWR_DIG1, 0x0000);
- snd_soc_write(codec, RT5639_PWR_DIG2, 0x0000);
- snd_soc_write(codec, RT5639_PWR_VOL, 0x0000);
- snd_soc_write(codec, RT5639_PWR_MIXER, 0x0000);
- snd_soc_write(codec, RT5639_PWR_ANLG1, 0x0000);
- snd_soc_write(codec, RT5639_PWR_ANLG2, 0x0000);
- break;
-
- default:
- break;
- }
- codec->dapm.bias_level = level;
-
- return 0;
-}
-
-static int rt5639_probe(struct snd_soc_codec *codec)
-{
- struct rt5639_priv *rt5639 = snd_soc_codec_get_drvdata(codec);
- int ret;
-
- printk("Codec driver version %s\n", VERSION);
-
- ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_I2C);
- if (ret != 0) {
- dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
- return ret;
- }
-
- rt5639_reset(codec);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_VREF1 | RT5639_PWR_MB |
- RT5639_PWR_BG | RT5639_PWR_VREF2,
- RT5639_PWR_VREF1 | RT5639_PWR_MB |
- RT5639_PWR_BG | RT5639_PWR_VREF2);
- msleep(10);
- snd_soc_update_bits(codec, RT5639_PWR_ANLG1,
- RT5639_PWR_FV1 | RT5639_PWR_FV2,
- RT5639_PWR_FV1 | RT5639_PWR_FV2);
- /* DMIC */
- if (rt5639->dmic_en == RT5639_DMIC1) {
- snd_soc_update_bits(codec, RT5639_GPIO_CTRL1,
- RT5639_GP2_PIN_MASK, RT5639_GP2_PIN_DMIC1_SCL);
- snd_soc_update_bits(codec, RT5639_DMIC,
- RT5639_DMIC_1L_LH_MASK | RT5639_DMIC_1R_LH_MASK,
- RT5639_DMIC_1L_LH_FALLING | RT5639_DMIC_1R_LH_RISING);
- } else if (rt5639->dmic_en == RT5639_DMIC2) {
- snd_soc_update_bits(codec, RT5639_GPIO_CTRL1,
- RT5639_GP2_PIN_MASK, RT5639_GP2_PIN_DMIC1_SCL);
- snd_soc_update_bits(codec, RT5639_DMIC,
- RT5639_DMIC_2L_LH_MASK | RT5639_DMIC_2R_LH_MASK,
- RT5639_DMIC_2L_LH_FALLING | RT5639_DMIC_2R_LH_RISING);
- }
- snd_soc_write(codec, RT5639_GEN_CTRL2, 0x4040);
- ret = snd_soc_read(codec, RT5639_VENDOR_ID);
- printk("read 0x%x=0x%x\n",RT5639_VENDOR_ID,ret);
- if(0x5==ret) {
- snd_soc_update_bits(codec, RT5639_JD_CTRL,
- RT5639_JD1_IN4P_MASK | RT5639_JD2_IN4N_MASK,
- RT5639_JD1_IN4P_EN | RT5639_JD2_IN4N_EN);
- }
- rt5639_reg_init(codec);
- DC_Calibrate(codec);
- codec->dapm.bias_level = SND_SOC_BIAS_STANDBY;
- rt5639->codec = codec;
-
- snd_soc_add_codec_controls(codec, rt5639_snd_controls,
- ARRAY_SIZE(rt5639_snd_controls));
- snd_soc_dapm_new_controls(&codec->dapm, rt5639_dapm_widgets,
- ARRAY_SIZE(rt5639_dapm_widgets));
- snd_soc_dapm_add_routes(&codec->dapm, rt5639_dapm_routes,
- ARRAY_SIZE(rt5639_dapm_routes));
-
-
-#ifdef RTK_IOCTL
-#if defined(CONFIG_SND_HWDEP) || defined(CONFIG_SND_HWDEP_MODULE)
- struct rt56xx_ops *ioctl_ops = rt56xx_get_ioctl_ops();
- ioctl_ops->index_write = rt5639_index_write;
- ioctl_ops->index_read = rt5639_index_read;
- ioctl_ops->index_update_bits = rt5639_index_update_bits;
- ioctl_ops->ioctl_common = rt5639_ioctl_common;
- rt56xx_ce_init_hwdep(codec);
-#endif
-#endif
-
- ret = device_create_file(codec->dev, &dev_attr_index_reg);
- if (ret != 0) {
- dev_err(codec->dev,
- "Failed to create index_reg sysfs files: %d\n", ret);
- return ret;
- }
-
- ret = device_create_file(codec->dev, &dev_attr_codec_reg);
- if (ret != 0) {
- dev_err(codec->dev,
- "Failed to create codex_reg sysfs files: %d\n", ret);
- return ret;
- }
-
- return 0;
-}
-
-static int rt5639_remove(struct snd_soc_codec *codec)
-{
- rt5639_set_bias_level(codec, SND_SOC_BIAS_OFF);
- return 0;
-}
-
-#ifdef CONFIG_PM
-static int rt5639_suspend(struct snd_soc_codec *codec)
-{
- rt5639_set_bias_level(codec, SND_SOC_BIAS_OFF);
- return 0;
-}
-
-static int rt5639_resume(struct snd_soc_codec *codec)
-{
- rt5639_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
- return 0;
-}
-#else
-#define rt5639_suspend NULL
-#define rt5639_resume NULL
-#endif
-
-#define RT5639_STEREO_RATES SNDRV_PCM_RATE_8000_96000
-#define RT5639_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
- SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
-
-struct snd_soc_dai_ops rt5639_aif_dai_ops = {
- .hw_params = rt5639_hw_params,
- .prepare = rt5639_prepare,
- .set_fmt = rt5639_set_dai_fmt,
- .set_sysclk = rt5639_set_dai_sysclk,
- .set_pll = rt5639_set_dai_pll,
-};
-
-struct snd_soc_dai_driver rt5639_dai[] = {
- {
- .name = "rt5639-aif1",
- .id = RT5639_AIF1,
- .playback = {
- .stream_name = "AIF1 Playback",
- .channels_min = 1,
- .channels_max = 2,
- .rates = RT5639_STEREO_RATES,
- .formats = RT5639_FORMATS,
- },
- .capture = {
- .stream_name = "AIF1 Capture",
- .channels_min = 1,
- .channels_max = 2,
- .rates = RT5639_STEREO_RATES,
- .formats = RT5639_FORMATS,
- },
- .ops = &rt5639_aif_dai_ops,
- },
- {
- .name = "rt5639-aif2",
- .id = RT5639_AIF2,
- .playback = {
- .stream_name = "AIF2 Playback",
- .channels_min = 1,
- .channels_max = 2,
- .rates = RT5639_STEREO_RATES,
- .formats = RT5639_FORMATS,
- },
- .capture = {
- .stream_name = "AIF2 Capture",
- .channels_min = 1,
- .channels_max = 2,
- .rates = RT5639_STEREO_RATES,
- .formats = RT5639_FORMATS,
- },
- .ops = &rt5639_aif_dai_ops,
- },
-};
-
-static struct snd_soc_codec_driver soc_codec_dev_rt5639 = {
- .probe = rt5639_probe,
- .remove = rt5639_remove,
- .suspend = rt5639_suspend,
- .resume = rt5639_resume,
- .set_bias_level = rt5639_set_bias_level,
- .reg_cache_size = RT5639_VENDOR_ID2 + 1,
- .reg_word_size = sizeof(u16),
- .reg_cache_default = rt5639_reg,
- .volatile_register = rt5639_volatile_register,
- .readable_register = rt5639_readable_register,
- .reg_cache_step = 1,
-};
-
-static const struct i2c_device_id rt5639_i2c_id[] = {
- { "rt5639", 0 },
- { }
-};
-MODULE_DEVICE_TABLE(i2c, rt5639_i2c_id);
-
-static int rt5639_i2c_probe(struct i2c_client *i2c,
- const struct i2c_device_id *id)
-{
- struct rt5639_priv *rt5639;
- int ret;
-printk("rt5639 i2c probe initial\n");
- rt5639 = kzalloc(sizeof(struct rt5639_priv), GFP_KERNEL);
- if (NULL == rt5639)
- return -ENOMEM;
-
- i2c_set_clientdata(i2c, rt5639);
-
- ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5639,
- rt5639_dai, ARRAY_SIZE(rt5639_dai));
- if (ret < 0)
- kfree(rt5639);
-
- return ret;
-}
-
-static int rt5639_i2c_remove(struct i2c_client *i2c)
-{
- snd_soc_unregister_codec(&i2c->dev);
- kfree(i2c_get_clientdata(i2c));
- return 0;
-}
-
-static void rt5639_i2c_shutdown(struct i2c_client *client)
-{
- struct rt5639_priv *rt5639 = i2c_get_clientdata(client);
- struct snd_soc_codec *codec = rt5639->codec;
-
- if (codec != NULL)
- rt5639_set_bias_level(codec, SND_SOC_BIAS_OFF);
-
-}
-
-struct i2c_driver rt5639_i2c_driver = {
- .driver = {
- .name = "rt5639",
- .owner = THIS_MODULE,
- },
- .probe = rt5639_i2c_probe,
- .remove = rt5639_i2c_remove,
- .shutdown = rt5639_i2c_shutdown,
- .id_table = rt5639_i2c_id,
-};
-
-static int __init rt5639_modinit(void)
-{
- return i2c_add_driver(&rt5639_i2c_driver);
-}
-module_init(rt5639_modinit);
-
-static void __exit rt5639_modexit(void)
-{
- i2c_del_driver(&rt5639_i2c_driver);
-}
-module_exit(rt5639_modexit);
-
-MODULE_DESCRIPTION("ASoC RT5639 driver");
-MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
-MODULE_LICENSE("GPL");
+++ /dev/null
-/*
- * rt5639.h -- RT5639 ALSA SoC audio driver
- *
- * Copyright 2011 Realtek Microelectronics
- * Author: Johnny Hsu <johnnyhsu@realtek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __RT5639_H__
-#define __RT5639_H__
-
-/* Info */
-#define RT5639_RESET 0x00
-#define RT5639_VENDOR_ID 0xfd
-#define RT5639_VENDOR_ID1 0xfe
-#define RT5639_VENDOR_ID2 0xff
-/* I/O - Output */
-#define RT5639_SPK_VOL 0x01
-#define RT5639_HP_VOL 0x02
-#define RT5639_OUTPUT 0x03
-#define RT5639_MONO_OUT 0x04
-/* Dummy */
-#define RT5639_DUMMY_PR3F 0x05
-/* I/O - Input */
-#define RT5639_IN1_IN2 0x0d
-#define RT5639_IN3_IN4 0x0e
-#define RT5639_INL_INR_VOL 0x0f
-/* I/O - ADC/DAC/DMIC */
-#define RT5639_DAC1_DIG_VOL 0x19
-#define RT5639_DAC2_DIG_VOL 0x1a
-#define RT5639_DAC2_CTRL 0x1b
-#define RT5639_ADC_DIG_VOL 0x1c
-#define RT5639_ADC_DATA 0x1d
-#define RT5639_ADC_BST_VOL 0x1e
-/* Mixer - D-D */
-#define RT5639_STO_ADC_MIXER 0x27
-#define RT5639_MONO_ADC_MIXER 0x28
-#define RT5639_AD_DA_MIXER 0x29
-#define RT5639_STO_DAC_MIXER 0x2a
-#define RT5639_MONO_DAC_MIXER 0x2b
-#define RT5639_DIG_MIXER 0x2c
-#define RT5639_DSP_PATH1 0x2d
-#define RT5639_DSP_PATH2 0x2e
-#define RT5639_DIG_INF_DATA 0x2f
-/* Mixer - ADC */
-#define RT5639_REC_L1_MIXER 0x3b
-#define RT5639_REC_L2_MIXER 0x3c
-#define RT5639_REC_R1_MIXER 0x3d
-#define RT5639_REC_R2_MIXER 0x3e
-/* Mixer - DAC */
-#define RT5639_HPO_MIXER 0x45
-#define RT5639_SPK_L_MIXER 0x46
-#define RT5639_SPK_R_MIXER 0x47
-#define RT5639_SPO_L_MIXER 0x48
-#define RT5639_SPO_R_MIXER 0x49
-#define RT5639_SPO_CLSD_RATIO 0x4a
-#define RT5639_MONO_MIXER 0x4c
-#define RT5639_OUT_L1_MIXER 0x4d
-#define RT5639_OUT_L2_MIXER 0x4e
-#define RT5639_OUT_L3_MIXER 0x4f
-#define RT5639_OUT_R1_MIXER 0x50
-#define RT5639_OUT_R2_MIXER 0x51
-#define RT5639_OUT_R3_MIXER 0x52
-#define RT5639_LOUT_MIXER 0x53
-/* Power */
-#define RT5639_PWR_DIG1 0x61
-#define RT5639_PWR_DIG2 0x62
-#define RT5639_PWR_ANLG1 0x63
-#define RT5639_PWR_ANLG2 0x64
-#define RT5639_PWR_MIXER 0x65
-#define RT5639_PWR_VOL 0x66
-/* Private Register Control */
-#define RT5639_PRIV_INDEX 0x6a
-#define RT5639_PRIV_DATA 0x6c
-/* Format - ADC/DAC */
-#define RT5639_I2S1_SDP 0x70
-#define RT5639_I2S2_SDP 0x71
-#define RT5639_I2S3_SDP 0x72
-#define RT5639_ADDA_CLK1 0x73
-#define RT5639_ADDA_CLK2 0x74
-#define RT5639_DMIC 0x75
-/* Function - Analog */
-#define RT5639_GLB_CLK 0x80
-#define RT5639_PLL_CTRL1 0x81
-#define RT5639_PLL_CTRL2 0x82
-#define RT5639_ASRC_1 0x83
-#define RT5639_ASRC_2 0x84
-#define RT5639_ASRC_3 0x85
-#define RT5639_ASRC_4 0x89
-#define RT5639_ASRC_5 0x8a
-#define RT5639_HP_OVCD 0x8b
-#define RT5639_CLS_D_OVCD 0x8c
-#define RT5639_CLS_D_OUT 0x8d
-#define RT5639_DEPOP_M1 0x8e
-#define RT5639_DEPOP_M2 0x8f
-#define RT5639_DEPOP_M3 0x90
-#define RT5639_CHARGE_PUMP 0x91
-#define RT5639_PV_DET_SPK_G 0x92
-#define RT5639_MICBIAS 0x93
-/* Function - Digital */
-#define RT5639_EQ_CTRL1 0xb0
-#define RT5639_EQ_CTRL2 0xb1
-#define RT5639_WIND_FILTER 0xb2
-#define RT5639_DRC_AGC_1 0xb4
-#define RT5639_DRC_AGC_2 0xb5
-#define RT5639_DRC_AGC_3 0xb6
-#define RT5639_SVOL_ZC 0xb7
-#define RT5639_ANC_CTRL1 0xb8
-#define RT5639_ANC_CTRL2 0xb9
-#define RT5639_ANC_CTRL3 0xba
-#define RT5639_JD_CTRL 0xbb
-#define RT5639_ANC_JD 0xbc
-#define RT5639_IRQ_CTRL1 0xbd
-#define RT5639_IRQ_CTRL2 0xbe
-#define RT5639_INT_IRQ_ST 0xbf
-#define RT5639_GPIO_CTRL1 0xc0
-#define RT5639_GPIO_CTRL2 0xc1
-#define RT5639_GPIO_CTRL3 0xc2
-#define RT5639_DSP_CTRL1 0xc4
-#define RT5639_DSP_CTRL2 0xc5
-#define RT5639_DSP_CTRL3 0xc6
-#define RT5639_DSP_CTRL4 0xc7
-#define RT5639_PGM_REG_ARR1 0xc8
-#define RT5639_PGM_REG_ARR2 0xc9
-#define RT5639_PGM_REG_ARR3 0xca
-#define RT5639_PGM_REG_ARR4 0xcb
-#define RT5639_PGM_REG_ARR5 0xcc
-#define RT5639_SCB_FUNC 0xcd
-#define RT5639_SCB_CTRL 0xce
-#define RT5639_BASE_BACK 0xcf
-#define RT5639_MP3_PLUS1 0xd0
-#define RT5639_MP3_PLUS2 0xd1
-#define RT5639_3D_HP 0xd2
-#define RT5639_ADJ_HPF 0xd3
-#define RT5639_HP_CALIB_AMP_DET 0xd6
-#define RT5639_HP_CALIB2 0xd7
-#define RT5639_SV_ZCD1 0xd9
-#define RT5639_SV_ZCD2 0xda
-/* General Control */
-#define RT5639_GEN_CTRL1 0xfa
-#define RT5639_GEN_CTRL2 0xfb
-#define RT5639_GEN_CTRL3 0xfc
-
-
-/* Index of Codec Private Register definition */
-#define RT5639_BIAS_CUR1 0x12
-#define RT5639_BIAS_CUR3 0x14
-#define RT5639_CLSD_INT_REG1 0x1c
-#define RT5639_CHPUMP_INT_REG1 0x24
-#define RT5639_MAMP_INT_REG2 0x37
-#define RT5639_CHOP_DAC_ADC 0x3d
-#define RT5639_MIXER_INT_REG 0x3f
-#define RT5639_3D_SPK 0x63
-#define RT5639_WND_1 0x6c
-#define RT5639_WND_2 0x6d
-#define RT5639_WND_3 0x6e
-#define RT5639_WND_4 0x6f
-#define RT5639_WND_5 0x70
-#define RT5639_WND_8 0x73
-#define RT5639_DIP_SPK_INF 0x75
-#define RT5639_HP_DCC_INT1 0x77
-#define RT5639_EQ_BW_LOP 0xa0
-#define RT5639_EQ_GN_LOP 0xa1
-#define RT5639_EQ_FC_BP1 0xa2
-#define RT5639_EQ_BW_BP1 0xa3
-#define RT5639_EQ_GN_BP1 0xa4
-#define RT5639_EQ_FC_BP2 0xa5
-#define RT5639_EQ_BW_BP2 0xa6
-#define RT5639_EQ_GN_BP2 0xa7
-#define RT5639_EQ_FC_BP3 0xa8
-#define RT5639_EQ_BW_BP3 0xa9
-#define RT5639_EQ_GN_BP3 0xaa
-#define RT5639_EQ_FC_BP4 0xab
-#define RT5639_EQ_BW_BP4 0xac
-#define RT5639_EQ_GN_BP4 0xad
-#define RT5639_EQ_FC_HIP1 0xae
-#define RT5639_EQ_GN_HIP1 0xaf
-#define RT5639_EQ_FC_HIP2 0xb0
-#define RT5639_EQ_BW_HIP2 0xb1
-#define RT5639_EQ_GN_HIP2 0xb2
-#define RT5639_EQ_PRE_VOL 0xb3
-#define RT5639_EQ_PST_VOL 0xb4
-
-
-/* global definition */
-#define RT5639_L_MUTE (0x1 << 15)
-#define RT5639_L_MUTE_SFT 15
-#define RT5639_VOL_L_MUTE (0x1 << 14)
-#define RT5639_VOL_L_SFT 14
-#define RT5639_R_MUTE (0x1 << 7)
-#define RT5639_R_MUTE_SFT 7
-#define RT5639_VOL_R_MUTE (0x1 << 6)
-#define RT5639_VOL_R_SFT 6
-#define RT5639_L_VOL_MASK (0x3f << 8)
-#define RT5639_L_VOL_SFT 8
-#define RT5639_R_VOL_MASK (0x3f)
-#define RT5639_R_VOL_SFT 0
-
-/* IN1 and IN2 Control (0x0d) */
-/* IN3 and IN4 Control (0x0e) */
-#define RT5639_BST_MASK1 (0xf<<12)
-#define RT5639_BST_SFT1 12
-#define RT5639_BST_MASK2 (0xf<<8)
-#define RT5639_BST_SFT2 8
-#define RT5639_IN_DF1 (0x1 << 7)
-#define RT5639_IN_SFT1 7
-#define RT5639_IN_DF2 (0x1 << 6)
-#define RT5639_IN_SFT2 6
-
-/* INL and INR Volume Control (0x0f) */
-#define RT5639_INL_SEL_MASK (0x1 << 15)
-#define RT5639_INL_SEL_SFT 15
-#define RT5639_INL_SEL_IN4P (0x0 << 15)
-#define RT5639_INL_SEL_MONOP (0x1 << 15)
-#define RT5639_INL_VOL_MASK (0x1f << 8)
-#define RT5639_INL_VOL_SFT 8
-#define RT5639_INR_SEL_MASK (0x1 << 7)
-#define RT5639_INR_SEL_SFT 7
-#define RT5639_INR_SEL_IN4N (0x0 << 7)
-#define RT5639_INR_SEL_MONON (0x1 << 7)
-#define RT5639_INR_VOL_MASK (0x1f)
-#define RT5639_INR_VOL_SFT 0
-
-/* DAC1 Digital Volume (0x19) */
-#define RT5639_DAC_L1_VOL_MASK (0xff << 8)
-#define RT5639_DAC_L1_VOL_SFT 8
-#define RT5639_DAC_R1_VOL_MASK (0xff)
-#define RT5639_DAC_R1_VOL_SFT 0
-
-/* DAC2 Digital Volume (0x1a) */
-#define RT5639_DAC_L2_VOL_MASK (0xff << 8)
-#define RT5639_DAC_L2_VOL_SFT 8
-#define RT5639_DAC_R2_VOL_MASK (0xff)
-#define RT5639_DAC_R2_VOL_SFT 0
-
-/* DAC2 Control (0x1b) */
-#define RT5639_M_DAC_L2_VOL (0x1 << 13)
-#define RT5639_M_DAC_L2_VOL_SFT 13
-#define RT5639_M_DAC_R2_VOL (0x1 << 12)
-#define RT5639_M_DAC_R2_VOL_SFT 12
-
-/* ADC Digital Volume Control (0x1c) */
-#define RT5639_ADC_L_VOL_MASK (0x7f << 8)
-#define RT5639_ADC_L_VOL_SFT 8
-#define RT5639_ADC_R_VOL_MASK (0x7f)
-#define RT5639_ADC_R_VOL_SFT 0
-
-/* Mono ADC Digital Volume Control (0x1d) */
-#define RT5639_MONO_ADC_L_VOL_MASK (0x7f << 8)
-#define RT5639_MONO_ADC_L_VOL_SFT 8
-#define RT5639_MONO_ADC_R_VOL_MASK (0x7f)
-#define RT5639_MONO_ADC_R_VOL_SFT 0
-
-/* ADC Boost Volume Control (0x1e) */
-#define RT5639_ADC_L_BST_MASK (0x3 << 14)
-#define RT5639_ADC_L_BST_SFT 14
-#define RT5639_ADC_R_BST_MASK (0x3 << 12)
-#define RT5639_ADC_R_BST_SFT 12
-#define RT5639_ADC_COMP_MASK (0x3 << 10)
-#define RT5639_ADC_COMP_SFT 10
-
-/* Stereo ADC Mixer Control (0x27) */
-#define RT5639_M_ADC_L1 (0x1 << 14)
-#define RT5639_M_ADC_L1_SFT 14
-#define RT5639_M_ADC_L2 (0x1 << 13)
-#define RT5639_M_ADC_L2_SFT 13
-#define RT5639_ADC_1_SRC_MASK (0x1 << 12)
-#define RT5639_ADC_1_SRC_SFT 12
-#define RT5639_ADC_1_SRC_ADC (0x1 << 12)
-#define RT5639_ADC_1_SRC_DACMIX (0x0 << 12)
-#define RT5639_ADC_2_SRC_MASK (0x3 << 10)
-#define RT5639_ADC_2_SRC_SFT 10
-#define RT5639_ADC_2_SRC_DMIC1 (0x0 << 10)
-#define RT5639_ADC_2_SRC_DMIC2 (0x1 << 10)
-#define RT5639_ADC_2_SRC_DACMIX (0x2 << 10)
-#define RT5639_M_ADC_R1 (0x1 << 6)
-#define RT5639_M_ADC_R1_SFT 6
-#define RT5639_M_ADC_R2 (0x1 << 5)
-#define RT5639_M_ADC_R2_SFT 5
-
-/* Mono ADC Mixer Control (0x28) */
-#define RT5639_M_MONO_ADC_L1 (0x1 << 14)
-#define RT5639_M_MONO_ADC_L1_SFT 14
-#define RT5639_M_MONO_ADC_L2 (0x1 << 13)
-#define RT5639_M_MONO_ADC_L2_SFT 13
-#define RT5639_MONO_ADC_L1_SRC_MASK (0x1 << 12)
-#define RT5639_MONO_ADC_L1_SRC_SFT 12
-#define RT5639_MONO_ADC_L1_SRC_DACMIXL (0x0 << 12)
-#define RT5639_MONO_ADC_L1_SRC_ADCL (0x1 << 12)
-#define RT5639_MONO_ADC_L2_SRC_MASK (0x3 << 10)
-#define RT5639_MONO_ADC_L2_SRC_SFT 10
-#define RT5639_MONO_ADC_L2_SRC_DMIC_L1 (0x0 << 10)
-#define RT5639_MONO_ADC_L2_SRC_DMIC_L2 (0x1 << 10)
-#define RT5639_MONO_ADC_L2_SRC_DACMIXL (0x2 << 10)
-#define RT5639_M_MONO_ADC_R1 (0x1 << 6)
-#define RT5639_M_MONO_ADC_R1_SFT 6
-#define RT5639_M_MONO_ADC_R2 (0x1 << 5)
-#define RT5639_M_MONO_ADC_R2_SFT 5
-#define RT5639_MONO_ADC_R1_SRC_MASK (0x1 << 4)
-#define RT5639_MONO_ADC_R1_SRC_SFT 4
-#define RT5639_MONO_ADC_R1_SRC_ADCR (0x1 << 4)
-#define RT5639_MONO_ADC_R1_SRC_DACMIXR (0x0 << 4)
-#define RT5639_MONO_ADC_R2_SRC_MASK (0x3 << 2)
-#define RT5639_MONO_ADC_R2_SRC_SFT 2
-#define RT5639_MONO_ADC_R2_SRC_DMIC_R1 (0x0 << 2)
-#define RT5639_MONO_ADC_R2_SRC_DMIC_R2 (0x1 << 2)
-#define RT5639_MONO_ADC_R2_SRC_DACMIXR (0x2 << 2)
-
-/* ADC Mixer to DAC Mixer Control (0x29) */
-#define RT5639_M_ADCMIX_L (0x1 << 15)
-#define RT5639_M_ADCMIX_L_SFT 15
-#define RT5639_M_IF1_DAC_L (0x1 << 14)
-#define RT5639_M_IF1_DAC_L_SFT 14
-#define RT5639_M_ADCMIX_R (0x1 << 7)
-#define RT5639_M_ADCMIX_R_SFT 7
-#define RT5639_M_IF1_DAC_R (0x1 << 6)
-#define RT5639_M_IF1_DAC_R_SFT 6
-
-/* Stereo DAC Mixer Control (0x2a) */
-#define RT5639_M_DAC_L1 (0x1 << 14)
-#define RT5639_M_DAC_L1_SFT 14
-#define RT5639_DAC_L1_STO_L_VOL_MASK (0x1 << 13)
-#define RT5639_DAC_L1_STO_L_VOL_SFT 13
-#define RT5639_M_DAC_L2 (0x1 << 12)
-#define RT5639_M_DAC_L2_SFT 12
-#define RT5639_DAC_L2_STO_L_VOL_MASK (0x1 << 11)
-#define RT5639_DAC_L2_STO_L_VOL_SFT 11
-#define RT5639_M_ANC_DAC_L (0x1 << 10)
-#define RT5639_M_ANC_DAC_L_SFT 10
-#define RT5639_M_DAC_R1 (0x1 << 6)
-#define RT5639_M_DAC_R1_SFT 6
-#define RT5639_DAC_R1_STO_R_VOL_MASK (0x1 << 5)
-#define RT5639_DAC_R1_STO_R_VOL_SFT 5
-#define RT5639_M_DAC_R2 (0x1 << 4)
-#define RT5639_M_DAC_R2_SFT 4
-#define RT5639_DAC_R2_STO_R_VOL_MASK (0x1 << 3)
-#define RT5639_DAC_R2_STO_R_VOL_SFT 3
-#define RT5639_M_ANC_DAC_R (0x1 << 2)
-#define RT5639_M_ANC_DAC_R_SFT 2
-
-/* Mono DAC Mixer Control (0x2b) */
-#define RT5639_M_DAC_L1_MONO_L (0x1 << 14)
-#define RT5639_M_DAC_L1_MONO_L_SFT 14
-#define RT5639_DAC_L1_MONO_L_VOL_MASK (0x1 << 13)
-#define RT5639_DAC_L1_MONO_L_VOL_SFT 13
-#define RT5639_M_DAC_L2_MONO_L (0x1 << 12)
-#define RT5639_M_DAC_L2_MONO_L_SFT 12
-#define RT5639_DAC_L2_MONO_L_VOL_MASK (0x1 << 11)
-#define RT5639_DAC_L2_MONO_L_VOL_SFT 11
-#define RT5639_M_DAC_R2_MONO_L (0x1 << 10)
-#define RT5639_M_DAC_R2_MONO_L_SFT 10
-#define RT5639_DAC_R2_MONO_L_VOL_MASK (0x1 << 9)
-#define RT5639_DAC_R2_MONO_L_VOL_SFT 9
-#define RT5639_M_DAC_R1_MONO_R (0x1 << 6)
-#define RT5639_M_DAC_R1_MONO_R_SFT 6
-#define RT5639_DAC_R1_MONO_R_VOL_MASK (0x1 << 5)
-#define RT5639_DAC_R1_MONO_R_VOL_SFT 5
-#define RT5639_M_DAC_R2_MONO_R (0x1 << 4)
-#define RT5639_M_DAC_R2_MONO_R_SFT 4
-#define RT5639_DAC_R2_MONO_R_VOL_MASK (0x1 << 3)
-#define RT5639_DAC_R2_MONO_R_VOL_SFT 3
-#define RT5639_M_DAC_L2_MONO_R (0x1 << 2)
-#define RT5639_M_DAC_L2_MONO_R_SFT 2
-#define RT5639_DAC_L2_MONO_R_VOL_MASK (0x1 << 1)
-#define RT5639_DAC_L2_MONO_R_VOL_SFT 1
-
-/* Digital Mixer Control (0x2c) */
-#define RT5639_M_STO_L_DAC_L (0x1 << 15)
-#define RT5639_M_STO_L_DAC_L_SFT 15
-#define RT5639_STO_L_DAC_L_VOL_MASK (0x1 << 14)
-#define RT5639_STO_L_DAC_L_VOL_SFT 14
-#define RT5639_M_DAC_L2_DAC_L (0x1 << 13)
-#define RT5639_M_DAC_L2_DAC_L_SFT 13
-#define RT5639_DAC_L2_DAC_L_VOL_MASK (0x1 << 12)
-#define RT5639_DAC_L2_DAC_L_VOL_SFT 12
-#define RT5639_M_STO_R_DAC_R (0x1 << 11)
-#define RT5639_M_STO_R_DAC_R_SFT 11
-#define RT5639_STO_R_DAC_R_VOL_MASK (0x1 << 10)
-#define RT5639_STO_R_DAC_R_VOL_SFT 10
-#define RT5639_M_DAC_R2_DAC_R (0x1 << 9)
-#define RT5639_M_DAC_R2_DAC_R_SFT 9
-#define RT5639_DAC_R2_DAC_R_VOL_MASK (0x1 << 8)
-#define RT5639_DAC_R2_DAC_R_VOL_SFT 8
-
-/* DSP Path Control 1 (0x2d) */
-#define RT5639_RXDP_SRC_MASK (0x1 << 15)
-#define RT5639_RXDP_SRC_SFT 15
-#define RT5639_RXDP_SRC_NOR (0x0 << 15)
-#define RT5639_RXDP_SRC_DIV3 (0x1 << 15)
-#define RT5639_TXDP_SRC_MASK (0x1 << 14)
-#define RT5639_TXDP_SRC_SFT 14
-#define RT5639_TXDP_SRC_NOR (0x0 << 14)
-#define RT5639_TXDP_SRC_DIV3 (0x1 << 14)
-
-/* DSP Path Control 2 (0x2e) */
-#define RT5639_DAC_L2_SEL_MASK (0x3 << 14)
-#define RT5639_DAC_L2_SEL_SFT 14
-#define RT5639_DAC_L2_SEL_IF2 (0x0 << 14)
-#define RT5639_DAC_L2_SEL_IF3 (0x1 << 14)
-#define RT5639_DAC_L2_SEL_TXDC (0x2 << 14)
-#define RT5639_DAC_L2_SEL_BASS (0x3 << 14)
-#define RT5639_DAC_R2_SEL_MASK (0x3 << 12)
-#define RT5639_DAC_R2_SEL_SFT 12
-#define RT5639_DAC_R2_SEL_IF2 (0x0 << 12)
-#define RT5639_DAC_R2_SEL_IF3 (0x1 << 12)
-#define RT5639_DAC_R2_SEL_TXDC (0x2 << 12)
-#define RT5639_IF2_ADC_L_SEL_MASK (0x1 << 11)
-#define RT5639_IF2_ADC_L_SEL_SFT 11
-#define RT5639_IF2_ADC_L_SEL_TXDP (0x0 << 11)
-#define RT5639_IF2_ADC_L_SEL_PASS (0x1 << 11)
-#define RT5639_IF2_ADC_R_SEL_MASK (0x1 << 10)
-#define RT5639_IF2_ADC_R_SEL_SFT 10
-#define RT5639_IF2_ADC_R_SEL_TXDP (0x0 << 10)
-#define RT5639_IF2_ADC_R_SEL_PASS (0x1 << 10)
-#define RT5639_RXDC_SEL_MASK (0x3 << 8)
-#define RT5639_RXDC_SEL_SFT 8
-#define RT5639_RXDC_SEL_NOR (0x0 << 8)
-#define RT5639_RXDC_SEL_L2R (0x1 << 8)
-#define RT5639_RXDC_SEL_R2L (0x2 << 8)
-#define RT5639_RXDC_SEL_SWAP (0x3 << 8)
-#define RT5639_RXDP_SEL_MASK (0x3 << 6)
-#define RT5639_RXDP_SEL_SFT 6
-#define RT5639_RXDP_SEL_NOR (0x0 << 6)
-#define RT5639_RXDP_SEL_L2R (0x1 << 6)
-#define RT5639_RXDP_SEL_R2L (0x2 << 6)
-#define RT5639_RXDP_SEL_SWAP (0x3 << 6)
-#define RT5639_TXDC_SEL_MASK (0x3 << 4)
-#define RT5639_TXDC_SEL_SFT 4
-#define RT5639_TXDC_SEL_NOR (0x0 << 4)
-#define RT5639_TXDC_SEL_L2R (0x1 << 4)
-#define RT5639_TXDC_SEL_R2L (0x2 << 4)
-#define RT5639_TXDC_SEL_SWAP (0x3 << 4)
-#define RT5639_TXDP_SEL_MASK (0x3 << 2)
-#define RT5639_TXDP_SEL_SFT 2
-#define RT5639_TXDP_SEL_NOR (0x0 << 2)
-#define RT5639_TXDP_SEL_L2R (0x1 << 2)
-#define RT5639_TXDP_SEL_R2L (0x2 << 2)
-#define RT5639_TRXDP_SEL_SWAP (0x3 << 2)
-
-/* Digital Interface Data Control (0x2f) */
-#define RT5639_IF1_DAC_SEL_MASK (0x3 << 14)
-#define RT5639_IF1_DAC_SEL_SFT 14
-#define RT5639_IF1_DAC_SEL_NOR (0x0 << 14)
-#define RT5639_IF1_DAC_SEL_L2R (0x1 << 14)
-#define RT5639_IF1_DAC_SEL_R2L (0x2 << 14)
-#define RT5639_IF1_DAC_SEL_SWAP (0x3 << 14)
-#define RT5639_IF1_ADC_SEL_MASK (0x3 << 12)
-#define RT5639_IF1_ADC_SEL_SFT 12
-#define RT5639_IF1_ADC_SEL_NOR (0x0 << 12)
-#define RT5639_IF1_ADC_SEL_L2R (0x1 << 12)
-#define RT5639_IF1_ADC_SEL_R2L (0x2 << 12)
-#define RT5639_IF1_ADC_SEL_SWAP (0x3 << 12)
-#define RT5639_IF2_DAC_SEL_MASK (0x3 << 10)
-#define RT5639_IF2_DAC_SEL_SFT 10
-#define RT5639_IF2_DAC_SEL_NOR (0x0 << 10)
-#define RT5639_IF2_DAC_SEL_L2R (0x1 << 10)
-#define RT5639_IF2_DAC_SEL_R2L (0x2 << 10)
-#define RT5639_IF2_DAC_SEL_SWAP (0x3 << 10)
-#define RT5639_IF2_ADC_SEL_MASK (0x3 << 8)
-#define RT5639_IF2_ADC_SEL_SFT 8
-#define RT5639_IF2_ADC_SEL_NOR (0x0 << 8)
-#define RT5639_IF2_ADC_SEL_L2R (0x1 << 8)
-#define RT5639_IF2_ADC_SEL_R2L (0x2 << 8)
-#define RT5639_IF2_ADC_SEL_SWAP (0x3 << 8)
-#define RT5639_IF3_DAC_SEL_MASK (0x3 << 6)
-#define RT5639_IF3_DAC_SEL_SFT 6
-#define RT5639_IF3_DAC_SEL_NOR (0x0 << 6)
-#define RT5639_IF3_DAC_SEL_L2R (0x1 << 6)
-#define RT5639_IF3_DAC_SEL_R2L (0x2 << 6)
-#define RT5639_IF3_DAC_SEL_SWAP (0x3 << 6)
-#define RT5639_IF3_ADC_SEL_MASK (0x3 << 4)
-#define RT5639_IF3_ADC_SEL_SFT 4
-#define RT5639_IF3_ADC_SEL_NOR (0x0 << 4)
-#define RT5639_IF3_ADC_SEL_L2R (0x1 << 4)
-#define RT5639_IF3_ADC_SEL_R2L (0x2 << 4)
-#define RT5639_IF3_ADC_SEL_SWAP (0x3 << 4)
-
-/* REC Left Mixer Control 1 (0x3b) */
-#define RT5639_G_HP_L_RM_L_MASK (0x7 << 13)
-#define RT5639_G_HP_L_RM_L_SFT 13
-#define RT5639_G_IN_L_RM_L_MASK (0x7 << 10)
-#define RT5639_G_IN_L_RM_L_SFT 10
-#define RT5639_G_BST4_RM_L_MASK (0x7 << 7)
-#define RT5639_G_BST4_RM_L_SFT 7
-#define RT5639_G_BST3_RM_L_MASK (0x7 << 4)
-#define RT5639_G_BST3_RM_L_SFT 4
-#define RT5639_G_BST2_RM_L_MASK (0x7 << 1)
-#define RT5639_G_BST2_RM_L_SFT 1
-
-/* REC Left Mixer Control 2 (0x3c) */
-#define RT5639_G_BST1_RM_L_MASK (0x7 << 13)
-#define RT5639_G_BST1_RM_L_SFT 13
-#define RT5639_G_OM_L_RM_L_MASK (0x7 << 10)
-#define RT5639_G_OM_L_RM_L_SFT 10
-#define RT5639_M_HP_L_RM_L (0x1 << 6)
-#define RT5639_M_HP_L_RM_L_SFT 6
-#define RT5639_M_IN_L_RM_L (0x1 << 5)
-#define RT5639_M_IN_L_RM_L_SFT 5
-#define RT5639_M_BST4_RM_L (0x1 << 4)
-#define RT5639_M_BST4_RM_L_SFT 4
-#define RT5639_M_BST3_RM_L (0x1 << 3)
-#define RT5639_M_BST3_RM_L_SFT 3
-#define RT5639_M_BST2_RM_L (0x1 << 2)
-#define RT5639_M_BST2_RM_L_SFT 2
-#define RT5639_M_BST1_RM_L (0x1 << 1)
-#define RT5639_M_BST1_RM_L_SFT 1
-#define RT5639_M_OM_L_RM_L (0x1)
-#define RT5639_M_OM_L_RM_L_SFT 0
-
-/* REC Right Mixer Control 1 (0x3d) */
-#define RT5639_G_HP_R_RM_R_MASK (0x7 << 13)
-#define RT5639_G_HP_R_RM_R_SFT 13
-#define RT5639_G_IN_R_RM_R_MASK (0x7 << 10)
-#define RT5639_G_IN_R_RM_R_SFT 10
-#define RT5639_G_BST4_RM_R_MASK (0x7 << 7)
-#define RT5639_G_BST4_RM_R_SFT 7
-#define RT5639_G_BST3_RM_R_MASK (0x7 << 4)
-#define RT5639_G_BST3_RM_R_SFT 4
-#define RT5639_G_BST2_RM_R_MASK (0x7 << 1)
-#define RT5639_G_BST2_RM_R_SFT 1
-
-/* REC Right Mixer Control 2 (0x3e) */
-#define RT5639_G_BST1_RM_R_MASK (0x7 << 13)
-#define RT5639_G_BST1_RM_R_SFT 13
-#define RT5639_G_OM_R_RM_R_MASK (0x7 << 10)
-#define RT5639_G_OM_R_RM_R_SFT 10
-#define RT5639_M_HP_R_RM_R (0x1 << 6)
-#define RT5639_M_HP_R_RM_R_SFT 6
-#define RT5639_M_IN_R_RM_R (0x1 << 5)
-#define RT5639_M_IN_R_RM_R_SFT 5
-#define RT5639_M_BST4_RM_R (0x1 << 4)
-#define RT5639_M_BST4_RM_R_SFT 4
-#define RT5639_M_BST3_RM_R (0x1 << 3)
-#define RT5639_M_BST3_RM_R_SFT 3
-#define RT5639_M_BST2_RM_R (0x1 << 2)
-#define RT5639_M_BST2_RM_R_SFT 2
-#define RT5639_M_BST1_RM_R (0x1 << 1)
-#define RT5639_M_BST1_RM_R_SFT 1
-#define RT5639_M_OM_R_RM_R (0x1)
-#define RT5639_M_OM_R_RM_R_SFT 0
-
-/* HPMIX Control (0x45) */
-#define RT5639_M_DAC2_HM (0x1 << 15)
-#define RT5639_M_DAC2_HM_SFT 15
-#define RT5639_M_DAC1_HM (0x1 << 14)
-#define RT5639_M_DAC1_HM_SFT 14
-#define RT5639_M_HPVOL_HM (0x1 << 13)
-#define RT5639_M_HPVOL_HM_SFT 13
-#define RT5639_G_HPOMIX_MASK (0x1 << 12)
-#define RT5639_G_HPOMIX_SFT 12
-
-/* SPK Left Mixer Control (0x46) */
-#define RT5639_G_RM_L_SM_L_MASK (0x3 << 14)
-#define RT5639_G_RM_L_SM_L_SFT 14
-#define RT5639_G_IN_L_SM_L_MASK (0x3 << 12)
-#define RT5639_G_IN_L_SM_L_SFT 12
-#define RT5639_G_DAC_L1_SM_L_MASK (0x3 << 10)
-#define RT5639_G_DAC_L1_SM_L_SFT 10
-#define RT5639_G_DAC_L2_SM_L_MASK (0x3 << 8)
-#define RT5639_G_DAC_L2_SM_L_SFT 8
-#define RT5639_G_OM_L_SM_L_MASK (0x3 << 6)
-#define RT5639_G_OM_L_SM_L_SFT 6
-#define RT5639_M_RM_L_SM_L (0x1 << 5)
-#define RT5639_M_RM_L_SM_L_SFT 5
-#define RT5639_M_IN_L_SM_L (0x1 << 4)
-#define RT5639_M_IN_L_SM_L_SFT 4
-#define RT5639_M_DAC_L1_SM_L (0x1 << 3)
-#define RT5639_M_DAC_L1_SM_L_SFT 3
-#define RT5639_M_DAC_L2_SM_L (0x1 << 2)
-#define RT5639_M_DAC_L2_SM_L_SFT 2
-#define RT5639_M_OM_L_SM_L (0x1 << 1)
-#define RT5639_M_OM_L_SM_L_SFT 1
-
-/* SPK Right Mixer Control (0x47) */
-#define RT5639_G_RM_R_SM_R_MASK (0x3 << 14)
-#define RT5639_G_RM_R_SM_R_SFT 14
-#define RT5639_G_IN_R_SM_R_MASK (0x3 << 12)
-#define RT5639_G_IN_R_SM_R_SFT 12
-#define RT5639_G_DAC_R1_SM_R_MASK (0x3 << 10)
-#define RT5639_G_DAC_R1_SM_R_SFT 10
-#define RT5639_G_DAC_R2_SM_R_MASK (0x3 << 8)
-#define RT5639_G_DAC_R2_SM_R_SFT 8
-#define RT5639_G_OM_R_SM_R_MASK (0x3 << 6)
-#define RT5639_G_OM_R_SM_R_SFT 6
-#define RT5639_M_RM_R_SM_R (0x1 << 5)
-#define RT5639_M_RM_R_SM_R_SFT 5
-#define RT5639_M_IN_R_SM_R (0x1 << 4)
-#define RT5639_M_IN_R_SM_R_SFT 4
-#define RT5639_M_DAC_R1_SM_R (0x1 << 3)
-#define RT5639_M_DAC_R1_SM_R_SFT 3
-#define RT5639_M_DAC_R2_SM_R (0x1 << 2)
-#define RT5639_M_DAC_R2_SM_R_SFT 2
-#define RT5639_M_OM_R_SM_R (0x1 << 1)
-#define RT5639_M_OM_R_SM_R_SFT 1
-
-/* SPOLMIX Control (0x48) */
-#define RT5639_M_DAC_R1_SPM_L (0x1 << 15)
-#define RT5639_M_DAC_R1_SPM_L_SFT 15
-#define RT5639_M_DAC_L1_SPM_L (0x1 << 14)
-#define RT5639_M_DAC_L1_SPM_L_SFT 14
-#define RT5639_M_SV_R_SPM_L (0x1 << 13)
-#define RT5639_M_SV_R_SPM_L_SFT 13
-#define RT5639_M_SV_L_SPM_L (0x1 << 12)
-#define RT5639_M_SV_L_SPM_L_SFT 12
-#define RT5639_M_BST1_SPM_L (0x1 << 11)
-#define RT5639_M_BST1_SPM_L_SFT 11
-
-/* SPORMIX Control (0x49) */
-#define RT5639_M_DAC_R1_SPM_R (0x1 << 13)
-#define RT5639_M_DAC_R1_SPM_R_SFT 13
-#define RT5639_M_SV_R_SPM_R (0x1 << 12)
-#define RT5639_M_SV_R_SPM_R_SFT 12
-#define RT5639_M_BST1_SPM_R (0x1 << 11)
-#define RT5639_M_BST1_SPM_R_SFT 11
-
-/* SPOLMIX / SPORMIX Ratio Control (0x4a) */
-#define RT5639_SPO_CLSD_RATIO_MASK (0x7)
-#define RT5639_SPO_CLSD_RATIO_SFT 0
-
-/* Mono Output Mixer Control (0x4c) */
-#define RT5639_M_DAC_R2_MM (0x1 << 15)
-#define RT5639_M_DAC_R2_MM_SFT 15
-#define RT5639_M_DAC_L2_MM (0x1 << 14)
-#define RT5639_M_DAC_L2_MM_SFT 14
-#define RT5639_M_OV_R_MM (0x1 << 13)
-#define RT5639_M_OV_R_MM_SFT 13
-#define RT5639_M_OV_L_MM (0x1 << 12)
-#define RT5639_M_OV_L_MM_SFT 12
-#define RT5639_M_BST1_MM (0x1 << 11)
-#define RT5639_M_BST1_MM_SFT 11
-#define RT5639_G_MONOMIX_MASK (0x1 << 10)
-#define RT5639_G_MONOMIX_SFT 10
-
-/* Output Left Mixer Control 1 (0x4d) */
-#define RT5639_G_BST3_OM_L_MASK (0x7 << 13)
-#define RT5639_G_BST3_OM_L_SFT 13
-#define RT5639_G_BST2_OM_L_MASK (0x7 << 10)
-#define RT5639_G_BST2_OM_L_SFT 10
-#define RT5639_G_BST1_OM_L_MASK (0x7 << 7)
-#define RT5639_G_BST1_OM_L_SFT 7
-#define RT5639_G_IN_L_OM_L_MASK (0x7 << 4)
-#define RT5639_G_IN_L_OM_L_SFT 4
-#define RT5639_G_RM_L_OM_L_MASK (0x7 << 1)
-#define RT5639_G_RM_L_OM_L_SFT 1
-
-/* Output Left Mixer Control 2 (0x4e) */
-#define RT5639_G_DAC_R2_OM_L_MASK (0x7 << 13)
-#define RT5639_G_DAC_R2_OM_L_SFT 13
-#define RT5639_G_DAC_L2_OM_L_MASK (0x7 << 10)
-#define RT5639_G_DAC_L2_OM_L_SFT 10
-#define RT5639_G_DAC_L1_OM_L_MASK (0x7 << 7)
-#define RT5639_G_DAC_L1_OM_L_SFT 7
-
-/* Output Left Mixer Control 3 (0x4f) */
-#define RT5639_M_SM_L_OM_L (0x1 << 8)
-#define RT5639_M_SM_L_OM_L_SFT 8
-#define RT5639_M_BST3_OM_L (0x1 << 7)
-#define RT5639_M_BST3_OM_L_SFT 7
-#define RT5639_M_BST2_OM_L (0x1 << 6)
-#define RT5639_M_BST2_OM_L_SFT 6
-#define RT5639_M_BST1_OM_L (0x1 << 5)
-#define RT5639_M_BST1_OM_L_SFT 5
-#define RT5639_M_IN_L_OM_L (0x1 << 4)
-#define RT5639_M_IN_L_OM_L_SFT 4
-#define RT5639_M_RM_L_OM_L (0x1 << 3)
-#define RT5639_M_RM_L_OM_L_SFT 3
-#define RT5639_M_DAC_R2_OM_L (0x1 << 2)
-#define RT5639_M_DAC_R2_OM_L_SFT 2
-#define RT5639_M_DAC_L2_OM_L (0x1 << 1)
-#define RT5639_M_DAC_L2_OM_L_SFT 1
-#define RT5639_M_DAC_L1_OM_L (0x1)
-#define RT5639_M_DAC_L1_OM_L_SFT 0
-
-/* Output Right Mixer Control 1 (0x50) */
-#define RT5639_G_BST4_OM_R_MASK (0x7 << 13)
-#define RT5639_G_BST4_OM_R_SFT 13
-#define RT5639_G_BST2_OM_R_MASK (0x7 << 10)
-#define RT5639_G_BST2_OM_R_SFT 10
-#define RT5639_G_BST1_OM_R_MASK (0x7 << 7)
-#define RT5639_G_BST1_OM_R_SFT 7
-#define RT5639_G_IN_R_OM_R_MASK (0x7 << 4)
-#define RT5639_G_IN_R_OM_R_SFT 4
-#define RT5639_G_RM_R_OM_R_MASK (0x7 << 1)
-#define RT5639_G_RM_R_OM_R_SFT 1
-
-/* Output Right Mixer Control 2 (0x51) */
-#define RT5639_G_DAC_L2_OM_R_MASK (0x7 << 13)
-#define RT5639_G_DAC_L2_OM_R_SFT 13
-#define RT5639_G_DAC_R2_OM_R_MASK (0x7 << 10)
-#define RT5639_G_DAC_R2_OM_R_SFT 10
-#define RT5639_G_DAC_R1_OM_R_MASK (0x7 << 7)
-#define RT5639_G_DAC_R1_OM_R_SFT 7
-
-/* Output Right Mixer Control 3 (0x52) */
-#define RT5639_M_SM_L_OM_R (0x1 << 8)
-#define RT5639_M_SM_L_OM_R_SFT 8
-#define RT5639_M_BST4_OM_R (0x1 << 7)
-#define RT5639_M_BST4_OM_R_SFT 7
-#define RT5639_M_BST2_OM_R (0x1 << 6)
-#define RT5639_M_BST2_OM_R_SFT 6
-#define RT5639_M_BST1_OM_R (0x1 << 5)
-#define RT5639_M_BST1_OM_R_SFT 5
-#define RT5639_M_IN_R_OM_R (0x1 << 4)
-#define RT5639_M_IN_R_OM_R_SFT 4
-#define RT5639_M_RM_R_OM_R (0x1 << 3)
-#define RT5639_M_RM_R_OM_R_SFT 3
-#define RT5639_M_DAC_L2_OM_R (0x1 << 2)
-#define RT5639_M_DAC_L2_OM_R_SFT 2
-#define RT5639_M_DAC_R2_OM_R (0x1 << 1)
-#define RT5639_M_DAC_R2_OM_R_SFT 1
-#define RT5639_M_DAC_R1_OM_R (0x1)
-#define RT5639_M_DAC_R1_OM_R_SFT 0
-
-/* LOUT Mixer Control (0x53) */
-#define RT5639_M_DAC_L1_LM (0x1 << 15)
-#define RT5639_M_DAC_L1_LM_SFT 15
-#define RT5639_M_DAC_R1_LM (0x1 << 14)
-#define RT5639_M_DAC_R1_LM_SFT 14
-#define RT5639_M_OV_L_LM (0x1 << 13)
-#define RT5639_M_OV_L_LM_SFT 13
-#define RT5639_M_OV_R_LM (0x1 << 12)
-#define RT5639_M_OV_R_LM_SFT 12
-#define RT5639_G_LOUTMIX_MASK (0x1 << 11)
-#define RT5639_G_LOUTMIX_SFT 11
-
-/* Power Management for Digital 1 (0x61) */
-#define RT5639_PWR_I2S1 (0x1 << 15)
-#define RT5639_PWR_I2S1_BIT 15
-#define RT5639_PWR_I2S2 (0x1 << 14)
-#define RT5639_PWR_I2S2_BIT 14
-#define RT5639_PWR_I2S3 (0x1 << 13)
-#define RT5639_PWR_I2S3_BIT 13
-#define RT5639_PWR_DAC_L1 (0x1 << 12)
-#define RT5639_PWR_DAC_L1_BIT 12
-#define RT5639_PWR_DAC_R1 (0x1 << 11)
-#define RT5639_PWR_DAC_R1_BIT 11
-#define RT5639_PWR_DAC_L2 (0x1 << 7)
-#define RT5639_PWR_DAC_L2_BIT 7
-#define RT5639_PWR_DAC_R2 (0x1 << 6)
-#define RT5639_PWR_DAC_R2_BIT 6
-#define RT5639_PWR_ADC_L (0x1 << 2)
-#define RT5639_PWR_ADC_L_BIT 2
-#define RT5639_PWR_ADC_R (0x1 << 1)
-#define RT5639_PWR_ADC_R_BIT 1
-#define RT5639_PWR_CLS_D (0x1)
-#define RT5639_PWR_CLS_D_BIT 0
-
-/* Power Management for Digital 2 (0x62) */
-#define RT5639_PWR_ADC_SF (0x1 << 15)
-#define RT5639_PWR_ADC_SF_BIT 15
-#define RT5639_PWR_ADC_MF_L (0x1 << 14)
-#define RT5639_PWR_ADC_MF_L_BIT 14
-#define RT5639_PWR_ADC_MF_R (0x1 << 13)
-#define RT5639_PWR_ADC_MF_R_BIT 13
-#define RT5639_PWR_I2S_DSP (0x1 << 12)
-#define RT5639_PWR_I2S_DSP_BIT 12
-
-/* Power Management for Analog 1 (0x63) */
-#define RT5639_PWR_VREF1 (0x1 << 15)
-#define RT5639_PWR_VREF1_BIT 15
-#define RT5639_PWR_FV1 (0x1 << 14)
-#define RT5639_PWR_FV1_BIT 14
-#define RT5639_PWR_MB (0x1 << 13)
-#define RT5639_PWR_MB_BIT 13
-#define RT5639_PWR_LM (0x1 << 12)
-#define RT5639_PWR_LM_BIT 12
-#define RT5639_PWR_BG (0x1 << 11)
-#define RT5639_PWR_BG_BIT 11
-#define RT5639_PWR_MM (0x1 << 10)
-#define RT5639_PWR_MM_BIT 10
-#define RT5639_PWR_MA (0x1 << 8)
-#define RT5639_PWR_MA_BIT 8
-#define RT5639_PWR_HP_L (0x1 << 7)
-#define RT5639_PWR_HP_L_BIT 7
-#define RT5639_PWR_HP_R (0x1 << 6)
-#define RT5639_PWR_HP_R_BIT 6
-#define RT5639_PWR_HA (0x1 << 5)
-#define RT5639_PWR_HA_BIT 5
-#define RT5639_PWR_VREF2 (0x1 << 4)
-#define RT5639_PWR_VREF2_BIT 4
-#define RT5639_PWR_FV2 (0x1 << 3)
-#define RT5639_PWR_FV2_BIT 3
-#define RT5639_PWR_LDO2 (0x1 << 2)
-#define RT5639_PWR_LDO2_BIT 2
-
-/* Power Management for Analog 2 (0x64) */
-#define RT5639_PWR_BST1 (0x1 << 15)
-#define RT5639_PWR_BST1_BIT 15
-#define RT5639_PWR_BST2 (0x1 << 14)
-#define RT5639_PWR_BST2_BIT 14
-#define RT5639_PWR_BST3 (0x1 << 13)
-#define RT5639_PWR_BST3_BIT 13
-#define RT5639_PWR_BST4 (0x1 << 12)
-#define RT5639_PWR_BST4_BIT 12
-#define RT5639_PWR_MB1 (0x1 << 11)
-#define RT5639_PWR_MB1_BIT 11
-#define RT5639_PWR_MB2 (0x1 << 10)
-#define RT5639_PWR_MB2_BIT 10
-#define RT5639_PWR_PLL (0x1 << 9)
-#define RT5639_PWR_PLL_BIT 9
-
-/* Power Management for Mixer (0x65) */
-#define RT5639_PWR_OM_L (0x1 << 15)
-#define RT5639_PWR_OM_L_BIT 15
-#define RT5639_PWR_OM_R (0x1 << 14)
-#define RT5639_PWR_OM_R_BIT 14
-#define RT5639_PWR_SM_L (0x1 << 13)
-#define RT5639_PWR_SM_L_BIT 13
-#define RT5639_PWR_SM_R (0x1 << 12)
-#define RT5639_PWR_SM_R_BIT 12
-#define RT5639_PWR_RM_L (0x1 << 11)
-#define RT5639_PWR_RM_L_BIT 11
-#define RT5639_PWR_RM_R (0x1 << 10)
-#define RT5639_PWR_RM_R_BIT 10
-
-/* Power Management for Volume (0x66) */
-#define RT5639_PWR_SV_L (0x1 << 15)
-#define RT5639_PWR_SV_L_BIT 15
-#define RT5639_PWR_SV_R (0x1 << 14)
-#define RT5639_PWR_SV_R_BIT 14
-#define RT5639_PWR_OV_L (0x1 << 13)
-#define RT5639_PWR_OV_L_BIT 13
-#define RT5639_PWR_OV_R (0x1 << 12)
-#define RT5639_PWR_OV_R_BIT 12
-#define RT5639_PWR_HV_L (0x1 << 11)
-#define RT5639_PWR_HV_L_BIT 11
-#define RT5639_PWR_HV_R (0x1 << 10)
-#define RT5639_PWR_HV_R_BIT 10
-#define RT5639_PWR_IN_L (0x1 << 9)
-#define RT5639_PWR_IN_L_BIT 9
-#define RT5639_PWR_IN_R (0x1 << 8)
-#define RT5639_PWR_IN_R_BIT 8
-
-/* I2S1/2/3 Audio Serial Data Port Control (0x70 0x71 0x72) */
-#define RT5639_I2S_MS_MASK (0x1 << 15)
-#define RT5639_I2S_MS_SFT 15
-#define RT5639_I2S_MS_M (0x0 << 15)
-#define RT5639_I2S_MS_S (0x1 << 15)
-#define RT5639_I2S_IF_MASK (0x7 << 12)
-#define RT5639_I2S_IF_SFT 12
-#define RT5639_I2S_O_CP_MASK (0x3 << 10)
-#define RT5639_I2S_O_CP_SFT 10
-#define RT5639_I2S_O_CP_OFF (0x0 << 10)
-#define RT5639_I2S_O_CP_U_LAW (0x1 << 10)
-#define RT5639_I2S_O_CP_A_LAW (0x2 << 10)
-#define RT5639_I2S_I_CP_MASK (0x3 << 8)
-#define RT5639_I2S_I_CP_SFT 8
-#define RT5639_I2S_I_CP_OFF (0x0 << 8)
-#define RT5639_I2S_I_CP_U_LAW (0x1 << 8)
-#define RT5639_I2S_I_CP_A_LAW (0x2 << 8)
-#define RT5639_I2S_BP_MASK (0x1 << 7)
-#define RT5639_I2S_BP_SFT 7
-#define RT5639_I2S_BP_NOR (0x0 << 7)
-#define RT5639_I2S_BP_INV (0x1 << 7)
-#define RT5639_I2S_DL_MASK (0x3 << 2)
-#define RT5639_I2S_DL_SFT 2
-#define RT5639_I2S_DL_16 (0x0 << 2)
-#define RT5639_I2S_DL_20 (0x1 << 2)
-#define RT5639_I2S_DL_24 (0x2 << 2)
-#define RT5639_I2S_DL_8 (0x3 << 2)
-#define RT5639_I2S_DF_MASK (0x3)
-#define RT5639_I2S_DF_SFT 0
-#define RT5639_I2S_DF_I2S (0x0)
-#define RT5639_I2S_DF_LEFT (0x1)
-#define RT5639_I2S_DF_PCM_A (0x2)
-#define RT5639_I2S_DF_PCM_B (0x3)
-
-/* I2S2 Audio Serial Data Port Control (0x71) */
-#define RT5639_I2S2_SDI_MASK (0x1 << 6)
-#define RT5639_I2S2_SDI_SFT 6
-#define RT5639_I2S2_SDI_I2S1 (0x0 << 6)
-#define RT5639_I2S2_SDI_I2S2 (0x1 << 6)
-
-/* ADC/DAC Clock Control 1 (0x73) */
-#define RT5639_I2S_BCLK_MS1_MASK (0x1 << 15)
-#define RT5639_I2S_BCLK_MS1_SFT 15
-#define RT5639_I2S_BCLK_MS1_32 (0x0 << 15)
-#define RT5639_I2S_BCLK_MS1_64 (0x1 << 15)
-#define RT5639_I2S_PD1_MASK (0x7 << 12)
-#define RT5639_I2S_PD1_SFT 12
-#define RT5639_I2S_PD1_1 (0x0 << 12)
-#define RT5639_I2S_PD1_2 (0x1 << 12)
-#define RT5639_I2S_PD1_3 (0x2 << 12)
-#define RT5639_I2S_PD1_4 (0x3 << 12)
-#define RT5639_I2S_PD1_6 (0x4 << 12)
-#define RT5639_I2S_PD1_8 (0x5 << 12)
-#define RT5639_I2S_PD1_12 (0x6 << 12)
-#define RT5639_I2S_PD1_16 (0x7 << 12)
-#define RT5639_I2S_BCLK_MS2_MASK (0x1 << 11)
-#define RT5639_I2S_BCLK_MS2_SFT 11
-#define RT5639_I2S_BCLK_MS2_32 (0x0 << 11)
-#define RT5639_I2S_BCLK_MS2_64 (0x1 << 11)
-#define RT5639_I2S_PD2_MASK (0x7 << 8)
-#define RT5639_I2S_PD2_SFT 8
-#define RT5639_I2S_PD2_1 (0x0 << 8)
-#define RT5639_I2S_PD2_2 (0x1 << 8)
-#define RT5639_I2S_PD2_3 (0x2 << 8)
-#define RT5639_I2S_PD2_4 (0x3 << 8)
-#define RT5639_I2S_PD2_6 (0x4 << 8)
-#define RT5639_I2S_PD2_8 (0x5 << 8)
-#define RT5639_I2S_PD2_12 (0x6 << 8)
-#define RT5639_I2S_PD2_16 (0x7 << 8)
-#define RT5639_I2S_BCLK_MS3_MASK (0x1 << 7)
-#define RT5639_I2S_BCLK_MS3_SFT 7
-#define RT5639_I2S_BCLK_MS3_32 (0x0 << 7)
-#define RT5639_I2S_BCLK_MS3_64 (0x1 << 7)
-#define RT5639_I2S_PD3_MASK (0x7 << 4)
-#define RT5639_I2S_PD3_SFT 4
-#define RT5639_I2S_PD3_1 (0x0 << 4)
-#define RT5639_I2S_PD3_2 (0x1 << 4)
-#define RT5639_I2S_PD3_3 (0x2 << 4)
-#define RT5639_I2S_PD3_4 (0x3 << 4)
-#define RT5639_I2S_PD3_6 (0x4 << 4)
-#define RT5639_I2S_PD3_8 (0x5 << 4)
-#define RT5639_I2S_PD3_12 (0x6 << 4)
-#define RT5639_I2S_PD3_16 (0x7 << 4)
-#define RT5639_DAC_OSR_MASK (0x3 << 2)
-#define RT5639_DAC_OSR_SFT 2
-#define RT5639_DAC_OSR_128 (0x0 << 2)
-#define RT5639_DAC_OSR_64 (0x1 << 2)
-#define RT5639_DAC_OSR_32 (0x2 << 2)
-#define RT5639_DAC_OSR_16 (0x3 << 2)
-#define RT5639_ADC_OSR_MASK (0x3)
-#define RT5639_ADC_OSR_SFT 0
-#define RT5639_ADC_OSR_128 (0x0)
-#define RT5639_ADC_OSR_64 (0x1)
-#define RT5639_ADC_OSR_32 (0x2)
-#define RT5639_ADC_OSR_16 (0x3)
-
-/* ADC/DAC Clock Control 2 (0x74) */
-#define RT5639_DAC_L_OSR_MASK (0x3 << 14)
-#define RT5639_DAC_L_OSR_SFT 14
-#define RT5639_DAC_L_OSR_128 (0x0 << 14)
-#define RT5639_DAC_L_OSR_64 (0x1 << 14)
-#define RT5639_DAC_L_OSR_32 (0x2 << 14)
-#define RT5639_DAC_L_OSR_16 (0x3 << 14)
-#define RT5639_ADC_R_OSR_MASK (0x3 << 12)
-#define RT5639_ADC_R_OSR_SFT 12
-#define RT5639_ADC_R_OSR_128 (0x0 << 12)
-#define RT5639_ADC_R_OSR_64 (0x1 << 12)
-#define RT5639_ADC_R_OSR_32 (0x2 << 12)
-#define RT5639_ADC_R_OSR_16 (0x3 << 12)
-#define RT5639_DAHPF_EN (0x1 << 11)
-#define RT5639_DAHPF_EN_SFT 11
-#define RT5639_ADHPF_EN (0x1 << 10)
-#define RT5639_ADHPF_EN_SFT 10
-
-/* Digital Microphone Control (0x75) */
-#define RT5639_DMIC_1_EN_MASK (0x1 << 15)
-#define RT5639_DMIC_1_EN_SFT 15
-#define RT5639_DMIC_1_DIS (0x0 << 15)
-#define RT5639_DMIC_1_EN (0x1 << 15)
-#define RT5639_DMIC_2_EN_MASK (0x1 << 14)
-#define RT5639_DMIC_2_EN_SFT 14
-#define RT5639_DMIC_2_DIS (0x0 << 14)
-#define RT5639_DMIC_2_EN (0x1 << 14)
-#define RT5639_DMIC_1L_LH_MASK (0x1 << 13)
-#define RT5639_DMIC_1L_LH_SFT 13
-#define RT5639_DMIC_1L_LH_FALLING (0x0 << 13)
-#define RT5639_DMIC_1L_LH_RISING (0x1 << 13)
-#define RT5639_DMIC_1R_LH_MASK (0x1 << 12)
-#define RT5639_DMIC_1R_LH_SFT 12
-#define RT5639_DMIC_1R_LH_FALLING (0x0 << 12)
-#define RT5639_DMIC_1R_LH_RISING (0x1 << 12)
-#define RT5639_DMIC_1_DP_MASK (0x1 << 11)
-#define RT5639_DMIC_1_DP_SFT 11
-#define RT5639_DMIC_1_DP_GPIO3 (0x0 << 11)
-#define RT5639_DMIC_1_DP_IN1P (0x1 << 11)
-#define RT5639_DMIC_2_DP_MASK (0x1 << 10)
-#define RT5639_DMIC_2_DP_SFT 10
-#define RT5639_DMIC_2_DP_GPIO4 (0x0 << 10)
-#define RT5639_DMIC_2_DP_IN1N (0x1 << 10)
-#define RT5639_DMIC_2L_LH_MASK (0x1 << 9)
-#define RT5639_DMIC_2L_LH_SFT 9
-#define RT5639_DMIC_2L_LH_FALLING (0x0 << 9)
-#define RT5639_DMIC_2L_LH_RISING (0x1 << 9)
-#define RT5639_DMIC_2R_LH_MASK (0x1 << 8)
-#define RT5639_DMIC_2R_LH_SFT 8
-#define RT5639_DMIC_2R_LH_FALLING (0x0 << 8)
-#define RT5639_DMIC_2R_LH_RISING (0x1 << 8)
-#define RT5639_DMIC_CLK_MASK (0x7 << 5)
-#define RT5639_DMIC_CLK_SFT 5
-
-/* Global Clock Control (0x80) */
-#define RT5639_SCLK_SRC_MASK (0x3 << 14)
-#define RT5639_SCLK_SRC_SFT 14
-#define RT5639_SCLK_SRC_MCLK (0x0 << 14)
-#define RT5639_SCLK_SRC_PLL1 (0x1 << 14)
-#define RT5639_SCLK_SRC_RCCLK (0x2 << 14) /* 15MHz */
-#define RT5639_PLL1_SRC_MASK (0x3 << 12)
-#define RT5639_PLL1_SRC_SFT 12
-#define RT5639_PLL1_SRC_MCLK (0x0 << 12)
-#define RT5639_PLL1_SRC_BCLK1 (0x1 << 12)
-#define RT5639_PLL1_SRC_BCLK2 (0x2 << 12)
-#define RT5639_PLL1_SRC_BCLK3 (0x3 << 12)
-#define RT5639_PLL1_PD_MASK (0x1 << 3)
-#define RT5639_PLL1_PD_SFT 3
-#define RT5639_PLL1_PD_1 (0x0 << 3)
-#define RT5639_PLL1_PD_2 (0x1 << 3)
-
-#define RT5639_PLL_INP_MAX 40000000
-#define RT5639_PLL_INP_MIN 256000
-/* PLL M/N/K Code Control 1 (0x81) */
-#define RT5639_PLL_N_MAX 0x1ff
-#define RT5639_PLL_N_MASK (RT5639_PLL_N_MAX << 7)
-#define RT5639_PLL_N_SFT 7
-#define RT5639_PLL_K_MAX 0x1f
-#define RT5639_PLL_K_MASK (RT5639_PLL_K_MAX)
-#define RT5639_PLL_K_SFT 0
-
-/* PLL M/N/K Code Control 2 (0x82) */
-#define RT5639_PLL_M_MAX 0xf
-#define RT5639_PLL_M_MASK (RT5639_PLL_M_MAX << 12)
-#define RT5639_PLL_M_SFT 12
-#define RT5639_PLL_M_BP (0x1 << 11)
-#define RT5639_PLL_M_BP_SFT 11
-
-/* ASRC Control 1 (0x83) */
-#define RT5639_STO_T_MASK (0x1 << 15)
-#define RT5639_STO_T_SFT 15
-#define RT5639_STO_T_SCLK (0x0 << 15)
-#define RT5639_STO_T_LRCK1 (0x1 << 15)
-#define RT5639_M1_T_MASK (0x1 << 14)
-#define RT5639_M1_T_SFT 14
-#define RT5639_M1_T_I2S2 (0x0 << 14)
-#define RT5639_M1_T_I2S2_D3 (0x1 << 14)
-#define RT5639_I2S2_F_MASK (0x1 << 12)
-#define RT5639_I2S2_F_SFT 12
-#define RT5639_I2S2_F_I2S2_D2 (0x0 << 12)
-#define RT5639_I2S2_F_I2S1_TCLK (0x1 << 12)
-#define RT5639_DMIC_1_M_MASK (0x1 << 9)
-#define RT5639_DMIC_1_M_SFT 9
-#define RT5639_DMIC_1_M_NOR (0x0 << 9)
-#define RT5639_DMIC_1_M_ASYN (0x1 << 9)
-#define RT5639_DMIC_2_M_MASK (0x1 << 8)
-#define RT5639_DMIC_2_M_SFT 8
-#define RT5639_DMIC_2_M_NOR (0x0 << 8)
-#define RT5639_DMIC_2_M_ASYN (0x1 << 8)
-
-/* ASRC Control 2 (0x84) */
-#define RT5639_MDA_L_M_MASK (0x1 << 15)
-#define RT5639_MDA_L_M_SFT 15
-#define RT5639_MDA_L_M_NOR (0x0 << 15)
-#define RT5639_MDA_L_M_ASYN (0x1 << 15)
-#define RT5639_MDA_R_M_MASK (0x1 << 14)
-#define RT5639_MDA_R_M_SFT 14
-#define RT5639_MDA_R_M_NOR (0x0 << 14)
-#define RT5639_MDA_R_M_ASYN (0x1 << 14)
-#define RT5639_MAD_L_M_MASK (0x1 << 13)
-#define RT5639_MAD_L_M_SFT 13
-#define RT5639_MAD_L_M_NOR (0x0 << 13)
-#define RT5639_MAD_L_M_ASYN (0x1 << 13)
-#define RT5639_MAD_R_M_MASK (0x1 << 12)
-#define RT5639_MAD_R_M_SFT 12
-#define RT5639_MAD_R_M_NOR (0x0 << 12)
-#define RT5639_MAD_R_M_ASYN (0x1 << 12)
-#define RT5639_ADC_M_MASK (0x1 << 11)
-#define RT5639_ADC_M_SFT 11
-#define RT5639_ADC_M_NOR (0x0 << 11)
-#define RT5639_ADC_M_ASYN (0x1 << 11)
-#define RT5639_STO_DAC_M_MASK (0x1 << 5)
-#define RT5639_STO_DAC_M_SFT 5
-#define RT5639_STO_DAC_M_NOR (0x0 << 5)
-#define RT5639_STO_DAC_M_ASYN (0x1 << 5)
-#define RT5639_I2S1_R_D_MASK (0x1 << 4)
-#define RT5639_I2S1_R_D_SFT 4
-#define RT5639_I2S1_R_D_DIS (0x0 << 4)
-#define RT5639_I2S1_R_D_EN (0x1 << 4)
-#define RT5639_I2S2_R_D_MASK (0x1 << 3)
-#define RT5639_I2S2_R_D_SFT 3
-#define RT5639_I2S2_R_D_DIS (0x0 << 3)
-#define RT5639_I2S2_R_D_EN (0x1 << 3)
-#define RT5639_PRE_SCLK_MASK (0x3)
-#define RT5639_PRE_SCLK_SFT 0
-#define RT5639_PRE_SCLK_512 (0x0)
-#define RT5639_PRE_SCLK_1024 (0x1)
-#define RT5639_PRE_SCLK_2048 (0x2)
-
-/* ASRC Control 3 (0x85) */
-#define RT5639_I2S1_RATE_MASK (0xf << 12)
-#define RT5639_I2S1_RATE_SFT 12
-#define RT5639_I2S2_RATE_MASK (0xf << 8)
-#define RT5639_I2S2_RATE_SFT 8
-
-/* ASRC Control 4 (0x89) */
-#define RT5639_I2S1_PD_MASK (0x7 << 12)
-#define RT5639_I2S1_PD_SFT 12
-#define RT5639_I2S2_PD_MASK (0x7 << 8)
-#define RT5639_I2S2_PD_SFT 8
-
-/* HPOUT Over Current Detection (0x8b) */
-#define RT5639_HP_OVCD_MASK (0x1 << 10)
-#define RT5639_HP_OVCD_SFT 10
-#define RT5639_HP_OVCD_DIS (0x0 << 10)
-#define RT5639_HP_OVCD_EN (0x1 << 10)
-#define RT5639_HP_OC_TH_MASK (0x3 << 8)
-#define RT5639_HP_OC_TH_SFT 8
-#define RT5639_HP_OC_TH_90 (0x0 << 8)
-#define RT5639_HP_OC_TH_105 (0x1 << 8)
-#define RT5639_HP_OC_TH_120 (0x2 << 8)
-#define RT5639_HP_OC_TH_135 (0x3 << 8)
-
-/* Class D Over Current Control (0x8c) */
-#define RT5639_CLSD_OC_MASK (0x1 << 9)
-#define RT5639_CLSD_OC_SFT 9
-#define RT5639_CLSD_OC_PU (0x0 << 9)
-#define RT5639_CLSD_OC_PD (0x1 << 9)
-#define RT5639_AUTO_PD_MASK (0x1 << 8)
-#define RT5639_AUTO_PD_SFT 8
-#define RT5639_AUTO_PD_DIS (0x0 << 8)
-#define RT5639_AUTO_PD_EN (0x1 << 8)
-#define RT5639_CLSD_OC_TH_MASK (0x3f)
-#define RT5639_CLSD_OC_TH_SFT 0
-
-/* Class D Output Control (0x8d) */
-#define RT5639_CLSD_RATIO_MASK (0xf << 12)
-#define RT5639_CLSD_RATIO_SFT 12
-#define RT5639_CLSD_OM_MASK (0x1 << 11)
-#define RT5639_CLSD_OM_SFT 11
-#define RT5639_CLSD_OM_MONO (0x0 << 11)
-#define RT5639_CLSD_OM_STO (0x1 << 11)
-#define RT5639_CLSD_SCH_MASK (0x1 << 10)
-#define RT5639_CLSD_SCH_SFT 10
-#define RT5639_CLSD_SCH_L (0x0 << 10)
-#define RT5639_CLSD_SCH_S (0x1 << 10)
-
-/* Depop Mode Control 1 (0x8e) */
-#define RT5639_SMT_TRIG_MASK (0x1 << 15)
-#define RT5639_SMT_TRIG_SFT 15
-#define RT5639_SMT_TRIG_DIS (0x0 << 15)
-#define RT5639_SMT_TRIG_EN (0x1 << 15)
-#define RT5639_HP_L_SMT_MASK (0x1 << 9)
-#define RT5639_HP_L_SMT_SFT 9
-#define RT5639_HP_L_SMT_DIS (0x0 << 9)
-#define RT5639_HP_L_SMT_EN (0x1 << 9)
-#define RT5639_HP_R_SMT_MASK (0x1 << 8)
-#define RT5639_HP_R_SMT_SFT 8
-#define RT5639_HP_R_SMT_DIS (0x0 << 8)
-#define RT5639_HP_R_SMT_EN (0x1 << 8)
-#define RT5639_HP_CD_PD_MASK (0x1 << 7)
-#define RT5639_HP_CD_PD_SFT 7
-#define RT5639_HP_CD_PD_DIS (0x0 << 7)
-#define RT5639_HP_CD_PD_EN (0x1 << 7)
-#define RT5639_RSTN_MASK (0x1 << 6)
-#define RT5639_RSTN_SFT 6
-#define RT5639_RSTN_DIS (0x0 << 6)
-#define RT5639_RSTN_EN (0x1 << 6)
-#define RT5639_RSTP_MASK (0x1 << 5)
-#define RT5639_RSTP_SFT 5
-#define RT5639_RSTP_DIS (0x0 << 5)
-#define RT5639_RSTP_EN (0x1 << 5)
-#define RT5639_HP_CO_MASK (0x1 << 4)
-#define RT5639_HP_CO_SFT 4
-#define RT5639_HP_CO_DIS (0x0 << 4)
-#define RT5639_HP_CO_EN (0x1 << 4)
-#define RT5639_HP_CP_MASK (0x1 << 3)
-#define RT5639_HP_CP_SFT 3
-#define RT5639_HP_CP_PD (0x0 << 3)
-#define RT5639_HP_CP_PU (0x1 << 3)
-#define RT5639_HP_SG_MASK (0x1 << 2)
-#define RT5639_HP_SG_SFT 2
-#define RT5639_HP_SG_DIS (0x0 << 2)
-#define RT5639_HP_SG_EN (0x1 << 2)
-#define RT5639_HP_DP_MASK (0x1 << 1)
-#define RT5639_HP_DP_SFT 1
-#define RT5639_HP_DP_PD (0x0 << 1)
-#define RT5639_HP_DP_PU (0x1 << 1)
-#define RT5639_HP_CB_MASK (0x1)
-#define RT5639_HP_CB_SFT 0
-#define RT5639_HP_CB_PD (0x0)
-#define RT5639_HP_CB_PU (0x1)
-
-/* Depop Mode Control 2 (0x8f) */
-#define RT5639_DEPOP_MASK (0x1 << 13)
-#define RT5639_DEPOP_SFT 13
-#define RT5639_DEPOP_AUTO (0x0 << 13)
-#define RT5639_DEPOP_MAN (0x1 << 13)
-#define RT5639_RAMP_MASK (0x1 << 12)
-#define RT5639_RAMP_SFT 12
-#define RT5639_RAMP_DIS (0x0 << 12)
-#define RT5639_RAMP_EN (0x1 << 12)
-#define RT5639_BPS_MASK (0x1 << 11)
-#define RT5639_BPS_SFT 11
-#define RT5639_BPS_DIS (0x0 << 11)
-#define RT5639_BPS_EN (0x1 << 11)
-#define RT5639_FAST_UPDN_MASK (0x1 << 10)
-#define RT5639_FAST_UPDN_SFT 10
-#define RT5639_FAST_UPDN_DIS (0x0 << 10)
-#define RT5639_FAST_UPDN_EN (0x1 << 10)
-#define RT5639_MRES_MASK (0x3 << 8)
-#define RT5639_MRES_SFT 8
-#define RT5639_MRES_15MO (0x0 << 8)
-#define RT5639_MRES_25MO (0x1 << 8)
-#define RT5639_MRES_35MO (0x2 << 8)
-#define RT5639_MRES_45MO (0x3 << 8)
-#define RT5639_VLO_MASK (0x1 << 7)
-#define RT5639_VLO_SFT 7
-#define RT5639_VLO_3V (0x0 << 7)
-#define RT5639_VLO_32V (0x1 << 7)
-#define RT5639_DIG_DP_MASK (0x1 << 6)
-#define RT5639_DIG_DP_SFT 6
-#define RT5639_DIG_DP_DIS (0x0 << 6)
-#define RT5639_DIG_DP_EN (0x1 << 6)
-#define RT5639_DP_TH_MASK (0x3 << 4)
-#define RT5639_DP_TH_SFT 4
-
-/* Depop Mode Control 3 (0x90) */
-#define RT5639_CP_SYS_MASK (0x7 << 12)
-#define RT5639_CP_SYS_SFT 12
-#define RT5639_CP_FQ1_MASK (0x7 << 8)
-#define RT5639_CP_FQ1_SFT 8
-#define RT5639_CP_FQ2_MASK (0x7 << 4)
-#define RT5639_CP_FQ2_SFT 4
-#define RT5639_CP_FQ3_MASK (0x7)
-#define RT5639_CP_FQ3_SFT 0
-#define RT5639_CP_FQ_1_5_KHZ 0
-#define RT5639_CP_FQ_3_KHZ 1
-#define RT5639_CP_FQ_6_KHZ 2
-#define RT5639_CP_FQ_12_KHZ 3
-#define RT5639_CP_FQ_24_KHZ 4
-#define RT5639_CP_FQ_48_KHZ 5
-#define RT5639_CP_FQ_96_KHZ 6
-#define RT5639_CP_FQ_192_KHZ 7
-
-/* HPOUT charge pump (0x91) */
-#define RT5639_OSW_L_MASK (0x1 << 11)
-#define RT5639_OSW_L_SFT 11
-#define RT5639_OSW_L_DIS (0x0 << 11)
-#define RT5639_OSW_L_EN (0x1 << 11)
-#define RT5639_OSW_R_MASK (0x1 << 10)
-#define RT5639_OSW_R_SFT 10
-#define RT5639_OSW_R_DIS (0x0 << 10)
-#define RT5639_OSW_R_EN (0x1 << 10)
-#define RT5639_PM_HP_MASK (0x3 << 8)
-#define RT5639_PM_HP_SFT 8
-#define RT5639_PM_HP_LV (0x0 << 8)
-#define RT5639_PM_HP_MV (0x1 << 8)
-#define RT5639_PM_HP_HV (0x2 << 8)
-#define RT5639_IB_HP_MASK (0x3 << 6)
-#define RT5639_IB_HP_SFT 6
-#define RT5639_IB_HP_125IL (0x0 << 6)
-#define RT5639_IB_HP_25IL (0x1 << 6)
-#define RT5639_IB_HP_5IL (0x2 << 6)
-#define RT5639_IB_HP_1IL (0x3 << 6)
-
-/* PV detection and SPK gain control (0x92) */
-#define RT5639_PVDD_DET_MASK (0x1 << 15)
-#define RT5639_PVDD_DET_SFT 15
-#define RT5639_PVDD_DET_DIS (0x0 << 15)
-#define RT5639_PVDD_DET_EN (0x1 << 15)
-#define RT5639_SPK_AG_MASK (0x1 << 14)
-#define RT5639_SPK_AG_SFT 14
-#define RT5639_SPK_AG_DIS (0x0 << 14)
-#define RT5639_SPK_AG_EN (0x1 << 14)
-
-/* Micbias Control (0x93) */
-#define RT5639_MIC1_BS_MASK (0x1 << 15)
-#define RT5639_MIC1_BS_SFT 15
-#define RT5639_MIC1_BS_9AV (0x0 << 15)
-#define RT5639_MIC1_BS_75AV (0x1 << 15)
-#define RT5639_MIC2_BS_MASK (0x1 << 14)
-#define RT5639_MIC2_BS_SFT 14
-#define RT5639_MIC2_BS_9AV (0x0 << 14)
-#define RT5639_MIC2_BS_75AV (0x1 << 14)
-#define RT5639_MIC1_CLK_MASK (0x1 << 13)
-#define RT5639_MIC1_CLK_SFT 13
-#define RT5639_MIC1_CLK_DIS (0x0 << 13)
-#define RT5639_MIC1_CLK_EN (0x1 << 13)
-#define RT5639_MIC2_CLK_MASK (0x1 << 12)
-#define RT5639_MIC2_CLK_SFT 12
-#define RT5639_MIC2_CLK_DIS (0x0 << 12)
-#define RT5639_MIC2_CLK_EN (0x1 << 12)
-#define RT5639_MIC1_OVCD_MASK (0x1 << 11)
-#define RT5639_MIC1_OVCD_SFT 11
-#define RT5639_MIC1_OVCD_DIS (0x0 << 11)
-#define RT5639_MIC1_OVCD_EN (0x1 << 11)
-#define RT5639_MIC1_OVTH_MASK (0x3 << 9)
-#define RT5639_MIC1_OVTH_SFT 9
-#define RT5639_MIC1_OVTH_600UA (0x0 << 9)
-#define RT5639_MIC1_OVTH_1500UA (0x1 << 9)
-#define RT5639_MIC1_OVTH_2000UA (0x2 << 9)
-#define RT5639_MIC2_OVCD_MASK (0x1 << 8)
-#define RT5639_MIC2_OVCD_SFT 8
-#define RT5639_MIC2_OVCD_DIS (0x0 << 8)
-#define RT5639_MIC2_OVCD_EN (0x1 << 8)
-#define RT5639_MIC2_OVTH_MASK (0x3 << 6)
-#define RT5639_MIC2_OVTH_SFT 6
-#define RT5639_MIC2_OVTH_600UA (0x0 << 6)
-#define RT5639_MIC2_OVTH_1500UA (0x1 << 6)
-#define RT5639_MIC2_OVTH_2000UA (0x2 << 6)
-#define RT5639_PWR_MB_MASK (0x1 << 5)
-#define RT5639_PWR_MB_SFT 5
-#define RT5639_PWR_MB_PD (0x0 << 5)
-#define RT5639_PWR_MB_PU (0x1 << 5)
-#define RT5639_PWR_CLK25M_MASK (0x1 << 4)
-#define RT5639_PWR_CLK25M_SFT 4
-#define RT5639_PWR_CLK25M_PD (0x0 << 4)
-#define RT5639_PWR_CLK25M_PU (0x1 << 4)
-
-/* EQ Control 1 (0xb0) */
-#define RT5639_EQ_SRC_MASK (0x1 << 15)
-#define RT5639_EQ_SRC_SFT 15
-#define RT5639_EQ_SRC_DAC (0x0 << 15)
-#define RT5639_EQ_SRC_ADC (0x1 << 15)
-#define RT5639_EQ_UPD (0x1 << 14)
-#define RT5639_EQ_UPD_BIT 14
-#define RT5639_EQ_CD_MASK (0x1 << 13)
-#define RT5639_EQ_CD_SFT 13
-#define RT5639_EQ_CD_DIS (0x0 << 13)
-#define RT5639_EQ_CD_EN (0x1 << 13)
-#define RT5639_EQ_DITH_MASK (0x3 << 8)
-#define RT5639_EQ_DITH_SFT 8
-#define RT5639_EQ_DITH_NOR (0x0 << 8)
-#define RT5639_EQ_DITH_LSB (0x1 << 8)
-#define RT5639_EQ_DITH_LSB_1 (0x2 << 8)
-#define RT5639_EQ_DITH_LSB_2 (0x3 << 8)
-
-/* EQ Control 2 (0xb1) */
-#define RT5639_EQ_HPF1_M_MASK (0x1 << 8)
-#define RT5639_EQ_HPF1_M_SFT 8
-#define RT5639_EQ_HPF1_M_HI (0x0 << 8)
-#define RT5639_EQ_HPF1_M_1ST (0x1 << 8)
-#define RT5639_EQ_LPF1_M_MASK (0x1 << 7)
-#define RT5639_EQ_LPF1_M_SFT 7
-#define RT5639_EQ_LPF1_M_LO (0x0 << 7)
-#define RT5639_EQ_LPF1_M_1ST (0x1 << 7)
-#define RT5639_EQ_HPF2_MASK (0x1 << 6)
-#define RT5639_EQ_HPF2_SFT 6
-#define RT5639_EQ_HPF2_DIS (0x0 << 6)
-#define RT5639_EQ_HPF2_EN (0x1 << 6)
-#define RT5639_EQ_HPF1_MASK (0x1 << 5)
-#define RT5639_EQ_HPF1_SFT 5
-#define RT5639_EQ_HPF1_DIS (0x0 << 5)
-#define RT5639_EQ_HPF1_EN (0x1 << 5)
-#define RT5639_EQ_BPF4_MASK (0x1 << 4)
-#define RT5639_EQ_BPF4_SFT 4
-#define RT5639_EQ_BPF4_DIS (0x0 << 4)
-#define RT5639_EQ_BPF4_EN (0x1 << 4)
-#define RT5639_EQ_BPF3_MASK (0x1 << 3)
-#define RT5639_EQ_BPF3_SFT 3
-#define RT5639_EQ_BPF3_DIS (0x0 << 3)
-#define RT5639_EQ_BPF3_EN (0x1 << 3)
-#define RT5639_EQ_BPF2_MASK (0x1 << 2)
-#define RT5639_EQ_BPF2_SFT 2
-#define RT5639_EQ_BPF2_DIS (0x0 << 2)
-#define RT5639_EQ_BPF2_EN (0x1 << 2)
-#define RT5639_EQ_BPF1_MASK (0x1 << 1)
-#define RT5639_EQ_BPF1_SFT 1
-#define RT5639_EQ_BPF1_DIS (0x0 << 1)
-#define RT5639_EQ_BPF1_EN (0x1 << 1)
-#define RT5639_EQ_LPF_MASK (0x1)
-#define RT5639_EQ_LPF_SFT 0
-#define RT5639_EQ_LPF_DIS (0x0)
-#define RT5639_EQ_LPF_EN (0x1)
-#define RT5639_EQ_CTRL_MASK (0x7f)
-
-/* Memory Test (0xb2) */
-#define RT5639_MT_MASK (0x1 << 15)
-#define RT5639_MT_SFT 15
-#define RT5639_MT_DIS (0x0 << 15)
-#define RT5639_MT_EN (0x1 << 15)
-
-/* DRC/AGC Control 1 (0xb4) */
-#define RT5639_DRC_AGC_P_MASK (0x1 << 15)
-#define RT5639_DRC_AGC_P_SFT 15
-#define RT5639_DRC_AGC_P_DAC (0x0 << 15)
-#define RT5639_DRC_AGC_P_ADC (0x1 << 15)
-#define RT5639_DRC_AGC_MASK (0x1 << 14)
-#define RT5639_DRC_AGC_SFT 14
-#define RT5639_DRC_AGC_DIS (0x0 << 14)
-#define RT5639_DRC_AGC_EN (0x1 << 14)
-#define RT5639_DRC_AGC_UPD (0x1 << 13)
-#define RT5639_DRC_AGC_UPD_BIT 13
-#define RT5639_DRC_AGC_AR_MASK (0x1f << 8)
-#define RT5639_DRC_AGC_AR_SFT 8
-#define RT5639_DRC_AGC_R_MASK (0x7 << 5)
-#define RT5639_DRC_AGC_R_SFT 5
-#define RT5639_DRC_AGC_R_48K (0x1 << 5)
-#define RT5639_DRC_AGC_R_96K (0x2 << 5)
-#define RT5639_DRC_AGC_R_192K (0x3 << 5)
-#define RT5639_DRC_AGC_R_441K (0x5 << 5)
-#define RT5639_DRC_AGC_R_882K (0x6 << 5)
-#define RT5639_DRC_AGC_R_1764K (0x7 << 5)
-#define RT5639_DRC_AGC_RC_MASK (0x1f)
-#define RT5639_DRC_AGC_RC_SFT 0
-
-/* DRC/AGC Control 2 (0xb5) */
-#define RT5639_DRC_AGC_POB_MASK (0x3f << 8)
-#define RT5639_DRC_AGC_POB_SFT 8
-#define RT5639_DRC_AGC_CP_MASK (0x1 << 7)
-#define RT5639_DRC_AGC_CP_SFT 7
-#define RT5639_DRC_AGC_CP_DIS (0x0 << 7)
-#define RT5639_DRC_AGC_CP_EN (0x1 << 7)
-#define RT5639_DRC_AGC_CPR_MASK (0x3 << 5)
-#define RT5639_DRC_AGC_CPR_SFT 5
-#define RT5639_DRC_AGC_CPR_1_1 (0x0 << 5)
-#define RT5639_DRC_AGC_CPR_1_2 (0x1 << 5)
-#define RT5639_DRC_AGC_CPR_1_3 (0x2 << 5)
-#define RT5639_DRC_AGC_CPR_1_4 (0x3 << 5)
-#define RT5639_DRC_AGC_PRB_MASK (0x1f)
-#define RT5639_DRC_AGC_PRB_SFT 0
-
-/* DRC/AGC Control 3 (0xb6) */
-#define RT5639_DRC_AGC_NGB_MASK (0xf << 12)
-#define RT5639_DRC_AGC_NGB_SFT 12
-#define RT5639_DRC_AGC_TAR_MASK (0x1f << 7)
-#define RT5639_DRC_AGC_TAR_SFT 7
-#define RT5639_DRC_AGC_NG_MASK (0x1 << 6)
-#define RT5639_DRC_AGC_NG_SFT 6
-#define RT5639_DRC_AGC_NG_DIS (0x0 << 6)
-#define RT5639_DRC_AGC_NG_EN (0x1 << 6)
-#define RT5639_DRC_AGC_NGH_MASK (0x1 << 5)
-#define RT5639_DRC_AGC_NGH_SFT 5
-#define RT5639_DRC_AGC_NGH_DIS (0x0 << 5)
-#define RT5639_DRC_AGC_NGH_EN (0x1 << 5)
-#define RT5639_DRC_AGC_NGT_MASK (0x1f)
-#define RT5639_DRC_AGC_NGT_SFT 0
-
-/* ANC Control 1 (0xb8) */
-#define RT5639_ANC_M_MASK (0x1 << 15)
-#define RT5639_ANC_M_SFT 15
-#define RT5639_ANC_M_NOR (0x0 << 15)
-#define RT5639_ANC_M_REV (0x1 << 15)
-#define RT5639_ANC_MASK (0x1 << 14)
-#define RT5639_ANC_SFT 14
-#define RT5639_ANC_DIS (0x0 << 14)
-#define RT5639_ANC_EN (0x1 << 14)
-#define RT5639_ANC_MD_MASK (0x3 << 12)
-#define RT5639_ANC_MD_SFT 12
-#define RT5639_ANC_MD_DIS (0x0 << 12)
-#define RT5639_ANC_MD_67MS (0x1 << 12)
-#define RT5639_ANC_MD_267MS (0x2 << 12)
-#define RT5639_ANC_MD_1067MS (0x3 << 12)
-#define RT5639_ANC_SN_MASK (0x1 << 11)
-#define RT5639_ANC_SN_SFT 11
-#define RT5639_ANC_SN_DIS (0x0 << 11)
-#define RT5639_ANC_SN_EN (0x1 << 11)
-#define RT5639_ANC_CLK_MASK (0x1 << 10)
-#define RT5639_ANC_CLK_SFT 10
-#define RT5639_ANC_CLK_ANC (0x0 << 10)
-#define RT5639_ANC_CLK_REG (0x1 << 10)
-#define RT5639_ANC_ZCD_MASK (0x3 << 8)
-#define RT5639_ANC_ZCD_SFT 8
-#define RT5639_ANC_ZCD_DIS (0x0 << 8)
-#define RT5639_ANC_ZCD_T1 (0x1 << 8)
-#define RT5639_ANC_ZCD_T2 (0x2 << 8)
-#define RT5639_ANC_ZCD_WT (0x3 << 8)
-#define RT5639_ANC_CS_MASK (0x1 << 7)
-#define RT5639_ANC_CS_SFT 7
-#define RT5639_ANC_CS_DIS (0x0 << 7)
-#define RT5639_ANC_CS_EN (0x1 << 7)
-#define RT5639_ANC_SW_MASK (0x1 << 6)
-#define RT5639_ANC_SW_SFT 6
-#define RT5639_ANC_SW_NOR (0x0 << 6)
-#define RT5639_ANC_SW_AUTO (0x1 << 6)
-#define RT5639_ANC_CO_L_MASK (0x3f)
-#define RT5639_ANC_CO_L_SFT 0
-
-/* ANC Control 2 (0xb6) */
-#define RT5639_ANC_FG_R_MASK (0xf << 12)
-#define RT5639_ANC_FG_R_SFT 12
-#define RT5639_ANC_FG_L_MASK (0xf << 8)
-#define RT5639_ANC_FG_L_SFT 8
-#define RT5639_ANC_CG_R_MASK (0xf << 4)
-#define RT5639_ANC_CG_R_SFT 4
-#define RT5639_ANC_CG_L_MASK (0xf)
-#define RT5639_ANC_CG_L_SFT 0
-
-/* ANC Control 3 (0xb6) */
-#define RT5639_ANC_CD_MASK (0x1 << 6)
-#define RT5639_ANC_CD_SFT 6
-#define RT5639_ANC_CD_BOTH (0x0 << 6)
-#define RT5639_ANC_CD_IND (0x1 << 6)
-#define RT5639_ANC_CO_R_MASK (0x3f)
-#define RT5639_ANC_CO_R_SFT 0
-
-/* Jack Detect Control (0xbb) */
-#define RT5639_JD_MASK (0x7 << 13)
-#define RT5639_JD_SFT 13
-#define RT5639_JD_DIS (0x0 << 13)
-#define RT5639_JD_GPIO1 (0x1 << 13)
-#define RT5639_JD_JD1_IN4P (0x2 << 13)
-#define RT5639_JD_JD2_IN4N (0x3 << 13)
-#define RT5639_JD_GPIO2 (0x4 << 13)
-#define RT5639_JD_GPIO3 (0x5 << 13)
-#define RT5639_JD_GPIO4 (0x6 << 13)
-#define RT5639_JD_HP_MASK (0x1 << 11)
-#define RT5639_JD_HP_SFT 11
-#define RT5639_JD_HP_DIS (0x0 << 11)
-#define RT5639_JD_HP_EN (0x1 << 11)
-#define RT5639_JD_HP_TRG_MASK (0x1 << 10)
-#define RT5639_JD_HP_TRG_SFT 10
-#define RT5639_JD_HP_TRG_LO (0x0 << 10)
-#define RT5639_JD_HP_TRG_HI (0x1 << 10)
-#define RT5639_JD_SPL_MASK (0x1 << 9)
-#define RT5639_JD_SPL_SFT 9
-#define RT5639_JD_SPL_DIS (0x0 << 9)
-#define RT5639_JD_SPL_EN (0x1 << 9)
-#define RT5639_JD_SPL_TRG_MASK (0x1 << 8)
-#define RT5639_JD_SPL_TRG_SFT 8
-#define RT5639_JD_SPL_TRG_LO (0x0 << 8)
-#define RT5639_JD_SPL_TRG_HI (0x1 << 8)
-#define RT5639_JD_SPR_MASK (0x1 << 7)
-#define RT5639_JD_SPR_SFT 7
-#define RT5639_JD_SPR_DIS (0x0 << 7)
-#define RT5639_JD_SPR_EN (0x1 << 7)
-#define RT5639_JD_SPR_TRG_MASK (0x1 << 6)
-#define RT5639_JD_SPR_TRG_SFT 6
-#define RT5639_JD_SPR_TRG_LO (0x0 << 6)
-#define RT5639_JD_SPR_TRG_HI (0x1 << 6)
-#define RT5639_JD_MO_MASK (0x1 << 5)
-#define RT5639_JD_MO_SFT 5
-#define RT5639_JD_MO_DIS (0x0 << 5)
-#define RT5639_JD_MO_EN (0x1 << 5)
-#define RT5639_JD_MO_TRG_MASK (0x1 << 4)
-#define RT5639_JD_MO_TRG_SFT 4
-#define RT5639_JD_MO_TRG_LO (0x0 << 4)
-#define RT5639_JD_MO_TRG_HI (0x1 << 4)
-#define RT5639_JD_LO_MASK (0x1 << 3)
-#define RT5639_JD_LO_SFT 3
-#define RT5639_JD_LO_DIS (0x0 << 3)
-#define RT5639_JD_LO_EN (0x1 << 3)
-#define RT5639_JD_LO_TRG_MASK (0x1 << 2)
-#define RT5639_JD_LO_TRG_SFT 2
-#define RT5639_JD_LO_TRG_LO (0x0 << 2)
-#define RT5639_JD_LO_TRG_HI (0x1 << 2)
-#define RT5639_JD1_IN4P_MASK (0x1 << 1)
-#define RT5639_JD1_IN4P_SFT 1
-#define RT5639_JD1_IN4P_DIS (0x0 << 1)
-#define RT5639_JD1_IN4P_EN (0x1 << 1)
-#define RT5639_JD2_IN4N_MASK (0x1)
-#define RT5639_JD2_IN4N_SFT 0
-#define RT5639_JD2_IN4N_DIS (0x0)
-#define RT5639_JD2_IN4N_EN (0x1)
-
-/* Jack detect for ANC (0xbc) */
-#define RT5639_ANC_DET_MASK (0x3 << 4)
-#define RT5639_ANC_DET_SFT 4
-#define RT5639_ANC_DET_DIS (0x0 << 4)
-#define RT5639_ANC_DET_MB1 (0x1 << 4)
-#define RT5639_ANC_DET_MB2 (0x2 << 4)
-#define RT5639_ANC_DET_JD (0x3 << 4)
-#define RT5639_AD_TRG_MASK (0x1 << 3)
-#define RT5639_AD_TRG_SFT 3
-#define RT5639_AD_TRG_LO (0x0 << 3)
-#define RT5639_AD_TRG_HI (0x1 << 3)
-#define RT5639_ANCM_DET_MASK (0x3 << 4)
-#define RT5639_ANCM_DET_SFT 4
-#define RT5639_ANCM_DET_DIS (0x0 << 4)
-#define RT5639_ANCM_DET_MB1 (0x1 << 4)
-#define RT5639_ANCM_DET_MB2 (0x2 << 4)
-#define RT5639_ANCM_DET_JD (0x3 << 4)
-#define RT5639_AMD_TRG_MASK (0x1 << 3)
-#define RT5639_AMD_TRG_SFT 3
-#define RT5639_AMD_TRG_LO (0x0 << 3)
-#define RT5639_AMD_TRG_HI (0x1 << 3)
-
-/* IRQ Control 1 (0xbd) */
-#define RT5639_IRQ_JD_MASK (0x1 << 15)
-#define RT5639_IRQ_JD_SFT 15
-#define RT5639_IRQ_JD_BP (0x0 << 15)
-#define RT5639_IRQ_JD_NOR (0x1 << 15)
-#define RT5639_IRQ_OT_MASK (0x1 << 14)
-#define RT5639_IRQ_OT_SFT 14
-#define RT5639_IRQ_OT_BP (0x0 << 14)
-#define RT5639_IRQ_OT_NOR (0x1 << 14)
-#define RT5639_JD_STKY_MASK (0x1 << 13)
-#define RT5639_JD_STKY_SFT 13
-#define RT5639_JD_STKY_DIS (0x0 << 13)
-#define RT5639_JD_STKY_EN (0x1 << 13)
-#define RT5639_OT_STKY_MASK (0x1 << 12)
-#define RT5639_OT_STKY_SFT 12
-#define RT5639_OT_STKY_DIS (0x0 << 12)
-#define RT5639_OT_STKY_EN (0x1 << 12)
-#define RT5639_JD_P_MASK (0x1 << 11)
-#define RT5639_JD_P_SFT 11
-#define RT5639_JD_P_NOR (0x0 << 11)
-#define RT5639_JD_P_INV (0x1 << 11)
-#define RT5639_OT_P_MASK (0x1 << 10)
-#define RT5639_OT_P_SFT 10
-#define RT5639_OT_P_NOR (0x0 << 10)
-#define RT5639_OT_P_INV (0x1 << 10)
-
-/* IRQ Control 2 (0xbe) */
-#define RT5639_IRQ_MB1_OC_MASK (0x1 << 15)
-#define RT5639_IRQ_MB1_OC_SFT 15
-#define RT5639_IRQ_MB1_OC_BP (0x0 << 15)
-#define RT5639_IRQ_MB1_OC_NOR (0x1 << 15)
-#define RT5639_IRQ_MB2_OC_MASK (0x1 << 14)
-#define RT5639_IRQ_MB2_OC_SFT 14
-#define RT5639_IRQ_MB2_OC_BP (0x0 << 14)
-#define RT5639_IRQ_MB2_OC_NOR (0x1 << 14)
-#define RT5639_MB1_OC_STKY_MASK (0x1 << 11)
-#define RT5639_MB1_OC_STKY_SFT 11
-#define RT5639_MB1_OC_STKY_DIS (0x0 << 11)
-#define RT5639_MB1_OC_STKY_EN (0x1 << 11)
-#define RT5639_MB2_OC_STKY_MASK (0x1 << 10)
-#define RT5639_MB2_OC_STKY_SFT 10
-#define RT5639_MB2_OC_STKY_DIS (0x0 << 10)
-#define RT5639_MB2_OC_STKY_EN (0x1 << 10)
-#define RT5639_MB1_OC_P_MASK (0x1 << 7)
-#define RT5639_MB1_OC_P_SFT 7
-#define RT5639_MB1_OC_P_NOR (0x0 << 7)
-#define RT5639_MB1_OC_P_INV (0x1 << 7)
-#define RT5639_MB2_OC_P_MASK (0x1 << 6)
-#define RT5639_MB2_OC_P_SFT 6
-#define RT5639_MB2_OC_P_NOR (0x0 << 6)
-#define RT5639_MB2_OC_P_INV (0x1 << 6)
-#define RT5639_MB1_OC_CLR (0x1 << 3)
-#define RT5639_MB1_OC_CLR_SFT 3
-#define RT5639_MB2_OC_CLR (0x1 << 2)
-#define RT5639_MB2_OC_CLR_SFT 2
-
-/* GPIO Control 1 (0xc0) */
-#define RT5639_GP1_PIN_MASK (0x1 << 15)
-#define RT5639_GP1_PIN_SFT 15
-#define RT5639_GP1_PIN_GPIO1 (0x0 << 15)
-#define RT5639_GP1_PIN_IRQ (0x1 << 15)
-#define RT5639_GP2_PIN_MASK (0x1 << 14)
-#define RT5639_GP2_PIN_SFT 14
-#define RT5639_GP2_PIN_GPIO2 (0x0 << 14)
-#define RT5639_GP2_PIN_DMIC1_SCL (0x1 << 14)
-#define RT5639_GP3_PIN_MASK (0x3 << 12)
-#define RT5639_GP3_PIN_SFT 12
-#define RT5639_GP3_PIN_GPIO3 (0x0 << 12)
-#define RT5639_GP3_PIN_DMIC1_SDA (0x1 << 12)
-#define RT5639_GP3_PIN_IRQ (0x2 << 12)
-#define RT5639_GP4_PIN_MASK (0x1 << 11)
-#define RT5639_GP4_PIN_SFT 11
-#define RT5639_GP4_PIN_GPIO4 (0x0 << 11)
-#define RT5639_GP4_PIN_DMIC2_SDA (0x1 << 11)
-#define RT5639_DP_SIG_MASK (0x1 << 10)
-#define RT5639_DP_SIG_SFT 10
-#define RT5639_DP_SIG_TEST (0x0 << 10)
-#define RT5639_DP_SIG_AP (0x1 << 10)
-#define RT5639_GPIO_M_MASK (0x1 << 9)
-#define RT5639_GPIO_M_SFT 9
-#define RT5639_GPIO_M_FLT (0x0 << 9)
-#define RT5639_GPIO_M_PH (0x1 << 9)
-
-/* GPIO Control 3 (0xc2) */
-#define RT5639_GP4_PF_MASK (0x1 << 11)
-#define RT5639_GP4_PF_SFT 11
-#define RT5639_GP4_PF_IN (0x0 << 11)
-#define RT5639_GP4_PF_OUT (0x1 << 11)
-#define RT5639_GP4_OUT_MASK (0x1 << 10)
-#define RT5639_GP4_OUT_SFT 10
-#define RT5639_GP4_OUT_LO (0x0 << 10)
-#define RT5639_GP4_OUT_HI (0x1 << 10)
-#define RT5639_GP4_P_MASK (0x1 << 9)
-#define RT5639_GP4_P_SFT 9
-#define RT5639_GP4_P_NOR (0x0 << 9)
-#define RT5639_GP4_P_INV (0x1 << 9)
-#define RT5639_GP3_PF_MASK (0x1 << 8)
-#define RT5639_GP3_PF_SFT 8
-#define RT5639_GP3_PF_IN (0x0 << 8)
-#define RT5639_GP3_PF_OUT (0x1 << 8)
-#define RT5639_GP3_OUT_MASK (0x1 << 7)
-#define RT5639_GP3_OUT_SFT 7
-#define RT5639_GP3_OUT_LO (0x0 << 7)
-#define RT5639_GP3_OUT_HI (0x1 << 7)
-#define RT5639_GP3_P_MASK (0x1 << 6)
-#define RT5639_GP3_P_SFT 6
-#define RT5639_GP3_P_NOR (0x0 << 6)
-#define RT5639_GP3_P_INV (0x1 << 6)
-#define RT5639_GP2_PF_MASK (0x1 << 5)
-#define RT5639_GP2_PF_SFT 5
-#define RT5639_GP2_PF_IN (0x0 << 5)
-#define RT5639_GP2_PF_OUT (0x1 << 5)
-#define RT5639_GP2_OUT_MASK (0x1 << 4)
-#define RT5639_GP2_OUT_SFT 4
-#define RT5639_GP2_OUT_LO (0x0 << 4)
-#define RT5639_GP2_OUT_HI (0x1 << 4)
-#define RT5639_GP2_P_MASK (0x1 << 3)
-#define RT5639_GP2_P_SFT 3
-#define RT5639_GP2_P_NOR (0x0 << 3)
-#define RT5639_GP2_P_INV (0x1 << 3)
-#define RT5639_GP1_PF_MASK (0x1 << 2)
-#define RT5639_GP1_PF_SFT 2
-#define RT5639_GP1_PF_IN (0x0 << 2)
-#define RT5639_GP1_PF_OUT (0x1 << 2)
-#define RT5639_GP1_OUT_MASK (0x1 << 1)
-#define RT5639_GP1_OUT_SFT 1
-#define RT5639_GP1_OUT_LO (0x0 << 1)
-#define RT5639_GP1_OUT_HI (0x1 << 1)
-#define RT5639_GP1_P_MASK (0x1)
-#define RT5639_GP1_P_SFT 0
-#define RT5639_GP1_P_NOR (0x0)
-#define RT5639_GP1_P_INV (0x1)
-
-/* FM34-500 Register Control 1 (0xc4) */
-#define RT5639_DSP_ADD_SFT 0
-
-/* FM34-500 Register Control 2 (0xc5) */
-#define RT5639_DSP_DAT_SFT 0
-
-/* FM34-500 Register Control 3 (0xc6) */
-#define RT5639_DSP_BUSY_MASK (0x1 << 15)
-#define RT5639_DSP_BUSY_BIT 15
-#define RT5639_DSP_DS_MASK (0x1 << 14)
-#define RT5639_DSP_DS_SFT 14
-#define RT5639_DSP_DS_FM3010 (0x1 << 14)
-#define RT5639_DSP_DS_TEMP (0x1 << 14)
-#define RT5639_DSP_CLK_MASK (0x3 << 12)
-#define RT5639_DSP_CLK_SFT 12
-#define RT5639_DSP_CLK_384K (0x0 << 12)
-#define RT5639_DSP_CLK_192K (0x1 << 12)
-#define RT5639_DSP_CLK_96K (0x2 << 12)
-#define RT5639_DSP_CLK_64K (0x3 << 12)
-#define RT5639_DSP_PD_PIN_MASK (0x1 << 11)
-#define RT5639_DSP_PD_PIN_SFT 11
-#define RT5639_DSP_PD_PIN_LO (0x0 << 11)
-#define RT5639_DSP_PD_PIN_HI (0x1 << 11)
-#define RT5639_DSP_RST_PIN_MASK (0x1 << 10)
-#define RT5639_DSP_RST_PIN_SFT 10
-#define RT5639_DSP_RST_PIN_LO (0x0 << 10)
-#define RT5639_DSP_RST_PIN_HI (0x1 << 10)
-#define RT5639_DSP_R_EN (0x1 << 9)
-#define RT5639_DSP_W_EN (0x1 << 8)
-#define RT5639_DSP_CMD_MASK (0xff)
-#define RT5639_DSP_CMD_PE (0x0d) /* Patch Entry */
-#define RT5639_DSP_CMD_MW (0x3b) /* Memory Write */
-#define RT5639_DSP_CMD_MR (0x37) /* Memory Read */
-#define RT5639_DSP_CMD_RR (0x60) /* Register Read */
-#define RT5639_DSP_CMD_RW (0x68) /* Register Write */
-#define RT5639_DSP_REG_DATHI (0x26) /* High Data Addr */
-#define RT5639_DSP_REG_DATLO (0x25) /* Low Data Addr */
-
-/* Programmable Register Array Control 1 (0xc8) */
-#define RT5639_REG_SEQ_MASK (0xf << 12)
-#define RT5639_REG_SEQ_SFT 12
-#define RT5639_SEQ1_ST_MASK (0x1 << 11) /*RO*/
-#define RT5639_SEQ1_ST_SFT 11
-#define RT5639_SEQ1_ST_RUN (0x0 << 11)
-#define RT5639_SEQ1_ST_FIN (0x1 << 11)
-#define RT5639_SEQ2_ST_MASK (0x1 << 10) /*RO*/
-#define RT5639_SEQ2_ST_SFT 10
-#define RT5639_SEQ2_ST_RUN (0x0 << 10)
-#define RT5639_SEQ2_ST_FIN (0x1 << 10)
-#define RT5639_REG_LV_MASK (0x1 << 9)
-#define RT5639_REG_LV_SFT 9
-#define RT5639_REG_LV_MX (0x0 << 9)
-#define RT5639_REG_LV_PR (0x1 << 9)
-#define RT5639_SEQ_2_PT_MASK (0x1 << 8)
-#define RT5639_SEQ_2_PT_BIT 8
-#define RT5639_REG_IDX_MASK (0xff)
-#define RT5639_REG_IDX_SFT 0
-
-/* Programmable Register Array Control 2 (0xc9) */
-#define RT5639_REG_DAT_MASK (0xffff)
-#define RT5639_REG_DAT_SFT 0
-
-/* Programmable Register Array Control 3 (0xca) */
-#define RT5639_SEQ_DLY_MASK (0xff << 8)
-#define RT5639_SEQ_DLY_SFT 8
-#define RT5639_PROG_MASK (0x1 << 7)
-#define RT5639_PROG_SFT 7
-#define RT5639_PROG_DIS (0x0 << 7)
-#define RT5639_PROG_EN (0x1 << 7)
-#define RT5639_SEQ1_PT_RUN (0x1 << 6)
-#define RT5639_SEQ1_PT_RUN_BIT 6
-#define RT5639_SEQ2_PT_RUN (0x1 << 5)
-#define RT5639_SEQ2_PT_RUN_BIT 5
-
-/* Programmable Register Array Control 4 (0xcb) */
-#define RT5639_SEQ1_START_MASK (0xf << 8)
-#define RT5639_SEQ1_START_SFT 8
-#define RT5639_SEQ1_END_MASK (0xf)
-#define RT5639_SEQ1_END_SFT 0
-
-/* Programmable Register Array Control 5 (0xcc) */
-#define RT5639_SEQ2_START_MASK (0xf << 8)
-#define RT5639_SEQ2_START_SFT 8
-#define RT5639_SEQ2_END_MASK (0xf)
-#define RT5639_SEQ2_END_SFT 0
-
-/* Scramble Function (0xcd) */
-#define RT5639_SCB_KEY_MASK (0xff)
-#define RT5639_SCB_KEY_SFT 0
-
-/* Scramble Control (0xce) */
-#define RT5639_SCB_SWAP_MASK (0x1 << 15)
-#define RT5639_SCB_SWAP_SFT 15
-#define RT5639_SCB_SWAP_DIS (0x0 << 15)
-#define RT5639_SCB_SWAP_EN (0x1 << 15)
-#define RT5639_SCB_MASK (0x1 << 14)
-#define RT5639_SCB_SFT 14
-#define RT5639_SCB_DIS (0x0 << 14)
-#define RT5639_SCB_EN (0x1 << 14)
-
-/* Baseback Control (0xcf) */
-#define RT5639_BB_MASK (0x1 << 15)
-#define RT5639_BB_SFT 15
-#define RT5639_BB_DIS (0x0 << 15)
-#define RT5639_BB_EN (0x1 << 15)
-#define RT5639_BB_CT_MASK (0x7 << 12)
-#define RT5639_BB_CT_SFT 12
-#define RT5639_BB_CT_A (0x0 << 12)
-#define RT5639_BB_CT_B (0x1 << 12)
-#define RT5639_BB_CT_C (0x2 << 12)
-#define RT5639_BB_CT_D (0x3 << 12)
-#define RT5639_M_BB_L_MASK (0x1 << 9)
-#define RT5639_M_BB_L_SFT 9
-#define RT5639_M_BB_R_MASK (0x1 << 8)
-#define RT5639_M_BB_R_SFT 8
-#define RT5639_M_BB_HPF_L_MASK (0x1 << 7)
-#define RT5639_M_BB_HPF_L_SFT 7
-#define RT5639_M_BB_HPF_R_MASK (0x1 << 6)
-#define RT5639_M_BB_HPF_R_SFT 6
-#define RT5639_G_BB_BST_MASK (0x3f)
-#define RT5639_G_BB_BST_SFT 0
-
-/* MP3 Plus Control 1 (0xd0) */
-#define RT5639_M_MP3_L_MASK (0x1 << 15)
-#define RT5639_M_MP3_L_SFT 15
-#define RT5639_M_MP3_R_MASK (0x1 << 14)
-#define RT5639_M_MP3_R_SFT 14
-#define RT5639_M_MP3_MASK (0x1 << 13)
-#define RT5639_M_MP3_SFT 13
-#define RT5639_M_MP3_DIS (0x0 << 13)
-#define RT5639_M_MP3_EN (0x1 << 13)
-#define RT5639_EG_MP3_MASK (0x1f << 8)
-#define RT5639_EG_MP3_SFT 8
-#define RT5639_MP3_HLP_MASK (0x1 << 7)
-#define RT5639_MP3_HLP_SFT 7
-#define RT5639_MP3_HLP_DIS (0x0 << 7)
-#define RT5639_MP3_HLP_EN (0x1 << 7)
-#define RT5639_M_MP3_ORG_L_MASK (0x1 << 6)
-#define RT5639_M_MP3_ORG_L_SFT 6
-#define RT5639_M_MP3_ORG_R_MASK (0x1 << 5)
-#define RT5639_M_MP3_ORG_R_SFT 5
-
-/* MP3 Plus Control 2 (0xd1) */
-#define RT5639_MP3_WT_MASK (0x1 << 13)
-#define RT5639_MP3_WT_SFT 13
-#define RT5639_MP3_WT_1_4 (0x0 << 13)
-#define RT5639_MP3_WT_1_2 (0x1 << 13)
-#define RT5639_OG_MP3_MASK (0x1f << 8)
-#define RT5639_OG_MP3_SFT 8
-#define RT5639_HG_MP3_MASK (0x3f)
-#define RT5639_HG_MP3_SFT 0
-
-/* 3D HP Control 1 (0xd2) */
-#define RT5639_3D_CF_MASK (0x1 << 15)
-#define RT5639_3D_CF_SFT 15
-#define RT5639_3D_CF_DIS (0x0 << 15)
-#define RT5639_3D_CF_EN (0x1 << 15)
-#define RT5639_3D_HP_MASK (0x1 << 14)
-#define RT5639_3D_HP_SFT 14
-#define RT5639_3D_HP_DIS (0x0 << 14)
-#define RT5639_3D_HP_EN (0x1 << 14)
-#define RT5639_3D_BT_MASK (0x1 << 13)
-#define RT5639_3D_BT_SFT 13
-#define RT5639_3D_BT_DIS (0x0 << 13)
-#define RT5639_3D_BT_EN (0x1 << 13)
-#define RT5639_3D_1F_MIX_MASK (0x3 << 11)
-#define RT5639_3D_1F_MIX_SFT 11
-#define RT5639_3D_HP_M_MASK (0x1 << 10)
-#define RT5639_3D_HP_M_SFT 10
-#define RT5639_3D_HP_M_SUR (0x0 << 10)
-#define RT5639_3D_HP_M_FRO (0x1 << 10)
-#define RT5639_M_3D_HRTF_MASK (0x1 << 9)
-#define RT5639_M_3D_HRTF_SFT 9
-#define RT5639_M_3D_D2H_MASK (0x1 << 8)
-#define RT5639_M_3D_D2H_SFT 8
-#define RT5639_M_3D_D2R_MASK (0x1 << 7)
-#define RT5639_M_3D_D2R_SFT 7
-#define RT5639_M_3D_REVB_MASK (0x1 << 6)
-#define RT5639_M_3D_REVB_SFT 6
-
-/* Adjustable high pass filter control 1 (0xd3) */
-#define RT5639_2ND_HPF_MASK (0x1 << 15)
-#define RT5639_2ND_HPF_SFT 15
-#define RT5639_2ND_HPF_DIS (0x0 << 15)
-#define RT5639_2ND_HPF_EN (0x1 << 15)
-#define RT5639_HPF_CF_L_MASK (0x7 << 12)
-#define RT5639_HPF_CF_L_SFT 12
-#define RT5639_1ST_HPF_MASK (0x1 << 11)
-#define RT5639_1ST_HPF_SFT 11
-#define RT5639_1ST_HPF_DIS (0x0 << 11)
-#define RT5639_1ST_HPF_EN (0x1 << 11)
-#define RT5639_HPF_CF_R_MASK (0x7 << 8)
-#define RT5639_HPF_CF_R_SFT 8
-#define RT5639_ZD_T_MASK (0x3 << 6)
-#define RT5639_ZD_T_SFT 6
-#define RT5639_ZD_F_MASK (0x3 << 4)
-#define RT5639_ZD_F_SFT 4
-#define RT5639_ZD_F_IM (0x0 << 4)
-#define RT5639_ZD_F_ZC_IM (0x1 << 4)
-#define RT5639_ZD_F_ZC_IOD (0x2 << 4)
-#define RT5639_ZD_F_UN (0x3 << 4)
-
-/* HP calibration control and Amp detection (0xd6) */
-#define RT5639_SI_DAC_MASK (0x1 << 11)
-#define RT5639_SI_DAC_SFT 11
-#define RT5639_SI_DAC_AUTO (0x0 << 11)
-#define RT5639_SI_DAC_TEST (0x1 << 11)
-#define RT5639_DC_CAL_M_MASK (0x1 << 10)
-#define RT5639_DC_CAL_M_SFT 10
-#define RT5639_DC_CAL_M_CAL (0x0 << 10)
-#define RT5639_DC_CAL_M_NOR (0x1 << 10)
-#define RT5639_DC_CAL_MASK (0x1 << 9)
-#define RT5639_DC_CAL_SFT 9
-#define RT5639_DC_CAL_DIS (0x0 << 9)
-#define RT5639_DC_CAL_EN (0x1 << 9)
-#define RT5639_HPD_RCV_MASK (0x7 << 6)
-#define RT5639_HPD_RCV_SFT 6
-#define RT5639_HPD_PS_MASK (0x1 << 5)
-#define RT5639_HPD_PS_SFT 5
-#define RT5639_HPD_PS_DIS (0x0 << 5)
-#define RT5639_HPD_PS_EN (0x1 << 5)
-#define RT5639_CAL_M_MASK (0x1 << 4)
-#define RT5639_CAL_M_SFT 4
-#define RT5639_CAL_M_DEP (0x0 << 4)
-#define RT5639_CAL_M_CAL (0x1 << 4)
-#define RT5639_CAL_MASK (0x1 << 3)
-#define RT5639_CAL_SFT 3
-#define RT5639_CAL_DIS (0x0 << 3)
-#define RT5639_CAL_EN (0x1 << 3)
-#define RT5639_CAL_TEST_MASK (0x1 << 2)
-#define RT5639_CAL_TEST_SFT 2
-#define RT5639_CAL_TEST_DIS (0x0 << 2)
-#define RT5639_CAL_TEST_EN (0x1 << 2)
-#define RT5639_CAL_P_MASK (0x3)
-#define RT5639_CAL_P_SFT 0
-#define RT5639_CAL_P_NONE (0x0)
-#define RT5639_CAL_P_CAL (0x1)
-#define RT5639_CAL_P_DAC_CAL (0x2)
-
-/* Soft volume and zero cross control 1 (0xd9) */
-#define RT5639_SV_MASK (0x1 << 15)
-#define RT5639_SV_SFT 15
-#define RT5639_SV_DIS (0x0 << 15)
-#define RT5639_SV_EN (0x1 << 15)
-#define RT5639_SPO_SV_MASK (0x1 << 14)
-#define RT5639_SPO_SV_SFT 14
-#define RT5639_SPO_SV_DIS (0x0 << 14)
-#define RT5639_SPO_SV_EN (0x1 << 14)
-#define RT5639_OUT_SV_MASK (0x1 << 13)
-#define RT5639_OUT_SV_SFT 13
-#define RT5639_OUT_SV_DIS (0x0 << 13)
-#define RT5639_OUT_SV_EN (0x1 << 13)
-#define RT5639_HP_SV_MASK (0x1 << 12)
-#define RT5639_HP_SV_SFT 12
-#define RT5639_HP_SV_DIS (0x0 << 12)
-#define RT5639_HP_SV_EN (0x1 << 12)
-#define RT5639_ZCD_DIG_MASK (0x1 << 11)
-#define RT5639_ZCD_DIG_SFT 11
-#define RT5639_ZCD_DIG_DIS (0x0 << 11)
-#define RT5639_ZCD_DIG_EN (0x1 << 11)
-#define RT5639_ZCD_MASK (0x1 << 10)
-#define RT5639_ZCD_SFT 10
-#define RT5639_ZCD_PD (0x0 << 10)
-#define RT5639_ZCD_PU (0x1 << 10)
-#define RT5639_M_ZCD_MASK (0x3f << 4)
-#define RT5639_M_ZCD_SFT 4
-#define RT5639_M_ZCD_RM_L (0x1 << 9)
-#define RT5639_M_ZCD_RM_R (0x1 << 8)
-#define RT5639_M_ZCD_SM_L (0x1 << 7)
-#define RT5639_M_ZCD_SM_R (0x1 << 6)
-#define RT5639_M_ZCD_OM_L (0x1 << 5)
-#define RT5639_M_ZCD_OM_R (0x1 << 4)
-#define RT5639_SV_DLY_MASK (0xf)
-#define RT5639_SV_DLY_SFT 0
-
-/* Soft volume and zero cross control 2 (0xda) */
-#define RT5639_ZCD_HP_MASK (0x1 << 15)
-#define RT5639_ZCD_HP_SFT 15
-#define RT5639_ZCD_HP_DIS (0x0 << 15)
-#define RT5639_ZCD_HP_EN (0x1 << 15)
-
-
-/* Codec Private Register definition */
-/* 3D Speaker Control (0x63) */
-#define RT5639_3D_SPK_MASK (0x1 << 15)
-#define RT5639_3D_SPK_SFT 15
-#define RT5639_3D_SPK_DIS (0x0 << 15)
-#define RT5639_3D_SPK_EN (0x1 << 15)
-#define RT5639_3D_SPK_M_MASK (0x3 << 13)
-#define RT5639_3D_SPK_M_SFT 13
-#define RT5639_3D_SPK_CG_MASK (0x1f << 8)
-#define RT5639_3D_SPK_CG_SFT 8
-#define RT5639_3D_SPK_SG_MASK (0x1f)
-#define RT5639_3D_SPK_SG_SFT 0
-
-/* Wind Noise Detection Control 1 (0x6c) */
-#define RT5639_WND_MASK (0x1 << 15)
-#define RT5639_WND_SFT 15
-#define RT5639_WND_DIS (0x0 << 15)
-#define RT5639_WND_EN (0x1 << 15)
-
-/* Wind Noise Detection Control 2 (0x6d) */
-#define RT5639_WND_FC_NW_MASK (0x3f << 10)
-#define RT5639_WND_FC_NW_SFT 10
-#define RT5639_WND_FC_WK_MASK (0x3f << 4)
-#define RT5639_WND_FC_WK_SFT 4
-
-/* Wind Noise Detection Control 3 (0x6e) */
-#define RT5639_HPF_FC_MASK (0x3f << 6)
-#define RT5639_HPF_FC_SFT 6
-#define RT5639_WND_FC_ST_MASK (0x3f)
-#define RT5639_WND_FC_ST_SFT 0
-
-/* Wind Noise Detection Control 4 (0x6f) */
-#define RT5639_WND_TH_LO_MASK (0x3ff)
-#define RT5639_WND_TH_LO_SFT 0
-
-/* Wind Noise Detection Control 5 (0x70) */
-#define RT5639_WND_TH_HI_MASK (0x3ff)
-#define RT5639_WND_TH_HI_SFT 0
-
-/* Wind Noise Detection Control 8 (0x73) */
-#define RT5639_WND_WIND_MASK (0x1 << 13) /* Read-Only */
-#define RT5639_WND_WIND_SFT 13
-#define RT5639_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
-#define RT5639_WND_STRONG_SFT 12
-enum {
- RT5639_NO_WIND,
- RT5639_BREEZE,
- RT5639_STORM,
-};
-
-/* Dipole Speaker Interface (0x75) */
-#define RT5639_DP_ATT_MASK (0x3 << 14)
-#define RT5639_DP_ATT_SFT 14
-#define RT5639_DP_SPK_MASK (0x1 << 10)
-#define RT5639_DP_SPK_SFT 10
-#define RT5639_DP_SPK_DIS (0x0 << 10)
-#define RT5639_DP_SPK_EN (0x1 << 10)
-
-/* EQ Pre Volume Control (0xb3) */
-#define RT5639_EQ_PRE_VOL_MASK (0xffff)
-#define RT5639_EQ_PRE_VOL_SFT 0
-
-/* EQ Post Volume Control (0xb4) */
-#define RT5639_EQ_PST_VOL_MASK (0xffff)
-#define RT5639_EQ_PST_VOL_SFT 0
-
-/* General Control1 (0xfa) */
-#define RT5639_M_MAMIX_L (0x1 << 13)
-#define RT5639_M_MAMIX_R (0x1 << 12)
-
-/* General Control2 (0xfb) */
-#define RT5639_RXDC_SRC_MASK (0x1 << 7)
-#define RT5639_RXDC_SRC_STO (0x0 << 7)
-#define RT5639_RXDC_SRC_MONO (0x1 << 7)
-#define RT5639_RXDC_SRC_SFT (7)
-#define RT5639_RXDP2_SEL_MASK (0x1 << 3)
-#define RT5639_RXDP2_SEL_IF2 (0x0 << 3)
-#define RT5639_RXDP2_SEL_ADC (0x1 << 3)
-#define RT5639_RXDP2_SEL_SFT (3)
-
-
-/* Vendor ID (0xfd) */
-#define RT5639_VER_C 0x2
-#define RT5639_VER_D 0x3
-
-
-/* Volume Rescale */
-#define RT5639_VOL_RSCL_MAX 0x27
-#define RT5639_VOL_RSCL_RANGE 0x1F
-/* Debug String Length */
-#define RT5639_REG_DISP_LEN 23
-
-#define RT5639_NO_JACK BIT(0)
-#define RT5639_HEADSET_DET BIT(1)
-#define RT5639_HEADPHO_DET BIT(2)
-
-int rt5639_headset_detect(struct snd_soc_codec *codec, int jack_insert);
-
-/* System Clock Source */
-enum {
- RT5639_SCLK_S_MCLK,
- RT5639_SCLK_S_PLL1,
- RT5639_SCLK_S_RCCLK,
-};
-
-/* PLL1 Source */
-enum {
- RT5639_PLL1_S_MCLK,
- RT5639_PLL1_S_BCLK1,
- RT5639_PLL1_S_BCLK2,
- RT5639_PLL1_S_BCLK3,
-};
-
-enum {
- RT5639_AIF1,
- RT5639_AIF2,
- RT5639_AIF3,
- RT5639_AIFS,
-};
-
-#define RT5639_U_IF1 (0x1)
-#define RT5639_U_IF2 (0x1 << 1)
-#define RT5639_U_IF3 (0x1 << 2)
-
-enum {
- RT5639_IF_123,
- RT5639_IF_132,
- RT5639_IF_312,
- RT5639_IF_321,
- RT5639_IF_231,
- RT5639_IF_213,
- RT5639_IF_113,
- RT5639_IF_223,
- RT5639_IF_ALL,
-};
-
-enum {
- RT5639_DMIC_DIS,
- RT5639_DMIC1,
- RT5639_DMIC2,
-};
-
-struct rt5639_pll_code {
- bool m_bp; /* Indicates bypass m code or not. */
- int m_code;
- int n_code;
- int k_code;
-};
-
-struct rt5639_priv {
- struct snd_soc_codec *codec;
- struct delayed_work patch_work;
-
- int aif_pu;
- int sysclk;
- int sysclk_src;
- int lrck[RT5639_AIFS];
- int bclk[RT5639_AIFS];
- int master[RT5639_AIFS];
-
- int pll_src;
- int pll_in;
- int pll_out;
-
- int dmic_en;
-};
-
-int rt5639_conn_mux_path(struct snd_soc_codec *codec,
- char *widget_name, char *path_name);
-
-#endif /* __RT5639_H__ */
+++ /dev/null
-/*
- * rt5639_ioctl.h -- RT5639 ALSA SoC audio driver IO control
- *
- * Copyright 2012 Realtek Microelectronics
- * Author: Bard <bardliao@realtek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/spi/spi.h>
-#include <sound/soc.h>
-#include "rt56xx_ioctl.h"
-#include "rt5639_ioctl.h"
-#include "rt5639.h"
-#ifdef CONFIG_SND_SOC_RT5642
-#include "rt5639-dsp.h"
-#endif
-
-static hweq_t hweq_param[] = {
- {/* NORMAL */
- {0},
- {0},
- 0x0000,
- },
- {/* SPK */
- {0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2},
- {0x1c10,0x01f4, 0xc5e9, 0x1a98, 0x1d2c, 0xc882, 0x1c10, 0x01f4, 0xe904, 0x1c10, 0x01f4, 0xe904, 0x1c10, 0x01f4, 0x1c10, 0x01f4, 0x2000, 0x0000, 0x2000},
- 0x0000,
- },
- {/* HP */
- {0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2},
- {0x1c10,0x01f4, 0xc5e9, 0x1a98, 0x1d2c, 0xc882, 0x1c10, 0x01f4, 0xe904, 0x1c10, 0x01f4, 0xe904, 0x1c10, 0x01f4, 0x1c10, 0x01f4, 0x2000, 0x0000, 0x2000},
- 0x0000,
- },
-};
-#define RT5639_HWEQ_LEN ARRAY_SIZE(hweq_param)
-
-int rt5639_update_eqmode(
- struct snd_soc_codec *codec, int mode)
-{
- struct rt56xx_ops *ioctl_ops = rt56xx_get_ioctl_ops();
- int i;
- static int eqmode;
-
- if(codec == NULL || mode >= RT5639_HWEQ_LEN)
- return -EINVAL;
-
- dev_dbg(codec->dev, "%s(): mode=%d\n", __func__, mode);
- if(mode == eqmode)
- return 0;
-
- for(i = 0; i <= EQ_REG_NUM; i++) {
- if(hweq_param[mode].reg[i])
- ioctl_ops->index_write(codec, hweq_param[mode].reg[i],
- hweq_param[mode].value[i]);
- else
- break;
- }
- snd_soc_update_bits(codec, RT5639_EQ_CTRL2, RT5639_EQ_CTRL_MASK,
- hweq_param[mode].ctrl);
- snd_soc_update_bits(codec, RT5639_EQ_CTRL1,
- RT5639_EQ_UPD, RT5639_EQ_UPD);
- snd_soc_update_bits(codec, RT5639_EQ_CTRL1, RT5639_EQ_UPD, 0);
-
- eqmode = mode;
-
- return 0;
-}
-
-static void set_drc_agc_enable(struct snd_soc_codec *codec, int enable, int path)
-{
- snd_soc_update_bits(codec, RT5639_DRC_AGC_1, RT5639_DRC_AGC_P_MASK |
- RT5639_DRC_AGC_MASK | RT5639_DRC_AGC_UPD,
- enable << RT5639_DRC_AGC_SFT | path << RT5639_DRC_AGC_P_SFT |
- 1 << RT5639_DRC_AGC_UPD_BIT);
-}
-
-static void set_drc_agc_parameters(struct snd_soc_codec *codec, int attack_rate,
- int sample_rate, int recovery_rate, int limit_level)
-{
- snd_soc_update_bits(codec, RT5639_DRC_AGC_3, RT5639_DRC_AGC_TAR_MASK,
- limit_level << RT5639_DRC_AGC_TAR_SFT);
- snd_soc_update_bits(codec, RT5639_DRC_AGC_1, RT5639_DRC_AGC_AR_MASK |
- RT5639_DRC_AGC_R_MASK | RT5639_DRC_AGC_UPD |
- RT5639_DRC_AGC_RC_MASK, attack_rate << RT5639_DRC_AGC_AR_SFT |
- sample_rate << RT5639_DRC_AGC_R_SFT |
- recovery_rate << RT5639_DRC_AGC_RC_SFT |
- 0x1 << RT5639_DRC_AGC_UPD_BIT);
-}
-
-static void set_digital_boost_gain(struct snd_soc_codec *codec,
- int post_gain, int pre_gain)
-{
- snd_soc_update_bits(codec, RT5639_DRC_AGC_2,
- RT5639_DRC_AGC_POB_MASK | RT5639_DRC_AGC_PRB_MASK,
- post_gain << RT5639_DRC_AGC_POB_SFT |
- pre_gain << RT5639_DRC_AGC_PRB_SFT);
- snd_soc_update_bits(codec, RT5639_DRC_AGC_1,
- RT5639_DRC_AGC_UPD, 1 << RT5639_DRC_AGC_UPD_BIT);
-}
-
-static void set_noise_gate(struct snd_soc_codec *codec, int noise_gate_en,
- int noise_gate_hold_en, int compression_gain, int noise_gate_th)
-{
- snd_soc_update_bits(codec, RT5639_DRC_AGC_3,
- RT5639_DRC_AGC_NGB_MASK | RT5639_DRC_AGC_NG_MASK |
- RT5639_DRC_AGC_NGH_MASK | RT5639_DRC_AGC_NGT_MASK,
- noise_gate_en << RT5639_DRC_AGC_NG_SFT |
- noise_gate_hold_en << RT5639_DRC_AGC_NGH_SFT |
- compression_gain << RT5639_DRC_AGC_NGB_SFT |
- noise_gate_th << RT5639_DRC_AGC_NGT_SFT);
- snd_soc_update_bits(codec, RT5639_DRC_AGC_1,
- RT5639_DRC_AGC_UPD, 1 << RT5639_DRC_AGC_UPD_BIT);
-}
-
-static void set_drc_agc_compression(struct snd_soc_codec *codec,
- int compression_en, int compression_ratio)
-{
- snd_soc_update_bits(codec, RT5639_DRC_AGC_2,
- RT5639_DRC_AGC_CP_MASK | RT5639_DRC_AGC_CPR_MASK,
- compression_en << RT5639_DRC_AGC_CP_SFT |
- compression_ratio << RT5639_DRC_AGC_CPR_SFT);
- snd_soc_update_bits(codec, RT5639_DRC_AGC_1,
- RT5639_DRC_AGC_UPD, 1 << RT5639_DRC_AGC_UPD_BIT);
-}
-
-static void get_drc_agc_enable(struct snd_soc_codec *codec, int *enable, int *path)
-{
- unsigned int reg = snd_soc_read(codec, RT5639_DRC_AGC_1);
-
- *enable = (reg & RT5639_DRC_AGC_MASK) >> RT5639_DRC_AGC_SFT;
- *path = (reg & RT5639_DRC_AGC_P_MASK) >> RT5639_DRC_AGC_P_SFT;
-}
-
-static void get_drc_agc_parameters(struct snd_soc_codec *codec, int *attack_rate,
- int *sample_rate, int *recovery_rate, int *limit_level)
-{
- unsigned int reg = snd_soc_read(codec, RT5639_DRC_AGC_3);
-
- *limit_level = (reg & RT5639_DRC_AGC_TAR_MASK) >>
- RT5639_DRC_AGC_TAR_SFT;
- reg = snd_soc_read(codec, RT5639_DRC_AGC_1);
- *attack_rate = (reg & RT5639_DRC_AGC_AR_MASK) >> RT5639_DRC_AGC_AR_SFT;
- *sample_rate = (reg & RT5639_DRC_AGC_R_MASK) >> RT5639_DRC_AGC_R_SFT;
- *recovery_rate = (reg & RT5639_DRC_AGC_RC_MASK) >>
- RT5639_DRC_AGC_RC_SFT;
-}
-
-static void get_digital_boost_gain(struct snd_soc_codec *codec,
- int *post_gain, int *pre_gain)
-{
- unsigned int reg = snd_soc_read(codec, RT5639_DRC_AGC_2);
-
- *post_gain = (reg & RT5639_DRC_AGC_POB_MASK) >> RT5639_DRC_AGC_POB_SFT;
- *pre_gain = (reg & RT5639_DRC_AGC_PRB_MASK) >> RT5639_DRC_AGC_PRB_SFT;
-}
-
-static void get_noise_gate(struct snd_soc_codec *codec, int *noise_gate_en,
- int *noise_gate_hold_en, int *compression_gain, int *noise_gate_th)
-{
- unsigned int reg = snd_soc_read(codec, RT5639_DRC_AGC_3);
-
- printk("get_noise_gate reg=0x%04x\n",reg);
- *noise_gate_en = (reg & RT5639_DRC_AGC_NG_MASK) >>
- RT5639_DRC_AGC_NG_SFT;
- *noise_gate_hold_en = (reg & RT5639_DRC_AGC_NGH_MASK) >>
- RT5639_DRC_AGC_NGH_SFT;
- *compression_gain = (reg & RT5639_DRC_AGC_NGB_MASK) >>
- RT5639_DRC_AGC_NGB_SFT;
- *noise_gate_th = (reg & RT5639_DRC_AGC_NGT_MASK) >>
- RT5639_DRC_AGC_NGT_SFT;
-}
-
-static void get_drc_agc_compression(struct snd_soc_codec *codec,
- int *compression_en, int *compression_ratio)
-{
- unsigned int reg = snd_soc_read(codec, RT5639_DRC_AGC_2);
-
- *compression_en = (reg & RT5639_DRC_AGC_CP_MASK) >>
- RT5639_DRC_AGC_CP_SFT;
- *compression_ratio = (reg & RT5639_DRC_AGC_CPR_MASK) >>
- RT5639_DRC_AGC_CPR_SFT;
-}
-
-int rt5639_ioctl_common(struct snd_hwdep *hw, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- struct snd_soc_codec *codec = hw->private_data;
- struct rt56xx_cmd __user *_rt56xx = (struct rt56xx_cmd *)arg;
- struct rt56xx_cmd rt56xx;
- struct rt56xx_ops *ioctl_ops = rt56xx_get_ioctl_ops();
- int *buf, mask1 = 0, mask2 = 0;
- static int eq_mode;
-
- if (copy_from_user(&rt56xx, _rt56xx, sizeof(rt56xx))) {
- dev_err(codec->dev,"copy_from_user faild\n");
- return -EFAULT;
- }
- dev_dbg(codec->dev, "%s(): rt56xx.number=%d, cmd=%d\n",
- __func__, rt56xx.number, cmd);
- buf = kmalloc(sizeof(*buf) * rt56xx.number, GFP_KERNEL);
- if (buf == NULL)
- return -ENOMEM;
- if (copy_from_user(buf, rt56xx.buf, sizeof(*buf) * rt56xx.number)) {
- goto err;
- }
-
- switch (cmd) {
- case RT_SET_CODEC_HWEQ_IOCTL:
- if (eq_mode == *buf)
- break;
- eq_mode = *buf;
- rt5639_update_eqmode(codec, eq_mode);
- break;
-
- case RT_GET_CODEC_ID:
- *buf = snd_soc_read(codec, RT5639_VENDOR_ID2);
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_SET_CODEC_SPK_VOL_IOCTL:
- if(*(buf) <= 0x27) {
- snd_soc_update_bits(codec, RT5639_SPK_VOL,
- RT5639_L_VOL_MASK | RT5639_R_VOL_MASK,
- *(buf) << RT5639_L_VOL_SFT |
- *(buf) << RT5639_R_VOL_SFT);
- }
- break;
-
- case RT_SET_CODEC_MIC_GAIN_IOCTL:
- if(*(buf) <= 0x8) {
- snd_soc_update_bits(codec, RT5639_IN1_IN2,
- RT5639_BST_MASK1, *(buf) << RT5639_BST_SFT1);
- snd_soc_update_bits(codec, RT5639_IN3_IN4,
- RT5639_BST_MASK2, *(buf) << RT5639_BST_SFT2);
- }
- break;
-
- case RT_SET_CODEC_3D_SPK_IOCTL:
- if(rt56xx.number < 4)
- break;
- if (NULL == ioctl_ops->index_update_bits)
- break;
-
- mask1 = 0;
- if(*buf != -1)
- mask1 |= RT5639_3D_SPK_MASK;
- if(*(buf + 1) != -1)
- mask1 |= RT5639_3D_SPK_M_MASK;
- if(*(buf + 2) != -1)
- mask1 |= RT5639_3D_SPK_CG_MASK;
- if(*(buf + 3) != -1)
- mask1 |= RT5639_3D_SPK_SG_MASK;
- ioctl_ops->index_update_bits(codec, RT5639_3D_SPK, mask1,
- *(buf) << RT5639_3D_SPK_SFT |
- *(buf + 1) << RT5639_3D_SPK_M_SFT |
- *(buf + 2) << RT5639_3D_SPK_CG_SFT |
- *(buf + 3) << RT5639_3D_SPK_SG_SFT);
- break;
-
- case RT_SET_CODEC_MP3PLUS_IOCTL:
- if(rt56xx.number < 5)
- break;
- mask1 = mask2 = 0;
- if(*buf != -1)
- mask1 |= RT5639_M_MP3_MASK;
- if(*(buf + 1) != -1)
- mask1 |= RT5639_EG_MP3_MASK;
- if(*(buf + 2) != -1)
- mask2 |= RT5639_OG_MP3_MASK;
- if(*(buf + 3) != -1)
- mask2 |= RT5639_HG_MP3_MASK;
- if(*(buf + 4) != -1)
- mask2 |= RT5639_MP3_WT_MASK;
-
- snd_soc_update_bits(codec, RT5639_MP3_PLUS1, mask1,
- *(buf) << RT5639_M_MP3_SFT |
- *(buf + 1) << RT5639_EG_MP3_SFT);
- snd_soc_update_bits(codec, RT5639_MP3_PLUS2, mask2,
- *(buf + 2) << RT5639_OG_MP3_SFT |
- *(buf + 3) << RT5639_HG_MP3_SFT |
- *(buf + 4) << RT5639_MP3_WT_SFT);
- break;
- case RT_SET_CODEC_3D_HEADPHONE_IOCTL:
- if(rt56xx.number < 4)
- break;
- if (NULL == ioctl_ops->index_update_bits)
- break;
-
- mask1 = 0;
- if(*buf != -1)
- mask1 |= RT5639_3D_HP_MASK;
- if(*(buf + 1) != -1)
- mask1 |= RT5639_3D_BT_MASK;
- if(*(buf + 2) != -1)
- mask1 |= RT5639_3D_1F_MIX_MASK;
- if(*(buf + 3) != -1)
- mask1 |= RT5639_3D_HP_M_MASK;
-
- snd_soc_update_bits(codec, RT5639_3D_HP, mask1,
- *(buf)<<RT5639_3D_HP_SFT |
- *(buf + 1) << RT5639_3D_BT_SFT |
- *(buf + 2) << RT5639_3D_1F_MIX_SFT |
- *(buf + 3) << RT5639_3D_HP_M_SFT);
- if(*(buf + 4) != -1)
- ioctl_ops->index_update_bits(codec,
- 0x59, 0x1f, *(buf+4));
- break;
-
- case RT_SET_CODEC_BASS_BACK_IOCTL:
- if(rt56xx.number < 3)
- break;
- mask1 = 0;
- if(*buf != -1)
- mask1 |= RT5639_BB_MASK;
- if(*(buf + 1) != -1)
- mask1 |= RT5639_BB_CT_MASK;
- if(*(buf + 2) != -1)
- mask1 |= RT5639_G_BB_BST_MASK;
-
- snd_soc_update_bits(codec, RT5639_BASE_BACK, mask1,
- *(buf) << RT5639_BB_SFT |
- *(buf + 1) << RT5639_BB_CT_SFT |
- *(buf + 2) << RT5639_G_BB_BST_SFT);
- break;
-
- case RT_SET_CODEC_DIPOLE_SPK_IOCTL:
- if(rt56xx.number < 2)
- break;
- if (NULL == ioctl_ops->index_update_bits)
- break;
-
- mask1 = 0;
- if(*buf != -1)
- mask1 |= RT5639_DP_SPK_MASK;
- if(*(buf + 1) != -1)
- mask1 |= RT5639_DP_ATT_MASK;
-
- ioctl_ops->index_update_bits(codec, RT5639_DIP_SPK_INF,
- mask1, *(buf) << RT5639_DP_SPK_SFT |
- *(buf + 1) << RT5639_DP_ATT_SFT );
- break;
-
- case RT_SET_CODEC_DRC_AGC_ENABLE_IOCTL:
- if(rt56xx.number < 2)
- break;
- set_drc_agc_enable(codec, *(buf), *(buf + 1));
- break;
-
- case RT_SET_CODEC_DRC_AGC_PAR_IOCTL:
- if(rt56xx.number < 4)
- break;
- set_drc_agc_parameters(codec, *(buf), *(buf + 1),
- *(buf + 2), *(buf + 3));
- break;
-
- case RT_SET_CODEC_DIGI_BOOST_GAIN_IOCTL:
- if(rt56xx.number < 2)
- break;
- set_digital_boost_gain(codec, *(buf), *(buf + 1));
- break;
-
- case RT_SET_CODEC_NOISE_GATE_IOCTL:
- if(rt56xx.number < 4)
- break;
- set_noise_gate(codec, *(buf), *(buf + 1),
- *(buf + 2), *(buf + 3));
- break;
-
- case RT_SET_CODEC_DRC_AGC_COMP_IOCTL:
- if(rt56xx.number < 2)
- break;
- set_drc_agc_compression(codec, *(buf), *(buf + 1));
- break;
-
- case RT_SET_CODEC_WNR_ENABLE_IOCTL:
- if (NULL == ioctl_ops->index_update_bits)
- break;
-
- ioctl_ops->index_update_bits(codec, RT5639_WND_1,
- RT5639_WND_MASK, *(buf) << RT5639_WND_SFT );
- break;
-
- case RT_GET_CODEC_DRC_AGC_ENABLE_IOCTL:
- if(rt56xx.number < 2)
- break;
- get_drc_agc_enable(codec, (buf), (buf + 1));
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_GET_CODEC_DRC_AGC_PAR_IOCTL:
- if(rt56xx.number < 4)
- break;
- get_drc_agc_parameters(codec, (buf), (buf + 1),
- (buf + 2), (buf + 3));
- if (copy_to_user(rt56xx.buf, buf,
- sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_GET_CODEC_DIGI_BOOST_GAIN_IOCTL:
- if(rt56xx.number < 2)
- break;
- get_digital_boost_gain(codec, (buf), (buf + 1));
- if (copy_to_user(rt56xx.buf, buf,
- sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_GET_CODEC_NOISE_GATE_IOCTL:
- if(rt56xx.number < 4)
- break;
- get_noise_gate(codec, (buf), (buf + 1), (buf + 2), (buf + 3));
- if (copy_to_user(rt56xx.buf, buf,
- sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_GET_CODEC_DRC_AGC_COMP_IOCTL:
- if(rt56xx.number < 2)
- break;
- get_drc_agc_compression(codec, (buf), (buf + 1));
- if (copy_to_user(rt56xx.buf, buf,
- sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_GET_CODEC_SPK_VOL_IOCTL:
- *buf = (snd_soc_read(codec, RT5639_SPK_VOL) & RT5639_L_VOL_MASK)
- >> RT5639_L_VOL_SFT;
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_GET_CODEC_MIC_GAIN_IOCTL:
- *buf = (snd_soc_read(codec, RT5639_IN1_IN2) & RT5639_BST_MASK1)
- >> RT5639_BST_SFT1;
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-#ifdef CONFIG_SND_SOC_RT5642
- case RT_READ_CODEC_DSP_IOCTL:
- case RT_WRITE_CODEC_DSP_IOCTL:
- case RT_GET_CODEC_DSP_MODE_IOCTL:
- return rt56xx_dsp_ioctl_common(hw, file, cmd, arg);
-#endif
- case RT_GET_CODEC_HWEQ_IOCTL:
- case RT_GET_CODEC_3D_SPK_IOCTL:
- case RT_GET_CODEC_MP3PLUS_IOCTL:
- case RT_GET_CODEC_3D_HEADPHONE_IOCTL:
- case RT_GET_CODEC_BASS_BACK_IOCTL:
- case RT_GET_CODEC_DIPOLE_SPK_IOCTL:
- default:
- break;
- }
-
- kfree(buf);
- return 0;
-
-err:
- kfree(buf);
- return -EFAULT;
-}
-EXPORT_SYMBOL_GPL(rt5639_ioctl_common);
+++ /dev/null
-/*
- * rt5639_ioctl.h -- RT5639 ALSA SoC audio driver IO control
- *
- * Copyright 2012 Realtek Microelectronics
- * Author: Bard <bardliao@realtek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __RT5639_IOCTL_H__
-#define __RT5639_IOCTL_H__
-
-#include <sound/hwdep.h>
-#include <linux/ioctl.h>
-
-enum {
- NORMAL=0,
- SPK,
- HP,
- MODE_NUM,
-};
-
-#define EQ_REG_NUM 19
-typedef struct hweq_s {
- unsigned int reg[EQ_REG_NUM];
- unsigned int value[EQ_REG_NUM];
- unsigned int ctrl;
-} hweq_t;
-
-int rt5639_ioctl_common(struct snd_hwdep *hw, struct file *file,
- unsigned int cmd, unsigned long arg);
-int rt5639_update_eqmode(
- struct snd_soc_codec *codec, int mode);
-
-#endif /* __RT5639_IOCTL_H__ */
+++ /dev/null
-/*
- * rt5640.c -- RT5640 ALSA SoC DSP driver
- *
- * Copyright 2011 Realtek Semiconductor Corp.
- * Author: Johnny Hsu <johnnyhsu@realtek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/delay.h>
-#include <linux/i2c.h>
-#include <linux/platform_device.h>
-#include <sound/soc.h>
-#include <sound/soc-dapm.h>
-
-#define RTK_IOCTL
-#ifdef RTK_IOCTL
-#include <linux/spi/spi.h>
-#include "rt56xx_ioctl.h"
-#endif
-
-#include "rt5640.h"
-#include "rt5640-dsp.h"
-
-static const u16 rt5640_dsp_init[][2] = {
- {0x3fd2, 0x0038}, {0x229C, 0x0fa0}, {0x22d2, 0x8400}, {0x22ee, 0x0001},
- {0x22f2, 0x0040}, {0x22f5, 0x8000}, {0x22f6, 0x0000}, {0x22f9, 0x007f},
- {0x2310, 0x0880},
-};
-#define RT5640_DSP_INIT_NUM \
- (sizeof(rt5640_dsp_init) / sizeof(rt5640_dsp_init[0]))
-
-static const u16 rt5640_dsp_48[][2] = {
- {0x22c8, 0x0026}, {0x22fe, 0x0fa0}, {0x22ff, 0x3893}, {0x22fa, 0x2487},
- {0x2301, 0x0002},
-};
-#define RT5640_DSP_48_NUM (sizeof(rt5640_dsp_48) / sizeof(rt5640_dsp_48[0]))
-
-static const u16 rt5640_dsp_441[][2] = {
- {0x22c6, 0x0031}, {0x22c7, 0x0050}, {0x22c8, 0x0009}, {0x22fe, 0x0e5b},
- {0x22ff, 0x3c83}, {0x22fa, 0x2484}, {0x2301, 0x0001},
-};
-#define RT5640_DSP_441_NUM (sizeof(rt5640_dsp_441) / sizeof(rt5640_dsp_441[0]))
-
-static const u16 rt5640_dsp_16[][2] = {
- {0x22c8, 0x0026}, {0x22fa, 0x2484}, {0x2301, 0x0002},
-};
-#define RT5640_DSP_16_NUM (sizeof(rt5640_dsp_16) / sizeof(rt5640_dsp_16[0]))
-
-static const u16 rt5640_dsp_aec_ns_fens[][2] = {
- {0x22f8, 0x8005}, {0x2303, 0x0971}, {0x2304, 0x0312}, {0x2305, 0x0005},
- {0x2309, 0x0400}, {0x230a, 0x1b00}, {0x230c, 0x0200}, {0x230d, 0x0300},
- {0x2310, 0x0824}, {0x2325, 0x5000}, {0x2326, 0x0040}, {0x232f, 0x0080},
- {0x2332, 0x0080}, {0x2333, 0x0008}, {0x2337, 0x0002}, {0x2339, 0x0010},
- {0x2348, 0x1000}, {0x2349, 0x1000}, {0x2360, 0x0180}, {0x2361, 0x1800},
- {0x2362, 0x0180}, {0x2363, 0x0100}, {0x2364, 0x0078}, {0x2365, 0x2000},
- {0x236e, 0x1800}, {0x236f, 0x0a0a}, {0x2370, 0x0f00}, {0x2372, 0x1a00},
- {0x2373, 0x3000}, {0x2374, 0x2400}, {0x2375, 0x1800}, {0x2380, 0x7fff},
- {0x2381, 0x4000}, {0x2382, 0x0400}, {0x2383, 0x0400}, {0x2384, 0x0005},
- {0x2385, 0x0005}, {0x238c, 0x0400}, {0x238e, 0x7000}, {0x2393, 0x4444},
- {0x2394, 0x4444}, {0x2395, 0x4444}, {0x2396, 0x2000}, {0x2396, 0x3000},
- {0x2398, 0x0020}, {0x23a5, 0x0006}, {0x23a6, 0x7fff}, {0x23b3, 0x000e},
- {0x23b4, 0x000a}, {0x23b7, 0x0008}, {0x23bb, 0x1000}, {0x23bc, 0x0130},
- {0x23bd, 0x0100}, {0x23be, 0x2400}, {0x23cf, 0x0800}, {0x23d0, 0x0400},
- {0x23d1, 0xff80}, {0x23d2, 0xff80}, {0x23d3, 0x0800}, {0x23d4, 0x3e00},
- {0x23d5, 0x5000}, {0x23e7, 0x0800}, {0x23e8, 0x0e00}, {0x23e9, 0x7000},
- {0x23ea, 0x7ff0}, {0x23ed, 0x0300}, {0x22fb, 0x0000},
-};
-#define RT5640_DSP_AEC_NUM \
- (sizeof(rt5640_dsp_aec_ns_fens) / sizeof(rt5640_dsp_aec_ns_fens[0]))
-
-static const u16 rt5640_dsp_hfbf[][2] = {
- {0x22f8, 0x8004}, {0x22a0, 0x1205}, {0x22a1, 0x0f00}, {0x22a2, 0x1000},
- {0x22a3, 0x1000}, {0x22a4, 0x1000}, {0x22aa, 0x0006}, {0x22ad, 0x0060},
- {0x22ae, 0x0080}, {0x22af, 0x0000}, {0x22b0, 0x000e}, {0x22b1, 0x0010},
- {0x22b2, 0x0006}, {0x22b3, 0x0001}, {0x22b4, 0x0010}, {0x22b5, 0x0001},
- {0x22b7, 0x0005}, {0x22d8, 0x0017}, {0x22f9, 0x007f}, {0x2303, 0x0971},
- {0x2304, 0x0302}, {0x2303, 0x0971}, {0x2304, 0x4302}, {0x2305, 0x102d},
- {0x2309, 0x0400}, {0x230c, 0x0400}, {0x230d, 0x0200}, {0x232f, 0x0020},
- {0x2332, 0x0100}, {0x2333, 0x0020}, {0x2337, 0xffff}, {0x2339, 0x0010},
- {0x2348, 0x1000}, {0x2349, 0x1000}, {0x236e, 0x1800}, {0x236f, 0x1006},
- {0x2370, 0x1000}, {0x2372, 0x0200}, {0x237b, 0x001e}, {0x2380, 0x7fff},
- {0x2381, 0x4000}, {0x2382, 0x0080}, {0x2383, 0x0200}, {0x2386, 0x7f80},
- {0x2387, 0x0040}, {0x238a, 0x0280}, {0x238c, 0x6000}, {0x238e, 0x5000},
- {0x2396, 0x6a00}, {0x2397, 0x6000}, {0x2398, 0x00e0}, {0x23a5, 0x0005},
- {0x23b3, 0x000f}, {0x23b4, 0x0003}, {0x23bb, 0x2000}, {0x23bc, 0x00d0},
- {0x23bd, 0x0140}, {0x23be, 0x1000}, {0x23cf, 0x0800}, {0x23d0, 0x0400},
- {0x23d1, 0x0100}, {0x23d2, 0x0100}, {0x23d5, 0x7c00}, {0x23ed, 0x0300},
- {0x23ee, 0x3000}, {0x23ef, 0x2800}, {0x22fb, 0x0000},
-};
-#define RT5640_DSP_HFBF_NUM \
- (sizeof(rt5640_dsp_hfbf) / sizeof(rt5640_dsp_hfbf[0]))
-
-static const u16 rt5640_dsp_ffp[][2] = {
- {0x22f8, 0x8005}, {0x2303, 0x1971}, {0x2304, 0x8312}, {0x2305, 0x0005},
- {0x2309, 0x0200}, {0x230a, 0x1b00}, {0x230c, 0x0800}, {0x230d, 0x0400},
- {0x2325, 0x5000}, {0x2326, 0x0040}, {0x232f, 0x0080}, {0x2332, 0x0100},
- {0x2333, 0x0020}, {0x2337, 0x0001}, {0x2339, 0x0010}, {0x233c, 0x0040},
- {0x2348, 0x1000}, {0x2349, 0x1000}, {0x2360, 0x0180}, {0x2361, 0x1800},
- {0x2362, 0x0200}, {0x2363, 0x0200}, {0x2364, 0x0200}, {0x2365, 0x2000},
- {0x236e, 0x1000}, {0x236f, 0x0a05}, {0x2370, 0x0f00}, {0x2372, 0x1a00},
- {0x2373, 0x3000}, {0x2374, 0x2400}, {0x2375, 0x1800}, {0x2380, 0x7fff},
- {0x2381, 0x4000}, {0x2382, 0x0400}, {0x2383, 0x0400}, {0x2384, 0x0005},
- {0x2385, 0x0005}, {0x238e, 0x7000}, {0x2393, 0x4444}, {0x2394, 0x4444},
- {0x2395, 0x4444}, {0x2396, 0x2000}, {0x2397, 0x3000}, {0x2398, 0x0020},
- {0x23a5, 0x0006}, {0x23a6, 0x7fff}, {0x23b3, 0x000a}, {0x23b4, 0x0006},
- {0x23b7, 0x0008}, {0x23bb, 0x1000}, {0x23bc, 0x0130}, {0x23bd, 0x0160},
- {0x23be, 0x2400}, {0x23cf, 0x0800}, {0x23d0, 0x0400}, {0x23d1, 0xff80},
- {0x23d2, 0xff80}, {0x23d3, 0x2000}, {0x23d4, 0x5000}, {0x23d5, 0x5000},
- {0x23e7, 0x0c00}, {0x23e8, 0x1400}, {0x23e9, 0x6000}, {0x23ea, 0x7f00},
- {0x23ed, 0x0300}, {0x23ee, 0x2800}, {0x22fb, 0x0000},
-};
-#define RT5640_DSP_FFP_NUM (sizeof(rt5640_dsp_ffp) / sizeof(rt5640_dsp_ffp[0]))
-
-static const u16 rt5640_dsp_p3_tab[][3] = {
- {0x4af0, 0x1000, 0x822b}, {0x90f0, 0x1001, 0x8393},
- {0x64f0, 0x1002, 0x822b}, {0x0ff0, 0x1003, 0x26e0},
- {0x55f0, 0x1004, 0x2200}, {0xcff0, 0x1005, 0x1a7b},
- {0x5af0, 0x1006, 0x823a}, {0x90f0, 0x1007, 0x8393},
- {0x64f0, 0x1008, 0x822b}, {0x0ff0, 0x1009, 0x26e0},
- {0x03f0, 0x100a, 0x2218}, {0x0ef0, 0x100b, 0x3400},
- {0x4ff0, 0x100c, 0x195e}, {0x00f0, 0x100d, 0x0000},
- {0xf0f0, 0x100e, 0x8143}, {0x1ff0, 0x100f, 0x2788},
- {0x0ef0, 0x1010, 0x3400}, {0xe0f0, 0x1011, 0x1a26},
- {0x2cf0, 0x1012, 0x8001}, {0x0ff0, 0x1013, 0x267c},
- {0x82f0, 0x1014, 0x1a27}, {0x3cf0, 0x1015, 0x8001},
- {0x0ff0, 0x1016, 0x267c}, {0x82f0, 0x1017, 0x1a27},
- {0xeff0, 0x1018, 0x1a26}, {0x01f0, 0x1019, 0x4ff0},
- {0x5cf0, 0x101a, 0x2b81}, {0xfaf0, 0x101b, 0x2a6a},
- {0x05f0, 0x101c, 0x4011}, {0x0ff0, 0x101d, 0x278e},
- {0x0ef0, 0x101e, 0x3400}, {0xe1f0, 0x101f, 0x1997},
- {0x1ff0, 0x1020, 0x1997}, {0x03f0, 0x1021, 0x2279},
- {0xb8f0, 0x1022, 0x8206}, {0xf8f0, 0x1023, 0x0f00},
- {0xfff0, 0x1024, 0x279e}, {0x0ff0, 0x1025, 0x2272},
- {0x0ef0, 0x1026, 0x3400}, {0x3ff0, 0x1027, 0x199a},
- {0x0ff0, 0x1028, 0x2262}, {0x0ff0, 0x1029, 0x2272},
- {0x0ef0, 0x102a, 0x3400}, {0xfff0, 0x102b, 0x199a},
- {0x7ff0, 0x102c, 0x22e2}, {0x0ef0, 0x102d, 0x3400},
- {0xfff0, 0x102e, 0x19cb}, {0xfff0, 0x102f, 0x47ff},
- {0xb1f0, 0x1030, 0x80b1}, {0x5ff0, 0x1031, 0x2261},
- {0x62f0, 0x1032, 0x1903}, {0x9af0, 0x1033, 0x0d00},
- {0xcff0, 0x1034, 0x80b1}, {0x0ff0, 0x1035, 0x0e27},
- {0x8ff0, 0x1036, 0x9229}, {0x0ef0, 0x1037, 0x3400},
- {0xaff0, 0x1038, 0x19f5}, {0x81f0, 0x1039, 0x8229},
- {0x0ef0, 0x103a, 0x3400}, {0xfff0, 0x103b, 0x19f6},
- {0x5af0, 0x103c, 0x8234}, {0xeaf0, 0x103d, 0x9113},
- {0x0ef0, 0x103e, 0x3400}, {0x7ff0, 0x103f, 0x19ea},
- {0x8af0, 0x1040, 0x924d}, {0x08f0, 0x1041, 0x3400},
- {0x3ff0, 0x1042, 0x1a74}, {0x00f0, 0x1043, 0x0000},
- {0x00f0, 0x1044, 0x0000}, {0x00f0, 0x1045, 0x0c38},
- {0x0ff0, 0x1046, 0x2618}, {0xb0f0, 0x1047, 0x8148},
- {0x01f0, 0x1048, 0x3700}, {0x02f0, 0x1049, 0x3a70},
- {0x03f0, 0x104a, 0x3a78}, {0x9af0, 0x104b, 0x8229},
- {0xd6f0, 0x104c, 0x47c4}, {0x95f0, 0x104d, 0x4361},
- {0x0ff0, 0x104e, 0x2082}, {0x76f0, 0x104f, 0x626b},
- {0x0ff0, 0x1050, 0x208a}, {0x0ff0, 0x1051, 0x204a},
- {0xc9f0, 0x1052, 0x7882}, {0x75f0, 0x1053, 0x626b},
- {0x0ff0, 0x1054, 0x208a}, {0x0ff0, 0x1055, 0x204a},
- {0xcdf0, 0x1056, 0x7882}, {0x0ff0, 0x1057, 0x2630},
- {0x8af0, 0x1058, 0x2b30}, {0xf4f0, 0x1059, 0x1904},
- {0x98f0, 0x105a, 0x9229}, {0x0ef0, 0x105b, 0x3400},
- {0xeff0, 0x105c, 0x19fd}, {0xd7f0, 0x105d, 0x40cc},
- {0x0ef0, 0x105e, 0x3400}, {0xdff0, 0x105f, 0x1a44},
- {0x00f0, 0x1060, 0x0000}, {0xcef0, 0x1061, 0x1507},
- {0x90f0, 0x1062, 0x1020}, {0x5ff0, 0x1063, 0x1006},
- {0x89f0, 0x1064, 0x608f}, {0x0ff0, 0x1065, 0x0e64},
- {0x49f0, 0x1066, 0x1044}, {0xcff0, 0x1067, 0x2b28},
- {0x93f0, 0x1068, 0x2a62}, {0x5ff0, 0x1069, 0x266a},
- {0x54f0, 0x106a, 0x22a8}, {0x0af0, 0x106b, 0x0f22},
- {0xfbf0, 0x106c, 0x0f0c}, {0x5ff0, 0x106d, 0x0d00},
- {0x90f0, 0x106e, 0x1020}, {0x4ff0, 0x106f, 0x1006},
- {0x8df0, 0x1070, 0x6087}, {0x0ff0, 0x1071, 0x0e64},
- {0xb9f0, 0x1072, 0x1044}, {0xcff0, 0x1073, 0x2a63},
- {0x5ff0, 0x1074, 0x266a}, {0x54f0, 0x1075, 0x22a8},
- {0x0af0, 0x1076, 0x0f22}, {0xfbf0, 0x1077, 0x0f0c},
- {0x93f0, 0x1078, 0x2aef}, {0x0ff0, 0x1079, 0x227a},
- {0xc2f0, 0x107a, 0x1907}, {0xf5f0, 0x107b, 0x0d00},
- {0xfdf0, 0x107c, 0x7800}, {0x0ef0, 0x107d, 0x3400},
- {0xaff0, 0x107e, 0x1899},
-};
-#define RT5640_DSP_PATCH3_NUM \
- (sizeof(rt5640_dsp_p3_tab) / sizeof(rt5640_dsp_p3_tab[0]))
-
-static const u16 rt5640_dsp_p2_tab[][2] = {
- {0x3fa1, 0xe7bb}, {0x3fb1, 0x5000}, {0x3fa2, 0xa26b}, {0x3fb2, 0x500e},
- {0x3fa3, 0xa27c}, {0x3fb3, 0x2282}, {0x3fa4, 0x996e}, {0x3fb4, 0x5019},
- {0x3fa5, 0x99a2}, {0x3fb5, 0x5021}, {0x3fa6, 0x99ae}, {0x3fb6, 0x5028},
- {0x3fa7, 0x9cbb}, {0x3fb7, 0x502c}, {0x3fa8, 0x9900}, {0x3fb8, 0x1903},
- {0x3fa9, 0x9f59}, {0x3fb9, 0x502f}, {0x3faa, 0x9f6e}, {0x3fba, 0x5039},
- {0x3fab, 0x9ea2}, {0x3fbb, 0x503c}, {0x3fac, 0x9fc8}, {0x3fbc, 0x5045},
- {0x3fad, 0xa44c}, {0x3fbd, 0x505d}, {0x3fae, 0x8983}, {0x3fbe, 0x5061},
- {0x3faf, 0x95e3}, {0x3fbf, 0x5006}, {0x3fa0, 0xe742}, {0x3fb0, 0x5040},
-};
-#define RT5640_DSP_PATCH2_NUM \
- (sizeof(rt5640_dsp_p2_tab) / sizeof(rt5640_dsp_p2_tab[0]))
-
-/**
- * rt5640_dsp_done - Wait until DSP is ready.
- * @codec: SoC Audio Codec device.
- *
- * To check voice DSP status and confirm it's ready for next work.
- *
- * Returns 0 for success or negative error code.
- */
-static int rt5640_dsp_done(struct snd_soc_codec *codec)
-{
- unsigned int count = 0, dsp_val;
-
- dsp_val = snd_soc_read(codec, RT5640_DSP_CTRL3);
- while(dsp_val & RT5640_DSP_BUSY_MASK) {
- if(count > 10)
- return -EBUSY;
- dsp_val = snd_soc_read(codec, RT5640_DSP_CTRL3);
- count ++;
- }
-
- return 0;
-}
-
-/**
- * rt5640_dsp_write - Write DSP register.
- * @codec: SoC audio codec device.
- * @param: DSP parameters.
- *
- * Modify voice DSP register for sound effect. The DSP can be controlled
- * through DSP command format (0xfc), addr (0xc4), data (0xc5) and cmd (0xc6)
- * register. It has to wait until the DSP is ready.
- *
- * Returns 0 for success or negative error code.
- */
-static int rt5640_dsp_write(struct snd_soc_codec *codec,
- struct rt5640_dsp_param *param)
-{
- unsigned int dsp_val = snd_soc_read(codec, RT5640_DSP_CTRL3);
- int ret;
-
- ret = rt5640_dsp_done(codec);
- if (ret < 0) {
- dev_err(codec->dev, "DSP is busy: %d\n", ret);
- goto err;
- }
- ret = snd_soc_write(codec, RT5640_GEN_CTRL3, param->cmd_fmt);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to write cmd format: %d\n", ret);
- goto err;
- }
- ret = snd_soc_write(codec, RT5640_DSP_CTRL1, param->addr);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to write DSP addr reg: %d\n", ret);
- goto err;
- }
- ret = snd_soc_write(codec, RT5640_DSP_CTRL2, param->data);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to write DSP data reg: %d\n", ret);
- goto err;
- }
- dsp_val &= ~(RT5640_DSP_R_EN | RT5640_DSP_CMD_MASK);
- dsp_val |= RT5640_DSP_W_EN | param->cmd;
- ret = snd_soc_write(codec, RT5640_DSP_CTRL3, dsp_val);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
- goto err;
- }
-
- return 0;
-
-err:
- return ret;
-}
-
-/**
- * rt5640_dsp_read - Read DSP register.
- * @codec: SoC audio codec device.
- * @reg: DSP register index.
- *
- * Read DSP setting value from voice DSP. The DSP can be controlled
- * through DSP addr (0xc4), data (0xc5) and cmd (0xc6) register. Each
- * command has to wait until the DSP is ready.
- *
- * Returns DSP register value or negative error code.
- */
-static unsigned int rt5640_dsp_read(
- struct snd_soc_codec *codec, unsigned int reg)
-{
- unsigned int val_h, val_l, value;
- unsigned int dsp_val = snd_soc_read(codec, RT5640_DSP_CTRL3);
- int ret = 0;
-
- ret = rt5640_dsp_done(codec);
- if (ret < 0) {
- dev_err(codec->dev, "DSP is busy: %d\n", ret);
- goto err;
- }
- ret = snd_soc_write(codec, RT5640_GEN_CTRL3, 0);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to write fc = 0: %d\n", ret);
- goto err;
- }
- ret = snd_soc_write(codec, RT5640_DSP_CTRL1, reg);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to write DSP addr reg: %d\n", ret);
- goto err;
- }
- dsp_val &= ~(RT5640_DSP_W_EN | RT5640_DSP_CMD_MASK);
- dsp_val |= RT5640_DSP_R_EN | RT5640_DSP_CMD_MR;
- ret = snd_soc_write(codec, RT5640_DSP_CTRL3, dsp_val);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
- goto err;
- }
-
- /* Read DSP high byte data */
- ret = rt5640_dsp_done(codec);
- if (ret < 0) {
- dev_err(codec->dev, "DSP is busy: %d\n", ret);
- goto err;
- }
- ret = snd_soc_write(codec, RT5640_DSP_CTRL1, RT5640_DSP_REG_DATHI);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to write DSP addr reg: %d\n", ret);
- goto err;
- }
- dsp_val &= ~(RT5640_DSP_W_EN | RT5640_DSP_CMD_MASK);
- dsp_val |= RT5640_DSP_R_EN | RT5640_DSP_CMD_RR;
- ret = snd_soc_write(codec, RT5640_DSP_CTRL3, dsp_val);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
- goto err;
- }
- ret = rt5640_dsp_done(codec);
- if (ret < 0) {
- dev_err(codec->dev, "DSP is busy: %d\n", ret);
- goto err;
- }
- ret = snd_soc_read(codec, RT5640_DSP_CTRL2);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to read DSP data reg: %d\n", ret);
- goto err;
- }
- val_h = ret;
-
- /* Read DSP low byte data */
- ret = snd_soc_write(codec, RT5640_DSP_CTRL1, RT5640_DSP_REG_DATLO);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to write DSP addr reg: %d\n", ret);
- goto err;
- }
- ret = snd_soc_write(codec, RT5640_DSP_CTRL3, dsp_val);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to write DSP cmd reg: %d\n", ret);
- goto err;
- }
- ret = rt5640_dsp_done(codec);
- if (ret < 0) {
- dev_err(codec->dev, "DSP is busy: %d\n", ret);
- goto err;
- }
- ret = snd_soc_read(codec, RT5640_DSP_CTRL2);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to read DSP data reg: %d\n", ret);
- goto err;
- }
- val_l = ret;
-
- value = ((val_h & 0xff) << 8) |(val_l & 0xff);
- return value;
-
-err:
- return ret;
-}
-
-static int rt5640_dsp_get(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
-
- ucontrol->value.integer.value[0] = rt5640->dsp_sw;
-
- return 0;
-}
-
-static int rt5640_dsp_put(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
-
- if (rt5640->dsp_sw != ucontrol->value.integer.value[0])
- rt5640->dsp_sw = ucontrol->value.integer.value[0];
-
- return 0;
-}
-
-static int rt5640_dsp_play_bp_get(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
-
- ucontrol->value.integer.value[0] = rt5640->dsp_play_pass;
-
- return 0;
-}
-
-static int rt5640_dsp_play_bp_put(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
-
- if (rt5640->dsp_play_pass == ucontrol->value.integer.value[0])
- return 0;
- rt5640->dsp_play_pass = ucontrol->value.integer.value[0];
-
- rt5640_conn_mux_path(codec, "DAC L2 Mux",
- rt5640->dsp_play_pass ? "IF2" : "TxDC");
- rt5640_conn_mux_path(codec, "DAC R2 Mux",
- rt5640->dsp_play_pass ? "IF2" : "TxDC");
-
- return 0;
-}
-
-static int rt5640_dsp_rec_bp_get(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
-
- ucontrol->value.integer.value[0] = rt5640->dsp_rec_pass;
-
- return 0;
-}
-
-static int rt5640_dsp_rec_bp_put(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
-
- if (rt5640->dsp_rec_pass == ucontrol->value.integer.value[0])
- return 0;
- rt5640->dsp_rec_pass = ucontrol->value.integer.value[0];
-
- rt5640_conn_mux_path(codec, "IF2 ADC L Mux",
- rt5640->dsp_rec_pass ? "Mono ADC MIXL" : "TxDP");
- rt5640_conn_mux_path(codec, "IF2 ADC R Mux",
- rt5640->dsp_rec_pass ? "Mono ADC MIXR" : "TxDP");
-
- return 0;
-}
-
-static int rt5640_dac_active_get(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct snd_soc_dapm_context *dapm = &codec->dapm;
- struct snd_soc_dapm_widget *w;
-
- list_for_each_entry(w, &dapm->card->widgets, list)
- {
- if (!w->sname || w->dapm != dapm)
- continue;
- if (strstr(w->sname, "Playback")) {
- pr_info("widget %s %s\n", w->name, w->sname);
- ucontrol->value.integer.value[0] = w->active;
- break;
- }
- }
- return 0;
-}
-
-static int rt5640_dac_active_put(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct snd_soc_dapm_context *dapm = &codec->dapm;
- struct snd_soc_dapm_widget *w;
-
- list_for_each_entry(w, &dapm->card->widgets, list)
- {
- if (!w->sname || w->dapm != dapm)
- continue;
- if (strstr(w->sname, "Playback")) {
- pr_info("widget %s %s\n", w->name, w->sname);
- w->active = 1;
- }
- }
- return 0;
-}
-
-static int rt5640_adc_active_get(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct snd_soc_dapm_context *dapm = &codec->dapm;
- struct snd_soc_dapm_widget *w;
-
- list_for_each_entry(w, &dapm->card->widgets, list)
- {
- if (!w->sname || w->dapm != dapm)
- continue;
- if (strstr(w->sname, "Capture")) {
- pr_info("widget %s %s\n", w->name, w->sname);
- ucontrol->value.integer.value[0] = w->active;
- break;
- }
- }
- return 0;
-}
-
-static int rt5640_adc_active_put(struct snd_kcontrol *kcontrol,
- struct snd_ctl_elem_value *ucontrol)
-{
- struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
- struct snd_soc_dapm_context *dapm = &codec->dapm;
- struct snd_soc_dapm_widget *w;
-
- list_for_each_entry(w, &dapm->card->widgets, list)
- {
- if (!w->sname || w->dapm != dapm)
- continue;
- if (strstr(w->sname, "Capture")) {
- pr_info("widget %s %s\n", w->name, w->sname);
- w->active = 1;
- }
- }
- return 0;
-}
-
-/* DSP Path Control 1 */
-static const char *rt5640_src_rxdp_mode[] = {
- "Normal", "Divided by 3"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5640_src_rxdp_enum, RT5640_DSP_PATH1,
- RT5640_RXDP_SRC_SFT, rt5640_src_rxdp_mode);
-
-static const char *rt5640_src_txdp_mode[] = {
- "Normal", "Multiplied by 3"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5640_src_txdp_enum, RT5640_DSP_PATH1,
- RT5640_TXDP_SRC_SFT, rt5640_src_txdp_mode);
-
-/* DSP data select */
-static const char *rt5640_dsp_data_select[] = {
- "Normal", "left copy to right", "right copy to left", "Swap"};
-
-static const SOC_ENUM_SINGLE_DECL(rt5640_rxdc_data_enum, RT5640_DSP_PATH2,
- RT5640_RXDC_SEL_SFT, rt5640_dsp_data_select);
-
-static const SOC_ENUM_SINGLE_DECL(rt5640_rxdp_data_enum, RT5640_DSP_PATH2,
- RT5640_RXDP_SEL_SFT, rt5640_dsp_data_select);
-
-static const SOC_ENUM_SINGLE_DECL(rt5640_txdc_data_enum, RT5640_DSP_PATH2,
- RT5640_TXDC_SEL_SFT, rt5640_dsp_data_select);
-
-static const SOC_ENUM_SINGLE_DECL(rt5640_txdp_data_enum, RT5640_DSP_PATH2,
- RT5640_TXDP_SEL_SFT, rt5640_dsp_data_select);
-
-/* Sound Effect */
-static const char *rt5640_dsp_mode[] = {
- "Disable", "AEC+NS+FENS", "HFBF", "Far Field Pick-up"};
-
-static const SOC_ENUM_SINGLE_DECL(rt5640_dsp_enum, 0, 0, rt5640_dsp_mode);
-
-static const char *rt5640_rxdp2_src[] =
- {"IF2_DAC", "Stereo_ADC"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5640_rxdp2_enum, RT5640_GEN_CTRL2,
- RT5640_RXDP2_SEL_SFT, rt5640_rxdp2_src);
-
-static const struct snd_kcontrol_new rt5640_rxdp2_mux =
- SOC_DAPM_ENUM("RxDP2 sel", rt5640_rxdp2_enum);
-
-static const char *rt5640_rxdp_src[] =
- {"RxDP2", "RxDP1"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5640_rxdp_enum, RT5640_DUMMY_PR3F,
- 10, rt5640_rxdp_src);
-
-static const struct snd_kcontrol_new rt5640_rxdp_mux =
- SOC_DAPM_ENUM("RxDP sel", rt5640_rxdp_enum);
-
-static const char *rt5640_rxdc_src[] =
- {"Mono_ADC", "Stereo_ADC"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5640_rxdc_enum, RT5640_GEN_CTRL2,
- RT5640_RXDC_SRC_SFT, rt5640_rxdc_src);
-
-static const struct snd_kcontrol_new rt5640_rxdc_mux =
- SOC_DAPM_ENUM("RxDC sel", rt5640_rxdc_enum);
-
-static const char *rt5640_rxdp1_src[] =
- {"DAC1", "IF1_DAC"};
-
-static const SOC_ENUM_SINGLE_DECL(
- rt5640_rxdp1_enum, RT5640_DUMMY_PR3F,
- 9, rt5640_rxdp1_src);
-
-static const struct snd_kcontrol_new rt5640_rxdp1_mux =
- SOC_DAPM_ENUM("RxDP1 sel", rt5640_rxdp1_enum);
-
-static const struct snd_kcontrol_new rt5640_dsp_snd_controls[] = {
- SOC_ENUM("RxDC input data", rt5640_rxdc_data_enum),
- SOC_ENUM("RxDP input data", rt5640_rxdp_data_enum),
- SOC_ENUM("TxDC input data", rt5640_txdc_data_enum),
- SOC_ENUM("TxDP input data", rt5640_txdp_data_enum),
- SOC_ENUM("SRC for RxDP", rt5640_src_rxdp_enum),
- SOC_ENUM("SRC for TxDP", rt5640_src_txdp_enum),
- /* AEC */
- SOC_ENUM_EXT("DSP Function Switch", rt5640_dsp_enum,
- rt5640_dsp_get, rt5640_dsp_put),
- SOC_SINGLE_EXT("DSP Playback Bypass", 0, 0, 1, 0,
- rt5640_dsp_play_bp_get, rt5640_dsp_play_bp_put),
- SOC_SINGLE_EXT("DSP Record Bypass", 0, 0, 1, 0,
- rt5640_dsp_rec_bp_get, rt5640_dsp_rec_bp_put),
- SOC_SINGLE_EXT("DAC Switch", 0, 0, 1, 0,
- rt5640_dac_active_get, rt5640_dac_active_put),
- SOC_SINGLE_EXT("ADC Switch", 0, 0, 1, 0,
- rt5640_adc_active_get, rt5640_adc_active_put),
-};
-
-static int rt5640_dsp_patch_3(struct snd_soc_codec *codec)
-{
- struct rt5640_dsp_param param;
- int ret, i;
-
- param.cmd_fmt = 0x0090;
- param.addr = 0x0064;
- param.data = 0x0004;
- param.cmd = RT5640_DSP_CMD_RW;
- ret = rt5640_dsp_write(codec, ¶m);
- if (ret < 0) {
- dev_err(codec->dev,
- "Fail to set DSP 3 bytes patch entrance: %d\n", ret);
- goto patch_err;
- }
-
- param.cmd = RT5640_DSP_CMD_PE;
- for(i = 0; i < RT5640_DSP_PATCH3_NUM; i++) {
- param.cmd_fmt = rt5640_dsp_p3_tab[i][0];
- param.addr = rt5640_dsp_p3_tab[i][1];
- param.data = rt5640_dsp_p3_tab[i][2];
- ret = rt5640_dsp_write(codec, ¶m);
- if (ret < 0) {
- dev_err(codec->dev, "Fail to patch Dsp: %d\n", ret);
- goto patch_err;
- }
- }
-
- return 0;
-
-patch_err:
-
- return ret;
-}
-
-static int rt5640_dsp_patch_2(struct snd_soc_codec *codec)
-{
- struct rt5640_dsp_param param;
- int ret, i;
-
- param.cmd_fmt = 0x0090;
- param.addr = 0x0064;
- param.data = 0x0000;
- param.cmd = RT5640_DSP_CMD_RW;
- ret = rt5640_dsp_write(codec, ¶m);
- if (ret < 0) {
- dev_err(codec->dev,
- "Fail to set DSP 2 bytes patch entrance: %d\n", ret);
- goto patch_err;
- }
-
- param.cmd_fmt = 0x00e0;
- param.cmd = RT5640_DSP_CMD_MW;
- for(i = 0; i < RT5640_DSP_PATCH2_NUM; i++) {
- param.addr = rt5640_dsp_p2_tab[i][0];
- param.data = rt5640_dsp_p2_tab[i][1];
- ret = rt5640_dsp_write(codec, ¶m);
- if (ret < 0) {
- dev_err(codec->dev, "Fail to patch Dsp: %d\n", ret);
- goto patch_err;
- }
- }
-
- return 0;
-
-patch_err:
-
- return ret;
-}
-
-/**
- * rt5640_dsp_patch - Write DSP patch code.
- *
- * @codec: SoC audio codec device.
- *
- * Write patch codes to DSP including 3 and 2 bytes data.
- *
- * Returns 0 for success or negative error code.
- */
-static int rt5640_dsp_patch(struct snd_soc_codec *codec)
-{
- int ret;
-
- dev_dbg(codec->dev, "\n DSP Patch Start ......\n");
-
- ret = snd_soc_update_bits(codec, RT5640_MICBIAS,
- RT5640_PWR_CLK25M_MASK, RT5640_PWR_CLK25M_PU);
- if (ret < 0)
- goto patch_err;
-
- ret = snd_soc_update_bits(codec, RT5640_GLB_CLK,
- RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_RCCLK);
- if (ret < 0)
- goto patch_err;
-
- ret = snd_soc_update_bits(codec, RT5640_PWR_DIG2,
- RT5640_PWR_I2S_DSP, RT5640_PWR_I2S_DSP);
- if (ret < 0)
- goto patch_err;
-
- ret = snd_soc_update_bits(codec, RT5640_DSP_CTRL3,
- RT5640_DSP_PD_PIN_MASK, RT5640_DSP_PD_PIN_HI);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to power up DSP: %d\n", ret);
- goto patch_err;
- }
-
- ret = snd_soc_update_bits(codec, RT5640_DSP_CTRL3,
- RT5640_DSP_RST_PIN_MASK, RT5640_DSP_RST_PIN_LO);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to reset DSP: %d\n", ret);
- goto patch_err;
- }
-
- mdelay(10);
-
- ret = snd_soc_update_bits(codec, RT5640_DSP_CTRL3,
- RT5640_DSP_RST_PIN_MASK, RT5640_DSP_RST_PIN_HI);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to recover DSP: %d\n", ret);
- goto patch_err;
- }
-
- ret = rt5640_dsp_patch_3(codec);
- if (ret < 0)
- goto patch_err;
-
- ret = rt5640_dsp_patch_2(codec);
- if (ret < 0)
- goto patch_err;
-
- return 0;
-
-patch_err:
-
- return ret;
-}
-
-static void rt5640_do_dsp_patch(struct work_struct *work)
-{
- struct rt5640_priv *rt5640 =
- container_of(work, struct rt5640_priv, patch_work.work);
- struct snd_soc_codec *codec = rt5640->codec;
-
- if (rt5640_dsp_patch(codec) < 0)
- dev_err(codec->dev, "Patch DSP rom code Fail !!!\n");
-}
-
-
-/**
- * rt5640_dsp_conf - Set DSP basic setting.
- *
- * @codec: SoC audio codec device.
- *
- * Set parameters of basic setting to DSP.
- *
- * Returns 0 for success or negative error code.
- */
-static int rt5640_dsp_conf(struct snd_soc_codec *codec)
-{
- struct rt5640_dsp_param param;
- int ret, i;
-
- ret = snd_soc_update_bits(codec, RT5640_DSP_CTRL3,
- RT5640_DSP_PD_PIN_MASK, RT5640_DSP_PD_PIN_HI);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to power up DSP: %d\n", ret);
- goto conf_err;
- }
-
- ret = snd_soc_update_bits(codec, RT5640_DSP_CTRL3,
- RT5640_DSP_RST_PIN_MASK, RT5640_DSP_RST_PIN_LO);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to reset DSP: %d\n", ret);
- goto conf_err;
- }
-
- mdelay(10);
-
- ret = snd_soc_update_bits(codec, RT5640_DSP_CTRL3,
- RT5640_DSP_RST_PIN_MASK | RT5640_DSP_CLK_MASK,
- RT5640_DSP_RST_PIN_HI | RT5640_DSP_CLK_384K);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to recover DSP: %d\n", ret);
- goto conf_err;
- }
-
- param.cmd_fmt = 0x00e0;
- param.cmd = RT5640_DSP_CMD_MW;
- for(i = 0; i < RT5640_DSP_INIT_NUM; i++) {
- param.addr = rt5640_dsp_init[i][0];
- param.data = rt5640_dsp_init[i][1];
- ret = rt5640_dsp_write(codec, ¶m);
- if (ret < 0) {
- dev_err(codec->dev, "Fail to config Dsp: %d\n", ret);
- goto conf_err;
- }
- }
-
- return 0;
-
-conf_err:
-
- return ret;
-}
-
-/**
- * rt5640_dsp_rate - Set DSP rate setting.
- *
- * @codec: SoC audio codec device.
- * @rate: Sampling rate.
- *
- * Set parameters of sampling rate to DSP.
- *
- * Returns 0 for success or negative error code.
- */
-static int rt5640_dsp_rate(struct snd_soc_codec *codec, int rate)
-{
- struct rt5640_dsp_param param;
- int ret, i, tab_num;
- unsigned short (*rate_tab)[2];
-
- if (rate != 48000 && rate != 44100 && rate != 16000)
- return -EINVAL;
-
- if (rate > 44100) {
- rate_tab = rt5640_dsp_48;
- tab_num = RT5640_DSP_48_NUM;
- } else {
- if (rate > 16000) {
- rate_tab = rt5640_dsp_441;
- tab_num = RT5640_DSP_441_NUM;
- } else {
- rate_tab = rt5640_dsp_16;
- tab_num = RT5640_DSP_16_NUM;
- }
- }
-
- param.cmd_fmt = 0x00e0;
- param.cmd = RT5640_DSP_CMD_MW;
- for (i = 0; i < tab_num; i++) {
- param.addr = rate_tab[i][0];
- param.data = rate_tab[i][1];
- ret = rt5640_dsp_write(codec, ¶m);
- if (ret < 0)
- goto rate_err;
- }
-
- return 0;
-
-rate_err:
-
- dev_err(codec->dev, "Fail to set rate %d parameters: %d\n", rate, ret);
- return ret;
-}
-
-/**
- * rt5640_dsp_set_mode - Set DSP mode parameters.
- *
- * @codec: SoC audio codec device.
- * @mode: DSP mode.
- *
- * Set parameters of mode to DSP.
- * There are three modes which includes " mic AEC + NS + FENS",
- * "HFBF" and "Far-field pickup".
- *
- * Returns 0 for success or negative error code.
- */
-static int rt5640_dsp_set_mode(struct snd_soc_codec *codec, int mode)
-{
- struct rt5640_dsp_param param;
- int ret, i, tab_num;
- unsigned short (*mode_tab)[2];
-
- switch (mode) {
- case RT5640_DSP_AEC_NS_FENS:
- dev_info(codec->dev, "AEC\n");
- mode_tab = rt5640_dsp_aec_ns_fens;
- tab_num = RT5640_DSP_AEC_NUM;
- break;
-
- case RT5640_DSP_HFBF:
- dev_info(codec->dev, "Beamforming\n");
- mode_tab = rt5640_dsp_hfbf;
- tab_num = RT5640_DSP_HFBF_NUM;
- break;
-
- case RT5640_DSP_FFP:
- dev_info(codec->dev, "Far Field Pick-up\n");
- mode_tab = rt5640_dsp_ffp;
- tab_num = RT5640_DSP_FFP_NUM;
- break;
-
- case RT5640_DSP_DIS:
- default:
- dev_info(codec->dev, "Disable\n");
- return 0;
- }
-
- param.cmd_fmt = 0x00e0;
- param.cmd = RT5640_DSP_CMD_MW;
- for (i = 0; i < tab_num; i++) {
- param.addr = mode_tab[i][0];
- param.data = mode_tab[i][1];
- ret = rt5640_dsp_write(codec, ¶m);
- if (ret < 0)
- goto mode_err;
- }
-
- return 0;
-
-mode_err:
-
- dev_err(codec->dev, "Fail to set mode %d parameters: %d\n", mode, ret);
- return ret;
-}
-
-/**
- * rt5640_dsp_snd_effect - Set DSP sound effect.
- *
- * Set parameters of sound effect to DSP.
- *
- * Returns 0 for success or negative error code.
- */
-static int rt5640_dsp_snd_effect(struct snd_soc_codec *codec)
-{
- struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
- int ret;
-
- ret = rt5640_dsp_conf(codec);
- if (ret < 0)
- goto effect_err;
-
- ret = rt5640_dsp_rate(codec, rt5640->lrck[rt5640->aif_pu] ?
- rt5640->lrck[rt5640->aif_pu] : 44100);
- if (ret < 0)
- goto effect_err;
-
- ret = rt5640_dsp_set_mode(codec, rt5640->dsp_sw);
- if (ret < 0)
- goto effect_err;
-
- mdelay(20);
-
- return 0;
-
-effect_err:
-
- return ret;
-}
-
-static int rt5640_dsp_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *k, int event)
-{
- struct snd_soc_codec *codec = w->codec;
- struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
- static unsigned int power_on;
-
- switch (event) {
- case SND_SOC_DAPM_POST_PMD:
- pr_info("%s(): PMD\n", __func__);
- if (!power_on)
- return 0;
-
- power_on--;
- if (!power_on) {
- snd_soc_update_bits(codec, RT5640_PWR_DIG2,
- RT5640_PWR_I2S_DSP, 0);
- snd_soc_update_bits(codec, RT5640_DSP_CTRL3,
- RT5640_DSP_PD_PIN_MASK, RT5640_DSP_PD_PIN_LO);
- }
- break;
-
- case SND_SOC_DAPM_POST_PMU:
- pr_info("%s(): PMU\n", __func__);
- if (rt5640->dsp_sw == RT5640_DSP_DIS || 2 <= power_on)
- return 0;
-
- if (!power_on) {
- snd_soc_update_bits(codec, RT5640_PWR_DIG2,
- RT5640_PWR_I2S_DSP, RT5640_PWR_I2S_DSP);
- rt5640_dsp_snd_effect(codec);
- }
- power_on++;
- break;
-
- default:
- return 0;
- }
-
- return 0;
-}
-
-static int rt5640_pr3f_sync_event(struct snd_soc_dapm_widget *w,
- struct snd_kcontrol *kcontrol, int event)
-{
- struct snd_soc_codec *codec = w->codec;
- unsigned int ret, tmp;
- printk("enter %s\n",__func__);
-
- switch (event) {
- case SND_SOC_DAPM_PRE_PMU:
- tmp = snd_soc_read(codec,RT5640_DUMMY_PR3F);
- printk("snd_soc_read(codec,RT5640_DUMMY_PR3F)=0x%x\n",tmp);
- ret = snd_soc_write(codec, RT5640_PRIV_INDEX, RT5640_MIXER_INT_REG);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to set private addr: %d\n", ret);
- return ret;;
- }
- ret = snd_soc_write(codec, RT5640_PRIV_DATA, tmp);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to set private value: %d\n", ret);
- return ret;
- }
-
- break;
- default:
- return 0;
- }
-
- return 0;
-}
-
-static const struct snd_soc_dapm_widget rt5640_dsp_dapm_widgets[] = {
- SND_SOC_DAPM_PGA_E("DSP Downstream", SND_SOC_NOPM,
- 0, 0, NULL, 0, rt5640_dsp_event,
- SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
- SND_SOC_DAPM_PGA_E("DSP Upstream", SND_SOC_NOPM,
- 0, 0, NULL, 0, rt5640_dsp_event,
- SND_SOC_DAPM_POST_PMD | SND_SOC_DAPM_POST_PMU),
- SND_SOC_DAPM_MUX_E("RxDP Mux", SND_SOC_NOPM, 0, 0,
- &rt5640_rxdp_mux, rt5640_pr3f_sync_event,
- SND_SOC_DAPM_PRE_PMU),
- SND_SOC_DAPM_MUX("RxDP2 Mux", SND_SOC_NOPM, 0, 0,
- &rt5640_rxdp2_mux),
- SND_SOC_DAPM_MUX_E("RxDP1 Mux", SND_SOC_NOPM, 0, 0,
- &rt5640_rxdp1_mux, rt5640_pr3f_sync_event,
- SND_SOC_DAPM_PRE_PMU),
- SND_SOC_DAPM_MUX("RxDC Mux", SND_SOC_NOPM, 0, 0,
- &rt5640_rxdc_mux),
- SND_SOC_DAPM_PGA("RxDP", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("RxDC", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("TxDC", SND_SOC_NOPM, 0, 0, NULL, 0),
- SND_SOC_DAPM_PGA("TxDP", SND_SOC_NOPM, 0, 0, NULL, 0),
-};
-
-static const struct snd_soc_dapm_route rt5640_dsp_dapm_routes[] = {
- {"RxDC", NULL, "RxDC Mux"},
- {"RxDC Mux", "Mono_ADC", "Mono ADC MIXL"},
- {"RxDC Mux", "Mono_ADC", "Mono ADC MIXR"},
- {"RxDC Mux", "Stereo_ADC", "Stereo ADC MIXL"},
- {"RxDC Mux", "Stereo_ADC", "Stereo ADC MIXR"},
- {"RxDP", NULL, "RxDP Mux"},
- {"RxDP Mux", "RxDP2", "RxDP2 Mux"},
- {"RxDP Mux", "RxDP1", "RxDP1 Mux"},
- {"RxDP2 Mux", "IF2_DAC", "IF2 DAC L"},
- {"RxDP2 Mux", "IF2_DAC", "IF2 DAC R"},
- {"RxDP2 Mux", "Stereo_ADC", "Stereo ADC MIXL"},
- {"RxDP2 Mux", "Stereo_ADC", "Stereo ADC MIXR"},
- {"RxDP1 Mux", "DAC1", "Stereo DAC MIXL"},
- {"RxDP1 Mux", "DAC1", "Stereo DAC MIXR"},
- {"RxDP1 Mux", "IF1_DAC", "IF1 DAC L"},
- {"RxDP1 Mux", "IF1_DAC", "IF1 DAC R"},
-
- {"DSP Downstream", NULL, "RxDP"},
- {"TxDC", NULL, "DSP Downstream"},
- {"DSP Upstream", NULL, "RxDC"},
- {"TxDP", NULL, "DSP Upstream"},
-
- {"IF2 ADC L Mux", "TxDP", "TxDP"},
- {"IF2 ADC R Mux", "TxDP", "TxDP"},
- {"DAC L2 Mux", "TxDC", "TxDC"},
- {"DAC R2 Mux", "TxDC", "TxDC"},
-};
-
-/**
- * rt5640_dsp_show - Dump DSP registers.
- * @dev: codec device.
- * @attr: device attribute.
- * @buf: buffer for display.
- *
- * To show non-zero values of all DSP registers.
- *
- * Returns buffer length.
- */
-static ssize_t rt5640_dsp_show(struct device *dev,
- struct device_attribute *attr, char *buf)
-{
- struct i2c_client *client = to_i2c_client(dev);
- struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
- struct snd_soc_codec *codec = rt5640->codec;
- unsigned short (*rt5640_dsp_tab)[2];
- unsigned int val;
- int cnt = 0, i, tab_num;
-
- switch (rt5640->dsp_sw) {
- case RT5640_DSP_AEC_NS_FENS:
- cnt += sprintf(buf, "[ RT5642 DSP 'AEC' ]\n");
- rt5640_dsp_tab = rt5640_dsp_aec_ns_fens;
- tab_num = RT5640_DSP_AEC_NUM;
- break;
-
- case RT5640_DSP_HFBF:
- cnt += sprintf(buf, "[ RT5642 DSP 'Beamforming' ]\n");
- rt5640_dsp_tab = rt5640_dsp_hfbf;
- tab_num = RT5640_DSP_HFBF_NUM;
- break;
-
- case RT5640_DSP_FFP:
- cnt += sprintf(buf, "[ RT5642 DSP 'Far Field Pick-up' ]\n");
- rt5640_dsp_tab = rt5640_dsp_ffp;
- tab_num = RT5640_DSP_FFP_NUM;
- break;
-
- case RT5640_DSP_DIS:
- default:
- cnt += sprintf(buf, "RT5642 DSP Disabled\n");
- goto dsp_done;
- }
-
- for (i = 0; i < tab_num; i++) {
- if (cnt + RT5640_DSP_REG_DISP_LEN >= PAGE_SIZE)
- break;
- val = rt5640_dsp_read(codec, rt5640_dsp_tab[i][0]);
- if (!val)
- continue;
- cnt += snprintf(buf + cnt, RT5640_DSP_REG_DISP_LEN,
- "%04x: %04x\n", rt5640_dsp_tab[i][0], val);
- }
-
-dsp_done:
-
- if (cnt >= PAGE_SIZE)
- cnt = PAGE_SIZE - 1;
-
- return cnt;
-}
-static ssize_t dsp_reg_store(struct device *dev,
- struct device_attribute *attr, const char *buf, size_t count)
-{
- struct i2c_client *client = to_i2c_client(dev);
- struct rt5640_priv *rt5640 = i2c_get_clientdata(client);
- struct snd_soc_codec *codec = rt5640->codec;
- struct rt5640_dsp_param param;
- unsigned int val=0,addr=0;
- int i;
-
- printk("register \"%s\" count=%d\n",buf,count);
-
- for(i=0;i<count;i++) //address
- {
- if(*(buf+i) <= '9' && *(buf+i)>='0')
- {
- addr = (addr << 4) | (*(buf+i)-'0');
- }
- else if(*(buf+i) <= 'f' && *(buf+i)>='a')
- {
- addr = (addr << 4) | ((*(buf+i)-'a')+0xa);
- }
- else if(*(buf+i) <= 'A' && *(buf+i)>='A')
- {
- addr = (addr << 4) | ((*(buf+i)-'A')+0xa);
- }
- else
- {
- break;
- }
- }
-
- for(i=i+1 ;i<count;i++) //val
- {
- if(*(buf+i) <= '9' && *(buf+i)>='0')
- {
- val = (val << 4) | (*(buf+i)-'0');
- }
- else if(*(buf+i) <= 'f' && *(buf+i)>='a')
- {
- val = (val << 4) | ((*(buf+i)-'a')+0xa);
- }
- else if(*(buf+i) <= 'F' && *(buf+i)>='A')
- {
- val = (val << 4) | ((*(buf+i)-'A')+0xa);
-
- }
- else
- {
- break;
- }
- }
- printk("addr=0x%x val=0x%x\n",addr,val);
- if(i==count)
- {
- printk("0x%04x = 0x%04x\n",addr,rt5640_dsp_read(codec, addr));
- }
- else
- {
- param.cmd_fmt = 0x00e0;
- param.cmd = RT5640_DSP_CMD_MW;
- param.addr = addr;
- param.data = val;
- rt5640_dsp_write(codec, ¶m);
- }
-
- return count;
-}
-
-static DEVICE_ATTR(dsp_reg, 0666, rt5640_dsp_show, dsp_reg_store);
-
-/**
- * rt5640_dsp_probe - register DSP for rt5640
- * @codec: audio codec
- *
- * To register DSP function for rt5640.
- *
- * Returns 0 for success or negative error code.
- */
-int rt5640_dsp_probe(struct snd_soc_codec *codec)
-{
- struct rt5640_priv *rt5640;
- int ret;
-
- if (codec == NULL)
- return -EINVAL;
-
- snd_soc_add_codec_controls(codec, rt5640_dsp_snd_controls,
- ARRAY_SIZE(rt5640_dsp_snd_controls));
- snd_soc_dapm_new_controls(&codec->dapm, rt5640_dsp_dapm_widgets,
- ARRAY_SIZE(rt5640_dsp_dapm_widgets));
- snd_soc_dapm_add_routes(&codec->dapm, rt5640_dsp_dapm_routes,
- ARRAY_SIZE(rt5640_dsp_dapm_routes));
-
- /* Patch DSP rom code if IC version is larger than C version */
-
- ret = snd_soc_update_bits(codec, RT5640_PWR_DIG2,
- RT5640_PWR_I2S_DSP, RT5640_PWR_I2S_DSP);
- if (ret < 0) {
- dev_err(codec->dev,
- "Failed to power up DSP IIS interface: %d\n", ret);
- }
-
- rt5640_dsp_conf(codec);
- ret = rt5640_dsp_read(codec, 0x3800);
- pr_info("DSP version code = 0x%04x\n",ret);
- if(ret != 0x501a) {
- rt5640 = snd_soc_codec_get_drvdata(codec);
- INIT_DELAYED_WORK(&rt5640->patch_work, rt5640_do_dsp_patch);
- schedule_delayed_work(&rt5640->patch_work,
- msecs_to_jiffies(100));
- }
- snd_soc_update_bits(codec, RT5640_PWR_DIG2,
- RT5640_PWR_I2S_DSP, 0);
-
- ret = device_create_file(codec->dev, &dev_attr_dsp_reg);
- if (ret != 0) {
- dev_err(codec->dev,
- "Failed to create index_reg sysfs files: %d\n", ret);
- return ret;
- }
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(rt5640_dsp_probe);
-
-int do_rt5640_dsp_set_mode(struct snd_soc_codec *codec, int mode) {
- struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
- dev_dbg(codec->dev, "%s mode=%d\n",__func__,mode);
- if(rt5640->dsp_sw == mode)
- return 0;
- rt5640->dsp_sw = mode;
- if(rt5640->dsp_sw == RT5640_DSP_DIS)
- rt5640->dsp_play_pass = rt5640->dsp_rec_pass = 1;
- else
- rt5640->dsp_play_pass = rt5640->dsp_rec_pass = 0;
- rt5640_conn_mux_path(codec, "DAC L2 Mux",
- rt5640->dsp_play_pass ? "IF2" : "TxDC");
- rt5640_conn_mux_path(codec, "DAC R2 Mux",
- rt5640->dsp_play_pass ? "IF2" : "TxDC");
- rt5640_conn_mux_path(codec, "IF2 ADC L Mux",
- rt5640->dsp_rec_pass ? "Mono ADC MIXL" : "TxDP");
- rt5640_conn_mux_path(codec, "IF2 ADC R Mux",
- rt5640->dsp_rec_pass ? "Mono ADC MIXR" : "TxDP");
-
- if(rt5640->dsp_sw != RT5640_DSP_DIS)
- rt5640_dsp_snd_effect(codec);
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(do_rt5640_dsp_set_mode);
-
-#ifdef RTK_IOCTL
-int rt56xx_dsp_ioctl_common(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
-{
- struct rt56xx_cmd rt56xx;
- int *buf;
- int *p;
- int ret;
- struct rt5640_dsp_param param;
-
- //int mask1 = 0, mask2 = 0;
-
- struct rt56xx_cmd __user *_rt56xx = (struct rt56xx_cmd *)arg;
- struct snd_soc_codec *codec = hw->private_data;
- struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
-
- if (copy_from_user(&rt56xx, _rt56xx, sizeof(rt56xx))) {
- dev_err(codec->dev, "copy_from_user faild\n");
- return -EFAULT;
- }
- dev_dbg(codec->dev, "rt56xx.number=%d\n",rt56xx.number);
- buf = kmalloc(sizeof(*buf) * rt56xx.number, GFP_KERNEL);
- if (buf == NULL)
- return -ENOMEM;
- if (copy_from_user(buf, rt56xx.buf, sizeof(*buf) * rt56xx.number)) {
- goto err;
- }
-
- ret = snd_soc_update_bits(codec, RT5640_PWR_DIG2,
- RT5640_PWR_I2S_DSP, RT5640_PWR_I2S_DSP);
- if (ret < 0) {
- dev_err(codec->dev,
- "Failed to power up DSP IIS interface: %d\n", ret);
- goto err;
- }
-
- switch (cmd) {
- case RT_READ_CODEC_DSP_IOCTL:
- for (p = buf; p < buf + rt56xx.number/2; p++)
- *(p+rt56xx.number/2) = rt5640_dsp_read(codec, *p);
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_WRITE_CODEC_DSP_IOCTL:
- param.cmd_fmt = 0x00e0;
- param.cmd = RT5640_DSP_CMD_MW;
- p = buf;
-
- if(codec == NULL) {
- dev_dbg(codec->dev, "codec is null\n");
- break;
- }
- for (p = buf; p < buf + rt56xx.number/2; p++)
- {
- param.addr = *p;
- param.data = *(p+rt56xx.number/2);
- rt5640_dsp_write(codec, ¶m);
- }
- break;
-
- case RT_GET_CODEC_DSP_MODE_IOCTL:
- *buf = rt5640->dsp_sw;
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- default:
- dev_info(codec->dev, "unsported dsp command\n");
- break;
- }
-
- kfree(buf);
- return 0;
-
-err:
- kfree(buf);
- return -EFAULT;
-}
-EXPORT_SYMBOL_GPL(rt56xx_dsp_ioctl_common);
-#endif
-
-#ifdef CONFIG_PM
-int rt5640_dsp_suspend(struct snd_soc_codec *codec)
-{
- struct rt5640_dsp_param param;
- int ret;
-
- if (RT5640_VER_C == snd_soc_read(codec, RT5640_VENDOR_ID))
- return 0;
-
- ret = snd_soc_update_bits(codec, RT5640_PWR_DIG2,
- RT5640_PWR_I2S_DSP, RT5640_PWR_I2S_DSP);
- if (ret < 0) {
- dev_err(codec->dev,
- "Failed to power up DSP IIS interface: %d\n", ret);
- goto rsm_err;
- }
-
- ret = snd_soc_update_bits(codec, RT5640_DSP_CTRL3,
- RT5640_DSP_PD_PIN_MASK, RT5640_DSP_PD_PIN_HI);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to power up DSP: %d\n", ret);
- goto rsm_err;
- }
-
- ret = snd_soc_update_bits(codec, RT5640_DSP_CTRL3,
- RT5640_DSP_RST_PIN_MASK, RT5640_DSP_RST_PIN_LO);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to reset DSP: %d\n", ret);
- goto rsm_err;
- }
-
- mdelay(10);
-
- ret = snd_soc_update_bits(codec, RT5640_DSP_CTRL3,
- RT5640_DSP_RST_PIN_MASK, RT5640_DSP_RST_PIN_HI);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to recover DSP: %d\n", ret);
- goto rsm_err;
- }
-
- param.cmd_fmt = 0x00e0;
- param.addr = 0x3fd2;
- param.data = 0x0030;
- param.cmd = RT5640_DSP_CMD_MW;
- ret = rt5640_dsp_write(codec, ¶m);
- if (ret < 0) {
- dev_err(codec->dev,
- "Failed to Power up LDO of Dsp: %d\n", ret);
- goto rsm_err;
- }
-
- ret = snd_soc_update_bits(codec, RT5640_DSP_CTRL3,
- RT5640_DSP_PD_PIN_MASK, RT5640_DSP_PD_PIN_LO);
- if (ret < 0) {
- dev_err(codec->dev, "Failed to power down DSP: %d\n", ret);
- goto rsm_err;
- }
-
- return 0;
-
-rsm_err:
-
- return ret;
-}
-EXPORT_SYMBOL_GPL(rt5640_dsp_suspend);
-
-int rt5640_dsp_resume(struct snd_soc_codec *codec)
-{
- return 0;
-}
-EXPORT_SYMBOL_GPL(rt5640_dsp_resume);
-#endif
-
+++ /dev/null
-/*
- * rt5640-dsp.h -- RT5640 ALSA SoC DSP driver
- *
- * Copyright 2011 Realtek Microelectronics
- * Author: Johnny Hsu <johnnyhsu@realtek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __RT5640_DSP_H__
-#define __RT5640_DSP_H__
-
-/* Debug String Length */
-#define RT5640_DSP_REG_DISP_LEN 12
-
-enum {
- RT5640_DSP_DIS,
- RT5640_DSP_AEC_NS_FENS,
- RT5640_DSP_HFBF,
- RT5640_DSP_FFP,
-};
-
-struct rt5640_dsp_param {
- u16 cmd_fmt;
- u16 addr;
- u16 data;
- u8 cmd;
-};
-
-int rt5640_dsp_probe(struct snd_soc_codec *codec);
-int rt56xx_dsp_ioctl_common(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg);
-#ifdef CONFIG_PM
-int rt5640_dsp_suspend(struct snd_soc_codec *codec);
-int rt5640_dsp_resume(struct snd_soc_codec *codec);
-#endif
-
-#endif /* __RT5640_DSP_H__ */
-
+++ /dev/null
-/*
- * rt5640_ioctl.h -- RT5640 ALSA SoC audio driver IO control
- *
- * Copyright 2012 Realtek Microelectronics
- * Author: Bard <bardliao@realtek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/spi/spi.h>
-#include <sound/soc.h>
-#include "rt56xx_ioctl.h"
-#include "rt5640_ioctl.h"
-#include "rt5640.h"
-#if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
-#include "rt5640-dsp.h"
-#endif
-
-static hweq_t hweq_param[] = {
- {/* NORMAL */
- {0},
- {0},
- 0x0000,
- },
- {/* SPK */
- {0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2},
- {0x1c10,0x01f4, 0xc5e9, 0x1a98, 0x1d2c, 0xc882, 0x1c10, 0x01f4, 0xe904, 0x1c10, 0x01f4, 0xe904, 0x1c10, 0x01f4, 0x1c10, 0x01f4, 0x2000, 0x0000, 0x2000},
- 0x0000,
- },
- {/* HP */
- {0xa0, 0xa1, 0xa2, 0xa3, 0xa4, 0xa5, 0xa6, 0xa7, 0xa8, 0xa9, 0xaa, 0xab, 0xac, 0xad, 0xae, 0xaf, 0xb0, 0xb1, 0xb2},
- {0x1c10,0x01f4, 0xc5e9, 0x1a98, 0x1d2c, 0xc882, 0x1c10, 0x01f4, 0xe904, 0x1c10, 0x01f4, 0xe904, 0x1c10, 0x01f4, 0x1c10, 0x01f4, 0x2000, 0x0000, 0x2000},
- 0x0000,
- },
-};
-#define RT5640_HWEQ_LEN ARRAY_SIZE(hweq_param)
-
-int rt5640_update_eqmode(
- struct snd_soc_codec *codec, int mode)
-{
- struct rt56xx_ops *ioctl_ops = rt56xx_get_ioctl_ops();
- int i;
- static int eqmode;
-
- if(codec == NULL || mode >= RT5640_HWEQ_LEN)
- return -EINVAL;
-
- dev_dbg(codec->dev, "%s(): mode=%d\n", __func__, mode);
- if(mode == eqmode)
- return 0;
-
- for(i = 0; i <= EQ_REG_NUM; i++) {
- if(hweq_param[mode].reg[i])
- ioctl_ops->index_write(codec, hweq_param[mode].reg[i],
- hweq_param[mode].value[i]);
- else
- break;
- }
- snd_soc_update_bits(codec, RT5640_EQ_CTRL2, RT5640_EQ_CTRL_MASK,
- hweq_param[mode].ctrl);
- snd_soc_update_bits(codec, RT5640_EQ_CTRL1,
- RT5640_EQ_UPD, RT5640_EQ_UPD);
- snd_soc_update_bits(codec, RT5640_EQ_CTRL1, RT5640_EQ_UPD, 0);
-
- eqmode = mode;
-
- return 0;
-}
-
-static void set_drc_agc_enable(struct snd_soc_codec *codec, int enable, int path)
-{
- snd_soc_update_bits(codec, RT5640_DRC_AGC_1, RT5640_DRC_AGC_P_MASK |
- RT5640_DRC_AGC_MASK | RT5640_DRC_AGC_UPD,
- enable << RT5640_DRC_AGC_SFT | path << RT5640_DRC_AGC_P_SFT |
- 1 << RT5640_DRC_AGC_UPD_BIT);
-}
-
-static void set_drc_agc_parameters(struct snd_soc_codec *codec, int attack_rate,
- int sample_rate, int recovery_rate, int limit_level)
-{
- snd_soc_update_bits(codec, RT5640_DRC_AGC_3, RT5640_DRC_AGC_TAR_MASK,
- limit_level << RT5640_DRC_AGC_TAR_SFT);
- snd_soc_update_bits(codec, RT5640_DRC_AGC_1, RT5640_DRC_AGC_AR_MASK |
- RT5640_DRC_AGC_R_MASK | RT5640_DRC_AGC_UPD |
- RT5640_DRC_AGC_RC_MASK, attack_rate << RT5640_DRC_AGC_AR_SFT |
- sample_rate << RT5640_DRC_AGC_R_SFT |
- recovery_rate << RT5640_DRC_AGC_RC_SFT |
- 0x1 << RT5640_DRC_AGC_UPD_BIT);
-}
-
-static void set_digital_boost_gain(struct snd_soc_codec *codec,
- int post_gain, int pre_gain)
-{
- snd_soc_update_bits(codec, RT5640_DRC_AGC_2,
- RT5640_DRC_AGC_POB_MASK | RT5640_DRC_AGC_PRB_MASK,
- post_gain << RT5640_DRC_AGC_POB_SFT |
- pre_gain << RT5640_DRC_AGC_PRB_SFT);
- snd_soc_update_bits(codec, RT5640_DRC_AGC_1,
- RT5640_DRC_AGC_UPD, 1 << RT5640_DRC_AGC_UPD_BIT);
-}
-
-static void set_noise_gate(struct snd_soc_codec *codec, int noise_gate_en,
- int noise_gate_hold_en, int compression_gain, int noise_gate_th)
-{
- snd_soc_update_bits(codec, RT5640_DRC_AGC_3,
- RT5640_DRC_AGC_NGB_MASK | RT5640_DRC_AGC_NG_MASK |
- RT5640_DRC_AGC_NGH_MASK | RT5640_DRC_AGC_NGT_MASK,
- noise_gate_en << RT5640_DRC_AGC_NG_SFT |
- noise_gate_hold_en << RT5640_DRC_AGC_NGH_SFT |
- compression_gain << RT5640_DRC_AGC_NGB_SFT |
- noise_gate_th << RT5640_DRC_AGC_NGT_SFT);
- snd_soc_update_bits(codec, RT5640_DRC_AGC_1,
- RT5640_DRC_AGC_UPD, 1 << RT5640_DRC_AGC_UPD_BIT);
-}
-
-static void set_drc_agc_compression(struct snd_soc_codec *codec,
- int compression_en, int compression_ratio)
-{
- snd_soc_update_bits(codec, RT5640_DRC_AGC_2,
- RT5640_DRC_AGC_CP_MASK | RT5640_DRC_AGC_CPR_MASK,
- compression_en << RT5640_DRC_AGC_CP_SFT |
- compression_ratio << RT5640_DRC_AGC_CPR_SFT);
- snd_soc_update_bits(codec, RT5640_DRC_AGC_1,
- RT5640_DRC_AGC_UPD, 1 << RT5640_DRC_AGC_UPD_BIT);
-}
-
-static void get_drc_agc_enable(struct snd_soc_codec *codec, int *enable, int *path)
-{
- unsigned int reg = snd_soc_read(codec, RT5640_DRC_AGC_1);
-
- *enable = (reg & RT5640_DRC_AGC_MASK) >> RT5640_DRC_AGC_SFT;
- *path = (reg & RT5640_DRC_AGC_P_MASK) >> RT5640_DRC_AGC_P_SFT;
-}
-
-static void get_drc_agc_parameters(struct snd_soc_codec *codec, int *attack_rate,
- int *sample_rate, int *recovery_rate, int *limit_level)
-{
- unsigned int reg = snd_soc_read(codec, RT5640_DRC_AGC_3);
-
- *limit_level = (reg & RT5640_DRC_AGC_TAR_MASK) >>
- RT5640_DRC_AGC_TAR_SFT;
- reg = snd_soc_read(codec, RT5640_DRC_AGC_1);
- *attack_rate = (reg & RT5640_DRC_AGC_AR_MASK) >> RT5640_DRC_AGC_AR_SFT;
- *sample_rate = (reg & RT5640_DRC_AGC_R_MASK) >> RT5640_DRC_AGC_R_SFT;
- *recovery_rate = (reg & RT5640_DRC_AGC_RC_MASK) >>
- RT5640_DRC_AGC_RC_SFT;
-}
-
-static void get_digital_boost_gain(struct snd_soc_codec *codec,
- int *post_gain, int *pre_gain)
-{
- unsigned int reg = snd_soc_read(codec, RT5640_DRC_AGC_2);
-
- *post_gain = (reg & RT5640_DRC_AGC_POB_MASK) >> RT5640_DRC_AGC_POB_SFT;
- *pre_gain = (reg & RT5640_DRC_AGC_PRB_MASK) >> RT5640_DRC_AGC_PRB_SFT;
-}
-
-static void get_noise_gate(struct snd_soc_codec *codec, int *noise_gate_en,
- int *noise_gate_hold_en, int *compression_gain, int *noise_gate_th)
-{
- unsigned int reg = snd_soc_read(codec, RT5640_DRC_AGC_3);
-
- printk("get_noise_gate reg=0x%04x\n",reg);
- *noise_gate_en = (reg & RT5640_DRC_AGC_NG_MASK) >>
- RT5640_DRC_AGC_NG_SFT;
- *noise_gate_hold_en = (reg & RT5640_DRC_AGC_NGH_MASK) >>
- RT5640_DRC_AGC_NGH_SFT;
- *compression_gain = (reg & RT5640_DRC_AGC_NGB_MASK) >>
- RT5640_DRC_AGC_NGB_SFT;
- *noise_gate_th = (reg & RT5640_DRC_AGC_NGT_MASK) >>
- RT5640_DRC_AGC_NGT_SFT;
-}
-
-static void get_drc_agc_compression(struct snd_soc_codec *codec,
- int *compression_en, int *compression_ratio)
-{
- unsigned int reg = snd_soc_read(codec, RT5640_DRC_AGC_2);
-
- *compression_en = (reg & RT5640_DRC_AGC_CP_MASK) >>
- RT5640_DRC_AGC_CP_SFT;
- *compression_ratio = (reg & RT5640_DRC_AGC_CPR_MASK) >>
- RT5640_DRC_AGC_CPR_SFT;
-}
-
-int rt5640_ioctl_common(struct snd_hwdep *hw, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- struct snd_soc_codec *codec = hw->private_data;
- struct rt56xx_cmd __user *_rt56xx = (struct rt56xx_cmd *)arg;
- struct rt56xx_cmd rt56xx;
- struct rt56xx_ops *ioctl_ops = rt56xx_get_ioctl_ops();
- int *buf, mask1 = 0, mask2 = 0;
- static int eq_mode;
-
- if (copy_from_user(&rt56xx, _rt56xx, sizeof(rt56xx))) {
- dev_err(codec->dev,"copy_from_user faild\n");
- return -EFAULT;
- }
- dev_dbg(codec->dev, "%s(): rt56xx.number=%zu, cmd=%d\n",
- __func__, rt56xx.number, cmd);
- buf = kmalloc(sizeof(*buf) * rt56xx.number, GFP_KERNEL);
- if (buf == NULL)
- return -ENOMEM;
- if (copy_from_user(buf, rt56xx.buf, sizeof(*buf) * rt56xx.number)) {
- goto err;
- }
-
- switch (cmd) {
- case RT_SET_CODEC_HWEQ_IOCTL:
- if (eq_mode == *buf)
- break;
- eq_mode = *buf;
- rt5640_update_eqmode(codec, eq_mode);
- break;
-
- case RT_GET_CODEC_ID:
- *buf = snd_soc_read(codec, RT5640_VENDOR_ID2);
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_SET_CODEC_SPK_VOL_IOCTL:
- if(*(buf) <= 0x27) {
- snd_soc_update_bits(codec, RT5640_SPK_VOL,
- RT5640_L_VOL_MASK | RT5640_R_VOL_MASK,
- *(buf) << RT5640_L_VOL_SFT |
- *(buf) << RT5640_R_VOL_SFT);
- }
- break;
-
- case RT_SET_CODEC_MIC_GAIN_IOCTL:
- if(*(buf) <= 0x8) {
- snd_soc_update_bits(codec, RT5640_IN1_IN2,
- RT5640_BST_MASK1, *(buf) << RT5640_BST_SFT1);
- snd_soc_update_bits(codec, RT5640_IN3_IN4,
- RT5640_BST_MASK2, *(buf) << RT5640_BST_SFT2);
- }
- break;
-
- case RT_SET_CODEC_3D_SPK_IOCTL:
- if(rt56xx.number < 4)
- break;
- if (NULL == ioctl_ops->index_update_bits)
- break;
-
- mask1 = 0;
- if(*buf != -1)
- mask1 |= RT5640_3D_SPK_MASK;
- if(*(buf + 1) != -1)
- mask1 |= RT5640_3D_SPK_M_MASK;
- if(*(buf + 2) != -1)
- mask1 |= RT5640_3D_SPK_CG_MASK;
- if(*(buf + 3) != -1)
- mask1 |= RT5640_3D_SPK_SG_MASK;
- ioctl_ops->index_update_bits(codec, RT5640_3D_SPK, mask1,
- *(buf) << RT5640_3D_SPK_SFT |
- *(buf + 1) << RT5640_3D_SPK_M_SFT |
- *(buf + 2) << RT5640_3D_SPK_CG_SFT |
- *(buf + 3) << RT5640_3D_SPK_SG_SFT);
- break;
-
- case RT_SET_CODEC_MP3PLUS_IOCTL:
- if(rt56xx.number < 5)
- break;
- mask1 = mask2 = 0;
- if(*buf != -1)
- mask1 |= RT5640_M_MP3_MASK;
- if(*(buf + 1) != -1)
- mask1 |= RT5640_EG_MP3_MASK;
- if(*(buf + 2) != -1)
- mask2 |= RT5640_OG_MP3_MASK;
- if(*(buf + 3) != -1)
- mask2 |= RT5640_HG_MP3_MASK;
- if(*(buf + 4) != -1)
- mask2 |= RT5640_MP3_WT_MASK;
-
- snd_soc_update_bits(codec, RT5640_MP3_PLUS1, mask1,
- *(buf) << RT5640_M_MP3_SFT |
- *(buf + 1) << RT5640_EG_MP3_SFT);
- snd_soc_update_bits(codec, RT5640_MP3_PLUS2, mask2,
- *(buf + 2) << RT5640_OG_MP3_SFT |
- *(buf + 3) << RT5640_HG_MP3_SFT |
- *(buf + 4) << RT5640_MP3_WT_SFT);
- break;
- case RT_SET_CODEC_3D_HEADPHONE_IOCTL:
- if(rt56xx.number < 4)
- break;
- if (NULL == ioctl_ops->index_update_bits)
- break;
-
- mask1 = 0;
- if(*buf != -1)
- mask1 |= RT5640_3D_HP_MASK;
- if(*(buf + 1) != -1)
- mask1 |= RT5640_3D_BT_MASK;
- if(*(buf + 2) != -1)
- mask1 |= RT5640_3D_1F_MIX_MASK;
- if(*(buf + 3) != -1)
- mask1 |= RT5640_3D_HP_M_MASK;
-
- snd_soc_update_bits(codec, RT5640_3D_HP, mask1,
- *(buf)<<RT5640_3D_HP_SFT |
- *(buf + 1) << RT5640_3D_BT_SFT |
- *(buf + 2) << RT5640_3D_1F_MIX_SFT |
- *(buf + 3) << RT5640_3D_HP_M_SFT);
- if(*(buf + 4) != -1)
- ioctl_ops->index_update_bits(codec,
- 0x59, 0x1f, *(buf+4));
- break;
-
- case RT_SET_CODEC_BASS_BACK_IOCTL:
- if(rt56xx.number < 3)
- break;
- mask1 = 0;
- if(*buf != -1)
- mask1 |= RT5640_BB_MASK;
- if(*(buf + 1) != -1)
- mask1 |= RT5640_BB_CT_MASK;
- if(*(buf + 2) != -1)
- mask1 |= RT5640_G_BB_BST_MASK;
-
- snd_soc_update_bits(codec, RT5640_BASE_BACK, mask1,
- *(buf) << RT5640_BB_SFT |
- *(buf + 1) << RT5640_BB_CT_SFT |
- *(buf + 2) << RT5640_G_BB_BST_SFT);
- break;
-
- case RT_SET_CODEC_DIPOLE_SPK_IOCTL:
- if(rt56xx.number < 2)
- break;
- if (NULL == ioctl_ops->index_update_bits)
- break;
-
- mask1 = 0;
- if(*buf != -1)
- mask1 |= RT5640_DP_SPK_MASK;
- if(*(buf + 1) != -1)
- mask1 |= RT5640_DP_ATT_MASK;
-
- ioctl_ops->index_update_bits(codec, RT5640_DIP_SPK_INF,
- mask1, *(buf) << RT5640_DP_SPK_SFT |
- *(buf + 1) << RT5640_DP_ATT_SFT );
- break;
-
- case RT_SET_CODEC_DRC_AGC_ENABLE_IOCTL:
- if(rt56xx.number < 2)
- break;
- set_drc_agc_enable(codec, *(buf), *(buf + 1));
- break;
-
- case RT_SET_CODEC_DRC_AGC_PAR_IOCTL:
- if(rt56xx.number < 4)
- break;
- set_drc_agc_parameters(codec, *(buf), *(buf + 1),
- *(buf + 2), *(buf + 3));
- break;
-
- case RT_SET_CODEC_DIGI_BOOST_GAIN_IOCTL:
- if(rt56xx.number < 2)
- break;
- set_digital_boost_gain(codec, *(buf), *(buf + 1));
- break;
-
- case RT_SET_CODEC_NOISE_GATE_IOCTL:
- if(rt56xx.number < 4)
- break;
- set_noise_gate(codec, *(buf), *(buf + 1),
- *(buf + 2), *(buf + 3));
- break;
-
- case RT_SET_CODEC_DRC_AGC_COMP_IOCTL:
- if(rt56xx.number < 2)
- break;
- set_drc_agc_compression(codec, *(buf), *(buf + 1));
- break;
-
- case RT_SET_CODEC_WNR_ENABLE_IOCTL:
- if (NULL == ioctl_ops->index_update_bits)
- break;
-
- ioctl_ops->index_update_bits(codec, RT5640_WND_1,
- RT5640_WND_MASK, *(buf) << RT5640_WND_SFT );
- break;
-
- case RT_GET_CODEC_DRC_AGC_ENABLE_IOCTL:
- if(rt56xx.number < 2)
- break;
- get_drc_agc_enable(codec, (buf), (buf + 1));
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_GET_CODEC_DRC_AGC_PAR_IOCTL:
- if(rt56xx.number < 4)
- break;
- get_drc_agc_parameters(codec, (buf), (buf + 1),
- (buf + 2), (buf + 3));
- if (copy_to_user(rt56xx.buf, buf,
- sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_GET_CODEC_DIGI_BOOST_GAIN_IOCTL:
- if(rt56xx.number < 2)
- break;
- get_digital_boost_gain(codec, (buf), (buf + 1));
- if (copy_to_user(rt56xx.buf, buf,
- sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_GET_CODEC_NOISE_GATE_IOCTL:
- if(rt56xx.number < 4)
- break;
- get_noise_gate(codec, (buf), (buf + 1), (buf + 2), (buf + 3));
- if (copy_to_user(rt56xx.buf, buf,
- sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_GET_CODEC_DRC_AGC_COMP_IOCTL:
- if(rt56xx.number < 2)
- break;
- get_drc_agc_compression(codec, (buf), (buf + 1));
- if (copy_to_user(rt56xx.buf, buf,
- sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_GET_CODEC_SPK_VOL_IOCTL:
- *buf = (snd_soc_read(codec, RT5640_SPK_VOL) & RT5640_L_VOL_MASK)
- >> RT5640_L_VOL_SFT;
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_GET_CODEC_MIC_GAIN_IOCTL:
- *buf = (snd_soc_read(codec, RT5640_IN1_IN2) & RT5640_BST_MASK1)
- >> RT5640_BST_SFT1;
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-#if defined(CONFIG_SND_SOC_RT5642_MODULE) || defined(CONFIG_SND_SOC_RT5642)
- case RT_READ_CODEC_DSP_IOCTL:
- case RT_WRITE_CODEC_DSP_IOCTL:
- case RT_GET_CODEC_DSP_MODE_IOCTL:
- return rt56xx_dsp_ioctl_common(hw, file, cmd, arg);
-#endif
- case RT_GET_CODEC_HWEQ_IOCTL:
- case RT_GET_CODEC_3D_SPK_IOCTL:
- case RT_GET_CODEC_MP3PLUS_IOCTL:
- case RT_GET_CODEC_3D_HEADPHONE_IOCTL:
- case RT_GET_CODEC_BASS_BACK_IOCTL:
- case RT_GET_CODEC_DIPOLE_SPK_IOCTL:
- default:
- break;
- }
-
- kfree(buf);
- return 0;
-
-err:
- kfree(buf);
- return -EFAULT;
-}
-EXPORT_SYMBOL_GPL(rt5640_ioctl_common);
+++ /dev/null
-/*
- * rt5640_ioctl.h -- RT5640 ALSA SoC audio driver IO control
- *
- * Copyright 2012 Realtek Microelectronics
- * Author: Bard <bardliao@realtek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __RT5640_IOCTL_H__
-#define __RT5640_IOCTL_H__
-
-#include <sound/hwdep.h>
-#include <linux/ioctl.h>
-
-enum {
- NORMAL=0,
- SPK,
- HP,
- MODE_NUM,
-};
-
-#define EQ_REG_NUM 19
-typedef struct hweq_s {
- unsigned int reg[EQ_REG_NUM];
- unsigned int value[EQ_REG_NUM];
- unsigned int ctrl;
-} hweq_t;
-
-int rt5640_ioctl_common(struct snd_hwdep *hw, struct file *file,
- unsigned int cmd, unsigned long arg);
-int rt5640_update_eqmode(
- struct snd_soc_codec *codec, int mode);
-
-#endif /* __RT5640_IOCTL_H__ */
+++ /dev/null
-/*
- * rt56xx_ioctl.h -- RT56XX ALSA SoC audio driver IO control
- *
- * Copyright 2012 Realtek Microelectronics
- * Author: Bard <bardliao@realtek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#include <linux/spi/spi.h>
-#include <sound/soc.h>
-#include "rt56xx_ioctl.h"
-
-static struct rt56xx_ops rt56xx_ioctl_ops;
-
-#if defined(CONFIG_SND_HWDEP) || defined(CONFIG_SND_HWDEP_MODULE)
-#define RT_CE_CODEC_HWDEP_NAME "rt56xx hwdep "
-static int rt56xx_hwdep_open(struct snd_hwdep *hw, struct file *file)
-{
- struct snd_soc_codec *codec = hw->private_data;
- dev_dbg(codec->dev, "%s()\n", __func__);
- return 0;
-}
-
-static int rt56xx_hwdep_release(struct snd_hwdep *hw, struct file *file)
-{
- struct snd_soc_codec *codec = hw->private_data;
- dev_dbg(codec->dev, "%s()\n", __func__);
- return 0;
-}
-
-static int rt56xx_hwdep_ioctl_common(struct snd_hwdep *hw,
- struct file *file, unsigned int cmd, unsigned long arg)
-{
- struct snd_soc_codec *codec = hw->private_data;
- struct rt56xx_cmd __user *_rt56xx = (struct rt56xx_cmd *)arg;
- struct rt56xx_cmd rt56xx;
- int *buf, *p;
-
- if (copy_from_user(&rt56xx, _rt56xx, sizeof(rt56xx))) {
- dev_err(codec->dev,"copy_from_user faild\n");
- return -EFAULT;
- }
- dev_dbg(codec->dev, "%s(): rt56xx.number=%zu, cmd=%d\n",
- __func__, rt56xx.number, cmd);
- buf = kmalloc(sizeof(*buf) * rt56xx.number, GFP_KERNEL);
- if (buf == NULL)
- return -ENOMEM;
- if (copy_from_user(buf, rt56xx.buf, sizeof(*buf) * rt56xx.number)) {
- goto err;
- }
-
- switch (cmd) {
- case RT_READ_CODEC_REG_IOCTL:
- for (p = buf; p < buf + rt56xx.number / 2; p++) {
- *(p + rt56xx.number / 2) = snd_soc_read(codec, *p);
- }
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_WRITE_CODEC_REG_IOCTL:
- for (p = buf; p < buf + rt56xx.number / 2; p++)
- snd_soc_write(codec, *p, *(p + rt56xx.number / 2));
- break;
-
- case RT_READ_CODEC_INDEX_IOCTL:
- if (NULL == rt56xx_ioctl_ops.index_read)
- goto err;
-
- for (p = buf; p < buf + rt56xx.number / 2; p++)
- *(p+rt56xx.number/2) = rt56xx_ioctl_ops.index_read(
- codec, *p);
- if (copy_to_user(rt56xx.buf, buf,
- sizeof(*buf) * rt56xx.number))
- goto err;
- break;
-
- case RT_WRITE_CODEC_INDEX_IOCTL:
- if (NULL == rt56xx_ioctl_ops.index_write)
- goto err;
-
- for (p = buf; p < buf + rt56xx.number / 2; p++)
- rt56xx_ioctl_ops.index_write(codec, *p,
- *(p+rt56xx.number/2));
- break;
-
- default:
- if (NULL == rt56xx_ioctl_ops.ioctl_common)
- goto err;
-
- rt56xx_ioctl_ops.ioctl_common(hw, file, cmd, arg);
- break;
- }
-
- kfree(buf);
- return 0;
-
-err:
- kfree(buf);
- return -EFAULT;
-}
-
-static int rt56xx_codec_dump_reg(struct snd_hwdep *hw,
- struct file *file, unsigned long arg)
-{
- struct snd_soc_codec *codec = hw->private_data;
- struct rt56xx_cmd __user *_rt56xx =(struct rt56xx_cmd *)arg;
- struct rt56xx_cmd rt56xx;
- int i, *buf, number = codec->driver->reg_cache_size;
-
- dev_dbg(codec->dev, "enter %s, number = %d\n", __func__, number);
- if (copy_from_user(&rt56xx, _rt56xx, sizeof(rt56xx)))
- return -EFAULT;
-
- buf = kmalloc(sizeof(*buf) * number, GFP_KERNEL);
- if (buf == NULL)
- return -ENOMEM;
-
- for (i = 0; i < number/2; i++) {
- buf[i] = i << 1;
- buf[i + number / 2] = codec->read(codec, buf[i]);
- }
- if (copy_to_user(rt56xx.buf, buf, sizeof(*buf) * i))
- goto err;
- rt56xx.number = number;
- if (copy_to_user(_rt56xx, &rt56xx, sizeof(rt56xx)))
- goto err;
- kfree(buf);
- return 0;
-
-err:
- kfree(buf);
- return -EFAULT;
-}
-
-static int rt56xx_hwdep_ioctl(struct snd_hwdep *hw, struct file *file,
- unsigned int cmd, unsigned long arg)
-{
- switch (cmd) {
- case RT_READ_ALL_CODEC_REG_IOCTL:
- return rt56xx_codec_dump_reg(hw, file, arg);
-
- default:
- return rt56xx_hwdep_ioctl_common(hw, file, cmd, arg);
- }
-
- return 0;
-}
-
-int rt56xx_ce_init_hwdep(struct snd_soc_codec *codec)
-{
- struct snd_hwdep *hw;
- struct snd_card *card = codec->card->snd_card;
- int err;
-
- dev_dbg(codec->dev, "enter %s\n", __func__);
-
- if ((err = snd_hwdep_new(card, RT_CE_CODEC_HWDEP_NAME, 0, &hw)) < 0)
- return err;
-
- strcpy(hw->name, RT_CE_CODEC_HWDEP_NAME);
- hw->private_data = codec;
- hw->ops.open = rt56xx_hwdep_open;
- hw->ops.release = rt56xx_hwdep_release;
- hw->ops.ioctl = rt56xx_hwdep_ioctl;
-
- return 0;
-}
-EXPORT_SYMBOL_GPL(rt56xx_ce_init_hwdep);
-#endif
-
-struct rt56xx_ops *rt56xx_get_ioctl_ops(void)
-{
- return &rt56xx_ioctl_ops;
-}
-EXPORT_SYMBOL_GPL(rt56xx_get_ioctl_ops);
+++ /dev/null
-/*
- * rt56xx_ioctl.h -- RT56XX ALSA SoC audio driver IO control
- *
- * Copyright 2012 Realtek Microelectronics
- * Author: Bard <bardliao@realtek.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-
-#ifndef __RT56XX_IOCTL_H__
-#define __RT56XX_IOCTL_H__
-
-#include <sound/hwdep.h>
-#include <linux/ioctl.h>
-
-struct rt56xx_cmd {
- size_t number;
- int __user *buf;
-};
-
-struct rt56xx_ops {
- int (*index_write)(struct snd_soc_codec *codec,
- unsigned int reg, unsigned int value);
- unsigned int (*index_read)(struct snd_soc_codec *codec,
- unsigned int reg);
- int (*index_update_bits)(struct snd_soc_codec *codec,
- unsigned int reg, unsigned int mask, unsigned int value);
- int (*ioctl_common)(struct snd_hwdep *hw, struct file *file,
- unsigned int cmd, unsigned long arg);
-};
-
-enum {
- RT_READ_CODEC_REG_IOCTL = _IOR('R', 0x01, struct rt56xx_cmd),
- RT_WRITE_CODEC_REG_IOCTL = _IOW('R', 0x01, struct rt56xx_cmd),
- RT_READ_ALL_CODEC_REG_IOCTL = _IOR('R', 0x02, struct rt56xx_cmd),
- RT_READ_CODEC_INDEX_IOCTL = _IOR('R', 0x03, struct rt56xx_cmd),
- RT_WRITE_CODEC_INDEX_IOCTL = _IOW('R', 0x03, struct rt56xx_cmd),
- RT_READ_CODEC_DSP_IOCTL = _IOR('R', 0x04, struct rt56xx_cmd),
- RT_WRITE_CODEC_DSP_IOCTL = _IOW('R', 0x04, struct rt56xx_cmd),
- RT_SET_CODEC_HWEQ_IOCTL = _IOW('R', 0x05, struct rt56xx_cmd),
- RT_GET_CODEC_HWEQ_IOCTL = _IOR('R', 0x05, struct rt56xx_cmd),
- RT_SET_CODEC_SPK_VOL_IOCTL = _IOW('R', 0x06, struct rt56xx_cmd),
- RT_GET_CODEC_SPK_VOL_IOCTL = _IOR('R', 0x06, struct rt56xx_cmd),
- RT_SET_CODEC_MIC_GAIN_IOCTL = _IOW('R', 0x07, struct rt56xx_cmd),
- RT_GET_CODEC_MIC_GAIN_IOCTL = _IOR('R', 0x07, struct rt56xx_cmd),
- RT_SET_CODEC_3D_SPK_IOCTL = _IOW('R', 0x08, struct rt56xx_cmd),
- RT_GET_CODEC_3D_SPK_IOCTL = _IOR('R', 0x08, struct rt56xx_cmd),
- RT_SET_CODEC_MP3PLUS_IOCTL = _IOW('R', 0x09, struct rt56xx_cmd),
- RT_GET_CODEC_MP3PLUS_IOCTL = _IOR('R', 0x09, struct rt56xx_cmd),
- RT_SET_CODEC_3D_HEADPHONE_IOCTL = _IOW('R', 0x0a, struct rt56xx_cmd),
- RT_GET_CODEC_3D_HEADPHONE_IOCTL = _IOR('R', 0x0a, struct rt56xx_cmd),
- RT_SET_CODEC_BASS_BACK_IOCTL = _IOW('R', 0x0b, struct rt56xx_cmd),
- RT_GET_CODEC_BASS_BACK_IOCTL = _IOR('R', 0x0b, struct rt56xx_cmd),
- RT_SET_CODEC_DIPOLE_SPK_IOCTL = _IOW('R', 0x0c, struct rt56xx_cmd),
- RT_GET_CODEC_DIPOLE_SPK_IOCTL = _IOR('R', 0x0c, struct rt56xx_cmd),
- RT_SET_CODEC_DRC_AGC_ENABLE_IOCTL = _IOW('R', 0x0d, struct rt56xx_cmd),
- RT_GET_CODEC_DRC_AGC_ENABLE_IOCTL = _IOR('R', 0x0d, struct rt56xx_cmd),
- RT_SET_CODEC_DSP_MODE_IOCTL = _IOW('R', 0x0e, struct rt56xx_cmd),
- RT_GET_CODEC_DSP_MODE_IOCTL = _IOR('R', 0x0e, struct rt56xx_cmd),
- RT_SET_CODEC_WNR_ENABLE_IOCTL = _IOW('R', 0x0f, struct rt56xx_cmd),
- RT_GET_CODEC_WNR_ENABLE_IOCTL = _IOR('R', 0x0f, struct rt56xx_cmd),
- RT_SET_CODEC_DRC_AGC_PAR_IOCTL = _IOW('R', 0x10, struct rt56xx_cmd),
- RT_GET_CODEC_DRC_AGC_PAR_IOCTL = _IOR('R', 0x10, struct rt56xx_cmd),
- RT_SET_CODEC_DIGI_BOOST_GAIN_IOCTL = _IOW('R', 0x11, struct rt56xx_cmd),
- RT_GET_CODEC_DIGI_BOOST_GAIN_IOCTL = _IOR('R', 0x11, struct rt56xx_cmd),
- RT_SET_CODEC_NOISE_GATE_IOCTL = _IOW('R', 0x12, struct rt56xx_cmd),
- RT_GET_CODEC_NOISE_GATE_IOCTL = _IOR('R', 0x12, struct rt56xx_cmd),
- RT_SET_CODEC_DRC_AGC_COMP_IOCTL = _IOW('R', 0x13, struct rt56xx_cmd),
- RT_GET_CODEC_DRC_AGC_COMP_IOCTL = _IOR('R', 0x13, struct rt56xx_cmd),
- RT_GET_CODEC_ID = _IOR('R', 0x30, struct rt56xx_cmd),
-};
-
-int rt56xx_ce_init_hwdep(struct snd_soc_codec *codec);
-struct rt56xx_ops *rt56xx_get_ioctl_ops(void);
-
-#endif /* __RT56XX_IOCTL_H__ */
projects / firefly-linux-kernel-4.4.55.git / commitdiff