serial_rk_pm(struct uart_port *port, unsigned int state,\r
unsigned int oldstate)\r
{\r
+#ifdef CONFIG_CLOCK_CTRL\r
struct uart_rk_port *up =\r
container_of(port, struct uart_rk_port, port);\r
\r
dev_dbg(port->dev, "%s: %s\n", __func__, state ? "disable" : "enable");\r
if (state) {\r
-#ifdef CONFIG_CLOCK_CTRL\r
clk_disable_unprepare(up->clk);\r
clk_disable_unprepare(up->pclk); \r
-#endif\r
} else {\r
-#ifdef CONFIG_CLOCK_CTRL\r
clk_prepare_enable(up->clk);\r
clk_prepare_enable(up->pclk); \r
-#endif\r
}\r
+#endif\r
}\r
\r
static void serial_rk_release_port(struct uart_port *port)\r
dev_info(up->port.dev, "dmam_alloc_coherent dma_rx_buffer fail\n");\r
}\r
else {\r
- dev_info(up->port.dev, "dma_rx_buffer 0x%08x\n", (unsigned) up->dma->rx_buffer);\r
+ dev_info(up->port.dev, "dma_rx_buffer %p\n", up->dma->rx_buffer);\r
dev_info(up->port.dev, "dma_rx_phy 0x%08x\n", (unsigned)up->dma->rx_phy_addr);\r
}\r
\r
dev_info(up->port.dev, "dmam_alloc_coherent dma_tx_buffer fail\n");\r
}\r
else{\r
- dev_info(up->port.dev, "dma_tx_buffer 0x%08x\n", (unsigned) up->dma->tx_buffer);\r
+ dev_info(up->port.dev, "dma_tx_buffer %p\n", up->dma->tx_buffer);\r
dev_info(up->port.dev, "dma_tx_phy 0x%08x\n", (unsigned) up->dma->tx_phy_addr);\r
}\r
spin_lock_init(&(up->dma->tx_lock));\r
if (ret != 0)\r
return ret;\r
platform_set_drvdata(pdev, up);\r
- dev_info(&pdev->dev, "membase 0x%08x\n", (unsigned) up->port.membase);\r
+ dev_info(&pdev->dev, "membase %p\n", up->port.membase);\r
#if USE_WAKEUP\r
serial_rk_setup_wakeup_irq(up); \r
#endif\r