When inserting callee-save register reloads, make sure to skip over any

terminator instructions before the 'ret' in case the target has a
multi-instruction return sequence.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@22041 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp
index 37e40c90a95d194688e3e3940c80f8e8c4eed882..c5bc2337fd79a8d544c4bf8313fd1523fdb94c1d 100644 (file)
--- a/lib/CodeGen/PrologEpilogInserter.cpp
+++ b/lib/CodeGen/PrologEpilogInserter.cpp
@@ -211,6 +211,14 @@ void PEI::saveCallerSavedRegisters(MachineFunction &Fn) {
       MBB = FI;
       I = MBB->end(); --I;
 
+      // Skip over all terminator instructions, which are part of the return
+      // sequence.
+      MachineBasicBlock::iterator I2 = I;
+      while (I2 != MBB->begin() && TII.isTerminatorInstr((--I2)->getOpcode()))
+        I = I2;
+
+      // Restore all registers immediately before the return and any terminators
+      // that preceed it.
       for (unsigned i = 0, e = RegsToSave.size(); i != e; ++i) {
         RegInfo->loadRegFromStackSlot(*MBB, I, RegsToSave[i], StackSlots[i]);
         assert(I != MBB->begin() &&