Added frameindex, constpool, globaladdr, and externalsym as root nodes of

leaaddr.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24724 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 826ea4121415d543269ca89aca20ec4c2505f0b5..10c9d487ef30778b1e9ff1e406c2467ccd383419 100644 (file)
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -48,7 +48,9 @@ def brtarget : Operand<OtherVT>;
 
 // Define X86 specific addressing mode.
 def addr    : ComplexPattern<i32, 4, "SelectAddr", []>;
-def leaaddr : ComplexPattern<i32, 4, "SelectLEAAddr", [add]>;
+def leaaddr : ComplexPattern<i32, 4, "SelectLEAAddr",
+                             [add,
+                              frameindex, constpool, globaladdr, externalsym]>;
 
 // Format specifies the encoding used by the instruction.  This is part of the
 // ad-hoc solution used to emit machine instruction encodings by our machine
@@ -327,7 +329,6 @@ def LEA32r   : I<0x8D, MRMSrcMem,
                  "lea{l} {$src|$dst}, {$dst|$src}",
                  [(set R32:$dst, leaaddr:$src)]>;
 
-
 def REP_MOVSB : I<0xA4, RawFrm, (ops), "{rep;movsb|rep movsb}", []>,
                 Imp<[ECX,EDI,ESI], [ECX,EDI,ESI]>, REP;
 def REP_MOVSW : I<0xA5, RawFrm, (ops), "{rep;movsw|rep movsw}", []>,